<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[Kernel加载时Waiting for root device &#x2F;dev&#x2F;mtdblock4]]></title><description><![CDATA[<p dir="auto">在V821的TINA-SDK里，参考IPC定义自己的主板，采用32MB NOR Flash，启动时发生了如题错误<br />
一、运行日志如下：</p>
<pre><code>U-Boot 2018.07-g90967e5 (Mar 01 2025 - 16:14:15 +0000) Allwinner Technology

[00.374]DRAM:  64 MiB
[00.376]Relocation Offset is: 01f7c000, reloc addr is: 83f7c000
[00.383]secure enable bit: 0
[00.386]CPU=960 MHz,PERI=3072 Mhz,AHB=192 Mhz, APB=96Mhz
FDT sunxi flash disable
SPI ALL:   ready
[00.396]flash init start
[00.398]workmode = 0,storage type = 3
sunxi_get_spif_mode()227 - get dtr_mode_enable fail -13
sunxi_get_spif_mode()236 - get io_mode_enable fail -13
[00.416]spi sample_mode:0 sample_delay:24
[00.421]spif sunxi_slave-&gt;max_hz:100000000
SF: Detected py25q256hb( ) with page size 256 Bytes, erase size 64 KiB, total 32 MiB
[00.433]sunxi flash init ok
[00.436]Loading Environment from SUNXI_FLASH... OK
root_partition is rootfs
set root to /dev/mtdblock4
[00.449]update part info
[00.451]update bootcmd
[00.455]change working_fdt 0x8394bea4 to 0x8392bea4
[00.471]## error: update_fdt_dram_para : FDT_ERR_NOTFOUND
[00.478]update dts
Hit any key to stop autoboot:  0
[03.549]no vendor_boot partition is found
Android's image name: sun300i_riscv32
Detect comp lzma
ERROR: reserving fdt memory region failed (addr=80ffff00 size=100)
[04.263]
Starting kernel ...

[    0.000000] Linux version 5.4.220 (beaan@ubuntu20-v85x) (gcc version 10.4.0 (2024-02-02_nds32le-linux-glibc-v5d-bbc31ec98)) #7 PREEMPT Tue Apr 22 14:52:16 UTC 2025
[    0.000000] printk: bootconsole [earlycon0] enabled
[    0.000000] Reserved memory: created CMA memory pool at 0x0000000083c00000, size 4 MiB
[    0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x0000000081200000, size 0 MiB
[    0.000000] OF: reserved mem: initialized node vdev0buffer@81200000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x0000000081646000, size 0 MiB
[    0.000000] OF: reserved mem: initialized node e907_rpbuf@81646000, compatible id shared-dma-pool
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000080000000-0x0000000083ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000080000000-0x0000000080ffefff]
[    0.000000]   node   0: [mem 0x0000000081244000-0x0000000081643fff]
[    0.000000]   node   0: [mem 0x000000008164e000-0x0000000083ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x0000000083ffffff]
[    0.000000] On node 0 totalpages: 15793
[    0.000000]   Normal zone: 128 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 15793 pages, LIFO batch:3
[    0.000000] SBI specification v0.3 detected
[    0.000000] SBI implementation ID=0x1 Version=0x10000
[    0.000000] SBI v0.2 TIME extension detected
[    0.000000] SBI v0.2 IPI extension detected
[    0.000000] SBI v0.2 RFENCE extension detected
[    0.000000] SBI SRST extension detected
[    0.000000] riscv: base ISA extensions acdfim
[    0.000000] riscv: ELF capabilities acdfim
[    0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[    0.000000] pcpu-alloc: [0] 0
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 15665
[    0.000000] Kernel command line: earlyprintk=sunxi-uart,0x42500000 initcall_debug=0 console=ttyS0,115200 loglevel=8 root=/dev/mtdblock4 rootwait init=/init rdinit=/rdinit partitions=env@mtdblock1:boot@mtdblock2:riscv0@mtdblock3:rootfs@mtdblock4:rootfs_data@mtdblock5:UDISK@mtdblock6 cma=1M coherent_pool= androidboot.serialno=7c000c70f6c107d1fcf wifi_mac=60:c2:2a:10:1b:47 androidboot.hardware=sun300iw1p1 boot_type=3 androidboot.boot_type=3 gpt=1 uboot_message=2018.07-g90967e5(03/01/2025-16:14:15) mbr_offset=311296 androidboot.dramfreq=520 androidboot.dramsize=64 uboot_backup=ubootA
[    0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
[    0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes, linear)
[    0.000000] Sorting __ex_table...
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 35072K/63172K available (3474K kernel code, 650K rwdata, 953K rodata, 136K init, 215K bss, 24004K reserved, 4096K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000]  Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies.
[    0.000000] NR_IRQS: 72, nr_irqs: 72, preallocated irqs: 0
[    0.000000] plic: mapped 187 interrupts with 1 handlers for 2 contexts.
[    0.000000] sunxi:ccu-ng:[INFO]: Current HOSC rate is 40000000HZ
[    0.000000] AW BSP version: eb89978d76, 2025-03-02 00:15:40 +0800
[    0.000000] sunxi:ccu-ng:[INFO]: aon_ccu: sunxi ccu init OK
[    0.000000] sunxi:ccu-ng:[INFO]: sunxi ccu common driver version: 1.2.4
[    0.000000] sunxi:ccu-ng:[INFO]: ccu: sunxi ccu init OK
[    0.000000] sunxi:ccu-ng:[INFO]: sunxi app ccu driver version: 0.7.1
[    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [0]
[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x939a85c40, max_idle_ns: 440795202120 ns
[    0.000010] sched_clock: 64 bits at 40MHz, resolution 25ns, wraps every 4398046511100ns
[    0.008339] Calibrating delay loop (skipped), value calculated using timer frequency.. 80.00 BogoMIPS (lpj=40000)
[    0.018233] pid_max: default: 32768 minimum: 301
[    0.023029] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.030095] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.039700] rcu: Hierarchical SRCU implementation.
[    0.043472] devtmpfs: initialized
[    0.062482] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
[    0.066641] futex hash table entries: 256 (order: -1, 3072 bytes, linear)
[    0.073606] pinctrl core: initialized pinctrl subsystem
[    0.087670] phys:80000000 low vir:c0000000 non-cache:dfc80000~e3c80000
[    0.089706] NET: Registered protocol family 16
[    0.096365] sunxi:ccu-ng:[INFO]: sunxi prcm ccu driver version: 0.0.4
[    0.107051] sunxi:pin-42000000.pinctrl:[INFO]: pinctrl withstand voltage config mode=auto_hard
[    0.110063] sunxi:pin:[INFO]: sunxi pinctrl core driver version: 1.4.8
[    0.116954] sunxi:pin:[INFO]: sunxi rtc-pinctrl version: 0.0.2
[    0.124598] sunxi:pin-42000540.pinctrl:[INFO]: pinctrl withstand voltage config mode=auto_hard
[    0.147659] usbcore: registered new interface driver usbfs
[    0.147767] usbcore: registered new interface driver hub
[    0.152974] usbcore: registered new device driver usb
[    0.157977] mc: Linux media interface: v0.10
[    0.162163] videodev: Linux video capture interface: v2.00
[    0.168154] Advanced Linux Sound Architecture Driver Initialized.
[    0.175306] sun6i-dma 43002000.dma-controller: sunxi dma probed, driver version: 1.2.11
[    0.182851] sunxi-soc-regulator 4a000800.soc_pmu0: Supply for ldo1 (ldo1) resolved to itself
[    0.190027] ldo1: supplied by regulator-dummy
[    0.194735] ion_size_pool heap_size_pool@0: no small_source configurated, use cma as default
[    0.204297] sunxi:pin-42000000.pinctrl:[INFO]: Auto power withstand voltage configuration detected, automatically exit!
[    0.213709] sunxi-twi 42502000.twi0: 42502000.twi0 supply twi not found, using dummy regulator
[    0.222621] sunxi:twi-42502000.twi0:[INFO]: v2.7.8 probe success
[    0.228681] sunxi:pwm-42000c00.pwm:[INFO]: start probe
[    0.229198] sunxi:pwm-42000c00.pwm:[INFO]: pwmchip probe success
[    0.240034] clocksource: Switched to clocksource riscv_clocksource
[    0.246840] thermal_sys: Registered thermal governor 'fair_share'
[    0.246850] thermal_sys: Registered thermal governor 'bang_bang'
[    0.251474] thermal_sys: Registered thermal governor 'step_wise'
[    0.257360] thermal_sys: Registered thermal governor 'user_space'
[    0.263331] thermal_sys: Registered thermal governor 'power_allocator'
[    0.269890] thermal thermal_zone1: power_allocator: sustainable_power will be estimated
[    0.284341] NET: Registered protocol family 2
[    0.288496] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
[    0.296395] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
[    0.303820] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.311396] TCP bind hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.318399] TCP: Hash tables configured (established 1024 bind 1024)
[    0.324826] UDP hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.331224] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.338366] NET: Registered protocol family 1
[    0.344960] workingset: timestamp_bits=30 max_order=14 bucket_order=0
[    0.355367] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.355781] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[    0.362313] fuse: init (API version 7.31)
[    0.366530] NET: Registered protocol family 38
[    0.370171] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 249)
[    0.377451] io scheduler mq-deadline registered
[    0.381947] io scheduler kyber registered
[    0.405466] loop: module loaded
[    0.405994] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    0.409559] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[    0.415814] i2c /dev entries driver
[    0.421201] uart-ng uart-ng0: uart-ng0 supply uart not found, using dummy regulator
[    0.426996] sunxi:uart-ng-uart-ng0:[INFO]: cannot get the TX DMA channel!
[    0.433547] sunxi:uart-ng-uart-ng0:[INFO]: cannot get the RX DMA channel!
[    0.440339] sunxi:uart-ng:[INFO]: sunxi uart-ng driver version: 1.1.10
[    0.446835] uart-ng0: ttyS0 at MMIO 0x42500000 (irq = 134, base_baud = 12000000) is a SUNXI
[    0.455158] sunxi:uart-ng-uart-ng0:[INFO]: console setup baud 115200 parity n bits 8, flow n
[    0.463521] sunxi:uart-ng-uart-ng0:[INFO]: uart0, select set 0, baud 115200, uartclk 192000000 beyond rance[24000000, 120000000]
[    0.475128] printk: console [ttyS0] enabled
[    0.475128] printk: console [ttyS0] enabled
[    0.485362] printk: bootconsole [earlycon0] disabled
[    0.485362] printk: bootconsole [earlycon0] disabled
[    0.495925] sunxi:rtc-4a000c00.rtc:[WARN]: Fail to get clock 'rtc-1k'
[    0.507279] sunxi:rtc-4a000c00.rtc:[WARN]: Fail to get clock 'rtc-spi'
[    0.514708] sunxi:rtc:[INFO]:  Saving SoC boot-reason: COLD-BOOT
[    0.521518] sunxi:rtc-4a000c00.rtc:[INFO]: errata__fix_alarm_day_reg_default_value(): ALARM0_DAY_REG=0, set it to 1
[    0.533256] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate!
[    0.544663] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate!
[    0.556135] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate!
[    0.567503] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate!
[    0.578857] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate!
[    0.590751] sunxi-rtc 4a000c00.rtc: registered as rtc0
[    0.596624] sunxi:rtc-4a000c00.rtc:[INFO]: sunxi rtc probed
[    0.604256] sunxi-wdt 4a001000.watchdog: Watchdog enabled (timeout=300 sec, nowayout=0), driver version: 1.0.5
[    0.617293] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: SD/MMC/SDIO Host Controller Driver(v5.55 2024-08-26 15:32)
[    0.629260] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: ctl-spec-caps 8
[    0.636752] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vmmc regulator found
[    0.644971] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vqmmc regulator found
[    0.653292] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vdmmc regulator found
[    0.661615] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vd33sw regulator found
[    0.670021] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vd18sw regulator found
[    0.678491] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vq33sw regulator found
[    0.686940] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vq18sw regulator found
[    0.695401] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: manual set ocr
[    0.702677] sunxi:sunxi_mmc_host-44020000.sdmmc:[WARN]: Cann't get pin bias hs pinstate,check if needed
[    0.713386] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: Could not get store clock
[    0.721737] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: Could not get msi_lite clock
[    0.730829] sunxi-mmc 44020000.sdmmc: sunxi:sunxi_mmc_hostcd-set-debounce is missing, function is no used
[    0.742100] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: sdc set ios:clk 0Hz bm PP pm UP vdd 21 width 1 timing LEGACY(SDR12) dt B
[    0.767070] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[    0.793091] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[    0.806584] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: detmode:data3
[    0.815739] sunxi:sunxi_spif-44f00000.spif:[INFO]: sample_mode:0 sample_delay:24
[    0.824329] sunxi:sunxi_spif-44f00000.spif:[INFO]: [spi-flash0] mclk 24000000
[    0.832587] sunxi_spif 44f00000.spif: unrecognized JEDEC id bytes: 85 20 19 85 20 19
[    0.841351] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[    0.854851] sunxi:sunxi_spif-44f00000.spif:[ERR]:  sunxi spif nor register error:-2
[    0.863483] sunxi:pin-42000000.pinctrl:[INFO]: Auto power withstand voltage configuration detected, automatically exit!
[    0.876026] sunxi_spif: probe of 44f00000.spif failed with error -2
[    0.883646] sunxi sbi init success
[    0.887483] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: smc 0 p0 err, cmd 8, RTO !!
[    0.896459] sunxi:gpadc:[INFO]: sunxi_gpadc_init(): 2148: gpadc class register success
[    0.905347] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: smc 0 p0 err, cmd 55, RTO !!
[    0.914484] sunxi:gpadc-42009000.gpadc0:[WARN]: warn: sample rate not set
[    0.922160] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: smc 0 p0 err, cmd 55, RTO !!
[    0.931229] input: sunxi-gpadc0/channel0/input0 as /devices/platform/soc@2002000/42009000.gpadc0/input/input0
[    0.942436] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: smc 0 p0 err, cmd 55, RTO !!
[    0.951528] input: sunxi-gpadc0/channel1/input0 as /devices/platform/soc@2002000/42009000.gpadc0/input/input1
[    0.962706] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: smc 0 p0 err, cmd 55, RTO !!
[    0.971421] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: sdc set ios:clk 0Hz bm PP pm OFF vdd 0 width 1 timing LEGACY(SDR12) dt B
[    0.984764] sunxi:gpadc-42009000.gpadc0:[INFO]: sunxi_gpadc probe success
[    0.997416] sunxi-msgbox 43033000.msgbox: sunxi:sunxi_msgboxsunxi_msgbox_probe(): sunxi msgbox start probe
[    1.008649] sunxi-msgbox 43033000.msgbox: sunxi:sunxi_msgboxsunxi_msgbox_probe(): sunxi msgbox probe success
[    1.020538] sunxi-rproc 43030000.e907_rproc: sunxi rproc driver 2.4.3
[    1.028011] sunxi-rproc 43030000.e907_rproc: rv-cfg base: 0x43030000, va: 0xe3c95000
[    1.036810] sunxi-rproc 43030000.e907_rproc: find rproc standby error
[    1.044313] sunxi-rproc 43030000.e907_rproc: timeout_ms: 6000
[    1.050853] sunxi-rproc 43030000.e907_rproc: reset_type: 2
[    1.057058] sunxi-rproc 43030000.e907_rproc: reg:        43031000
[    1.063922] sunxi-rproc 43030000.e907_rproc: irq_num:    151
[    1.070306] sunxi-rproc 43030000.e907_rproc: panic_on_timeout: 1
[    1.077309] sunxi-rproc 43030000.e907_rproc: register memory firmware('amp_rv0.bin') for 'e907', addr: 0x81244000, size: 2097152
[    1.090342] sunxi_remoteproc: register mem fw('amp_rv0.bin'), addr=0x0000000081244000, len=2097152
[    1.100406] sunxi_remoteproc: Image is corrupted (bad magic)
[    1.106807] sunxi_remoteproc: please confirm the length of reserved mem in dts is greater or equal than the size of ELF firmware file('amp_rv0.bin')
[    1.121736] sunxi-rproc 43030000.e907_rproc: register memory firmware('amp_rv0.bin') failed. ret: -22
[    1.132639] Freeing amp_rv0.bin memory: 2048K
[    1.137590] sunxi-rproc 43030000.e907_rproc: Register memory firmware failed when auto-boot is enabled!
[    1.148157] sunxi-rproc 43030000.e907_rproc: is_using_kernel_fw: 0
[    1.155206] remoteproc remoteproc0: e907_rproc is available
[    1.161646] sunxi-rproc 43030000.e907_rproc: sunxi rproc driver probe ok
[    1.169809] sunxi-rpbuf-controller rpbuf_controller0@0: assigned reserved memory node e907_rpbuf@81646000
[    1.181238] [ADDR_MGT] addr_mgt_probe: module version: v1.0.13
[    1.188379] [ADDR_MGT] addr_mgt_probe: success.
[    1.194496] sunxi_gpio_motor: init success.
[    1.199562] NET: Registered protocol family 17
[    1.204662] NET: Registered protocol family 15
[    1.226117] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate!
[    1.237547] sunxi-rtc 4a000c00.rtc: setting system clock to 1970-01-01T00:00:05 UTC (5)
[    1.248953] sunxi:disp:[WARN]: [DE]: not found boot_disp0
[    1.255190] sunxi:disp:[WARN]: [DE]: sel 0, gamma_base=0xe4030040
[    1.262087] sunxi:disp:[WARN]: [DE]: sel 0, gamma_ctrl_block 0xe4030040 val c36e0000 dirty 0 size 8 gamma_tab_block 0xe4030100 val c36e00c0 dirty 0 size 1024
[    1.278711] sunxi:disp:[ERR]: [FB]: fb_num 1 fb_format 0
[    1.284819] sunxi:disp:[ERR]: [FB]: fbinfo: fb: 0, disp: 0 channel: 0 layer: 0 zorder: 16 w: 320 h: 192
[    1.295626] sunxi:disp:[ERR]: [FB]: fb_num 0 use rot 0 degree0
[    1.302217] sunxi:disp:[ERR]: [FB]: smooth display disp0: type64 mode4 disp1: type0 mode0
[    1.313217] sunxi:disp:[ERR]: [FB]: display logo on display 0 channel 0 layer 0 type 0
[    1.322317] sunxi:disp:[ERR]: [FB]: fb 0 vir 0x(ptrval) phy 0x83c80000
[    1.329688] sunxi:disp:[ERR]: [FB]: platform_fb_post_init start
[    1.336679] sunxi:disp:[WARN]: [DE]: attached ok, mgr0&lt;--&gt;dev0
[    1.343650] sunxi:VE:[INFO]: 2227 sunxi_cedar_init(): sunxi cedar version 1.1
[    1.351730] sunxi:disp:[WARN]: [DE]: type:64,mode:4,fmt:rgb,bits:8bits,eotf:0,cs:0 dvi_hdmi:2, range:0 scan:0 ratio:8
[    1.363962] sunxi:VE:[INFO]: 2149 sunxi_cedar_probe(): probe ve
[    1.370986] sunxi-cedar 41c0e000.ve: 41c0e000.ve supply ve not found, using dummy regulator
[    1.381740] sunxi:sound-common:[WARN]: 326 pacfg_level_trig_init(): pa-pin-msleep1-0 get failed, default 0
[    1.393954] sunxi:sound-mach:[WARN]: 372 asoc_simple_parse_ucfmt(): set data late to default
[    1.403924] debugfs: Directory 'soc@2002000:codec_plat' with parent 'audiocodec' already present!
[    1.414137] sunxi-snd-mach soc@2002000:codec_mach: 42030000.codec &lt;-&gt; soc@2002000:codec_plat mapping ok
[    1.428768] ALSA device list:
[    1.432192]   #0: audiocodec
[    1.435682] sunxi:uart-ng-uart-ng0:[INFO]: uart0, select set 0, baud 115200, uartclk 192000000 beyond rance[24000000, 120000000]
[    1.448804] Waiting for root device /dev/mtdblock4...
awbase abnormal...[0x33330001]
awbase abnormal...[0x33330001]

</code></pre>
<p dir="auto">二、uboot-board.dts</p>
<pre><code>/*
* Allwinner Technology CO., Ltd. sun300iw1p1 soc board.
*
* soc board support.
*/

&amp;platform {
	eraseflag   = &lt;1&gt;;
	next_work   = &lt;3&gt;;
	debug_mode  = &lt;1&gt;;
};

&amp;target {
	boot_clock = &lt;1008&gt;;	/*CPU boot frequency, Unit: MHz*/
	storage_type = &lt;3&gt;; /*boot medium, 0-nand, 1-card0, 2-card2, 3-nor, -1(defualt)auto scan*/
	burn_key = &lt;1&gt;;		/*1:support burn key; 0:not support burn key*/
};

&amp;sdc0_pins_a {
	allwinner,pins = "PC0", "PC1", "PC2",
			"PC3", "PC4", "PC5";
	allwinner,function = "sdc0";
	allwinner,muxsel = &lt;2&gt;;
	allwinner,drive = &lt;3&gt;;
	allwinner,pull = &lt;1&gt;;
	pins = "PC0", "PC1", "PC2",
		"PC3", "PC4", "PC5";
	function = "sdc0";
	drive-strength = &lt;30&gt;;
	bias-pull-up;
	power-source = &lt;3300&gt;;
};

&amp;sdc0_pins_b {
	pins = "PF0", "PF1", "PF2",
		"PF3", "PF4", "PF5";
	function = "sdc0";
	drive-strength = &lt;30&gt;;
	bias-pull-up;
	power-source = &lt;1800&gt;;
};

&amp;sdc0_pins_c {
	pins = "PF0", "PF1", "PF2",
		"PF3", "PF4", "PF5";
	function = "gpio_in";
};

&amp;sdc2_pins_a {
	allwinner,pins = "PC2", "PC3", "PC4",
			"PC5", "PC6", "PC7";
	allwinner,function = "sdc2";
	allwinner,muxsel = &lt;3&gt;;
	allwinner,drive = &lt;3&gt;;
	allwinner,pull = &lt;1&gt;;
	pins = "PC2", "PC3", "PC4",
		"PC5", "PC6", "PC7";
	function = "sdc2";
	drive-strength = &lt;30&gt;;
	bias-pull-up;

};

&amp;sdc2_pins_b {
	pins = "PC2", "PC3", "PC4",
		"PC5", "PC6", "PC7";
	function = "gpio_in";
};

&amp;card0_boot_para {  /* Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value */
	/* reg = &lt;0x0 0x2 0x0 0x0&gt;;  [&gt; Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value &lt;] */
	device_type = "card0_boot_para";
	card_ctrl = &lt;0x0&gt;;
	card_high_speed = &lt;0x1&gt;;
	card_line = &lt;0x4&gt;;
	pinctrl-0 = &lt;&amp;sdc0_pins_a&gt;;
	clk_type = "typ1";
};

&amp;card2_boot_para {  /* Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value */
	/* reg = &lt;0x0 0x3 0x0 0x0&gt;;  [&gt; Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value &lt;] */
	device_type = "card2_boot_para";
	card_ctrl = &lt;0x2&gt;;
	card_high_speed = &lt;0x1&gt;;
	card_line = &lt;0x4&gt;;
	pinctrl-0 = &lt;&amp;sdc2_pins_a&gt;;
	sdc_ex_dly_used = &lt;0x2&gt;;
	sdc_tm4_hs200_max_freq = &lt;150&gt;;
	sdc_tm4_hs400_max_freq = &lt;100&gt;;
};

&amp;gpio_bias {  /* Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value */
	device_type = "gpio_bias";
};

&amp;aliases {
	spi0 = &amp;spi0;
	spif = &amp;spif;
};

&amp;pio{
	spi0_pins_a: spi0@0 {
		allwinner,pins = "PC9", "PC8", "PC11";
		allwinner,pname = "spi0_sclk", "spi0_mosi",
				"spi0_miso";
		allwinner,function = "spi0";
		allwinner,muxsel = &lt;3&gt;;
		allwinner,drive = &lt;3&gt;;
		allwinner,pull = &lt;0&gt;;
	};

	spi0_pins_b: spi0@1 {
		allwinner,pins = "PC10", "PC7", "PC6";
		allwinner,pname = "spi0_cs0", "spi0_hold",
				"spi0_wp";
		allwinner,function = "spi0";
		allwinner,muxsel = &lt;3&gt;;
		allwinner,drive = &lt;3&gt;;
		allwinner,pull = &lt;1&gt;;   // only CS should be pulled up
	};

	spi0_pins_c: spi0@2 {
		allwinner,pins = "PC6", "PC7", "PC8", "PC9",
				"PC10", "PC11";
		allwinner,function = "gpio_in";
		allwinner,muxsel = &lt;0xf&gt;;
		allwinner,drive = &lt;1&gt;;
		allwinner,pull = &lt;0&gt;;
	};

	spif_pins_a: spif@0 {
		allwinner,pins = "PC8", "PC9", "PC11";
		allwinner,pname = "spif_mosi", "spif_clk", "spif_miso";
		allwinner,function = "spif";
		allwinner,muxsel = &lt;2&gt;;
		allwinner,drive = &lt;3&gt;;
		allwinner,pull = &lt;0&gt;;
	};

	spif_pins_b: spif@1 {
		allwinner,pins = "PC6", "PC7", "PC10";
		allwinner,pname = "spif_wp", "spif_hold", "spif_cs0";
		allwinner,function = "spif";
		allwinner,muxsel = &lt;2&gt;;
		allwinner,drive = &lt;3&gt;;
		allwinner,pull = &lt;1&gt;;   // only CS should be pulled up
	};

	spif_pins_c: spif@2 {
		allwinner,pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11";
		allwinner,function = "gpio_in";
		allwinner,muxsel = &lt;0xf&gt;;
		allwinner,drive = &lt;1&gt;;
		allwinner,pull = &lt;0&gt;;
	};
};

&amp;spi0 {
	clock-frequency = &lt;100000000&gt;;
	pinctrl-0 = &lt;&amp;spi0_pins_a &amp;spi0_pins_b&gt;;
	pinctrl-1 = &lt;&amp;spi0_pins_c&gt;;
	pinctrl-names = "default", "sleep";
	spi_slave_mode = &lt;0&gt;;
	spi_dbi_enable = &lt;0&gt;;
	spi0_cs_number = &lt;1&gt;;
	status = "disabled";

	spi_board0 {
		device_type = "spi_board0";
		compatible = "spi-nor";
		spi-max-frequency = &lt;100000000&gt;;
		m25p,fast-read = &lt;1&gt;;
		/*individual_lock;*/
		reg = &lt;0x0&gt;;
		spi-rx-bus-width=&lt;0x04&gt;;
		spi-tx-bus-width=&lt;0x04&gt;;
		status="disabled";
	};

	spi-nand@0 {
		compatible = "spi-nand";
		spi-max-frequency=&lt;0x05F5E100&gt;;
		reg = &lt;0x0&gt;;
		spi-rx-bus-width=&lt;0x01&gt;;
		spi-tx-bus-width=&lt;0x01&gt;;
		status="disabled";
	};
};

&amp;spif {
	clock-frequency = &lt;100000000&gt;;
	pinctrl-0 = &lt;&amp;spif_pins_a &amp;spif_pins_b&gt;;
	pinctrl-1 = &lt;&amp;spif_pins_c&gt;;
	pinctrl-names = "default", "sleep";
	/*spi-supply = &lt;&amp;reg_dcdc1&gt;;*/
	status = "okay";

	spif-nor {
		device_type = "spi_board0";
		compatible = "spi-nor";
		spif-max-frequency = &lt;100000000&gt;;
		m25p,fast-read = &lt;1&gt;;
		/*individual_lock;*/
		reg = &lt;0x0&gt;;
		spif-rx-bus-width=&lt;0x04&gt;;
		spif-tx-bus-width=&lt;0x04&gt;;
		status="disabled";
	};
};

&amp;sunxi_flashmap {
	/* Unit: Sector */
	sdmmc_map {
		logic_offset = &lt;40960&gt;;
		boot_param_start = &lt;24504&gt;;
		boot_param_size = &lt;1&gt;;
		uboot_start = &lt;32800&gt;;
		uboot_size = &lt;4096&gt;;
		uboot_bak_start = &lt;24576&gt;;
		uboot_bak_size = &lt;4096&gt;;
		secure_storage_start = &lt;12288&gt;;
		secure_storage_size = &lt;512&gt;;
		tuning_data_start = &lt;24512&gt;;
		tuning_data_size = &lt;60&gt;;
		status = "disabled";
	};


/*
*  |-44k-|   -4k-   |   -uboot size-    |-16k-|
*
*  |boot0|boot_param|uboot(boot_package)| mbr |  ===&gt; mtdblock0(need 64k aligned)
*
*        |          |-&gt;uboot_start      |     |-&gt; kernel start
*        |-&gt;boot_param_start            |-&gt;logic_offset
*/
	nor_map {
		/*Unit: Sector, 8M flash:16384, 16M flash:32768, 32M flash:65536*/
		/* logic offset requires block size(64K) alignment - 32(mbr size) */
		flash_size = &lt;65536&gt;;
		logic_offset = &lt;608&gt;;
		secure_logic_offset = &lt;2016&gt;;
		rtos_logic_offset = &lt;2016&gt;;
		rtos_secure_logic_offset = &lt;2016&gt;;
		boot_param_start = &lt;88&gt;;
		boot_param_size = &lt;8&gt;;
		uboot_start = &lt;96&gt;;
		uboot_size = &lt;384&gt;;
		boot0_start = &lt;0&gt;;
		status = "okay";
	};
};

</code></pre>
<p dir="auto">三、board.dts</p>
<pre><code>// SPDX-License-Identifier: (GPL-2.0+ or MIT)

/dts-v1/;

#include "sun300iw1p1.dtsi"

/{
	board = "V821", "V821-ipc";
	compatible = "allwinner,v821", "riscv,sun300iw1p1";
	aliases {
	};

	reg_vdd_cpu: vdd-cpu {
		compatible = "regulator-fixed";
		regulator-name = "vdd_cpu";
		regulator-min-microvolt = &lt;920000&gt;;
		regulator-max-microvolt = &lt;920000&gt;;
		regulator-always-on;
		regulator-boot-on;
		status = "okay";
	};

	/* used for hib &amp; ultra standby poweron source enable mask */
	/* bit 0 ~ bit 7 - pl 0 ~pl 7 */
	/* bit 9 rtc alarm0 */
	/* bit 10 rtc alarm1 */
	/* bit 11 wakeuptimer */
	/* bit 12 wlan, keep 0 because hib has no wlan and ultra wakes up by wlan on remote core */
	poweron-source {
		hib_poweron_source  = &lt;0x000007FF&gt;;
		ultra_poweron_source  = &lt;0x000007FF&gt;;
	};

	reserved-memory {
		rv_ddr_reserved: rvddrreserved@81000000 {
			reg = &lt;0x0 0x81000000 0x0 0x200000&gt;;
			no-map;
		};
		/*
		* The name should be "vdev%dbuffer".
		* Its size should be not less than
		*     RPMSG_BUF_SIZE * (num of buffers in a vring) * 2
		*   = 512 * (num of buffers in a vring) * 2
		*/
		rv_vdev0buffer: vdev0buffer@81200000 {
			compatible = "shared-dma-pool";
			reg = &lt;0x0 0x81200000 0x0 0x40000&gt;;
			no-map;
		};
		/*
		* The name should be "vdev%dvring%d".
		* The size of each should be not less than
		*     PAGE_ALIGN(vring_size(num, align))
		*   = PAGE_ALIGN(16 * num + 6 + 2 * num + (pads for align) + 6 + 8 * num)
		*
		* (Please refer to the vring layout in include/uapi/linux/virtio_ring.h)
		*/
		rv_vdev0vring0: vdev0vring0@81240000 {
			reg = &lt;0x0 0x81240000 0x0 0x2000&gt;;
			no-map;
		};

		rv_vdev0vring1: vdev0vring1@81242000 {
			reg = &lt;0x0 0x81242000 0x0 0x2000&gt;;
			no-map;
		};

		e907_mem_fw: e907_mem_fw@81244000 {
			/* boot0 &amp; uboot0 load elf addr */
			reg = &lt;0x0 0x81244000 0x0 0x00200000&gt;;
		};

		e907_share_irq_table: share_irq_table@81644000 {
			reg = &lt;0x0 0x81644000 0x0 0x2000&gt;;
			no-map;
		};

		e907_rpbuf_reserved:e907_rpbuf@81646000 {
			compatible = "shared-dma-pool";
			reg = &lt;0x0 0x81646000 0x0 0x8000&gt;;
			no-map;
		};

		size_pool {
			reg = &lt;0 0x82000000 0 0x0f00000&gt;;
		};

		linux,cma {
			size = &lt;0x0 0x400000&gt;;
		};
	};

	reserved-irq {
		share-e907 {
			arch-name = "e907";
			memory-region = &lt;&amp;e907_share_irq_table&gt;;
			/* defined by sun300iw1-share-irq-dt.h */
			share-irq =
					&lt;1    0x1    E907_PA_IRQ_NUM    A27_PA_IRQ_NUM    0x00000000&gt;,
					&lt;3    0x3    E907_PC_IRQ_NUM    A27_PC_IRQ_NUM    0x00000000&gt;,
					&lt;4    0x4    E907_PD_IRQ_NUM    A27_PD_IRQ_NUM    0x00000000&gt;,
					&lt;12   0xc    E907_PL_IRQ_NUM    A27_PL_IRQ_NUM    0x00000000&gt;;
		};
	};

	hifbypass: hifbypass {
		compatible = "allwinner,sun300wi-sip-wifi";
		interrupts-extended = &lt;&amp;plic0 160 IRQ_TYPE_LEVEL_HIGH&gt;;
		status = "disabled";
	};

	rpbuf_controller0: rpbuf_controller0@0 {
		compatible = "allwinner,rpbuf-controller";
		remoteproc = &lt;&amp;e907_rproc&gt;;
		ctrl_id = &lt;0&gt;;
		memory-region = &lt;&amp;e907_rpbuf_reserved&gt;;
		status = "okay";
	};

	rpbuf_xradio: rpbuf_xradio@0 {
		compatible = "allwinner,rpbuf-xradio";
		rpbuf = &lt;&amp;rpbuf_controller0&gt;;
		status = "okay";
	};

	heap_size_pool@0{
		compatible = "allwinner,size_pool";
		heap-name = "size_pool";
		heap-id = &lt;0x7&gt;;
		heap-base = &lt;0x82000000&gt;;
		heap-size = &lt;0x0f00000&gt;;
		heap-type = "ion_size_pool";
		thrs = &lt;100&gt;;
		sizes = &lt;0 15360&gt;;
		fall_to_big_pool = &lt;1&gt;;
	};

	gpio-motor@0 {
		compatible = "allwinner,gpio-motor";
		ab-pin-black = &lt;&amp;pio PD 12 GPIO_ACTIVE_HIGH&gt;;
		ab-pin-yellow = &lt;&amp;pio PD 13 GPIO_ACTIVE_HIGH&gt;;
		ab-pin-brown = &lt;&amp;pio PD 14 GPIO_ACTIVE_HIGH&gt;;
		ab-pin-blue = &lt;&amp;pio PD 15 GPIO_ACTIVE_HIGH&gt;;
		cd-pin-black = &lt;&amp;pio PD 16 GPIO_ACTIVE_HIGH&gt;;
		cd-pin-yellow = &lt;&amp;pio PD 17 GPIO_ACTIVE_HIGH&gt;;
		cd-pin-brown = &lt;&amp;pio PD 18 GPIO_ACTIVE_HIGH&gt;;
		cd-pin-blue = &lt;&amp;pio PD 19 GPIO_ACTIVE_HIGH&gt;;
		status = "okay";
	};

	ae350_standby_debug:ae350_standby_debug@1 {
		compatible = "allwinner,sun300iw1-ae350-standby-debug";
		mboxes = &lt;&amp;msgbox 2&gt;;
		mbox-names = "ae350-notify";
		status = "okay";
	};
};

&amp;rtc_pio {
	uart0_pins_default: uart0_pins@0 {
		pins = "PL4", "PL5";
		function = "uart0";
	};

	uart0_pins_sleep: uart0_pins@1 {
		pins = "PL4", "PL5";
		function = "io_disabled";
	};

	uart3_pins_default: uart3_pins@0 {
		pins = "PL2", "PL3";
		function = "uart3";
	};

	uart3_pins_sleep: uart3_pins@1 {
		pins = "PL2", "PL3";
		function = "io_disabled";
	};
};

&amp;pio {
	uart1_pins_default: uart1_pins@0 {
		pins = "PD7", "PD8", "PD9", "PD10";
		function = "uart1";
	};

	uart1_pins_sleep: uart1_pins@1 {
		pins = "PD7", "PD8", "PD9", "PD10";
		function = "io_disabled";
	};

	uart2_pins_default: uart2_pins@0 {
		pins = "PA5", "PA6", "PA7", "PA8";
		function = "uart2";
	};

	uart2_pins_sleep: uart2_pins@1 {
		pins = "PA5", "PA6", "PA7", "PA8";
		function = "io_disabled";
	};

	gmac0_pins_default: gmac_pins@0 {
		pins = "PD1", "PD2", "PD3",
			"PD4", "PD5", "PD6", "PD7",
			"PD8", "PD9", "PD10", "PD11";
		function = "rmii";
		allwinner,drive = &lt;3&gt;;
		bias-pull-up;
	};

	gmac0_pins_sleep: gmac_pins@1 {
		pins = "PD1", "PD2", "PD3",
			"PD4", "PD5", "PD6", "PD7",
			"PD8", "PD9", "PD10", "PD11";
		function = "io_disabled";
	};

	pwm8_pins_active: pwm8@0 {
		pins = "PD18";
		function = "pwm0_8";
	};
	pwm8_pins_sleep: pwm8@1 {
		pins = "PD18";
		function = "gpio_in";
		bias-pull-down;
	};
	pwm9_pins_active: pwm9@0 {
		pins = "PD19";
		function = "pwm0_9";
	};
	pwm9_pins_sleep: pwm9@1 {
		pins = "PD19";
		function = "gpio_in";
		bias-pull-down;
	};

	twi0_pins_default: twi0@0 {
		pins = "PA3", "PA4";
		function = "twi0";
		allwinner,drive = &lt;0&gt;;
		bias-pull-up;
	};

	twi0_pins_sleep: twi0@1 {
		pins = "PA3", "PA4";
		function = "gpio_in";
	};

	spi0_pins_default: spi0@0 {
		pins = "PC9", "PC8", "PC11"; /* clk, mosi, miso */
		function = "spi0";
		allwinner,drive = &lt;0&gt;;
	};

	spi0_pins_cs: spi0@1 {
		pins = "PC6", "PC7", "PC10"; /* wp, hold, cs */
		function = "spi0";
		allwinner,drive = &lt;0&gt;;
		bias-pull-up;
	};

	spi0_pins_sleep: spi0@2 {
		pins = "PC6", "PC7", "PC9", "PC8", "PC11", "PC10";
		function = "io_disabled";
	};

	sdc0_pins_a: sdc0@0 {
		pins = "PC0", "PC1", "PC2",
				"PC3", "PC5";
		function = "sdc0";
		allwinner,drive = &lt;3&gt;;
		bias-pull-up;
	};

	sdc0_pins_c: sdc0@2 {
		pins = "PC0", "PC1", "PC2",
				"PC3", "PC4", "PC5";
		function = "gpio_in";
	};

	sdc0_pins_d: sdc0@3 {
		pins = "PC4";
		function = "sdc0";
		allwinner,drive = &lt;3&gt;;
		bias-disable;
	};

	/* for uboot card probe */
	sdc0_pins_uboot: sdc0@4 {
		allwinner,pins = "PC0", "PC1", "PC2",
				"PC3", "PC4", "PC5";
		allwinner,function = "sdc0";
		allwinner,muxsel = &lt;2&gt;;
		allwinner,drive = &lt;3&gt;;
		allwinner,pull = &lt;1&gt;;
		power-source = &lt;3300&gt;;
	};

	spif_pins_default: spif@0 {
		pins = "PC9", "PC8", "PC11"; /* clk, mosi, miso */
		function = "spif";
		allwinner,drive = &lt;1&gt;;
	};

	spif_pins_cs: spif@1 {
		pins = "PC6", "PC7", "PC10"; /* wp, hold, cs */
		function = "spif";
		allwinner,drive = &lt;1&gt;;
		bias-pull-up;
	};

	spif_pins_sleep: spif@2 {
		pins = "PC6", "PC7", "PC9", "PC8", "PC11", "PC10";
		function = "io_disabled";
	};
};

&amp;soc {
	card0_boot_para@0 {
		device_type = "card0_boot_para";
		card_ctrl = &lt;0x0&gt;;
		card_high_speed = &lt;0x1&gt;;
		card_line = &lt;0x4&gt;;
		pinctrl-0 = &lt;&amp;sdc0_pins_uboot&gt;;
		clk_type = "typ1";
	};
	addr_mgt: addr_mgt {
		compatible = "allwinner,sunxi-addr_mgt";
		type_addr_wifi = &lt;0x0&gt;;
		type_addr_bt   = &lt;0x0&gt;;
		type_addr_eth  = &lt;0x0&gt;;
		status = "okay";
	};
};

&amp;uart0 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = &lt;&amp;uart0_pins_default&gt;;
	pinctrl-1 = &lt;&amp;uart0_pins_sleep&gt;;
	status = "okay";
};

&amp;uart1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = &lt;&amp;uart1_pins_default&gt;;
	pinctrl-1 = &lt;&amp;uart1_pins_sleep&gt;;
	status = "disabled";
};

&amp;uart2 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = &lt;&amp;uart2_pins_default&gt;;
	pinctrl-1 = &lt;&amp;uart2_pins_sleep&gt;;
	status = "disabled";
};

&amp;uart3 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = &lt;&amp;uart3_pins_default&gt;;
	pinctrl-1 = &lt;&amp;uart3_pins_sleep&gt;;
	status = "disabled";
};

&amp;twi0 {
	clock-frequency = &lt;400000&gt;;
	pinctrl-0 = &lt;&amp;twi0_pins_default&gt;;
	pinctrl-1 = &lt;&amp;twi0_pins_sleep&gt;;
	pinctrl-names = "default", "sleep";
	/* For stability and backwards compatibility, we recommend setting 'twi_drv_used' to 1 */
	twi_drv_used = &lt;1&gt;;
	status = "okay";
};

&amp;soc_pmu0 {
	status = "okay";
};

&amp;sdc0 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = &lt;&amp;sdc0_pins_a &amp;sdc0_pins_d&gt;;
	pinctrl-1 = &lt;&amp;sdc0_pins_c&gt;;
	bus-width = &lt;4&gt;;
	cd-used-24M;
	/*cd-gpios = &lt;&amp;pio PC 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;*/
	/*non-removable;*/
	/*broken-cd;*/
	/*cd-inverted*/
	data3-detect;
	cap-sd-highspeed;
	/*sd-uhs-sdr50;*/
	/*sd-uhs-ddr50;*/
	/*sd-uhs-sdr104;*/
	no-sdio;
	no-mmc;
	/*sunxi-power-save-mode;*/
	sunxi-dis-signal-vol-sw;
	max-frequency = &lt;50000000&gt;;
	ctl-spec-caps = &lt;0x8&gt;;
	status = "okay";
};

&amp;pwm0_8 {
	pinctrl-names = "active", "sleep";
	pinctrl-0 = &lt;&amp;pwm8_pins_active&gt;;
	pinctrl-1 = &lt;&amp;pwm8_pins_sleep&gt;;
	status = "disabled";
};

&amp;pwm0_9 {
	pinctrl-names = "active", "sleep";
	pinctrl-0 = &lt;&amp;pwm9_pins_active&gt;;
	pinctrl-1 = &lt;&amp;pwm9_pins_sleep&gt;;
	status = "disabled";
};

&amp;spi0 {
	pinctrl-0 = &lt;&amp;spi0_pins_default &amp;spi0_pins_cs&gt;;
	pinctrl-1 = &lt;&amp;spi0_pins_sleep&gt;;
	pinctrl-names = "default", "sleep";
	sunxi,spi-bus-mode = &lt;SUNXI_SPI_BUS_NOR&gt;;
	sunxi,spi-cs-mode = &lt;SUNXI_SPI_CS_SOFT&gt;;
	status = "disabled";

	dmas;
	dma-names;
	spi_board0 {
		device_type = "spi_board0";
		compatible = "spi-nor";
		spi-max-frequency = &lt;100000000&gt;;
		m25p,fast-read = &lt;1&gt;;
		/*individual_lock;*/
		reg = &lt;0x0&gt;;
		spi-rx-bus-width = &lt;4&gt;;
		spi-tx-bus-width = &lt;4&gt;;
		status = "disabled";
	};
};

&amp;spif0 {
	clock-frequency = &lt;100000000&gt;;
	pinctrl-0 = &lt;&amp;spif_pins_default &amp;spif_pins_cs&gt;;
	pinctrl-1 = &lt;&amp;spif_pins_sleep&gt;;
	pinctrl-names = "default", "sleep";
	spif-rx-bus-width = &lt;0x4&gt;;
	spif-tx-bus-width = &lt;0x4&gt;;
	//prefetch_read_mode_enabled;	/* choose prefect read mode */
	//dtr_mode_enabled;				/* choose double edge trigger mode */
	//dqs_mode_enabled;				/* choose dqs mode(nand provide clk mode) */
	status = "okay";

	spif-nor  {
		device_type = "spi_board0";
		compatible = "spif-nor";
		spi-max-frequency = &lt;0x5f5e100&gt;;
		reg = &lt;0x0&gt;;
		status = "disabled";
	};
};

&amp;mdio0 {
	status = "disabled";
	phy0: ethernet-phy@0 {
		/* JL11x1 */
		compatible = "ethernet-phy-id937c.4024",
			"ethernet-phy-ieee802.3-c22";
		reg = &lt;0&gt;;
		max-speed = &lt;100&gt;;  /* Max speed capability for rmii */
		reset-gpios = &lt;&amp;pio PC 16 GPIO_ACTIVE_LOW&gt;;
		/* PHY datasheet rst time */
		reset-assert-us = &lt;200000&gt;;
		reset-deassert-us = &lt;150000&gt;;
		status = "disabled";
	};
};

&amp;gmac0 {
	phy-mode = "rmii";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = &lt;&amp;gmac0_pins_default&gt;;
	pinctrl-1 = &lt;&amp;gmac0_pins_sleep&gt;;
	sunxi,phy-clk-type = &lt;0&gt;;
	phy-handle = &lt;&amp;phy0&gt;;
	tx-delay = &lt;0&gt;;
	rx-delay = &lt;0&gt;;
	status = "disabled";
};

&amp;vind0 {
	csi_top = &lt;200000000&gt;;
	status = "disabled";

	csi1: csi@45821000 {
		pinctrl-names = "default","sleep";
		pinctrl-0 = &lt;&amp;ncsi_bt656_pins_a&gt;;
		pinctrl-1 = &lt;&amp;ncsi_bt656_pins_b&gt;;
		status = "disabled";
	};

	tdm0: tdm@45908000 {
		work_mode = &lt;0x0&gt;;
	};

	isp00:isp@45900000 {
		work_mode = &lt;0x0&gt;;
		ldci_select = &lt;0x1&gt;;
	};

	isp01:isp@458ffffc {
		status = "disabled";
		ldci_select = &lt;0x1&gt;;
	};

	isp10:isp@4 {
		status = "disabled";
	};

	scaler00:scaler@45910000 {
		work_mode = &lt;0x0&gt;;
		status = "disabled";
	};

	scaler01:scaler@4590fffc {
		work_mode = &lt;0xff&gt;;
		status = "disabled";
	};

	scaler10:scaler@45910400 {
		work_mode = &lt;0x0&gt;;
		status = "disabled";
	};

	scaler11:scaler@459103fc {
		work_mode = &lt;0xff&gt;;
		status = "disabled";
	};

	actuator0: actuator@2108180 {
		device_type = "actuator0";
		actuator0_slave = &lt;0x18&gt;;
		actuator0_af_pwdn = &lt;&gt;;
		actuator0_afvdd = "afvcc-csi";
		actuator0_afvdd_vol = &lt;2800000&gt;;
		status = "disabled";
		actuator0_name;
	};

	flash0: flash@2108190 {
		device_type = "flash0";
		flash0_type = &lt;2&gt;;
		flash0_en = &lt;&gt;;
		flash0_mode = &lt;&gt;;
		flash0_flvdd = "";
		flash0_flvdd_vol = &lt;&gt;;
		device_id = &lt;0&gt;;
		status = "disabled";
	};

	sensor0: sensor@5812000 {
		device_type = "sensor0";
		sensor0_mname = "gc1084_mipi";
		sensor0_twi_cci_id = &lt;0&gt;;
		sensor0_twi_addr = &lt;0x6e&gt;;
		sensor0_mclk_id = &lt;0&gt;;
		sensor0_pos = "rear";
		sensor0_isp_used = &lt;1&gt;;
		sensor0_fmt = &lt;1&gt;;
		sensor0_stby_mode = &lt;0&gt;;
		sensor0_vflip = &lt;0&gt;;
		sensor0_hflip = &lt;0&gt;;
		sensor0_iovdd-supply = &lt;&gt;;
		sensor0_iovdd_vol = &lt;&gt;;
		sensor0_avdd-supply = &lt;&amp;pmu_soc_ldo1&gt;;
		sensor0_avdd_vol = &lt;2800000&gt;;
		sensor0_dvdd-supply = &lt;&gt;;
		sensor0_dvdd_vol = &lt;&gt;;
		sensor0_power_en = &lt;&gt;;
		sensor0_reset = &lt;&amp;pio PA 0 GPIO_ACTIVE_LOW&gt;;
		sensor0_pwdn = &lt;&gt;;
		status = "disabled";
		act_handle = &lt;&gt;;
	};

	sensor1: sensor@5812010 {
		device_type = "sensor1";
		sensor1_mname = "gc1084_2";
		sensor1_twi_cci_id = &lt;0&gt;;
		sensor1_twi_addr = &lt;0x6c&gt;;
		sensor1_mclk_id = &lt;1&gt;;
		sensor1_pos = "front";
		sensor1_isp_used = &lt;1&gt;;
		sensor1_fmt = &lt;1&gt;;
		sensor1_stby_mode = &lt;0&gt;;
		sensor1_vflip = &lt;0&gt;;
		sensor1_hflip = &lt;0&gt;;
		sensor1_iovdd-supply = &lt;&gt;;
		sensor1_iovdd_vol = &lt;&gt;;
		sensor1_avdd-supply = &lt;&gt;;
		sensor1_avdd_vol = &lt;&gt;;
		sensor1_dvdd-supply = &lt;&gt;;
		sensor1_dvdd_vol = &lt;&gt;;
		sensor1_power_en = &lt;&gt;;
		sensor1_reset = &lt;&amp;pio PD 13 GPIO_ACTIVE_LOW&gt;;
		status = "disabled";
	};

	sensor_list0:sensor_list@200b820 {
		sensor00_mname = "gc5035_mipi";
		sensor00_twi_addr = &lt;0x6c&gt;;
		sensor00_type = &lt;1&gt;;
		sensor00_hflip = &lt;0&gt;;
		sensor00_vflip = &lt;0&gt;;
		sensor00_act_used = &lt;1&gt;;
		sensor00_act_name = "dw9714_act";
		sensor00_act_twi_addr = &lt;0x18&gt;;
		sensor01_mname = "ov5675_mipi";
		sensor01_twi_addr = &lt;0x6c&gt;;
		sensor01_type = &lt;1&gt;;
		sensor01_hflip = &lt;0&gt;;
		sensor01_vflip = &lt;0&gt;;
		sensor01_act_used = &lt;1&gt;;
		sensor01_act_name = "dw9714_act";
		sensor01_act_twi_addr = &lt;0x18&gt;;
		sensor02_mname = "sp5409_mipi";
		sensor02_twi_addr = &lt;0x78&gt;;
		sensor02_type = &lt;1&gt;;
		sensor02_hflip = &lt;0&gt;;
		sensor02_vflip = &lt;0&gt;;
		sensor02_act_used = &lt;1&gt;;
		sensor02_act_name = "dw9714_act";
		sensor02_act_twi_addr = &lt;0x18&gt;;
		status = "disabled";
	};

	sensor_list1:sensor_list@200b830 {
		sensor10_mname = "gc02m2_mipi";
		sensor10_twi_addr = &lt;0x20&gt;;
		sensor10_type = &lt;1&gt;;
		sensor10_hflip = &lt;0&gt;;
		sensor10_vflip = &lt;0&gt;;
		sensor10_act_used = &lt;0&gt;;
		sensor10_act_name = "";
		sensor10_act_twi_addr = &lt;&gt;;
		sensor11_mname = "ov02a10_mipi";
		sensor11_twi_addr = &lt;0x7a&gt;;
		sensor11_type = &lt;1&gt;;
		sensor11_hflip = &lt;1&gt;;
		sensor11_vflip = &lt;0&gt;;
		sensor11_act_used = &lt;0&gt;;
		sensor11_act_name = "";
		sensor11_act_twi_addr = &lt;&gt;;
		sensor12_mname = "gc030a_mipi";
		sensor12_twi_addr = &lt;0x42&gt;;
		sensor12_type = &lt;1&gt;;
		sensor12_hflip = &lt;0&gt;;
		sensor12_vflip = &lt;0&gt;;
		sensor12_act_used = &lt;0&gt;;
		sensor12_act_name = "";
		sensor12_act_twi_addr = &lt;&gt;;
		status = "disabled";
	};

	vinc00:vinc@45830000 {
		vinc0_csi_sel = &lt;0&gt;;
		vinc0_mipi_sel = &lt;0&gt;;
		vinc0_isp_sel = &lt;0&gt;;
		vinc0_isp_tx_ch = &lt;0&gt;;
		vinc0_tdm_rx_sel = &lt;0&gt;;
		vinc0_rear_sensor_sel = &lt;0&gt;;
		vinc0_front_sensor_sel = &lt;0&gt;;
		vinc0_sensor_list = &lt;0&gt;;
		work_mode = &lt;0x0&gt;;
		status = "disabled";
	};

	vinc01:vinc@4582fffc {
		vinc1_csi_sel = &lt;1&gt;;
		vinc1_mipi_sel = &lt;1&gt;;
		vinc1_isp_sel = &lt;1&gt;;
		vinc1_isp_tx_ch = &lt;0&gt;;
		vinc1_tdm_rx_sel = &lt;1&gt;;
		vinc1_rear_sensor_sel = &lt;0&gt;;
		vinc1_front_sensor_sel = &lt;0&gt;;
		vinc1_sensor_list = &lt;0&gt;;
		status = "disabled";
	};

	vinc10:vinc@45831000 {
		vinc4_csi_sel = &lt;0&gt;;
		vinc4_mipi_sel = &lt;0&gt;;
		vinc4_isp_sel = &lt;0&gt;;
		vinc4_isp_tx_ch = &lt;0&gt;;
		vinc4_tdm_rx_sel = &lt;0&gt;;
		vinc4_rear_sensor_sel = &lt;0&gt;;
		vinc4_front_sensor_sel = &lt;0&gt;;
		vinc4_sensor_list = &lt;0&gt;;
		work_mode = &lt;0x0&gt;;
		status = "disabled";
	};

	vinc11:vinc@45830ffc {
		vinc5_csi_sel = &lt;1&gt;;
		vinc5_mipi_sel = &lt;1&gt;;
		vinc5_isp_sel = &lt;1&gt;;
		vinc5_isp_tx_ch = &lt;0&gt;;
		vinc5_tdm_rx_sel = &lt;1&gt;;
		vinc5_rear_sensor_sel = &lt;0&gt;;
		vinc5_front_sensor_sel = &lt;0&gt;;
		vinc5_sensor_list = &lt;0&gt;;
		status = "disabled";
	};

};

&amp;msgbox {
	status = "okay";
};

/* audio dirver module -&gt; audio codec */

&amp;codec {
	tx-hub-en;
	rx-sync-en;

	dac-vol	= &lt;63&gt;;		/* default value:63 range:0-&gt;63 */
	dacl-vol	= &lt;160&gt;;	/* default value:160 range:0-&gt;255 */
	adc-vol		= &lt;160&gt;;	/* default value:160 range:0-&gt;255 */
	lineout-gain	= &lt;31&gt;;		/* default value:31 range:0-&gt;31 */
	mic-gain	= &lt;31&gt;;		/* default value:31 range:0-&gt;31 */
	adcdelaytime	= &lt;0&gt;;	/* default value:0 range:0,5,10,20,30 */

	pa-pin-max	= &lt;1&gt;;
	pa-pin-0	= &lt;&amp;pio PC 15 GPIO_ACTIVE_HIGH&gt;;
	pa-pin-level-0	= &lt;1&gt;;
	pa-pin-msleep-0	= &lt;0&gt;;

	rglt-max	= &lt;0&gt;;
	//rglt0-mode	= "AUDIO";
	//rglt0-voltage	= &lt;1800000&gt;;
	//rglt1-mode	= "PMU";
	//rglt1-voltage	= &lt;3300000&gt;;
	//rglt1-supply	= &lt;&amp;reg_dldo1&gt;;

	status = "okay";
};

&amp;codec_plat {
	status = "okay";
};

&amp;codec_mach {
	status = "okay";
	soundcard-mach,cpu {
		sound-dai = &lt;&amp;codec_plat&gt;;
	};
	soundcard-mach,codec {
		sound-dai = &lt;&amp;codec&gt;;
	};
};

/* audio dirver module -&gt; I2S/PCM */
&amp;i2s0_plat {
	tdm-num		= &lt;0&gt;;

	/* "tx-pin"
	* 1. tx pin enable setting.
	* 2. we can set it like tx_pin = &lt;3 0&gt; - enable tx_pin0 and tx_pin3.
	*
	* "rx-pin"
	* 1. rx pin enable setting.
	* 2. we can set it like rx_pin = &lt;1 2&gt; - enable rx_pin1 and rx_pin2.
	*
	* "tx-pin-chmap"
	* 1. tx pin channel map setting.
	* 2. the subscript of value corresponds to the channel number.
	* 3. the value corresponds to slot number.
	* 4. we can use it like tx-pin1-chmap = &lt;1 2 ... 15&gt; to set pin1 channel map.
	* 5. if enabled the pin, but not set "tx-pin-chmap", default set &lt;0 1 2 ...&gt;.
	* 6. if the count of value is less than 16, then missing member will be set 0.
	*
	* rxfifo map
	* 1. "rxfifo-pinmap" - set the corresponding pin.
	* 2. "rxfifo-chmap" - set the corresponding slot.
	* 3. we can use it like rxfifo-pinmap = &lt;0 1 2&gt;; rxfifo-chmap = &lt;1 2 14&gt;; to set rxfifo map.
	* 4. the count of value of "rxfifo-pinmap" can != the count of value of "rxfifo-pinmap",
	*    then missing member would be set 0.
	*/
	tx-pin		= &lt;0&gt;;
	rx-pin		= &lt;0&gt;;
	/* tx-pin0-chmap = &lt;0 1 5&gt;; */
	/* rxfifo-pinmap = &lt;0 0&gt;; */
	/* rxfifo-chmap = &lt;0 1&gt;; */

	//pinctrl-used;
	//pinctrl-names	= "default","sleep";
	//pinctrl-0	= &lt;&amp;i2s0_pins_a &amp;i2s0_pins_c &amp;i2s0_pins_d&gt;;
	//pinctrl-1	= &lt;&amp;i2s0_pins_b&gt;;
	tx-hub-en;
	rx-sync-en;
	status		= "disabled";
};

&amp;i2s0_mach {
	soundcard-mach,format		= "i2s";
	soundcard-mach,frame-master	= &lt;&amp;i2s0_cpu&gt;;
	soundcard-mach,bitclock-master	= &lt;&amp;i2s0_cpu&gt;;
	/* soundcard-mach,frame-inversion; */
	/* soundcard-mach,bitclock-inversion; */
	soundcard-mach,slot-num		= &lt;2&gt;;
	soundcard-mach,slot-width	= &lt;32&gt;;
	status		= "disabled";
	i2s0_cpu: soundcard-mach,cpu {
		sound-dai = &lt;&amp;i2s0_plat&gt;;
		/* note: pll freq = 24.576M or 22.5792M * pll-fs */
		soundcard-mach,pll-fs	= &lt;1&gt;;
		/* note:
		* "mclk-fs"
		* if not defined it or equal to 0, disable mclk.
		*
		* "mclk-fp" (if defined "mclk-fs")
		* 1. if not defined "mclk-fp", mclk_freq = mclk-fs * sample_rate;
		* 2. if defined "mclk-fp" but no value, mclk_freq = mclk-fs * 11.2896M or 12.288M;
		* 3. if defined "mclk-fp" with 2 value, like: mclk-fp = &lt;val1 val2&gt;;
		*    it means: mclk_freq(44.1k fp) = mclk-fs * val1;
		*              mclk_freq(48k fp)   = mclk-fs * val2.
		*/
	};
	i2s0_codec: soundcard-mach,codec {
	};
};

&amp;e907_rproc {
	firmware-name = "amp_rv0.bin";
	mboxes = &lt;&amp;msgbox 0&gt;;
	mbox-names = "arm-kick";
	auto-boot;
	skip-shutdown;
	fw-region = &lt;&amp;e907_mem_fw&gt;;
	memory-region = &lt;&amp;rv_ddr_reserved&gt;, &lt;&amp;rv_vdev0buffer&gt;, &lt;&amp;rv_vdev0vring0&gt;, &lt;&amp;rv_vdev0vring1&gt;, &lt;&amp;e907_share_irq_table&gt;;
	fw-partitions = "riscv0", "riscv0-r";
	fw-partition-sectors = &lt;2176&gt;;
	memory-mappings =
	/* &lt; DA         len             PA &gt;    */
	/* SRAM ISP */
	&lt; 0x2000000        0xa800        0x2000000 &gt;,
	/* SRAM VE */
	&lt; 0x200a800        0x17400       0x200a800 &gt;,
	/* SRAM WIFI */
	&lt; 0x68000000       0x1000000     0x68000000 &gt;,
	/* DRAM */
	&lt; 0x80000000       0x0fffffff    0x80000000 &gt;;
	stop-record-reg = &lt;0x4a00020c&gt;;

	share-irq = "e907";
	status = "okay";

	rproc_wdt: rproc_wdt@0 {
		timeout_ms = &lt;6000&gt;;
		try_times = &lt;1&gt;;
		reset_type = &lt;0x2&gt;;
		panic_on_timeout = &lt;1&gt;;
		status = "okay";
	};
};

/*
*usb_port_type: usb mode: 0-device, 1-host, 2-otg.
*usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-id/dpdm detect.
*usb_detect_mode: 0-thread scan, 1-id gpio interrupt.
*usb_id_gpio: gpio for id detect.
*usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl";
*usb_wakeup_suspend：0-SUPER_STANDBY, 1-USB_STANDBY.
*/
&amp;usbc0 {
	device_type = "usbc0";
	usb_port_type = &lt;0x2&gt;;
	usb_detect_type = &lt;0x0&gt;;
	usb_detect_mode = &lt;0x0&gt;;
	//usb_id_gpio;
	//usb_det_vbus_gpio;
	//usb_det_vbus_gpio = "axp_ctrl";
	//det_vbus_supply;
	usb_regulator_io = "nocare";
	usb_wakeup_suspend = &lt;0x0&gt;;
	usb_luns = &lt;0x3&gt;;
	usb_serial_unique = &lt;0x0&gt;;
	usb_serial_number = "20080411";
	status = "okay";
};

&amp;udc {
	//det_vbus_supply = &lt;&amp;gpio_charger&gt;;
	status = "disabled";
};

&amp;ehci0 {
	//drvvbus-supply = &lt;&amp;reg_usb_vbus&gt;;
	status = "okay";
};

&amp;ohci0 {
	//drvvbus-supply = &lt;&amp;reg_usb_vbus&gt;;
	status = "okay";
};

&amp;gpadc0 {
	channel_num = &lt;4&gt;;
	channel_select = &lt;0x3&gt;;
	channel_data_select = &lt;0x0&gt;;
	channel_compare_select = &lt;0x0&gt;;
	channel_cld_select = &lt;0x0&gt;;
	channel_chd_select = &lt;0x0&gt;;
	channel0_compare_lowdata = &lt;1700000&gt;;
	channel0_compare_higdata = &lt;1200000&gt;;
	channel1_compare_lowdata = &lt;460000&gt;;
	channel1_compare_higdata = &lt;1200000&gt;;
	status = "okay";
};

/*----------------------------------------------------------------------------------
disp init configuration

disp_mode             (0:screen0&lt;screen0,fb0&gt;)
screenx_output_type   (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo)
screenx_output_mode   (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50)
					(5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60)
screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420)
screenx_output_bits   (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit)
screenx_output_eotf   (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG)
screenx_output_cs     (for hdmi, 0:undefined  257:BT709 260:BT601  263:BT2020)
screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode)
screen0_output_range   (for hdmi, 0:default 1:full 2:limited)
screen0_output_scan    (for hdmi, 0:no data 1:overscan 2:underscan)
screen0_output_aspect_ratio  (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9)
fbx format            (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444)
fbx pixel sequence    (0:ARGB 1:BGRA 2:ABGR 3:RGBA)
fb0_scaler_mode_enable(scaler mode enable, used FE)
fbx_width,fbx_height  (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0)
lcdx_backlight        (lcd init backlight,the range:[0,256],default:197
lcdx_yy               (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50)
lcd0_contrast         (LCD contrast, 0~100)
lcd0_saturation       (LCD saturation, 0~100)
lcd0_hue              (LCD hue, 0~100)
framebuffer software rotation setting:
disp_rotation_used:   (0:disable; 1:enable,you must set fbX_width to lcd_y,
set fbX_height to lcd_x)
degreeX:              (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree)
degreeX_Y:            (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree)
devX_output_type : config output type in bootGUI framework in UBOOT-2018.
				(0:none; 1:lcd; 2:tv; 4:hdmi;)
devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018
devX_screen_id   : config display index of bootGUI framework in UBOOT-2018
devX_do_hpd      : whether do hpd detectation or not in UBOOT-2018
chn_cfg_mode     : Hardware DE channel allocation config. 0:single display with 6
				channel, 1:dual display with 4 channel in main display and 2 channel in second
				display, 2:dual display with 3 channel in main display and 3 channel in second
				in display.
----------------------------------------------------------------------------------*/
&amp;disp {
	disp_init_enable         = &lt;1&gt;;
	disp_mode                = &lt;0&gt;;

	screen0_output_type      = &lt;7&gt;;
	screen0_output_mode      = &lt;4&gt;;
	screen0_to_lcd_index     = &lt;0&gt;;

	screen1_output_type      = &lt;3&gt;;
	screen1_output_mode      = &lt;10&gt;;
	screen1_to_lcd_index     = &lt;2&gt;;

	screen1_output_format    = &lt;0&gt;;
	screen1_output_bits      = &lt;0&gt;;
	screen1_output_eotf      = &lt;4&gt;;
	screen1_output_cs        = &lt;257&gt;;
	screen1_output_dvi_hdmi  = &lt;2&gt;;
	screen1_output_range     = &lt;2&gt;;
	screen1_output_scan      = &lt;0&gt;;
	screen1_output_aspect_ratio = &lt;8&gt;;

	fb_format                = &lt;0&gt;;
	fb_num                   = &lt;1&gt;;
	fb_debug                 = &lt;1&gt;;
	/*&lt;disp channel layer zorder&gt;*/
	fb0_map                  = &lt;0 0 0 16&gt;;
	fb0_width                = &lt;320&gt;;
	fb0_height               = &lt;192&gt;;
	/*&lt;disp channel layer zorder&gt;*/
	fb1_map                  = &lt;0 2 0 16&gt;;
	fb1_width                = &lt;300&gt;;
	fb1_height               = &lt;300&gt;;
	/*&lt;disp channel layer zorder&gt;*/
	fb2_map                  = &lt;1 0 0 16&gt;;
	fb2_width                = &lt;1280&gt;;
	fb2_height               = &lt;720&gt;;
	/*&lt;disp channel layer zorder&gt;*/
	fb3_map                  = &lt;1 1 0 16&gt;;
	fb3_width                = &lt;300&gt;;
	fb3_height               = &lt;300&gt;;

	chn_cfg_mode             = &lt;1&gt;;
	disp_para_zone           = &lt;1&gt;;
};

/*------------------------------------------
ircut_pin_a   : IRCUT PIN+
ircut_pin_b   : IRCUT PIN-
ircut_pin_drv : Set the driver strength for the IR cut pins
ircut_open    : Define the GPIO states for opening the IR cut &lt;ircut_pin_a ircut_pin_b&gt;
hold_time     : Set the hold time for the IR cut operation (in milliseconds)
--------------------------------------------*/
&amp;ircut {
	ircut_pin_a = &lt;&amp;pio PD 22 GPIO_ACTIVE_HIGH&gt;;
	ircut_pin_b = &lt;&amp;pio PD 23 GPIO_ACTIVE_HIGH&gt;;
	ircut_pin_drv = &lt;3&gt;;
	ircut_open = &lt;GPIO_ACTIVE_HIGH GPIO_ACTIVE_LOW&gt;;
	hold_time = &lt;100&gt;;
	status = "disabled";
};

&amp;cpu0 {
	cpu-supply = &lt;&amp;reg_vdd_cpu&gt;;
};

</code></pre>
]]></description><link>https://bbs.aw-ol.com/topic/6304/kernel加载时waiting-for-root-device-dev-mtdblock4</link><generator>RSS for Node</generator><lastBuildDate>Thu, 14 May 2026 19:20:45 GMT</lastBuildDate><atom:link href="https://bbs.aw-ol.com/topic/6304.rss" rel="self" type="application/rss+xml"/><pubDate>Tue, 22 Apr 2025 15:37:29 GMT</pubDate><ttl>60</ttl><item><title><![CDATA[Reply to Kernel加载时Waiting for root device &#x2F;dev&#x2F;mtdblock4 on Sat, 03 May 2025 04:10:13 GMT]]></title><description><![CDATA[<p dir="auto">刚好碰到这个问题，谢谢分享</p>
]]></description><link>https://bbs.aw-ol.com/post/26075</link><guid isPermaLink="true">https://bbs.aw-ol.com/post/26075</guid><dc:creator><![CDATA[indream]]></dc:creator><pubDate>Sat, 03 May 2025 04:10:13 GMT</pubDate></item><item><title><![CDATA[Reply to Kernel加载时Waiting for root device &#x2F;dev&#x2F;mtdblock4 on Wed, 23 Apr 2025 15:29:19 GMT]]></title><description><![CDATA[<p dir="auto">通过分析日志发现无法识别到型号为PY25Q256HB的NOR Flash</p>
<pre><code>[    0.832587] sunxi_spif 44f00000.spif: unrecognized JEDEC id bytes: 85 20 19 85 20 19
</code></pre>
<p dir="auto">解决办法如下：<br />
1、打开${SDK_PATH}/bsp/drivers/mtd/spi-nor-5.4/spi-nor.c文件<br />
搜索找到/* PUYA */位置，在后面添加</p>
<pre><code>	{ "py25q256hb", INFO(0x852019, 0x0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | USE_IO_MODE | USE_RX_DTR) },
</code></pre>
<p dir="auto">2、打开${SDK_PATH}/device/config/chips/v821/configs/v2w/linux-5.4-ansc/board.dts文件<br />
将&amp;spif0里添加取消dtr_mode_enabled的注释</p>
<pre><code>&amp;spif0 {
	clock-frequency = &lt;100000000&gt;;
	pinctrl-0 = &lt;&amp;spif_pins_default &amp;spif_pins_cs&gt;;
	pinctrl-1 = &lt;&amp;spif_pins_sleep&gt;;
	pinctrl-names = "default", "sleep";
	spif-rx-bus-width = &lt;0x4&gt;;
	spif-tx-bus-width = &lt;0x4&gt;;
	//prefetch_read_mode_enabled;	/* choose prefect read mode */
	dtr_mode_enabled;				/* choose double edge trigger mode */
	io_mode_enabled;				/* 1_x_x &amp;&amp; x_x_x mode */
	status = "okay";

	spif-nor  {
		device_type = "spi_board0";
		compatible = "spif-nor";
		spi-max-frequency = &lt;0x5f5e100&gt;;
		reg = &lt;0x0&gt;;
		status = "disabled";
	};
};
</code></pre>
<p dir="auto">此问题顺利解决</p>
]]></description><link>https://bbs.aw-ol.com/post/25996</link><guid isPermaLink="true">https://bbs.aw-ol.com/post/25996</guid><dc:creator><![CDATA[zhanweixin]]></dc:creator><pubDate>Wed, 23 Apr 2025 15:29:19 GMT</pubDate></item><item><title><![CDATA[Reply to Kernel加载时Waiting for root device &#x2F;dev&#x2F;mtdblock4 on Wed, 23 Apr 2025 02:49:19 GMT]]></title><description><![CDATA[<p dir="auto">补充下u-boot的env配置信息如下</p>
<pre><code>=&gt; env print
arm-smmu-v3=0
boot_fastboot=fastboot
boot_normal=sunxi_flash read 82000000 ${boot_partition};bootm 82000000
boot_partition=boot
boot_recovery=sunxi_flash read 82000000 recovery;bootm 82000000
boot_riscv=bootrv 82000000 200000 0 riscv0 riscv0-r
bootcmd=run setargs_nor boot_normal
bootdelay=3
cma=1M
console=ttyS0,115200
earlyprintk=sunxi-uart,0x42500000
fastboot_key_value_max=0x8
fastboot_key_value_min=0x2
fdtcontroladdr=8394bea4
force_normal_boot=1
init=/init
initcall_debug=0
loglevel=8
mmc_root=/dev/mmcblk0p5
mtdids=▒Bs▒0▒
mtdparts=▒Bs▒0▒
nor_root=/dev/mtdblock4
partition=▒Bs▒0▒
partitions=env@mtdblock1:boot@mtdblock2:riscv0@mtdblock3:rootfs@mtdblock4:rootfs_data@mtdblock5:UDISK@mtdblock6
rdinit=/rdinit
recovery_key_value_max=0x13
recovery_key_value_min=0x10
riscv_partition=riscv0
root_partition=rootfs
rotpk_status=0
selinux=0
setargs_mmc=setenv bootargs earlyprintk=${earlyprintk} initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${mmc_root} rootwait init=${init} rdinit=${rdinit} partitions=${partitions} cma=${cma} snum=${snum} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} selinux=${selinux} specialstr=${specialstr} gpt=1 arm-smmu-v3.disable_bypass=${arm-smmu-v3}
setargs_nand=setenv bootargs earlyprintk=${earlyprintk} initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${nand_root} rootwait init=${init} rdinit=${rdinit} partitions=${partitions} cma=${cma} snum=${snum} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} selinux=${selinux} specialstr=${specialstr} gpt=1 arm-smmu-v3.disable_bypass=${arm-smmu-v3}
setargs_nor=setenv bootargs earlyprintk=${earlyprintk} initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${nor_root} rootwait init=${init} rdinit=${rdinit} partitions=${partitions} cma=${cma} coherent_pool=${coherent_pool}
snum=7c000c70f6c107d1fcf
wifi_mac=60:c2:2a:10:1b:47

Environment size: 1978/65532 bytes
</code></pre>
]]></description><link>https://bbs.aw-ol.com/post/25989</link><guid isPermaLink="true">https://bbs.aw-ol.com/post/25989</guid><dc:creator><![CDATA[zhanweixin]]></dc:creator><pubDate>Wed, 23 Apr 2025 02:49:19 GMT</pubDate></item></channel></rss>