<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[T113-i与DDR3芯片地址线连接问题]]></title><description><![CDATA[<p dir="auto">遇到一个问题，想请教下，如果DDR3芯片是128M16 或256M16这种位宽的（比如官方文档支持的NT5CC128M16JR、NT5CC256M16ER这两款芯片），只有14或15根地址线，DDR3这边没有A14或A15，而T113-i主控这边又用到了这两根线，而且A15接到了主控的SBA2，A14接到主控的A12，好像还不能缺省，应该怎样处理呢？<br />
下图是官方EVB原理图<br />
<img src="/assets/uploads/files/1754559793278-snipaste_2025-08-07_17-41-09.png" alt="Snipaste_2025-08-07_17-41-09.png" class=" img-responsive img-markdown" width="1779" height="1260" /></p>
]]></description><link>https://bbs.aw-ol.com/topic/6543/t113-i与ddr3芯片地址线连接问题</link><generator>RSS for Node</generator><lastBuildDate>Thu, 18 Jun 2026 00:56:37 GMT</lastBuildDate><atom:link href="https://bbs.aw-ol.com/topic/6543.rss" rel="self" type="application/rss+xml"/><pubDate>Thu, 07 Aug 2025 09:45:27 GMT</pubDate><ttl>60</ttl><item><title><![CDATA[Reply to T113-i与DDR3芯片地址线连接问题 on Mon, 18 May 2026 05:29:24 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="https://bbs.aw-ol.com/uid/7584">@wjh_bh</a> 你好，请问后续验证了吗</p>
]]></description><link>https://bbs.aw-ol.com/post/28596</link><guid isPermaLink="true">https://bbs.aw-ol.com/post/28596</guid><dc:creator><![CDATA[dlskm]]></dc:creator><pubDate>Mon, 18 May 2026 05:29:24 GMT</pubDate></item></channel></rss>