<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[T113M4020DC0 替换 T113-S3 后DDR不能初始化求解]]></title><description><![CDATA[<p dir="auto">[19]HELLO! BOOT0 is starting!<br />
[22]BOOT0 commit : adaf1174cc<br />
[25]set pll start<br />
[31]periph0 has been enabled<br />
[34]set pll end<br />
[35][pmu]: bus read error<br />
[38]board init ok<br />
[40]ZQ value = 0x2f<br />
[42]get_pmu_exist() = -1<br />
[44]ddr_efuse_type: 0xa<br />
[47]trefi:7.8ms<br />
[49]DX0 state:1<br />
[51]DX1 state:1<br />
[52][ERROR DEBUG] auto scan dram rank&amp;width fail !<br />
[57]init dram fail<br />
[19]HELLO! BOOT0 is starting!<br />
[22]BOOT0 commit : adaf1174cc<br />
[25]set pll start</p>
]]></description><link>https://bbs.aw-ol.com/topic/6792/t113m4020dc0-替换-t113-s3-后ddr不能初始化求解</link><generator>RSS for Node</generator><lastBuildDate>Wed, 14 Oct 2026 08:15:22 GMT</lastBuildDate><atom:link href="https://bbs.aw-ol.com/topic/6792.rss" rel="self" type="application/rss+xml"/><pubDate>Mon, 15 Dec 2025 03:00:13 GMT</pubDate><ttl>60</ttl><item><title><![CDATA[Reply to T113M4020DC0 替换 T113-S3 后DDR不能初始化求解 on Wed, 17 Dec 2025 02:19:21 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="https://bbs.aw-ol.com/uid/8262">@huali</a> boot0阶段，初始化问题；替换boot0中ddr的初始化后，可以启动</p>
]]></description><link>https://bbs.aw-ol.com/post/27800</link><guid isPermaLink="true">https://bbs.aw-ol.com/post/27800</guid><dc:creator><![CDATA[huali]]></dc:creator><pubDate>Wed, 17 Dec 2025 02:19:21 GMT</pubDate></item></channel></rss>