&disp {
        disp_init_enable         = <1>;
        disp_mode                = <0>;

        //screen0_output_type      = <0>;
        screen0_output_type      = <1>;
        screen0_output_mode      = <4>;

        screen1_output_type      = <1>;
        screen1_output_mode      = <4>;

        screen1_output_format    = <0>;
        screen1_output_bits      = <0>;
        screen1_output_eotf      = <4>;
        screen1_output_cs        = <257>;
        screen1_output_dvi_hdmi  = <2>;
        screen1_output_range     = <2>;
        screen1_output_scan      = <0>;
        screen1_output_aspect_ratio = <8>;

        dev0_output_type         = <1>;
        dev0_output_mode         = <4>;
        dev0_screen_id           = <0>;
        dev0_do_hpd              = <0>;

        dev1_output_type         = <1>;
        dev1_output_mode         = <4>;
        dev1_screen_id           = <1>;
        dev1_do_hpd              = <1>;

        def_output_dev           = <0>;
        hdmi_mode_check          = <1>;

        fb0_format               = <0>;
        //fb0_width                = <1280>;
        //fb0_height               = <720>;
        fb0_width                = <0>;
        fb0_height               = <0>;

        fb1_format               = <0>;
        fb1_width                = <0>;
        fb1_height               = <0>;
        chn_cfg_mode             = <1>;

        disp_para_zone           = <1>;
};
&lcd0 {
	lcd_used            = <1>;

	lcd_driver_name     = "jd9365tx";
	lcd_backlight       = <100>;

	lcd_if              = <4>;

	//lcd_x               = <1280>;
	//lcd_y               = <720>;
	//lcd_width           = <153>;
	//lcd_height          = <86>;
	//lcd_dclk_freq       = <78>;
	lcd_x               = <720>;
	lcd_y               = <1280>;
	lcd_width           = <86>;
	lcd_height          = <153>;
	lcd_dclk_freq       = <72>;
	//lcd_dclk_freq       = <64>;

	lcd_pwm_used        = <1>;
	lcd_pwm_ch          = <7>;
	lcd_pwm_freq        = <50000>;
	lcd_pwm_pol         = <1>;
	lcd_pwm_max_limit   = <255>;

	lcd_hbp             = <60>;
	lcd_ht              = <800>;
	//lcd_ht              = <1360>;
	lcd_hspw            = <20>;
	lcd_vbp             = <30>;
	lcd_vt              = <1510>;
	//lcd_vt              = <1330>;
	//lcd_vt              = <950>;
	lcd_vspw            = <2>;

	lcd_dsi_lane        = <4>;
	lcd_dsi_if          = <0>;
	lcd_dsi_format      = <0>;
	lcd_dsi_te          = <0>;
	lcd_frm             = <0>;
	lcd_io_phase        = <0>;
	lcd_gamma_en        = <0>;
	lcd_bright_curve_en = <0>;
	lcd_cmap_en         = <0>;

	lcdgamma4iep        = <22>;
	smart_color         = <90>;

	lcd_gpio_0 = <&pio PB 7 GPIO_ACTIVE_HIGH>;

	pinctrl-0 = <&dsi4lane_pins_a>;
	pinctrl-1 = <&dsi4lane_pins_b>;
};

屏参数720*1280,原始参数如下

JDEVB_IF(DSI_VDO);                 
JDEVB_RSOX(720);
JDEVB_RSOY(1280);
JDEVB_VS(2);
JDEVB_VBP(28);
JDEVB_VFP(200);
JDEVB_HS(20);
JDEVB_HBP(40);
JDEVB_HFP(20);
JDEVB_DSILANE(4);
JDEVB_DOTCLK(72.48);
JDEVB_SSDIO(3.3);

JDEVB_IOVCC(3.3); 
Delayms(10); 
JDEVB_VCI(3.3); 
Delayms(10); 
JDEVB_I2C_AVDD(6); 
Delayms(10); 
JDEVB_I2C_AVEE(-6); 
Delayms(25);

现在是clk引脚PD4没有任何输出,我关闭了uboot的#CONFIG_DISP2_SUNXI=y,驱动文件如下,拷贝了别的驱动改的

#include "jd9365tx.h"
#include "panels.h"

static void lcd_power_on(u32 sel);
static void lcd_power_off(u32 sel);
static void lcd_bl_open(u32 sel);
static void lcd_bl_close(u32 sel);

static void lcd_panel_init(u32 sel);
static void lcd_panel_exit(u32 sel);

#define panel_reset(sel, val) sunxi_lcd_gpio_set_value(sel, 0, val)

static void lcd_cfg_panel_info(struct panel_extend_para *info)
{
	u32 i = 0, j = 0;
	u32 items;
	u8 lcd_gamma_tbl[][2] = {
		{0, 0},
		{15, 15},
		{30, 30},
		{45, 45},
		{60, 60},
		{75, 75},
		{90, 90},
		{105, 105},
		{120, 120},
		{135, 135},
		{150, 150},
		{165, 165},
		{180, 180},
		{195, 195},
		{210, 210},
		{225, 225},
		{240, 240},
		{255, 255},
	};

	u32 lcd_cmap_tbl[2][3][4] = {
		{
			{LCD_CMAP_G0, LCD_CMAP_B1, LCD_CMAP_G2, LCD_CMAP_B3},
			{LCD_CMAP_B0, LCD_CMAP_R1, LCD_CMAP_B2, LCD_CMAP_R3},
			{LCD_CMAP_R0, LCD_CMAP_G1, LCD_CMAP_R2, LCD_CMAP_G3},
		},
		{
			{LCD_CMAP_B3, LCD_CMAP_G2, LCD_CMAP_B1, LCD_CMAP_G0},
			{LCD_CMAP_R3, LCD_CMAP_B2, LCD_CMAP_R1, LCD_CMAP_B0},
			{LCD_CMAP_G3, LCD_CMAP_R2, LCD_CMAP_G1, LCD_CMAP_R0},
		},
	};

	items = sizeof(lcd_gamma_tbl) / 2;
	for (i = 0; i < items - 1; i++) {
		u32 num = lcd_gamma_tbl[i + 1][0] - lcd_gamma_tbl[i][0];

		for (j = 0; j < num; j++) {
			u32 value = 0;

			value = lcd_gamma_tbl[i][1] +
				((lcd_gamma_tbl[i + 1][1] - lcd_gamma_tbl[i][1])
				 * j) / num;
			info->lcd_gamma_tbl[lcd_gamma_tbl[i][0] + j] =
				(value << 16)
				+ (value << 8) + value;
		}
	}
	info->lcd_gamma_tbl[255] = (lcd_gamma_tbl[items - 1][1] << 16) +
				   (lcd_gamma_tbl[items - 1][1] << 8)
				   + lcd_gamma_tbl[items - 1][1];

	memcpy(info->lcd_cmap_tbl, lcd_cmap_tbl, sizeof(lcd_cmap_tbl));
	printk(KERN_ERR "TESTTTT %s--%d\n", __func__, __LINE__);

}

static s32 lcd_open_flow(u32 sel)
{
	printk(KERN_ERR "TESTTTT %s--%d\n", __func__, __LINE__);
	LCD_OPEN_FUNC(sel, lcd_power_on, 10);
	LCD_OPEN_FUNC(sel, lcd_panel_init, 10);
	LCD_OPEN_FUNC(sel, sunxi_lcd_tcon_enable, 50);
	LCD_OPEN_FUNC(sel, lcd_bl_open, 0);
	printk(KERN_ERR "TESTTTT %s--%d\n", __func__, __LINE__);

	return 0;
}

static s32 lcd_close_flow(u32 sel)
{
	LCD_CLOSE_FUNC(sel, lcd_bl_close, 0);
	LCD_CLOSE_FUNC(sel, sunxi_lcd_tcon_disable, 0);
	LCD_CLOSE_FUNC(sel, lcd_panel_exit, 200);
	LCD_CLOSE_FUNC(sel, lcd_power_off, 500);

	return 0;
}

static void lcd_power_on(u32 sel)
{
	printk(KERN_ERR "TESTTTT %s--%d\n", __func__, __LINE__);
	sunxi_lcd_pin_cfg(sel, 1);
	sunxi_lcd_delay_ms(50);
	panel_reset(sel, 1);
	sunxi_lcd_delay_ms(5);
	panel_reset(sel, 0);
	sunxi_lcd_delay_ms(30);
	panel_reset(sel, 1);
	sunxi_lcd_delay_ms(120);
	printk(KERN_ERR "TESTTTT %s--%d\n", __func__, __LINE__);

}

static void lcd_power_off(u32 sel)
{
	sunxi_lcd_pin_cfg(sel, 0);
	sunxi_lcd_delay_ms(20);
	panel_reset(sel, 0);
	sunxi_lcd_delay_ms(5);
}

static void lcd_bl_open(u32 sel)
{
	sunxi_lcd_pwm_enable(sel);
	sunxi_lcd_backlight_enable(sel);
}

static void lcd_bl_close(u32 sel)
{
	sunxi_lcd_backlight_disable(sel);
	sunxi_lcd_pwm_disable(sel);
}

#define REGFLAG_DELAY 0XFC
#define REGFLAG_END_OF_TABLE 0xFD /* END OF REGISTERS MARKER */

struct LCM_setting_table {
	u8 cmd;
	u32 count;
	u8 para_list[64];
};

static struct LCM_setting_table lcm_jd9365tx_setting[] =
{
	{0xDF, 3, {0x90, 0x84, 0x14}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xDE, 1, {0x00}},
	{0xBB, 6, {0x46, 0x55, 0xB5, 0x22, 0x22, 0x55}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xDE, 1, {0x02}},
	{0xB7, 5, {0x16, 0x00, 0x6E, 0x44, 0x77}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xDE, 1, {0x00}},
	{0xB3, 10, {0x00, 0x01, 0x50, 0x50, 0x3C, 0x3C, 0xA0, 0x00, 0x20, 0xB6}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xBC, 3, {0x0C, 0x28, 0x88}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xBD, 3, {0x00, 0x5C, 0x56}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xBF, 3, {0x10, 0x35, 0xC3}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC0, 2, {0xBD, 0xBD}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC3, 6, {0x03, 0x09, 0x00, 0x04, 0x2B, 0xE2}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC4, 24, {0x05, 0xE3, 0x0D, 0xD1, 0x05, 0x2C, 0x06, 0x51, 0x06, 0x51, 0x06, 0x51, 0x00, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC5, 36, {0x01, 0x00, 0x8C, 0x00, 0x5E, 0x01, 0x7D, 0x09, 0x60, 0x02, 0xD0, 0x05, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0E, 0x01, 0x92, 0x02, 0x00, 0x02, 0xB0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC6, 16, {0x00, 0xE4, 0x00, 0xC8, 0x00, 0x1D, 0x28, 0x82, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC8, 3, {0x20, 0x80, 0xB4}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xCB, 42, {0x7C, 0x66, 0x57, 0x42, 0x32, 0x2A, 0x1B, 0x1F, 0x0A, 0x26, 0x27, 0x25, 0x44, 0x32, 0x41, 0x35, 0x35, 0x2B, 0x1E, 0x14, 0x06, 0x7C, 0x66, 0x57, 0x42, 0x32, 0x2A, 0x1B, 0x1F, 0x0A, 0x26, 0x27, 0x2D, 0x4C, 0x3A, 0x41, 0x35, 0x35, 0x2B, 0x1E, 0x14, 0x06}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xCC, 1, {0x33}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xCD, 12, {0x23, 0x0E, 0x23, 0x0E, 0x23, 0x0E, 0x23, 0x0E, 0x23, 0x23, 0x22, 0x22}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xCE, 56, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xCF, 18, {0x40, 0x00, 0x00, 0x3F, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFF, 0x00, 0x00, 0x00}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xD0, 23, {0x00, 0x3F, 0x3F, 0x64, 0x64, 0x3F, 0x3F, 0x3E, 0x3E, 0x2A, 0x2B, 0x3F, 0x3F, 0x1F, 0x1D, 0x1B, 0x19, 0x17, 0x15, 0x13, 0x11, 0x01, 0x03}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xD1, 23, {0x00, 0x3F, 0x3F, 0x64, 0x64, 0x3F, 0x3F, 0x3E, 0x3E, 0x2A, 0x2B, 0x3F, 0x3F, 0x1E, 0x1C, 0x1A, 0x18, 0x16, 0x14, 0x12, 0x10, 0x00, 0x02}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xD2, 23, {0x00, 0x3F, 0x3F, 0x24, 0x24, 0x3F, 0x3F, 0x3E, 0x3E, 0x2A, 0x2B, 0x3F, 0x3F, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1A, 0x1C, 0x1E, 0x02, 0x00}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xD3, 23, {0x00, 0xBF, 0xBF, 0xA4, 0xA4, 0xBF, 0x3F, 0x3E, 0x3E, 0x2A, 0x2B, 0x3F, 0x3F, 0x11, 0x13, 0x15, 0x17, 0x19, 0x1B, 0x1D, 0x1F, 0x03, 0x01}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xD4, 56, {0x00, 0x60, 0x0C, 0x01, 0x03, 0x20, 0x04, 0x00, 0x00, 0x00, 0x07, 0x00, 0x05, 0x1D, 0x01, 0x23, 0x45, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x05, 0x20, 0x05, 0x22, 0x01, 0x03, 0x80, 0x0A, 0x00, 0x0A, 0x05, 0x24, 0x05, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x20, 0x00}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xD5, 28, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x0A, 0x78, 0x00, 0x00, 0x05, 0xE6, 0xF7, 0xA0, 0x0F, 0x08, 0x08, 0x10, 0x00, 0x2F, 0x04}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xD7, 15, {0x00, 0x09, 0x7D, 0x09, 0x7D, 0x09, 0x7D, 0x09, 0x7D, 0x09, 0x7D, 0x09, 0x7D, 0x09, 0x7D}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xDE, 1, {0x01}},
	{0xC7, 5, {0x14, 0x14, 0x04, 0x04, 0x47}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xCD, 2, {0x30, 0x53}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xCE, 5, {0x09, 0x00, 0xE0, 0x00, 0xE0}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xDE, 1, {0x02}},
	{0xB3, 5, {0x4A, 0xA3, 0xE2, 0x2F, 0x43}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xB4, 1, {0x7F}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xBB, 11, {0x00, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41, 0x40, 0x43, 0x04}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xBD, 1, {0x1B}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xBF, 2, {0x0F, 0x03}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC1, 13, {0x50, 0x40, 0x00, 0x00, 0x00, 0x02, 0x02, 0x02, 0x02, 0x00, 0x00, 0x00, 0x00}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC2, 7, {0x02, 0x42, 0x50, 0x00, 0x02, 0xE0, 0x31}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC3, 2, {0x20, 0xFF}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC4, 7, {0x00, 0x11, 0x07, 0x00, 0x0E, 0x01, 0x08}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xC6, 2, {0x4A, 0x00}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xE5, 15, {0x00, 0x70, 0x70, 0x19, 0xC8, 0x09, 0x00, 0x42, 0x01, 0x30, 0x05, 0x00, 0x00, 0x05, 0x07}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xE6, 5, {0x10, 0x0F, 0x88, 0x00, 0x00}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xE9, 3, {0x10, 0xA0, 0xA0}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xEC, 3, {0x10, 0x77, 0x0D}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xDE, 1, {0x03}},
	{0xD1, 5, {0x00, 0x00, 0x39, 0xFF, 0x08}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xED, 1, {0x00}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {1}},
	{0xDE, 1, {0x00}},
	{0x35, 0, {}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {30}},
	{0x11, 0, {}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {120}},
	{0x29, 0, {}},
	{REGFLAG_DELAY, REGFLAG_DELAY, {50}},

	{REGFLAG_END_OF_TABLE, REGFLAG_END_OF_TABLE, {}}
};

static void lcd_panel_init(u32 sel)
{
	__u32 i;
	sunxi_lcd_dsi_clk_enable(sel);
	sunxi_lcd_delay_ms(100);
	printk(KERN_ERR "TESTTTT %s--%d, sel = %d\n", __func__, __LINE__, sel);
	for (i = 0;; i++) {
		if (lcm_jd9365tx_setting[i].count == REGFLAG_END_OF_TABLE)
			break;
		else if (lcm_jd9365tx_setting[i].count == REGFLAG_DELAY) {
			sunxi_lcd_delay_ms(lcm_jd9365tx_setting[i].para_list[0]);
		} else {
			//dsi_gen_wr(sel, lcm_jd9365tx_setting[i].cmd,
			dsi_dcs_wr(sel, lcm_jd9365tx_setting[i].cmd, lcm_jd9365tx_setting[i].para_list, lcm_jd9365tx_setting[i].count);
		}
		/* break; */
	}
	u8 result[17] = { 0 };
	u32 num	      = 0;
	sunxi_lcd_delay_ms(100);
	sunxi_lcd_dsi_dcs_read(sel, 0x04, result, &num);
	printk(KERN_ERR "get lcd id0 0x%x get lcd id15 0x%x get lcd id16 0x%x readbytes=%d\n",
			result[0], result[15], result[16], num);
}

static void lcd_panel_exit(u32 sel)
{
	sunxi_lcd_dsi_dcs_write_0para(sel, 0x10);
	sunxi_lcd_delay_ms(80);
	sunxi_lcd_dsi_dcs_write_0para(sel, 0x28);
	sunxi_lcd_delay_ms(50);
}

/*sel: 0:lcd0; 1:lcd1*/
static s32 lcd_user_defined_func(u32 sel, u32 para1, u32 para2, u32 para3)
{
	return 0;
}

struct __lcd_panel jd9365tx_panel = {
	/* panel driver name, must mach the name of
	 * lcd_drv_name in sys_config.fex
	 */
	.name = "jd9365tx",
	.func = {
		.cfg_panel_info = lcd_cfg_panel_info,
		.cfg_open_flow = lcd_open_flow,
		.cfg_close_flow = lcd_close_flow,
		.lcd_user_defined_func = lcd_user_defined_func,
	},
};

这些函数都调用了,reset也能看到引脚电平在变化,拉低了30ms,但是不管怎样clk脚都没有任何输出,请假大佬们该从哪里入手
我还做了以下的操作:
1,打印查看clk_set_rate返回值为0,设置clk成功
2,查看pinctrl,PD0-PD9都已经是dsi引脚
3,修改clk_tbl为{LCD_IF_DSI, 6, 1, 4, 108000000},确保dclk和dsi_rate正常
恳请大佬们帮忙解决一下!