环境:T113-S3 使用 100_ask sdk 使用串口3作为console SD卡启动 分了8个分区 ,
boot-resource, env, env-redund, boot,
rootfs, private, rootfs_data, UDISK
文件系统使用 squashfs
另外spi0 处 已经焊上了一个nor flash 但设备树并没有调用它 不知道会不会有影响.
调试了好些日子了 最后实在没办法了
问题描述 : **uboot 启动内核后 能显示出sd卡容量 以及各种外设 但卡在启动跟文件系统这块 **
[2024-05-26 03:43:55] [ 4.880538] EXT4-fs (mmcblk0p8): mounted filesystem with ordered data mode. Opts:
[2024-05-26 03:43:55] [ 4.903121] mount_root: switched to extroot
这一步 不知道是不是与根文件系统有关系 希望论坛大佬帮忙排查一下问题! 感谢
日志如下
[2024-05-26 03:43:45] [29]HELLO! BOOT0 is starting!
[2024-05-26 03:43:45] [32]BOOT0 commit : 88480af-dirty
[2024-05-26 03:43:45] [35]set pll start
[2024-05-26 03:43:45] [41]periph0 has been enabled
[2024-05-26 03:43:45] [44]set pll end
[2024-05-26 03:43:45] [45][pmu]: bus read error
[2024-05-26 03:43:45] [48]board init ok
[2024-05-26 03:43:45] [50]ZQ value = 0x2d
[2024-05-26 03:43:45] [51]get_pmu_exist() = -1
[2024-05-26 03:43:45] [54]ddr_efuse_type: 0xa
[2024-05-26 03:43:45] [56]trefi:7.8ms
[2024-05-26 03:43:45] [59][AUTO DEBUG] single rank and full DQ!
[2024-05-26 03:43:45] [63]ddr_efuse_type: 0xa
[2024-05-26 03:43:45] [65]trefi:7.8ms
[2024-05-26 03:43:45] [67][AUTO DEBUG] rank 0 row = 13
[2024-05-26 03:43:45] [70][AUTO DEBUG] rank 0 bank = 8
[2024-05-26 03:43:45] [73][AUTO DEBUG] rank 0 page size = 2 KB
[2024-05-26 03:43:45] [77]DRAM BOOT DRIVE INFO: V0.33
[2024-05-26 03:43:45] [80]DRAM CLK = 936 MHz
[2024-05-26 03:43:45] [82]DRAM Type = 3 (2:DDR2,3:DDR3)
[2024-05-26 03:43:45] [86]DRAMC read ODT off.
[2024-05-26 03:43:45] [88]DRAM ODT value: 0x42.
[2024-05-26 03:43:45] [91]ddr_efuse_type: 0xa
[2024-05-26 03:43:45] [94]DRAM SIZE =128 M
[2024-05-26 03:43:45] [96]dram_tpr4:0x0
[2024-05-26 03:43:45] [97]PLL_DDR_CTRL_REG:0xf8004d00
[2024-05-26 03:43:45] [100]DRAM_CLK_REG:0xc0000000
[2024-05-26 03:43:45] [103][TIMING DEBUG] MR2= 0x20
[2024-05-26 03:43:45] [111]DRAM simple test OK.
[2024-05-26 03:43:45] [113]rtc standby flag is 0x0, super standby flag is 0x0
[2024-05-26 03:43:45] [118]dram size =128
[2024-05-26 03:43:45] [121]card no is 0
[2024-05-26 03:43:45] [123]sdcard 0 line count 4
[2024-05-26 03:43:45] [125][mmc]: mmc driver ver 2021-05-21 14:47
[2024-05-26 03:43:45] [134][mmc]: Wrong media type 0x0
[2024-05-26 03:43:45] [137][mmc]: ***Try SD card 0***
[2024-05-26 03:43:45] [158][mmc]: HSSDR52/SDR25 4 bit
[2024-05-26 03:43:45] [161][mmc]: 50000000 Hz
[2024-05-26 03:43:45] [163][mmc]: 30436 MB
[2024-05-26 03:43:45] [165][mmc]: ***SD/MMC 0 init OK!!!***
[2024-05-26 03:43:45] [254]Loading boot-pkg Succeed(index=0).
[2024-05-26 03:43:45] [257]Entry_name = u-boot
[2024-05-26 03:43:45] [264]Entry_name = optee
[2024-05-26 03:43:45] [268]Entry_name = dtb
[2024-05-26 03:43:45] [271]mmc not para
[2024-05-26 03:43:45] [273]Jump to second Boot.
[2024-05-26 03:43:45] M/TC: OP-TEE version: 6aef7bb2-dirty (gcc version 5.3.1 20160412 (Linaro GCC 5.3-2016.05)) #1 Fri Jul 23 09:25:11 UTC 2021 arm
[2024-05-26 03:43:45]
[2024-05-26 03:43:45]
[2024-05-26 03:43:45] U-Boot 2018.05-g24521d6-dirty (May 25 2024 - 05:00:09 +0800) Allwinner Technology
[2024-05-26 03:43:45]
[2024-05-26 03:43:45] [00.326]CPU: Allwinner Family
[2024-05-26 03:43:45] [00.329]Model: sun8iw20
[2024-05-26 03:43:45] I2C: FDT ERROR:fdt_set_all_pin:[twi0]-->FDT_ERR_BADPATH
[2024-05-26 03:43:45] FDT ERROR:fdt_set_all_pin:[twi1]-->FDT_ERR_BADPATH
[2024-05-26 03:43:45] ready
[2024-05-26 03:43:45] [00.350]DRAM: 128 MiB
[2024-05-26 03:43:45] [00.353]Relocation Offset is: 04ec4000
[2024-05-26 03:43:45] [00.378]secure enable bit: 0
[2024-05-26 03:43:45] [00.380]smc_tee_inform_fdt failed with: -65526[00.385]CPU=1008 MHz,PLL6=600 Mhz,AHB=200 Mhz, APB1=100Mhz MBus=300Mhz
[2024-05-26 03:43:45] [00.391]gic: sec monitor mode
[2024-05-26 03:43:45] [00.394]flash init start
[2024-05-26 03:43:45] [00.396]workmode = 0,storage type = 1
[2024-05-26 03:43:45] [00.400][mmc]: mmc driver ver uboot2018:2021-11-19 15:38:00
[2024-05-26 03:43:45] [00.405][mmc]: get sdc_type fail and use default host:tm1.
[2024-05-26 03:43:45] [00.411][mmc]: can't find node "mmc0",will add new node
[2024-05-26 03:43:45] [00.416][mmc]: fdt err returned <no error>
[2024-05-26 03:43:45] [00.420][mmc]: Using default timing para
[2024-05-26 03:43:45] [00.423][mmc]: SUNXI SDMMC Controller Version:0x50310
[2024-05-26 03:43:46] [00.452][mmc]: card_caps:0x3000000a
[2024-05-26 03:43:46] [00.455][mmc]: host_caps:0x3000003f
[2024-05-26 03:43:46] [00.460]sunxi flash init ok
[2024-05-26 03:43:46] [00.462]line:703 init_clocks
[2024-05-26 03:43:46] [00.465]drv_disp_init
[2024-05-26 03:43:46] [00.477]drv_disp_init finish
[2024-05-26 03:43:46] [00.479]boot_gui_init:start
[2024-05-26 03:43:46] [00.482]set disp.dev2_output_type fail. using defval=0
[2024-05-26 03:43:46] [00.488]boot_gui_init:finish
[2024-05-26 03:43:46] partno erro : can't find partition bootloader
[2024-05-26 03:43:46] 54 bytes read in 1 ms (52.7 KiB/s)
[2024-05-26 03:43:46] [00.507]bmp_name=bootlogo.bmp size 38454
[2024-05-26 03:43:46] 38454 bytes read in 3 ms (12.2 MiB/s)
[2024-05-26 03:43:46] [00.526]Loading Environment from SUNXI_FLASH... OK
[2024-05-26 03:43:46] [00.556]Item0 (Map) magic is bad
[2024-05-26 03:43:46] [00.559]the secure storage item0 copy0 magic is bad
[2024-05-26 03:43:46] [00.575]Item0 (Map) magic is bad
[2024-05-26 03:43:46] [00.578]the secure storage item0 copy1 magic is bad
[2024-05-26 03:43:46] [00.582]Item0 (Map) magic is bad
[2024-05-26 03:43:46] secure storage read widevine fail
[2024-05-26 03:43:46] [00.588]secure storage read widevine fail with:-1
[2024-05-26 03:43:46] secure storage read ec_key fail
[2024-05-26 03:43:46] [00.595]secure storage read ec_key fail with:-1
[2024-05-26 03:43:46] secure storage read ec_cert1 fail
[2024-05-26 03:43:46] [00.603]secure storage read ec_cert1 fail with:-1
[2024-05-26 03:43:46] secure storage read ec_cert2 fail
[2024-05-26 03:43:46] [00.610]secure storage read ec_cert2 fail with:-1
[2024-05-26 03:43:46] secure storage read ec_cert3 fail
[2024-05-26 03:43:46] [00.618]secure storage read ec_cert3 fail with:-1
[2024-05-26 03:43:46] secure storage read rsa_key fail
[2024-05-26 03:43:46] [00.625]secure storage read rsa_key fail with:-1
[2024-05-26 03:43:46] secure storage read rsa_cert1 fail
[2024-05-26 03:43:46] [00.632]secure storage read rsa_cert1 fail with:-1
[2024-05-26 03:43:46] secure storage read rsa_cert2 fail
[2024-05-26 03:43:46] [00.640]secure storage read rsa_cert2 fail with:-1
[2024-05-26 03:43:46] secure storage read rsa_cert3 fail
[2024-05-26 03:43:46] [00.648]secure storage read rsa_cert3 fail with:-1
[2024-05-26 03:43:46] [00.652]usb burn from boot
[2024-05-26 03:43:46] delay time 0
[2024-05-26 03:43:46] weak:otg_phy_config
[2024-05-26 03:43:46] [00.663]usb prepare ok
[2024-05-26 03:43:47] [01.466]overtime
[2024-05-26 03:43:47] [01.469]do_burn_from_boot usb : no usb exist
[2024-05-26 03:43:47] root_partition is rootfs
[2024-05-26 03:43:47] set root to /dev/mmcblk0p5
[2024-05-26 03:43:47] [01.478]update part info
[2024-05-26 03:43:47] [01.481]update bootcmd
[2024-05-26 03:43:47] [01.484]change working_fdt 0x43e83e70 to 0x43e63e70
[2024-05-26 03:43:47] disable nand error: FDT_ERR_BADPATH
[2024-05-26 03:43:47] [01.508]update dts
[2024-05-26 03:43:47] Hit any key to stop autoboot: 3 [01.660]LCD open finish
[2024-05-26 03:43:50] 0
[2024-05-26 03:43:50] [04.651]no vendor_boot partition is found
[2024-05-26 03:43:50] Android's image name: t113-100ask
[2024-05-26 03:43:50] [04.661]Starting kernel ...
[2024-05-26 03:43:46]
[2024-05-26 03:43:50] [04.664][mmc]: MMC Device 2 not found
[2024-05-26 03:43:50] [04.667][mmc]: mmc 2 not find, so not exit
[2024-05-26 03:43:50] [ 0.000000] Booting Linux on physical CPU 0x0
[2024-05-26 03:43:50] [ 0.000000] Linux version 5.4.61 (qiao@DevelopComputer) (arm-openwrt-linux-muslgnueabi-gcc.bin (OpenWrt/Linaro GCC 6.4-2017.11 2017-11) 6.4.1, GNU ld (GNU Binutils) 2.27) #38 SMP PREEMPT Sat May 25 19:17:21 UTC 2024
[2024-05-26 03:43:50] [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
[2024-05-26 03:43:50] [ 0.000000] CPU: div instructions available: patching division code
[2024-05-26 03:43:50] [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[2024-05-26 03:43:50] [ 0.000000] OF: fdt: Machine model: sun8iw20
[2024-05-26 03:43:50] [ 0.000000] printk: bootconsole [earlycon0] enabled
[2024-05-26 03:43:50] [ 0.000000] Memory policy: Data cache writealloc
[2024-05-26 03:43:50] [ 0.000000] cma: Reserved 8 MiB at 0x47800000
[2024-05-26 03:43:50] [ 0.000000] On node 0 totalpages: 32768
[2024-05-26 03:43:50] [ 0.000000] Normal zone: 256 pages used for memmap
[2024-05-26 03:43:50] [ 0.000000] Normal zone: 0 pages reserved
[2024-05-26 03:43:50] [ 0.000000] Normal zone: 32768 pages, LIFO batch:7
[2024-05-26 03:43:50] [ 0.000000] psci: probing for conduit method from DT.
[2024-05-26 03:43:50] [ 0.000000] psci: PSCIv1.0 detected in firmware.
[2024-05-26 03:43:50] [ 0.000000] psci: Using standard PSCI v0.2 function IDs
[2024-05-26 03:43:50] [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
[2024-05-26 03:43:50] [ 0.000000] psci: SMC Calling Convention v1.0
[2024-05-26 03:43:50] [ 0.000000] percpu: Embedded 15 pages/cpu s28876 r8192 d24372 u61440
[2024-05-26 03:43:50] [ 0.000000] pcpu-alloc: s28876 r8192 d24372 u61440 alloc=15*4096
[2024-05-26 03:43:50] [ 0.000000] pcpu-alloc: [0] 0 [0] 1
[2024-05-26 03:43:50] [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32512
[2024-05-26 03:43:50] [ 0.000000] Kernel command line: earlyprintk=sunxi-uart,0x02500C00 clk_ignore_unused initcall_debug=0 console=tty0 console=ttyS3,115200 panic=5 loglevel=8 root=/dev/mmcblk0p5 init=/sbin/init partitions=boot-resource@mmcblk0p1:env@mmcblk0p2:env-redund@mmcblk0p3:boot@mmcblk0p4:rootfs@mmcblk0p5:private@mmcblk0p6:rootfs_data@mmcblk0p7:UDISK@mmcblk0p8 cma=8M snum= mac_addr= wifi_mac= bt_mac= specialstr= gpt=1 androidboot.mode=normal androidboot.hardware=sun8iw20p1 boot_type=1 androidboot.boot_type=1 gpt=1 uboot_message=2018.05-g24521d6-dirty(05/25/2024-05:00:09) disp_reserve=921600,0x43eed000 androidboot.dramsize=128
[2024-05-26 03:43:50] [ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear)
[2024-05-26 03:43:50] [ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
[2024-05-26 03:43:50] [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[2024-05-26 03:43:50] [ 0.000000] Memory: 108752K/131072K available (5120K kernel code, 252K rwdata, 1340K rodata, 1024K init, 1162K bss, 14128K reserved, 8192K cma-reserved)
[2024-05-26 03:43:50] [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[2024-05-26 03:43:50] [ 0.000000] rcu: Preemptible hierarchical RCU implementation.
[2024-05-26 03:43:50] [ 0.000000] Tasks RCU enabled.
[2024-05-26 03:43:50] [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[2024-05-26 03:43:50] [ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[2024-05-26 03:43:50] [ 0.000000] random: get_random_bytes called from start_kernel+0x264/0x3e8 with crng_init=0
[2024-05-26 03:43:50] [ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys).
[2024-05-26 03:43:50] [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns
[2024-05-26 03:43:50] [ 0.000006] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns
[2024-05-26 03:43:50] [ 0.008026] Switching to timer-based delay loop, resolution 41ns
[2024-05-26 03:43:50] [ 0.014186] clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[2024-05-26 03:43:50] [ 0.023961] Console: colour dummy device 80x30
[2024-05-26 03:43:50] [ 0.029118] printk: console [tty0] enabled
[2024-05-26 03:43:50] [ 0.033257] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=240000)
[2024-05-26 03:43:50] [ 0.043649] pid_max: default: 32768 minimum: 301
[2024-05-26 03:43:50] [ 0.048427] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[2024-05-26 03:43:50] [ 0.055782] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[2024-05-26 03:43:50] [ 0.064121] CPU: Testing write buffer coherency: ok
[2024-05-26 03:43:50] [ 0.069366] /cpus/cpu@0 missing clock-frequency property
[2024-05-26 03:43:50] [ 0.074703] /cpus/cpu@1 missing clock-frequency property
[2024-05-26 03:43:50] [ 0.080066] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[2024-05-26 03:43:50] [ 0.086244] Setting up static identity map for 0x40100000 - 0x40100060
[2024-05-26 03:43:50] [ 0.092917] rcu: Hierarchical SRCU implementation.
[2024-05-26 03:43:50] [ 0.098133] smp: Bringing up secondary CPUs ...
[2024-05-26 03:43:50] [ 0.103776] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[2024-05-26 03:43:50] [ 0.103898] smp: Brought up 1 node, 2 CPUs
[2024-05-26 03:43:50] [ 0.113760] SMP: Total of 2 processors activated (96.00 BogoMIPS).
[2024-05-26 03:43:50] [ 0.119953] CPU: All CPU(s) started in SVC mode.
[2024-05-26 03:43:50] [ 0.125037] devtmpfs: initialized
[2024-05-26 03:43:50] [ 0.139522] VFP support v0.3: implementor 41 architecture 2 part 30 variant 7 rev 5
[2024-05-26 03:43:50] [ 0.147682] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[2024-05-26 03:43:50] [ 0.157592] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[2024-05-26 03:43:50] [ 0.164840] pinctrl core: initialized pinctrl subsystem
[2024-05-26 03:43:50] [ 0.172216] DMA: preallocated 256 KiB pool for atomic coherent allocations
[2024-05-26 03:43:50] [ 0.202754] rtc_ccu: sunxi ccu init OK
[2024-05-26 03:43:50] [ 0.208721] ccu: sunxi ccu init OK
[2024-05-26 03:43:50] [ 0.212520] r_ccu: sunxi ccu init OK
[2024-05-26 03:43:50] [ 0.225745] fbcon: Taking over console
[2024-05-26 03:43:50] [ 0.248458] reg-fixed-voltage vdd-cpu: Fixed regulator specified with variable voltages
[2024-05-26 03:43:50] [ 0.256573] reg-fixed-voltage: probe of vdd-cpu failed with error -22
[2024-05-26 03:43:50] [ 0.263438] iommu: Default domain type: Translated
[2024-05-26 03:43:50] [ 0.268526] sunxi iommu: irq = 24
[2024-05-26 03:43:50] [ 0.272675] SCSI subsystem initialized
[2024-05-26 03:43:50] [ 0.276593] usbcore: registered new interface driver usbfs
[2024-05-26 03:43:50] [ 0.282160] usbcore: registered new interface driver hub
[2024-05-26 03:43:50] [ 0.287561] usbcore: registered new device driver usb
[2024-05-26 03:43:50] [ 0.293453] Advanced Linux Sound Architecture Driver Initialized.
[2024-05-26 03:43:50] [ 0.299579] pwm module init!
[2024-05-26 03:43:50] [ 0.303764] g2d 5410000.g2d: Adding to iommu group 0
[2024-05-26 03:43:51] [ 0.309046] G2D: rcq version initialized.major:251
[2024-05-26 03:43:51] [ 0.314617] clocksource: Switched to clocksource arch_sys_counter
[2024-05-26 03:43:51] [ 0.329250] sun8iw20-pinctrl 2000000.pinctrl: initialized sunXi PIO driver
[2024-05-26 03:43:51] [ 0.347448] workingset: timestamp_bits=30 max_order=15 bucket_order=0
[2024-05-26 03:43:51] [ 0.358329] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[2024-05-26 03:43:51] [ 0.364336] ntfs: driver 2.1.32 [Flags: R/W].
[2024-05-26 03:43:51] [ 0.397150] io scheduler mq-deadline registered
[2024-05-26 03:43:51] [ 0.401723] io scheduler kyber registered
[2024-05-26 03:43:51] [ 0.406981] [DISP]disp_module_init
[2024-05-26 03:43:51] [ 0.410829] disp 5000000.disp: Adding to iommu group 0
[2024-05-26 03:43:51] [ 0.416558] [DISP] disp_init,line:2386:
[2024-05-26 03:43:51] [ 0.416564] smooth display screen:0 type:1 mode:4
[2024-05-26 03:43:51] [ 0.436252] disp 5000000.disp: 5000000.disp supply vcc-lcd not found, using dummy regulator
[2024-05-26 03:43:51] [ 0.444832] disp 5000000.disp: 5000000.disp supply vcc-pd not found, using dummy regulator
[2024-05-26 03:43:51] [ 0.458179] [DISP] disp_init_hdmi,line:1047:
[2024-05-26 03:43:51] [ 0.458182] dont support hdmi
[2024-05-26 03:43:51] [ 0.465782] display_fb_request,fb_id:0
[2024-05-26 03:43:51] [ 0.471741] Freeing logo buffer memory: 900K
[2024-05-26 03:43:52] [ 0.476507] disp_al_manager_apply ouput_type:1
[2024-05-26 03:43:52] [ 0.477586] sun8iw20-pinctrl 2000000.pinctrl: 2000000.pinctrl supply vcc-pd not found, using dummy regulator
[2024-05-26 03:43:52] [ 1.764815] Console: switching to colour frame buffer device 60x30
[2024-05-26 03:43:52] [ 1.814146] [DISP]disp_module_init finish
[2024-05-26 03:43:52] [ 1.821933] sunxi_sid_init()551 - insmod ok
[2024-05-26 03:43:52] [ 1.829935] sun8iw20-pinctrl 2000000.pinctrl: 2000000.pinctrl supply vcc-pg not found, using dummy regulator
[2024-05-26 03:43:52] [ 1.845965] uart uart3: get regulator failed
[2024-05-26 03:43:52] [ 1.853177] uart uart3: uart3 supply uart not found, using dummy regulator
[2024-05-26 03:43:52] [ 1.866102] uart3: ttyS3 at MMIO 0x2500c00 (irq = 34, base_baud = 1500000) is a SUNXI
[2024-05-26 03:43:52] [ 1.879808] sw_console_setup()1808 - console setup baud 115200 parity n bits 8, flow n
[2024-05-26 03:43:52] [ 1.893712] printk: console [ttyS3] enabled
[2024-05-26 03:43:52] [ 1.893712] printk: console [ttyS3] enabled
[2024-05-26 03:43:52] [ 1.905649] printk: bootconsole [earlycon0] disabled
[2024-05-26 03:43:52] [ 1.905649] printk: bootconsole [earlycon0] disabled
[2024-05-26 03:43:52] [ 1.919984] misc dump reg init
[2024-05-26 03:43:52] [ 1.927239] dma-buf: Running sanitycheck
[2024-05-26 03:43:52] [ 1.934701] dma-buf: Running dma_fence
[2024-05-26 03:43:52] [ 1.941852] sizeof(dma_fence)=48
[2024-05-26 03:43:52] [ 1.948487] dma-buf: Running dma_fence/sanitycheck
[2024-05-26 03:43:52] [ 1.956809] dma-buf: Running dma_fence/test_signaling
[2024-05-26 03:43:52] [ 1.965337] dma-buf: Running dma_fence/test_add_callback
[2024-05-26 03:43:52] [ 1.974064] dma-buf: Running dma_fence/test_late_add_callback
[2024-05-26 03:43:52] [ 1.985877] dma-buf: Running dma_fence/test_rm_callback
[2024-05-26 03:43:52] [ 1.994564] dma-buf: Running dma_fence/test_late_rm_callback
[2024-05-26 03:43:52] [ 2.006394] dma-buf: Running dma_fence/test_status
[2024-05-26 03:43:52] [ 2.014576] dma-buf: Running dma_fence/test_error
[2024-05-26 03:43:52] [ 2.022572] dma-buf: Running dma_fence/test_wait
[2024-05-26 03:43:52] [ 2.030363] dma-buf: Running dma_fence/test_wait_timeout
[2024-05-26 03:43:52] [ 2.074628] dma-buf: Running dma_fence/test_stub
[2024-05-26 03:43:52] [ 2.082298] dma-buf: Running dma_fence/race_signal_callback
[2024-05-26 03:43:52] [ 2.154646] thread_signal_callback[0] completed 33366 passes, 6447 misses
[2024-05-26 03:43:52] [ 2.167187] thread_signal_callback[1] completed 33352 passes, 6435 misses
[2024-05-26 03:43:52] [ 2.244633] thread_signal_callback[0] completed 40791 passes, 40790 misses
[2024-05-26 03:43:52] [ 2.257376] thread_signal_callback[1] completed 40764 passes, 40762 misses
[2024-05-26 03:43:52] [ 2.270609] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[2024-05-26 03:43:52] [ 2.283090] sunxi-ehci: EHCI SUNXI driver
[2024-05-26 03:43:52] [ 2.290619] get ehci0-controller wakeup-source is fail.
[2024-05-26 03:43:52] [ 2.299252] sunxi ehci0-controller don't init wakeup source
[2024-05-26 03:43:52] [ 2.310845] [sunxi-ehci0]: probe, pdev->name: 4101000.ehci0-controller, sunxi_ehci: 0xc0a5dd80, 0x:c882f000, irq_no:35
[2024-05-26 03:43:52] [ 2.331500] sunxi-ehci 4101000.ehci0-controller: 4101000.ehci0-controller supply hci not found, using dummy regulator
[2024-05-26 03:43:52] [ 2.349822] sunxi-ehci 4101000.ehci0-controller: EHCI Host Controller
[2024-05-26 03:43:53] [ 2.363153] sunxi-ehci 4101000.ehci0-controller: new USB bus registered, assigned bus number 1
[2024-05-26 03:43:53] [ 2.379407] sunxi-ehci 4101000.ehci0-controller: irq 53, io mem 0x04101000
[2024-05-26 03:43:53] [ 2.414634] sunxi-ehci 4101000.ehci0-controller: USB 2.0 started, EHCI 1.00
[2024-05-26 03:43:53] [ 2.430099] hub 1-0:1.0: USB hub found
[2024-05-26 03:43:53] [ 2.437891] hub 1-0:1.0: 1 port detected
[2024-05-26 03:43:53] [ 2.446417] get ehci1-controller wakeup-source is fail.
[2024-05-26 03:43:53] [ 2.455867] sunxi ehci1-controller don't init wakeup source
[2024-05-26 03:43:53] [ 2.468830] [sunxi-ehci1]: probe, pdev->name: 4200000.ehci1-controller, sunxi_ehci: 0xc0a5e2a0, 0x:c8835000, irq_no:37
[2024-05-26 03:43:53] [ 2.491146] sunxi-ehci 4200000.ehci1-controller: 4200000.ehci1-controller supply hci not found, using dummy regulator
[2024-05-26 03:43:53] [ 2.510222] sunxi-ehci 4200000.ehci1-controller: EHCI Host Controller
[2024-05-26 03:43:53] [ 2.524236] sunxi-ehci 4200000.ehci1-controller: new USB bus registered, assigned bus number 2
[2024-05-26 03:43:53] [ 2.540991] sunxi-ehci 4200000.ehci1-controller: irq 55, io mem 0x04200000
[2024-05-26 03:43:53] [ 2.584643] sunxi-ehci 4200000.ehci1-controller: USB 2.0 started, EHCI 1.00
[2024-05-26 03:43:53] [ 2.600130] hub 2-0:1.0: USB hub found
[2024-05-26 03:43:53] [ 2.607817] hub 2-0:1.0: 1 port detected
[2024-05-26 03:43:53] [ 2.616146] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[2024-05-26 03:43:53] [ 2.629701] sunxi-ohci: OHCI SUNXI driver
[2024-05-26 03:43:53] [ 2.637902] get ohci0-controller wakeup-source is fail.
[2024-05-26 03:43:53] [ 2.647199] sunxi ohci0-controller don't init wakeup source
[2024-05-26 03:43:53] [ 2.659883] [sunxi-ohci0]: probe, pdev->name: 4101400.ohci0-controller, sunxi_ohci: 0xc0a5e010
[2024-05-26 03:43:53] [ 2.676242] sunxi-ohci 4101400.ohci0-controller: 4101400.ohci0-controller supply hci not found, using dummy regulator
[2024-05-26 03:43:53] [ 2.695097] sunxi-ohci 4101400.ohci0-controller: OHCI Host Controller
[2024-05-26 03:43:53] [ 2.709072] sunxi-ohci 4101400.ohci0-controller: new USB bus registered, assigned bus number 3
[2024-05-26 03:43:53] [ 2.725774] sunxi-ohci 4101400.ohci0-controller: irq 54, io mem 0x04101400
[2024-05-26 03:43:53] [ 2.809443] hub 3-0:1.0: USB hub found
[2024-05-26 03:43:53] [ 2.817077] hub 3-0:1.0: 1 port detected
[2024-05-26 03:43:53] [ 2.825474] get ohci1-controller wakeup-source is fail.
[2024-05-26 03:43:53] [ 2.834775] sunxi ohci1-controller don't init wakeup source
[2024-05-26 03:43:53] [ 2.847430] [sunxi-ohci1]: probe, pdev->name: 4200400.ohci1-controller, sunxi_ohci: 0xc0a5e530
[2024-05-26 03:43:53] [ 2.863748] sunxi-ohci 4200400.ohci1-controller: 4200400.ohci1-controller supply hci not found, using dummy regulator
[2024-05-26 03:43:53] [ 2.882580] sunxi-ohci 4200400.ohci1-controller: OHCI Host Controller
[2024-05-26 03:43:53] [ 2.896274] sunxi-ohci 4200400.ohci1-controller: new USB bus registered, assigned bus number 4
[2024-05-26 03:43:53] [ 2.912678] debugfs: Directory 'sunxi-ohci' with parent 'ohci' already present!
[2024-05-26 03:43:53] [ 2.927676] sunxi-ohci 4200400.ohci1-controller: irq 56, io mem 0x04200400
[2024-05-26 03:43:53] [ 3.009455] hub 4-0:1.0: USB hub found
[2024-05-26 03:43:53] [ 3.017133] hub 4-0:1.0: 1 port detected
[2024-05-26 03:43:53] [ 3.025496] usbcore: registered new interface driver cdc_acm
[2024-05-26 03:43:53] [ 3.038418] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
[2024-05-26 03:43:53] [ 3.038547] usbcore: registered new interface driver usb-storage
[2024-05-26 03:43:53] [ 3.068918] sunxi-rtc 7090000.rtc: registered as rtc0
[2024-05-26 03:43:53] [ 3.078087] sunxi-rtc 7090000.rtc: setting system clock to 1970-01-01T00:00:43 UTC (43)
[2024-05-26 03:43:53] [ 3.093531] sunxi-rtc 7090000.rtc: sunxi rtc probed
[2024-05-26 03:43:53] [ 3.102543] i2c /dev entries driver
[2024-05-26 03:43:53] [ 3.109796] sunxi cedar version 1.1
[2024-05-26 03:43:53] [ 3.117101] sunxi-cedar 1c0e000.ve: Adding to iommu group 0
[2024-05-26 03:43:53] [ 3.129789] VE: sunxi_cedar_probe power-domain init!!!
[2024-05-26 03:43:53] [ 3.138830] VE: install start!!!
[2024-05-26 03:43:53] [ 3.138830]
[2024-05-26 03:43:53] [ 3.150568] VE: cedar-ve the get irq is 39
[2024-05-26 03:43:53] [ 3.150568]
[2024-05-26 03:43:53] [ 3.163050] VE: ve_debug_proc_info:(ptrval), data:(ptrval), lock:(ptrval)
[2024-05-26 03:43:53] [ 3.163050]
[2024-05-26 03:43:53] [ 3.181159] VE: install end!!!
[2024-05-26 03:43:53] [ 3.181159]
[2024-05-26 03:43:53] [ 3.191737] VE: sunxi_cedar_probe
[2024-05-26 03:43:53] [ 3.199796] sunxi-mmc 4020000.sdmmc: SD/MMC/SDIO Host Controller Driver(v4.21 2021-11-18 10:02)
[2024-05-26 03:43:53] [ 3.215170] sunxi-mmc 4020000.sdmmc: ***ctl-spec-caps*** 8
[2024-05-26 03:43:53] [ 3.226817] sunxi-mmc 4020000.sdmmc: No vmmc regulator found
[2024-05-26 03:43:53] [ 3.238697] sunxi-mmc 4020000.sdmmc: No vqmmc regulator found
[2024-05-26 03:43:53] [ 3.250686] sunxi-mmc 4020000.sdmmc: No vdmmc regulator found
[2024-05-26 03:43:53] [ 3.262667] sunxi-mmc 4020000.sdmmc: No vd33sw regulator found
[2024-05-26 03:43:53] [ 3.274800] sunxi-mmc 4020000.sdmmc: No vd18sw regulator found
[2024-05-26 03:43:53] [ 3.287003] sunxi-mmc 4020000.sdmmc: No vq33sw regulator found
[2024-05-26 03:43:53] [ 3.299331] sunxi-mmc 4020000.sdmmc: No vq18sw regulator found
[2024-05-26 03:43:54] [ 3.312576] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 0Hz bm PP pm UP vdd 21 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 3.329868] sunxi-mmc 4020000.sdmmc: no vqmmc,Check if there is regulator
[2024-05-26 03:43:54] [ 3.356267] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 3.387047] sunxi-mmc 4020000.sdmmc: detmode:gpio polling
[2024-05-26 03:43:54] [ 3.396424] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 3.415172] sunxi-mmc 4021000.sdmmc: SD/MMC/SDIO Host Controller Driver(v4.21 2021-11-18 10:02)
[2024-05-26 03:43:54] [ 3.417718] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 3.432115] sunxi-mmc 4021000.sdmmc: ***ctl-spec-caps*** 8
[2024-05-26 03:43:54] [ 3.452922] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 3.463778] sunxi-mmc 4021000.sdmmc: No vmmc regulator found
[2024-05-26 03:43:54] [ 3.485495] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 3.495824] sunxi-mmc 4021000.sdmmc: No vqmmc regulator found
[2024-05-26 03:43:54] [ 3.495831] sunxi-mmc 4021000.sdmmc: No vdmmc regulator found
[2024-05-26 03:43:54] [ 3.541447] sunxi-mmc 4021000.sdmmc: No vd33sw regulator found
[2024-05-26 03:43:54] [ 3.554998] sunxi-mmc 4021000.sdmmc: No vd18sw regulator found
[2024-05-26 03:43:54] [ 3.564045] mmc0: host does not support reading read-only switch, assuming write-enable
[2024-05-26 03:43:54] [ 3.568549] sunxi-mmc 4021000.sdmmc: No vq33sw regulator found
[2024-05-26 03:43:54] [ 3.568554] sunxi-mmc 4021000.sdmmc: No vq18sw regulator found
[2024-05-26 03:43:54] [ 3.568579] sunxi-mmc 4021000.sdmmc: Cann't get pin bias hs pinstate,check if needed
[2024-05-26 03:43:54] [ 3.587519] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing SD-HS(SDR25) dt B
[2024-05-26 03:43:54] [ 3.598916] sunxi-mmc 4021000.sdmmc: sdc set ios:clk 0Hz bm PP pm UP vdd 21 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 3.611875] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 50000000Hz bm PP pm ON vdd 21 width 1 timing SD-HS(SDR25) dt B
[2024-05-26 03:43:54] [ 3.627571] sunxi-mmc 4021000.sdmmc: no vqmmc,Check if there is regulator
[2024-05-26 03:43:54] [ 3.646444] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 50000000Hz bm PP pm ON vdd 21 width 4 timing SD-HS(SDR25) dt B
[2024-05-26 03:43:54] [ 3.677165] sunxi-mmc 4021000.sdmmc: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 3.683660] mmc0: new high speed SDHC card at address aaaa
[2024-05-26 03:43:54] [ 3.710933] sunxi-mmc 4021000.sdmmc: detmode:manually by software
[2024-05-26 03:43:54] [ 3.718239] mmcblk0: mmc0:aaaa SD32G 29.7 GiB
[2024-05-26 03:43:54] [ 3.737029] exFAT: Version 1.3.0
[2024-05-26 03:43:54] [ 3.749608] sunxi-mmc 4021000.sdmmc: smc 1 p1 err, cmd 52, RTO !!
[2024-05-26 03:43:54] [ 3.764031] usbcore: registered new interface driver snd-usb-audio
[2024-05-26 03:43:54] [ 3.775405] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8
[2024-05-26 03:43:54] [ 3.780814] [AUDIOCODEC][sunxi_codec_parse_params][2412]:digital_vol:0, lineout_vol:26, mic1gain:31, mic2gain:31 pa_msleep:120, pa_level:1, pa_pwr_level:1
[2024-05-26 03:43:54] [ 3.780814]
[2024-05-26 03:43:54] [ 3.793180] sunxi-mmc 4021000.sdmmc: smc 1 p1 err, cmd 52, RTO !!
[2024-05-26 03:43:54] [ 3.807076] [AUDIOCODEC][sunxi_codec_parse_params][2448]:adcdrc_cfg:0, adchpf_cfg:1, dacdrc_cfg:0, dachpf:0
[2024-05-26 03:43:54] [ 3.877814] sunxi-mmc 4021000.sdmmc: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 3.885122] [AUDIOCODEC][sunxi_internal_codec_probe][2609]:codec probe finished
[2024-05-26 03:43:54] [ 3.912303] debugfs: Directory '203034c.dummy_cpudai' with parent 'audiocodec' already present!
[2024-05-26 03:43:54] [ 3.912689] sunxi-mmc 4021000.sdmmc: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 3.929023] [SNDCODEC][sunxi_card_init][583]:card init finished
[2024-05-26 03:43:54] [ 3.960937] sunxi-mmc 4021000.sdmmc: smc 1 p1 err, cmd 5, RTO !!
[2024-05-26 03:43:54] [ 3.974486] sunxi-mmc 4021000.sdmmc: smc 1 p1 err, cmd 5, RTO !!
[2024-05-26 03:43:54] [ 3.988030] sunxi-mmc 4021000.sdmmc: smc 1 p1 err, cmd 5, RTO !!
[2024-05-26 03:43:54] [ 4.001650] sunxi-mmc 4021000.sdmmc: smc 1 p1 err, cmd 5, RTO !!
[2024-05-26 03:43:54] [ 4.001677] sunxi-mmc 4021000.sdmmc: sdc set ios:clk 0Hz bm PP pm OFF vdd 0 width 1 timing LEGACY(SDR12) dt B
[2024-05-26 03:43:54] [ 4.033906] sunxi-codec-machine 2030340.sound: 2030000.codec <-> 203034c.dummy_cpudai mapping ok
[2024-05-26 03:43:54] [ 4.051938] input: audiocodec sunxi Audio Jack as /devices/platform/soc@3000000/2030340.sound/sound/card0/input0
[2024-05-26 03:43:54] [ 4.071076] [SNDCODEC][sunxi_card_dev_probe][836]:register card finished
[2024-05-26 03:43:54] [ 4.085852] [SNDCODEC][sunxi_hs_init_work][259]:resume-->report switch
[2024-05-26 03:43:54] [ 4.095187] Registering SWP/SWPB emulation handler
[2024-05-26 03:43:54] [ 4.123738] sun8iw20-pinctrl 2000000.pinctrl: 2000000.pinctrl supply vcc-pb not found, using dummy regulator
[2024-05-26 03:43:54] [ 4.142432] sunxi-i2c sunxi-i2c0: sunxi-i2c0 supply twi not found, using dummy regulator
[2024-05-26 03:43:54] [ 4.159476] sunxi-i2c sunxi-i2c0: probe success
[2024-05-26 03:43:54] [ 4.168556] sun8iw20-pinctrl 2000000.pinctrl: 2000000.pinctrl supply vcc-pe not found, using dummy regulator
[2024-05-26 03:43:54] [ 4.187054] sunxi-i2c sunxi-i2c1: sunxi-i2c1 supply twi not found, using dummy regulator
[2024-05-26 03:43:54] [ 4.204003] sunxi-i2c sunxi-i2c1: probe success
[2024-05-26 03:43:54] [ 4.216326] clk: Not disabling unused clocks
[2024-05-26 03:43:54] [ 4.224696] ALSA device list:
[2024-05-26 03:43:54] [ 4.231448] #0: audiocodec
[2024-05-26 03:43:54] [ 4.238053] alloc_fd: slot 0 not NULL!
[2024-05-26 03:43:54] [ 4.255681] EXT4-fs (mmcblk0p5): mounted filesystem without journal. Opts: (null)
[2024-05-26 03:43:54] [ 4.270813] VFS: Mounted root (ext4 filesystem) readonly on device 179:5.
[2024-05-26 03:43:54] [ 4.279600] random: fast init done
[2024-05-26 03:43:54] [ 4.292312] devtmpfs: mounted
[2024-05-26 03:43:54] [ 4.300792] Freeing unused kernel memory: 1024K
[2024-05-26 03:43:54] [ 4.309211] Run /sbin/init as init process
[2024-05-26 03:43:55] [ 4.371860] init: Console is alive
[2024-05-26 03:43:55] [ 4.379108] init: - preinit -
[2024-05-26 03:43:55] [ 4.395463] procd: Failed to open hotplug socket: Function not implemented
[2024-05-26 03:43:55] /dev/by-name/UDISK already format by ext4
[2024-05-26 03:43:55] /dev/by-name/rootfs_data already format by ext4
[2024-05-26 03:43:55] [ 4.568515] mount_root: mounting /dev/root
[2024-05-26 03:43:55] [ 4.576420] EXT4-fs (mmcblk0p5): re-mounted. Opts: (null)
[2024-05-26 03:43:55] [ 4.585690] mount_root: loading kmods from internal overlay
[2024-05-26 03:43:55] [ 4.667798] block: attempting to load /etc/config/fstab
[2024-05-26 03:43:55] e2fsck 1.46.4 (18-Aug-2021)
[2024-05-26 03:43:55] /dev/by-name/UDISK: recovering journal
[2024-05-26 03:43:55] /dev/by-name/UDISK: clean, 11/1929536 files, 165161/7712727 blocks
[2024-05-26 03:43:55] [ 4.880538] EXT4-fs (mmcblk0p8): mounted filesystem with ordered data mode. Opts:
[2024-05-26 03:43:55] [ 4.903121] mount_root: switched to extroot
[2024-05-26 03:43:55] [ 4.916871] procd: - early -
[2024-05-26 03:43:55] [ 4.923109] procd: Failed to open hotplug socket: Function not implemented
[2024-05-26 03:43:55] [ 4.936548] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000100
[2024-05-26 03:43:55] [ 4.950793] CPU0: stopping
[2024-05-26 03:43:55] [ 4.956613] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.4.61 #38
[2024-05-26 03:43:55] [ 4.969011] Hardware name: Generic DT based system
[2024-05-26 03:43:55] [ 4.977357] [<c010de4c>] (unwind_backtrace) from [<c010a5f4>] (show_stack+0x10/0x14)
[2024-05-26 03:43:55] [ 4.991904] [<c010a5f4>] (show_stack) from [<c0527688>] (dump_stack+0x88/0xa4)
[2024-05-26 03:43:55] [ 5.005850] [<c0527688>] (dump_stack) from [<c010c234>] (handle_IPI+0xe4/0x180)
[2024-05-26 03:43:55] [ 5.020059] [<c010c234>] (handle_IPI) from [<c033c13c>] (gic_handle_irq+0x70/0x78)
[2024-05-26 03:43:55] [ 5.034743] [<c033c13c>] (gic_handle_irq) from [<c01021cc>] (__irq_svc+0x6c/0xa8)
[2024-05-26 03:43:55] [ 5.049528] Exception stack(0xc0901f40 to 0xc0901f88)
[2024-05-26 03:43:55] [ 5.058473] 1f40: 00001270 c76b7fb4 00000000 c0114740 00000001 c0900000 c0903de8 c0903e24
[2024-05-26 03:43:55] [ 5.074150] 1f60: c0940000 c77ff540 c08210c0 00000000 c0a467d0 c0901f90 c0107f48 c0107f38
[2024-05-26 03:43:55] [ 5.089887] 1f80: 60000013 ffffffff
[2024-05-26 03:43:55] [ 5.097040] [<c01021cc>] (__irq_svc) from [<c0107f38>] (arch_cpu_idle+0x1c/0x38)
[2024-05-26 03:43:55] [ 5.111825] [<c0107f38>] (arch_cpu_idle) from [<c013d3dc>] (do_idle+0xd4/0x128)
[2024-05-26 03:43:55] [ 5.126557] [<c013d3dc>] (do_idle) from [<c013d6c8>] (cpu_startup_entry+0x18/0x20)
[2024-05-26 03:43:55] [ 5.141744] [<c013d6c8>] (cpu_startup_entry) from [<c0800c74>] (start_kernel+0x358/0x3e8)
[2024-05-26 03:43:55] [ 5.157680] Rebooting in 5 seconds..
kennel 设备树如下:
/*
* Allwinner Technology CO., Ltd.
*/
/dts-v1/;
/* optee used 7MB: SHM 2M: OS: 1M: TA:4M*/
/memreserve/ 0x41900000 0x00100000;
/* DSP used 1MB */
/* /memreserve/ 0x42000000 0x00100000; */
#include "sun8iw20p1.dtsi"
/{
model = "sun8iw20";
compatible = "allwinner,r528", "arm,sun8iw20p1";
reg_vdd_cpu: vdd-cpu {
compatible = "regulator-fixed";
regulator-name = "vdd_cpu";
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1160000>;
regulator-always-on;
status = "okay";
};
reg_usb1_vbus: usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
led {
compatible = "gpio-leds";
led1 {
label = "led1";
gpios = <&pio PG 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
};
};
&cpu0 {
cpu-supply = <®_vdd_cpu>;
};
&pio {
sdc0_pins_a: sdc0@0 {
allwinner,pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
allwinner,function = "sdc0";
allwinner,muxsel = <2>;
allwinner,drive = <3>;
allwinner,pull = <1>;
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
function = "sdc0";
drive-strength = <30>;
bias-pull-up;
power-source = <3300>;
};
sdc0_pins_b: sdc0@1 {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
function = "sdc0";
drive-strength = <30>;
bias-pull-up;
power-source = <1800>;
};
sdc0_pins_c: sdc0@2 {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
function = "gpio_in";
};
/* TODO: add jtag pin */
sdc0_pins_d: sdc0@3 {
pins = "PF2", "PF4";
function = "uart0";
drive-strength = <10>;
bias-pull-up;
};
sdc0_pins_e: sdc0@4 {
pins = "PF0", "PF1", "PF3",
"PF5";
function = "jtag";
drive-strength = <10>;
bias-pull-up;
};
sdc1_pins_a: sdc1@0 {
pins = "PG0", "PG1", "PG2",
"PG3", "PG4", "PG5";
function = "sdc1";
drive-strength = <30>;
bias-pull-up;
};
sdc1_pins_b: sdc1@1 {
pins = "PG0", "PG1", "PG2",
"PG3", "PG4", "PG5";
function = "sdc1";
};
sdc2_pins_a: sdc2@0 {
allwinner,pins = "PC2", "PC3", "PC4",
"PC5", "PC6", "PC7";
allwinner,function = "sdc2";
allwinner,muxsel = <3>;
allwinner,drive = <3>;
allwinner,pull = <1>;
pins = "PC2", "PC3", "PC4",
"PC5", "PC6", "PC7";
function = "sdc2";
drive-strength = <30>;
bias-pull-up;
};
sdc2_pins_b: sdc2@1 {
pins = "PC2", "PC3", "PC4",
"PC5", "PC6", "PC7";
function = "gpio_in";
};
wlan_pins_a:wlan@0 {
pins = "PG11";
function = "clk_fanout1";
};
lvds0_pins_a: lvds0@0 {
allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
allwinner,function = "lvds0";
allwinner,muxsel = <3>;
allwinner,drive = <3>;
allwinner,pull = <0>;
};
lvds0_pins_b: lvds0@1 {
allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <3>;
allwinner,pull = <0>;
};
uart0_pins_a: uart0_pins@0 { /* For EVB1 board */
pins = "PE2", "PE3";
function = "uart0";
drive-strength = <10>;
bias-pull-up;
};
uart0_pins_b: uart0_pins@1 { /* For EVB1 board */
pins = "PE2", "PE3";
function = "gpio_in";
};
uart1_pins_a: uart1_pins@0 { /* For EVB1 board */
pins = "PG6", "PG7", "PG8", "PG9";
function = "uart1";
drive-strength = <10>;
bias-pull-up;
};
uart1_pins_b: uart1_pins { /* For EVB1 board */
pins = "PG6", "PG7", "PG8", "PG9";
function = "gpio_in";
};
uart2_pins_a: uart2_pins@0 { /* For EVB1 board */
pins = "PE2", "PE3";
function = "uart2";
drive-strength = <10>;
bias-pull-up;
};
uart2_pins_b: uart2_pins@1 { /* For EVB1 board */
pins = "PE2", "PE3";
function = "gpio_in";
};
uart3_pins_a: uart3_pins@0 { /* For t113_evb */
pins = "PG8", "PG9";
// pins = "PB6", "PB7";
function = "uart3";
drive-strength = <10>;
bias-pull-up;
};
uart3_pins_b: uart3_pins@1 { /* For t113_evb */
// pins = "PB6", "PB7";
pins = "PG8", "PG9";
function = "gpio_in";
};
twi0_pins_a: twi0@0 {
pins = "PB2", "PB3";
function = "twi0";
drive-strength = <10>;
};
twi0_pins_b: twi0@1 {
pins = "PB2", "PB3";
function = "gpio_in";
};
twi1_pins_a: twi1@0 {
pins = "PE0", "PE1";
function = "twi1";
drive-strength = <10>;
};
twi1_pins_b: twi1@1 {
pins = "PE0", "PE1";
function = "gpio_in";
};
twi2_pins_a: twi2@0 {
pins = "PE12", "PE13";
function = "twi2";
drive-strength = <10>;
};
twi2_pins_b: twi2@1 {
pins = "PE12", "PE13";
function = "gpio_in";
};
twi3_pins_a: twi3@0 {
/* pins = "PE16", "PE17"; */
/* pins = "PG10", "PG11"; */
/*pins = "PB6", "PB7";*/
function = "twi3";
drive-strength = <10>;
};
twi3_pins_b: twi3@1 {
/* pins = "PE16", "PE17"; */
/* pins = "PG10", "PG11"; */
/*pins = "PB6", "PB7";*/
function = "gpio_in";
};
s_cir0_pins_a: s_cir0@0 {
pins = "PB1";
function = "ir";
drive-strength = <10>;
bias-pull-up;
};
s_cir0_pins_b: s_cir0@1 {
pins = "PB1";
function = "gpio_in";
};
ir1_pins_a: ir1@0 {
pins = "PB0";
function = "ir";
drive-strength = <10>;
bias-pull-up;
};
ir1_pins_b: ir1@1 {
pins = "PB0";
function = "gpio_in";
};
dmic_pins_a: dmic@0 {
/* DMIC_PIN: CLK, DATA0, DATA1, DATA2, DATA3*/
pins = "PB12", "PB11", "PB10", "PE14", "PB8";
function = "dmic";
drive-strength = <20>;
bias-disable;
};
dmic_pins_b: dmic@1 {
pins = "PB12", "PB11", "PB10", "PE14", "PB8";
allwinner,function = "io_disabled";
drive-strength = <20>;
bias-disable;
};
daudio0_pins_a: daudio0@0 {
pins = "PB29", "PB23", "PB24",
"PB25", "PB26", "PB27", "PB28",
"PB22";
function = "i2s0";
drive-strength = <20>;
bias-disable;
};
daudio0_pins_b: daudio0_sleep@0 {
pins = "PB29", "PB23", "PB24",
"PB25", "PB26", "PB27", "PB28",
"PB22";
function = "io_disabled";
drive-strength = <20>;
bias-disable;
};
daudio1_pins_a: daudio1@0 {
/* MCLK, LRCK, BCLK */
pins = "PG12", "PG13";
function = "i2s1";
drive-strength = <20>;
bias-disable;
};
daudio1_pins_b: daudio1@1 {
/* DIN0 */
pins = "PG14";
function = "i2s1_din";
drive-strength = <20>;
bias-disable;
};
daudio1_pins_c: daudio1@2 {
/* DOUT0 */
pins = "PG15";
function = "i2s1_dout";
drive-strength = <20>;
bias-disable;
};
daudio1_pins_d: daudio1_sleep@0 {
pins = "PG12", "PG13", "PG14", "PG15";
function = "io_disabled";
drive-strength = <20>;
bias-disable;
};
daudio2_pins_a: daudio2@0 {
/* I2S_PIN: MCLK, BCLK, LRCK */
pins = "PB7", "PB6", "PB5";
function = "i2s2";
drive-strength = <20>;
bias-disable;
};
daudio2_pins_b: daudio2@1 {
/* I2S_PIN: DIN0 */
pins = "PB3";
function = "i2s2_din";
drive-strength = <20>;
bias-disable;
};
daudio2_pins_c: daudio2@2 {
/* I2S_PIN: DOUT0 */
pins = "PB4";
function = "i2s2_dout";
drive-strength = <20>;
bias-disable;
};
daudio2_pins_d: daudio2_sleep@0 {
pins = "PB7", "PB6", "PB5", "PB4", "PB3";
function = "io_disabled";
drive-strength = <20>;
bias-disable;
};
spdif_pins_a: spdif@0 {
/* SPDIF_PIN: SPDIF_OUT */
pins = "PG18";
function = "spdif";
drive-strength = <20>;
bias-disable;
};
spdif_pins_b: spdif_sleep@0 {
pins = "PG18";
function = "io_disabled";
drive-strength = <20>;
bias-disable;
};
gmac0_pins_a: gmac@0 {
allwinner,pins = "PE0", "PE1", "PE2", "PE3", "PE4",
"PE5", "PE6", "PE7","PE8", "PE9";
allwinner,function = "gmac0";
allwinner,muxsel = <8>;
allwinner,drive = <1>;
allwinner,pull = <0>;
};
gmac0_pins_b: gmac@1 {
allwinner,pins = "PE0", "PE1", "PE2", "PE3", "PE4",
"PE5", "PE6", "PE7","PE8", "PE9";
allwinner,function = "gpio_in";
allwinner,muxsel = <0>;
allwinner,drive = <1>;
allwinner,pull = <0>;
};
spi0_pins_a: spi0@0 {
pins = "PC2", "PC4", "PC5","PC7", "PC6"; /*clk mosi miso hold wp*/
function = "spi0";
drive-strength = <10>;
};
spi0_pins_b: spi0@1 {
pins = "PC3";
function = "spi0";
drive-strength = <10>;
bias-pull-up; /* only CS should be pulled up */
};
spi0_pins_c: spi0@2 {
pins = "PC2", "PC3", "PC4", "PC5","PC6", "PC7";
function = "gpio_in";
drive-strength = <10>;
};
spi1_pins_a: spi1@0 {
pins = "PB11", "PB10", "PB9","PB8", "PB0"; /*clk mosi miso hold wp*/
function = "spi1";
drive-strength = <10>;
};
spi1_pins_b: spi1@1 {
pins = "PB12";
function = "spi1";
drive-strength = <10>;
bias-pull-up; // only CS should be pulled up
};
spi1_pins_c: spi1@2 {
allwinner,pins = "PB0", "PB8", "PB9", "PB10","PB11", "PB12";
allwinner,function = "gpio_in";
allwinner,muxsel = <0>;
drive-strength = <10>;
};
pwm3_pin_a: pwm3@0 {
pins = "PB0";
function = "pwm3";
drive-strength = <10>;
bias-pull-up;
};
pwm3_pin_b: pwm3@1 {
pins = "PB0";
function = "gpio_in";
};
pwm7_pin_a: pwm7@0 {
pins = "PD22";
function = "pwm7";
drive-strength = <10>;
bias-pull-up;
};
pwm7_pin_b: pwm7@1 {
pins = "PD22";
function = "gpio_in";
};
ledc_pins_a: ledc@0 {
pins = "PF2";
function = "ledc";
drive-strength = <10>;
};
ledc_pins_b: ledc@1 {
pins = "PF2";
function = "gpio_in";
};
rgb24_pins_a: rgb24@0 {
allwinner,pins = "PB2", "PB3", "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", \
"PB4", "PB5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", \
"PB6", "PB7", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", \
"PD18", "PD19", "PD20", "PD21";
allwinner,pname = "lcdd0", "lcdd1", "lcdd2", "lcdd3", "lcdd4", "lcdd5", "lcdd6", "lcdd7", \
"lcdd8", "lcdd9", "lcdd10", "lcdd11", "lcdd12", "lcdd13", "lcdd14", "lcdd15", \
"lcdd16", "lcdd17", "lcdd18", "lcdd19", "lcdd20", "lcdd21", "lcdd22", "lcdd23", \
"lcdclk", "lcdde", "lcdhsync", "lcdvsync";
allwinner,function = "lcd0";
allwinner,muxsel = <2>;
allwinner,drive = <3>;
allwinner,pull = <0>;
};
rgb24_pins_b: rgb24@1 {
allwinner,pins = "PB2", "PB3", "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", \
"PB4", "PB5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", \
"PB6", "PB7", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", \
"PD18", "PD19", "PD20", "PD21";
allwinner,pname = "lcdd0", "lcdd1", "lcdd2", "lcdd3", "lcdd4", "lcdd5", "lcdd6", "lcdd7", \
"lcdd8", "lcdd9", "lcdd10", "lcdd11", "lcdd12", "lcdd13", "lcdd14", "lcdd15", \
"lcdd16", "lcdd17", "lcdd18", "lcdd19", "lcdd20", "lcdd21", "lcdd22", "lcdd23", \
"lcdclk", "lcdde", "lcdhsync", "lcdvsync";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <3>;
allwinner,pull = <0>;
};
dsi4lane_pins_a: dsi4lane@0 {
allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
allwinner,function = "dsi4lane";
allwinner,muxsel = <4>;
allwinner,drive = <3>;
allwinner,pull = <0>;
};
dsi4lane_pins_b: dsi4lane@1 {
allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
allwinner,function = "dsi4lane_suspend";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
allwinner,pull = <0>;
};
};
&uart0 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-1 = <&uart0_pins_b>;
status = "disabled";
};
&uart1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart1_pins_a>;
pinctrl-1 = <&uart1_pins_b>;
status = "disabled";
};
&uart2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart2_pins_a>;
pinctrl-1 = <&uart2_pins_b>;
status = "disabled";
};
&uart3 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart3_pins_a>;
pinctrl-1 = <&uart3_pins_b>;
status = "okay";
};
&sdc2 {
non-removable;
bus-width = <4>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
no-sdio;
no-sd;
ctl-spec-caps = <0x308>;
cap-mmc-highspeed;
sunxi-power-save-mode;
sunxi-dis-signal-vol-sw;
mmc-bootpart-noacc;
max-frequency = <150000000>;
/*vmmc-supply = <®_dcdc1>;*/
/*emmc io vol 3.3v*/
/*vqmmc-supply = <®_aldo1>;*/
/*emmc io vol 1.8v*/
/*vqmmc-supply = <®_eldo1>;*/
status = "disabled";
};
&sdc0 {
bus-width = <4>;
//cd-gpios = <&pio PF 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
/*non-removable;*/
broken-cd;
/*cd-inverted*/
/*data3-detect;*/
/*card-pwr-gpios = <&pio PH 14 1 1 2 0xffffffff>;*/
cd-used-24M;
cap-sd-highspeed;
/*sd-uhs-sdr50;*/
/*sd-uhs-ddr50;*/
/*sd-uhs-sdr104;*/
no-sdio;
no-mmc;
sunxi-power-save-mode;
/*sunxi-dis-signal-vol-sw;*/
max-frequency = <150000000>;
ctl-spec-caps = <0x8>;
/*vmmc-supply = <®_dcdc1>;*/
/*vqmmc33sw-supply = <®_dcdc1>;*/
/*vdmmc33sw-supply = <®_dcdc1>;*/
/*vqmmc18sw-supply = <®_eldo1>;*/
/*vdmmc18sw-supply = <®_eldo1>;*/
status = "okay";
};
&sdc1 {
bus-width = <4>;
no-mmc;
no-sd;
cap-sd-highspeed;
/*sd-uhs-sdr12*/
/*sd-uhs-sdr25;*/
/*sd-uhs-sdr50;*/
/*sd-uhs-ddr50;*/
/*sd-uhs-sdr104;*/
/*sunxi-power-save-mode;*/
/*sunxi-dis-signal-vol-sw;*/
cap-sdio-irq;
keep-power-in-suspend;
ignore-pm-notify;
max-frequency = <150000000>;
ctl-spec-caps = <0x8>;
status = "okay";
};
&twi0 {
clock-frequency = <400000>;
pinctrl-0 = <&twi0_pins_a>;
pinctrl-1 = <&twi0_pins_b>;
pinctrl-names = "default", "sleep";
twi_drv_used = <0>;
dmas = <&dma 43>, <&dma 43>;
dma-names = "tx", "rx";
status = "okay";
rx8025: rx8025t@32 {
compatible = "rx8025t";
reg = <0x32>;
status = "okay";
};
};
&twi1 {
clock-frequency = <400000>;
pinctrl-0 = <&twi1_pins_a>;
pinctrl-1 = <&twi1_pins_b>;
pinctrl-names = "default", "sleep";
status = "okay";
ctp@5d {
compatible = "allwinner,goodix";
device_type = "ctp";
reg = <0x5d>;
status = "okay";
ctp_name = "gt9xxnew_ts";
ctp_twi_id = <0x1>;
ctp_twi_addr = <0x5d>;
ctp_screen_max_x = <0x1E0>;
ctp_screen_max_y = <0x1E0>;
ctp_revert_x_flag = <0x0>;
ctp_revert_y_flag = <0x0>;
ctp_exchange_x_y_flag = <0x0>;
ctp_int_port = <&pio PE 5 GPIO_ACTIVE_HIGH>;
ctp_wakeup = <&pio PE 4 GPIO_ACTIVE_HIGH>;
};
};
&twi2 {
clock-frequency = <400000>;
pinctrl-0 = <&twi2_pins_a>;
pinctrl-1 = <&twi2_pins_b>;
pinctrl-names = "default", "sleep";
dmas = <&dma 45>, <&dma 45>;
dma-names = "tx", "rx";
status = "disabled";
};
&twi3 {
clock-frequency = <400000>;
pinctrl-0 = <&twi3_pins_a>;
pinctrl-1 = <&twi3_pins_b>;
pinctrl-names = "default", "sleep";
status = "disabled";
};
&spi0 {
clock-frequency = <100000000>;
pinctrl-0 = <&spi0_pins_a &spi0_pins_b>;
pinctrl-1 = <&spi0_pins_c>;
pinctrl-names = "default", "sleep";
/*spi-supply = <®_dcdc1>;*/
spi_slave_mode = <0>;
spi0_cs_number = <1>;
spi0_cs_bitmap = <1>;
status = "disabled";
spi-nand@0 {
compatible = "spi-nand";
spi-max-frequency=<80000000>;
reg = <0x0>;
spi-rx-bus-width=<0x04>;
spi-tx-bus-width=<0x04>;
status="disabled";
};
};
&spi1 {
clock-frequency = <100000000>;
pinctrl-0 = <&spi1_pins_a &spi1_pins_b>;
pinctrl-1 = <&spi1_pins_c>;
pinctrl-names = "default", "sleep";
spi_slave_mode = <0>;
spi1_cs_number = <1>;
spi1_cs_bitmap = <1>;
status = "disabled";
spi_board1@0 {
device_type = "spi_board1";
compatible = "rohm,dh2228fv";
spi-max-frequency = <0x5f5e100>;
reg = <0x0>;
spi-rx-bus-width = <0x4>;
spi-tx-bus-width = <0x4>;
status = "disabled";
};
};
&ledc {
pinctrl-0 = <&ledc_pins_a>;
pinctrl-1 = <&ledc_pins_b>;
led_count = <32>;
output_mode = "GRB";
reset_ns = <84>;
t1h_ns = <800>;
t1l_ns = <450>;
t0h_ns = <400>;
t0l_ns = <850>;
wait_time0_ns = <84>;
wait_time1_ns = <84>;
wait_data_time_ns = <600000>;
status = "disabled";
};
&s_cir0 {
pinctrl-names = "default";
pinctrl-0 = <&s_cir0_pins_a>;
status = "okay";
};
&ir1 {
pinctrl-names = "default";
pinctrl-0 = <&ir1_pins_a>;
status = "disabled";
};
&gmac0 {
pinctrl-0 = <&gmac0_pins_a>;
pinctrl-1 = <&gmac0_pins_b>;
pinctrl-names = "default", "sleep";
phy-mode = "rmii";
use_ephy25m = <0>;
tx-delay = <3>;
rx-delay = <0>;
phy-rst = <&pio PE 10 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
&soc {
platform@45000004 {
reg = <0x0 0x45000004 0x0 0x0>;
eraseflag = <1>;
next_work = <3>;
debug_mode = <8>;
};
target@45000008 {
reg = <0x0 0x45000008 0x0 0x0>;
boot_clock = <1008>; /*CPU boot frequency, Unit: MHz*/
storage_type = <0xffffffff>; /*boot medium, 0-nand, 1-card0, 2-card2, -1(defualt)auto scan*/
burn_key = <0>; /*1:support burn key; 0:not support burn key*/
dragonboard_test = <0>; /*1:support card boot dragonboard; 0:not support card boot dragonboard*/
};
card0_boot_para@2 {
/*
* Avoid dtc compiling warnings.
* @TODO: Developer should modify this to the actual value
*/
reg = <0x0 0x2 0x0 0x0>;
device_type = "card0_boot_para";
card_ctrl = <0x0>;
card_high_speed = <0x1>;
card_line = <0x4>;
pinctrl-0 = <&sdc0_pins_a>;
};
card2_boot_para@3 {
/*
* Avoid dtc compiling warnings.
* @TODO: Developer should modify this to the actual value
*/
reg = <0x0 0x3 0x0 0x0>;
device_type = "card2_boot_para";
card_ctrl = <0x2>;
card_high_speed = <0x1>;
card_line = <0x4>;
pinctrl-0 = <&sdc2_pins_a>;
/*pinctrl-0 = <&sdc0_pins_a>;*/
/*sdc_ex_dly_used = <0x2>;*/
sdc_io_1v8 = <0x1>;
/*sdc_type = "tm4";*/
sdc_tm4_hs200_max_freq = <150>;
sdc_tm4_hs400_max_freq = <100>;
sdc_ex_dly_used = <2>;
/*sdc_tm4_win_th = <8>;*/
/*sdc_dis_host_caps = <0x180>;*/
};
rfkill: rfkill@0 {
compatible = "allwinner,sunxi-rfkill";
chip_en;
power_en;
pinctrl-0 = <&wlan_pins_a>;
pinctrl-names = "default";
status = "disabled";
wlan: wlan@0 {
compatible = "allwinner,sunxi-wlan";
clock-names = "32k-fanout1";
clocks = <&ccu CLK_FANOUT1_OUT>;
wlan_busnum = <0x1>;
wlan_regon = <&pio PG 12 GPIO_ACTIVE_HIGH>;
wlan_hostwake = <&pio PG 10 GPIO_ACTIVE_HIGH>;
/*wlan_power = "VCC-3V3";*/
/*wlan_power_vol = <3300000>;*/
/*interrupt-parent = <&pio>;
interrupts = < PG 10 IRQ_TYPE_LEVEL_HIGH>;*/
wakeup-source;
};
bt: bt@0 {
compatible = "allwinner,sunxi-bt";
pinctrl-0 = <&wlan_pins_a>;
pinctrl-names = "default";
clock-names = "32k-fanout1";
clocks = <&ccu CLK_FANOUT1_OUT>;
/*bt_power_num = <0x01>;*/
/*bt_power = "axp803-dldo1";*/
/*bt_io_regulator = "axp803-dldo1";*/
/*bt_io_vol = <3300000>;*/
/*bt_power_vol = <330000>;*/
bt_rst_n = <&pio PG 15 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
btlpm: btlpm@0 {
compatible = "allwinner,sunxi-btlpm";
uart_index = <0x1>;
bt_wake = <&pio PG 13 GPIO_ACTIVE_HIGH>;
bt_hostwake = <&pio PG 14 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
};
&vind0 {
csi_top = <378000000>;
csi_isp = <327000000>;
status = "disabled"; /* enable twi and ver1 spi-nand max freq 30M */
actuator0: actuator@5809450 {
device_type = "actuator0";
actuator0_name = "ad5820_act";
actuator0_slave = <0x18>;
actuator0_af_pwdn = <>;
actuator0_afvdd = "afvcc-csi";
actuator0_afvdd_vol = <2800000>;
status = "disabled";
};
flash0: flash@5809460 {
device_type = "flash0";
flash0_type = <2>;
flash0_en = <>;
flash0_mode = <>;
flash0_flvdd = "";
flash0_flvdd_vol = <>;
device_id = <0>;
status = "disabled";
};
sensor0: sensor@5809470 {
reg = <0x0 0x05809470 0x0 0x10>;
device_type = "sensor0";
compatible = "allwinner,sunxi-sensor";
sensor0_mname = "ov5640";
sensor0_twi_cci_id = <2>;
sensor0_twi_addr = <0x78>;
sensor0_mclk_id = <0>;
sensor0_pos = "rear";
sensor0_isp_used = <0>;
sensor0_fmt = <0>;
sensor0_stby_mode = <0>;
sensor0_vflip = <0>;
sensor0_hflip = <0>;
sensor0_iovdd-supply = <>;
sensor0_iovdd_vol = <>;
sensor0_avdd-supply = <>;
sensor0_avdd_vol = <>;
sensor0_dvdd-supply = <>;
sensor0_dvdd_vol = <>;
sensor0_power_en = <>;
sensor0_reset = <&pio PE 9 GPIO_ACTIVE_LOW>;
sensor0_pwdn = <&pio PE 8 GPIO_ACTIVE_LOW>;
sensor0_sm_vs = <>;
flash_handle = <&flash0>;
act_handle = <&actuator0>;
device_id = <0>;
status = "disabled";
};
sensor1:sensor@5809480 {
device_type = "sensor1";
sensor1_mname = "ov5647";
sensor1_twi_cci_id = <3>;
sensor1_twi_addr = <0x6c>;
sensor1_mclk_id = <1>;
sensor1_pos = "front";
sensor1_isp_used = <0>;
sensor1_fmt = <0>;
sensor1_stby_mode = <0>;
sensor1_vflip = <0>;
sensor1_hflip = <0>;
sensor1_iovdd-supply = <>;
sensor1_iovdd_vol = <>;
sensor1_avdd-supply = <>;
sensor1_avdd_vol = <>;
sensor1_dvdd-supply = <>;
sensor1_dvdd_vol = <>;
sensor1_power_en = <>;
sensor1_reset = <&pio PE 7 GPIO_ACTIVE_LOW>;
sensor1_pwdn = <&pio PE 6 GPIO_ACTIVE_LOW>;
status = "disabled";
};
vinc0:vinc@5809000 {
vinc0_csi_sel = <0>;
vinc0_mipi_sel = <0xff>;
vinc0_isp_sel = <0>;
vinc0_isp_tx_ch = <0>;
vinc0_tdm_rx_sel = <0xff>;
vinc0_rear_sensor_sel = <0>;
vinc0_front_sensor_sel = <0>;
vinc0_sensor_list = <0>;
status = "disabled";
};
vinc1:vinc@5809200 {
vinc1_csi_sel = <0>;
vinc1_mipi_sel = <0xff>;
vinc1_isp_sel = <0>;
vinc1_isp_tx_ch = <1>;
vinc1_tdm_rx_sel = <0xff>;
vinc1_rear_sensor_sel = <0>;
vinc1_front_sensor_sel = <0>;
vinc1_sensor_list = <0>;
status = "disabled";
};
};
/*----------------------------------------------------------------------------------
disp init configuration
disp_mode (0:screen0<screen0,fb0>)
screenx_output_type (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo)
screenx_output_mode (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50)
(5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60)
screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420)
screenx_output_bits (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit)
screenx_output_eotf (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG)
screenx_output_cs (for hdmi, 0:undefined 257:BT709 260:BT601 263:BT2020)
screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode)
screen0_output_range (for hdmi, 0:default 1:full 2:limited)
screen0_output_scan (for hdmi, 0:no data 1:overscan 2:underscan)
screen0_output_aspect_ratio (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9)
fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444)
fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA)
fb0_scaler_mode_enable(scaler mode enable, used FE)
fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0)
lcdx_backlight (lcd init backlight,the range:[0,256],default:197
lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50)
lcd0_contrast (LCD contrast, 0~100)
lcd0_saturation (LCD saturation, 0~100)
lcd0_hue (LCD hue, 0~100)
framebuffer software rotation setting:
disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y,
set fbX_height to lcd_x)
degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree)
degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree)
devX_output_type : config output type in bootGUI framework in UBOOT-2018.
(0:none; 1:lcd; 2:tv; 4:hdmi;)
devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018
devX_screen_id : config display index of bootGUI framework in UBOOT-2018
devX_do_hpd : whether do hpd detectation or not in UBOOT-2018
chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6
channel, 1:dual display with 4 channel in main display and 2 channel in second
display, 2:dual display with 3 channel in main display and 3 channel in second
in display.
----------------------------------------------------------------------------------*/
&disp {
disp_init_enable = <1>;
disp_mode = <0>;
screen0_output_type = <1>;
screen0_output_mode = <4>;
screen1_output_type = <3>;
screen1_output_mode = <10>;
screen1_output_format = <0>;
screen1_output_bits = <0>;
screen1_output_eotf = <4>;
screen1_output_cs = <257>;
screen1_output_dvi_hdmi = <2>;
screen1_output_range = <2>;
screen1_output_scan = <0>;
screen1_output_aspect_ratio = <8>;
dev0_output_type = <1>;
dev0_output_mode = <4>;
dev0_screen_id = <0>;
dev0_do_hpd = <0>;
dev1_output_type = <4>;
dev1_output_mode = <10>;
dev1_screen_id = <1>;
dev1_do_hpd = <1>;
def_output_dev = <0>;
hdmi_mode_check = <1>;
fb0_format = <0>;
fb0_width = <0>;
fb0_height = <0>;
fb1_format = <0>;
fb1_width = <0>;
fb1_height = <0>;
chn_cfg_mode = <1>;
disp_para_zone = <1>;
/*VCC-LCD*/
/* dc1sw-supply = <®_dc1sw>;*/
/*VCC-DSI*/
/* eldo3-supply = <®_eldo3>;*/
/*VCC-PD*/
/* dcdc1-supply = <®_dcdc1>;*/
};
#if 0
&disp {
disp_init_enable = <1>;
disp_mode = <0>;
screen0_output_type = <1>;
screen0_output_mode = <4>;
screen1_output_type = <1>;
screen1_output_mode = <4>;
screen1_output_format = <0>;
screen1_output_bits = <0>;
screen1_output_eotf = <4>;
screen1_output_cs = <257>;
screen1_output_dvi_hdmi = <2>;
screen1_output_range = <2>;
screen1_output_scan = <0>;
screen1_output_aspect_ratio = <8>;
dev0_output_type = <1>;
dev0_output_mode = <4>;
dev0_screen_id = <0>;
dev0_do_hpd = <0>;
dev1_output_type = <4>;
dev1_output_mode = <10>;
dev1_screen_id = <1>;
dev1_do_hpd = <1>;
def_output_dev = <0>;
hdmi_mode_check = <1>;
fb0_format = <0>;
fb0_width = <1024>;
fb0_height = <600>;
fb1_format = <0>;
fb1_width = <0>;
fb1_height = <0>;
chn_cfg_mode = <1>;
disp_para_zone = <1>;
/*VCC-LCD*/
/*dc1sw-supply = <®_dc1sw>;*/
/*VCC-DSI*/
/* eldo3-supply = <®_eldo3>;*/
/*VCC-PD*/
/* dcdc1-supply = <®_dcdc1>;*/
};
#endif
/*----------------------------------------------------------------------------------
;tv configuration
;interface (interface type,1<->cvbs,2<->YPBPR,4<->SVIDEO)
;dac_type (0<->composite,1<->luma,2<->chroma,3<->reserved,4<->y/green,
; 5<->u/pb/blue,6<->v/pr/red)
;dac_src (dac no,support dac_src0~dac_src3,dac num max is 4)
;NOTE: tv0,tv1 can not use the same dac_src.
;---------------------------------------------------------------------------------*/
&tv0 {
interface = <1>;
dac_type0 = <0>;
dac_src0 = <0>;
status = "disabled";
};
/*----------------------------------------------------------------------------------
;lcd0 configuration
;lcd_if: 0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi
;lcd_hv_if 0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656
;lcd_hv_clk_phase 0:0 degree;1:90 degree;2:180 degree;3:270 degree
;lcd_hv_sync_polarity 0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high
;lcd_hv_syuv_seq 0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY
;lcd_cpu_if 0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565)
; 6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565)
;lcd_cpu_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
;lcd_dsi_if 0:video mode; 1: Command mode; 2:video burst mode
;lcd_dsi_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
;lcd_x: lcd horizontal resolution
;lcd_y: lcd vertical resolution
;lcd_width: width of lcd in mm
;lcd_height: height of lcd in mm
;lcd_dclk_freq: in MHZ unit
;lcd_pwm_freq: in HZ unit
;lcd_pwm_pol: lcd backlight PWM polarity
;lcd_pwm_max_limit lcd backlight PWM max limit(<=255)
;lcd_hbp: hsync back porch(pixel) + hsync plus width(pixel);
;lcd_ht: hsync total cycle(pixel)
;lcd_vbp: vsync back porch(line) + vysnc plus width(line)
;lcd_vt: vysnc total cycle(line)
;lcd_hspw: hsync plus width(pixel)
;lcd_vspw: vysnc plus width(pixel)
;lcd_lvds_if: 0:single link; 1:dual link
;lcd_lvds_colordepth: 0:8bit; 1:6bit
;lcd_lvds_mode: 0:NS mode; 1:JEIDA mode
;lcd_frm: 0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither
;lcd_io_phase: 0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase;
; 8~11bit:dclk phase; 12~15bit:de phase)
;lcd_gamma_en lcd gamma correction enable
;lcd_bright_curve_en lcd bright curve correction enable
;lcd_cmap_en lcd color map function enable
;deu_mode 0:smoll lcd screen; 1:large lcd screen(larger than 10inch)
;lcdgamma4iep: Smart Backlight parameter, lcd gamma vale * 10;
; decrease it while lcd is not bright enough; increase while lcd is too bright
;smart_color 90:normal lcd screen 65:retina lcd screen(9.7inch)
;Pin setting for special function ie.LVDS, RGB data or vsync
; name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level>
;Pin setting for gpio:
; lcd_gpio_X = port:PD12<pin function><pull up or pull down><drive ability><output level>
;Pin setting for backlight enable pin
; lcd_bl_en = port:PD12<pin function><pull up or pull down><drive ability><output level>
;fsync setting, pulse to csi
;lcd_fsync_en (0:disable fsync,1:enable)
;lcd_fsync_act_time (active time of fsync, unit:pixel)
;lcd_fsync_dis_time (disactive time of fsync, unit:pixel)
;lcd_fsync_pol (0:positive;1:negative)
;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function,
pull up or pull down(default 0), driver level(default 1), data>
;For dual link lvds: use lvds2link_pins_a and lvds2link_pins_b instead
;For rgb24: use rgb24_pins_a and rgb24_pins_b instead
;For lvds1: use lvds1_pins_a and lvds1_pins_b instead
;For lvds0: use lvds0_pins_a and lvds0_pins_b instead
;----------------------------------------------------------------------------------*/
/*
&lcd0 {
lcd_used = <1>;
lcd_driver_name = "default_lcd";
lcd_backlight = <50>;
lcd_if = <3>;
lcd_x = <1024>;
lcd_y = <600>;
lcd_width = <150>;
lcd_height = <94>;
lcd_dclk_freq = <52>;
lcd_pwm_used = <1>;
lcd_pwm_ch = <7>;
lcd_pwm_freq = <50000>;
lcd_pwm_pol = <1>;
lcd_pwm_max_limit = <255>;
lcd_hbp = <160>;
lcd_ht = <1344>;
lcd_hspw = <60>;
lcd_vbp = <23>;
lcd_vt = <638>;
lcd_vspw = <10>;
lcd_lvds_if = <0>;
lcd_lvds_colordepth = <0>;
lcd_lvds_mode = <0>;
lcd_frm = <1>;
lcd_hv_clk_phase = <0>;
lcd_hv_sync_polarity= <0>;
lcd_gamma_en = <0>;
lcd_bright_curve_en = <0>;
lcd_cmap_en = <0>;
deu_mode = <0>;
lcdgamma4iep = <22>;
smart_color = <90>;
pinctrl-0 = <&lvds0_pins_a>;
pinctrl-1 = <&lvds0_pins_b>;
};
*/
/*
&lcd0 {
lcd_used = <1>;
lcd_driver_name = "he0801a068";
lcd_backlight = <50>;
lcd_if = <4>;
lcd_x = <800>;
lcd_y = <1280>;
lcd_width = <800>;
lcd_height = <1280>;
lcd_dclk_freq = <78>;
lcd_pwm_used = <1>;
lcd_pwm_ch = <7>;
lcd_pwm_freq = <50000>;
lcd_pwm_pol = <1>;
lcd_pwm_max_limit = <255>;
lcd_hbp = <149>;
lcd_ht = <978>;
lcd_hspw = <16>;
lcd_vbp = <7>;
lcd_vt = <1329>;
lcd_vspw = <5>;
lcd_dsi_lane = <4>;
lcd_dsi_if = <0>;
lcd_dsi_format = <0>;
lcd_dsi_te = <0>;
lcd_frm = <0>;
lcd_io_phase = <0>;
lcd_gamma_en = <0>;
lcd_bright_curve_en = <0>;
lcd_cmap_en = <0>;
deu_mode = <0>;
lcdgamma4iep = <22>;
smart_color = <90>;
lcd_gpio_0 = <&pio PG 13 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&dsi4lane_pins_a>;
pinctrl-1 = <&dsi4lane_pins_b>;
};*/
&lcd0 {
/* part 1 */
lcd_used = <1>;
lcd_driver_name = "st7701_86";
lcd_backlight = <255>;
/* part 2 */
lcd_if = <0>;
lcd_hv_if = <0>;
/* part 3 */
lcd_x = <480>;
lcd_y = <480>;
lcd_width = <71>;
lcd_height = <71>;
lcd_dclk_freq = <24>;
lcd_hbp = <20>;
lcd_ht = <526>;
lcd_hspw = <6>;
lcd_vbp = <10>;
lcd_vt = <510>;
lcd_vspw = <4>;
lcd_pwm_used = <1>;
lcd_pwm_ch = <7>;
lcd_pwm_freq = <5000>;
lcd_pwm_pol = <0>;
/* part 5 */
lcd_frm = <1>;
lcd_io_phase = <0x0000>;
lcd_gamma_en = <0>;
lcd_cmap_en = <0>;
lcd_hv_clk_phase = <0>;
lcd_hv_sync_polarity= <0>;
// reset
lcd_gpio_0 = <&pio PB 4 GPIO_ACTIVE_HIGH>;
// cs
lcd_gpio_1 = <&pio PB 7 GPIO_ACTIVE_HIGH>;
// sda
lcd_gpio_2 = <&pio PB 5 GPIO_ACTIVE_HIGH>;
// sck
lcd_gpio_3 = <&pio PB 6 GPIO_ACTIVE_HIGH>;
/* part 6 */
lcd_power = "vcc-lcd";
lcd_pin_power = "vcc-pd";
pinctrl-0 = <&rgb18_pins_a>;
pinctrl-1 = <&rgb18_pins_b>;
};
/*
tvd configuration
used (create device, 0: do not create device, 1: create device)
agc_auto_enable (0: agc manual mode,agc_manual_value is valid; 1: agc auto mode)
agc_manual_value (agc manual value, default value is 64)
cagc_enable (cagc 0: disable, 1: enable)
fliter_used (3d fliter 0: disable, 1: enable)
support two PMU power (tvd_power0, tvd_power1)
support two GPIO power (tvd_gpio0, tvd_gpio1)
NOTICE: If tvd need pmu power or gpio power,params need be configured under [tvd]
tvd_sw (the switch of all tvd driver.)
tvd_interface (0: cvbs, 1: ypbpr,)
tvd_format (0:TVD_PL_YUV420 , 1: MB_YUV420, 2: TVD_PL_YUV422)
tvd_system (0:ntsc, 1:pal)
tvd_row (total row number in multi channel mode 1-2)
tvd_column (total column number in multi channel mode 1-2)
tvd_channelx_en (0:disable, 1~4:position in multi channel mode,In single channel
mode,mean enable)
tvd_row*tvd_column is the total tvd channel number to be used in multichannel mode
+--------------------+--------------------+
| | |
| | |
| 1 | 2 |
| | |
| | |
+--------------------+--------------------+
| | |
| | |
| 3 | 4 |
| | |
| | |
+--------------------+--------------------+
*/
&tvd {
tvd_sw = <1>;
tvd_interface = <0>;
tvd_format = <0>;
tvd_system = <1>;
tvd_row = <1>;
tvd_column = <1>;
tvd_channel0_en = <1>;
tvd_channel1_en = <0>;
tvd_channel2_en = <0>;
tvd_channel3_en = <0>;
/*tvd_gpio0 = <&pio PD 22 GPIO_ACTIVE_HIGH>;*/
/*tvd_gpio1 = <&pio PD 23 GPIO_ACTIVE_HIGH>;*/
/*tvd_gpio2 = <&pio PD 24 GPIO_ACTIVE_HIGH>;*/
/*dc1sw-supply = <®_dc1sw>;*/
/* eldo3-supply = <®_eldo3>;*/
/*tvd_power0 = "dc1sw"*/
/*tvd_power1 = "eldo3"*/
status = "disabled";
};
&tvd0 {
used = <1>;
agc_auto_enable = <1>;
agc_manual_value = <64>;
cagc_enable = <1>;
fliter_used = <1>;
status = "disabled";
};
&hdmi {
hdmi_used = <1>;
hdmi_power_cnt = <0>;
hdmi_hdcp_enable = <1>;
hdmi_hdcp22_enable = <0>;
hdmi_cec_support = <1>;
hdmi_cec_super_standby = <0>;
ddc_en_io_ctrl = <0>;
power_io_ctrl = <0>;
status = "disabled";
};
/* Audio Driver modules */
&codec {
/* MIC and headphone gain setting */
mic1gain = <0x1F>;
mic2gain = <0x1F>;
mic3gain = <0x1F>;
/* ADC/DAC DRC/HPF func enabled */
/* 0x1:DAP_HP_EN; 0x2:DAP_SPK_EN; 0x3:DAP_HPSPK_EN */
adcdrc_cfg = <0x0>;
adchpf_cfg = <0x1>;
dacdrc_cfg = <0x0>;
dachpf_cfg = <0x0>;
/* Volume about */
digital_vol = <0x00>;
lineout_vol = <0x1a>;
headphonegain = <0x03>;
/* Pa enabled about */
pa_level = <0x01>;
pa_pwr_level = <0x01>;
pa_msleep_time = <0x78>;
/* gpio-spk = <&pio PE 11 GPIO_ACTIVE_LOW>; */
/* CMA config about */
playback_cma = <128>;
capture_cma = <256>;
/* regulator about */
/* avcc-supply = <®_aldo1>; */
/* hpvcc-supply = <®_eldo1>; */
status = "okay";
};
&sndcodec {
hp_detect_case = <0x00>;
jack_enable = <0x01>;
status = "okay";
};
&dummy_cpudai {
playback_cma = <128>;
capture_cma = <256>;
status = "okay";
};
&dmic {
pinctrl-names = "default","sleep";
pinctrl-0 = <&dmic_pins_a>;
pinctrl-1 = <&dmic_pins_b>;
status = "disabled";
};
&dmic_codec {
status = "disabled";
};
&sounddmic {
status = "disabled";
};
/*-----------------------------------------------------------------------------
* pcm_lrck_period 16/32/64/128/256
* (set 0x20 for HDMI audio out)
* slot_width_select 16bits/20bits/24bits/32bits
* (set 0x20 for HDMI audio out)
* frametype 0 --> short frame = 1 clock width;
* 1 --> long frame = 2 clock width;
* tdm_config 0 --> pcm
* 1 --> i2s
* (set 0x01 for HDMI audio out)
* mclk_div 0 --> not output
* 1/2/4/6/8/12/16/24/32/48/64/96/128/176/192
* (set mclk as external codec clk source, freq is pll_audio/mclk_div)
* pinctrl_used 0 --> I2S/PCM use for internal (e.g. HDMI)
* 1 --> I2S/PCM use for external audio
* daudio_type: 0 --> external audio type
* 1 --> HDMI audio type
*---------------------------------------------------------------------------*/
&daudio0 {
mclk_div = <0x01>;
frametype = <0x00>;
tdm_config = <0x01>;
sign_extend = <0x00>;
msb_lsb_first = <0x00>;
pcm_lrck_period = <0x80>;
slot_width_select = <0x20>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&daudio0_pins_a>;
pinctrl-1 = <&daudio0_pins_b>;
pinctrl_used = <0x0>;
status = "disabled";
};
&sounddaudio0 {
status = "disabled";
daudio0_master: simple-audio-card,codec {
/* sound-dai = <&ac108>; */
};
};
/*-----------------------------------------------------------------------------
* simple-audio-card,name name of sound card, e.g.
* "snddaudio0" --> use for external audio
* "sndhdmi" --> use for HDMI audio
* sound-dai "snd-soc-dummy" --> use for I2S
* "hdmiaudio" --> use for HDMI audio
* "ac108" --> use for external audio of ac108
*---------------------------------------------------------------------------*/
&daudio1 {
mclk_div = <0x01>;
frametype = <0x00>;
tdm_config = <0x01>;
sign_extend = <0x00>;
msb_lsb_first = <0x00>;
pcm_lrck_period = <0x80>;
slot_width_select = <0x20>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&daudio1_pins_a &daudio1_pins_b &daudio1_pins_c>;
pinctrl-1 = <&daudio1_pins_d>;
pinctrl_used = <0x1>;
status = "disabled";
};
&sounddaudio1 {
status = "disabled";
daudio1_master: simple-audio-card,codec {
/* sound-dai = <&ac108>; */
};
};
&daudio2 {
mclk_div = <0x01>;
frametype = <0x00>;
tdm_config = <0x01>;
sign_extend = <0x00>;
msb_lsb_first = <0x00>;
pcm_lrck_period = <0x80>;
slot_width_select = <0x20>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&daudio2_pins_a &daudio2_pins_b &daudio2_pins_c>;
pinctrl-1 = <&daudio2_pins_d>;
pinctrl_used = <0x1>;
status = "disabled";
};
/* if HDMI audio is used, daudio2 should be enable. */
&hdmiaudio {
status = "disabled";
};
&sounddaudio2 {
status = "disabled";
daudio2_master: simple-audio-card,codec {
/* sound-dai = <&ac108>; */
};
};
&spdif {
status = "disabled";
};
&soundspdif {
status = "disabled";
};
/*
*usb_port_type: usb mode. 0-device, 1-host, 2-otg.
*usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-id/dpdm detect.
*usb_detect_mode: 0-thread scan, 1-id gpio interrupt.
*usb_id_gpio: gpio for id detect.
*usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl";
*usb_wakeup_suspend:0-SUPER_STANDBY, 1-USB_STANDBY.
*/
&usbc0 {
device_type = "usbc0";
usb_port_type = <0x1>;
usb_detect_type = <0x0>;
//usb_detect_mode = <0>;
//usb_id_gpio = <&pio PB 6 GPIO_ACTIVE_HIGH>;
//enable-active-high;
//usb_det_vbus_gpio = <&pio PB 2 GPIO_ACTIVE_HIGH>;
usb_wakeup_suspend = <0>;
usb_serial_unique = <0>;
usb_serial_number = "20080411";
rndis_wceis = <1>;
status = "okay";
};
&ehci0 {
drvvbus-supply = <®_usb1_vbus>;
};
&ohci0 {
drvvbus-supply = <®_usb1_vbus>;
};
&usbc1 {
device_type = "usbc1";
usb_port_type = <0x01>;
sb_detect_type = <0x1>;
usb_regulator_io = "nocare";
usb_wakeup_suspend = <0>;
status = "okay";
};
&ehci1 {
drvvbus-supply = <®_usb1_vbus>;
status = "okay";
};
&ohci1 {
drvvbus-supply = <®_usb1_vbus>;
status = "okay";
};
&pwm3 {
pinctrl-names = "active", "sleep";
pinctrl-0 = <&pwm3_pin_a>;
pinctrl-1 = <&pwm3_pin_b>;
status = "okay";
};
&pwm7 {
pinctrl-names = "active", "sleep";
pinctrl-0 = <&pwm7_pin_a>;
pinctrl-1 = <&pwm7_pin_b>;
status = "okay";
};
&gpadc {
channel_num = <1>;
channel_select = <0x1>;
channel_data_select = <0>;
channel_compare_select = <0x1>;
channel_cld_select = <0x1>;
channel_chd_select = <0>;
channel0_compare_lowdata = <1700000>;
channel0_compare_higdata = <1200000>;
channel1_compare_lowdata = <460000>;
channel1_compare_higdata = <1200000>;
key_cnt = <5>;
key0_vol = <210>;
key0_val = <115>;
key1_vol = <410>;
key1_val = <114>;
key2_vol = <590>;
key2_val = <119>;
key3_vol = <750>;
key3_val = <373>;
key4_vol = <880>;
key4_val = <28>;
status = "disabled";
};
&rtp {
allwinner,tp-sensitive-adjust = <0xf>;
allwinner,filter-type = <0x1>;
allwinner,ts-attached;
status = "disabled";
};