@yy_fly 仅供参考！！！spi-sunxi.c文件。
/* reset fifo */
static void spi_reset_fifo(void __iomem *base_addr)
{
u32 reg_val = readl(base_addr + SPI_FIFO_CTL_REG);
u32 poll_time = 0x7ffffff;
reg_val |= (SPI_FIFO_CTL_RX_RST|SPI_FIFO_CTL_TX_RST);
/* Set the trigger level of RxFIFO/TxFIFO. */
reg_val &= ~(SPI_FIFO_CTL_RX_LEVEL|SPI_FIFO_CTL_TX_LEVEL);
reg_val |= (0x20<<16) | 0x20;
writel(reg_val, base_addr + SPI_FIFO_CTL_REG);
/*添加的内容*/
reg_val = 0;
reg_val = readl(base_addr + SPI_FIFO_CTL_REG);
while((reg_val & SPI_FIFO_CTL_RX_RST || reg_val & SPI_FIFO_CTL_TX_RST) &&
--poll_time)
reg_val = readl(base_addr + SPI_FIFO_CTL_REG);
}
static int sunxi_spi_cpu_readl(struct spi_device *spi, struct spi_transfer *t)
{
struct sunxi_spi *sspi = spi_master_get_devdata(spi->master);
void __iomem *base_addr = sspi->base_addr;
unsigned rx_len = t->len; /* number of bytes sent */
unsigned char *rx_buf = (unsigned char *)t->rx_buf;
unsigned int poll_time = 0x7ffffff;
unsigned int i, j;
u8 buf[64], cnt = 0;
while (rx_len && (--poll_time > 0)) {
/* rxFIFO counter */
if (spi_query_rxfifo(base_addr)) {
*rx_buf++ = readb(base_addr + SPI_RXDATA_REG);
--rx_len;
}
}
/*余下的没改*/
}