```

dsi_panel: dsi_panel@0 {
compatible = "allwinner,panel-dsi";
status = "okay";
reg = <0>;

power0-supply = <&reg_cldo3>; power1-supply = <&reg_dcdc4>; power2-supply = <&reg_cldo1>; reset-gpios = <&pio PD 20 1 0 3 1>; reset-num = <1>;

// reset-delay-ms = <20>;
reset-on-sequence = <1 20>, <0 200>, <1 100>;

backlight = <&backlight0>; dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST| MIPI_DSI_MODE_NO_EOT_PACKET)>;

// dsi,flags = <(MIPI_DSI_MODE_VIDEO)>;
dsi,lanes = <4>;
dsi,format = <0>;

panel-init-sequence = [ //Page0 15 00 02 E0 00 //--- PASSWORD ----// 15 00 02 E1 93 15 00 02 E2 65 15 00 02 E3 F8 15 00 02 80 03 //--- Sequence Ctrl ----// 15 00 02 70 10 15 00 02 71 13 15 00 02 72 06 15 00 02 75 03 //--- Page4 ----// 15 00 02 E0 04 15 00 02 2D 03 //--- Page1 ----// 15 00 02 E0 01 //--- BIST MODE ----// // 15 00 02 4A 35 //Set VCOM 15 00 02 00 00 15 00 02 01 5A //Set VCOM_Reverse 15 00 02 03 00 15 00 02 04 58 //Set Gamma Power 15 00 02 17 00 15 00 02 18 EF 15 00 02 19 01 15 00 02 1A 00 15 00 02 1B EF 15 00 02 1C 01 //Set Gate Power 15 00 02 1F 7A 15 00 02 20 24 15 00 02 21 24 15 00 02 22 4E // 15 00 02 24 F8 // 15 00 02 26 D3 //SetPanel 15 00 02 37 59 15 00 02 35 2C //SET RGBCYC 15 00 02 38 05 15 00 02 39 08 15 00 02 3A 10 15 00 02 3C 88 15 00 02 3D FF 15 00 02 3E FF 15 00 02 3F 7F //Set TCON 15 00 02 40 06 15 00 02 41 A0 15 00 02 43 14 15 00 02 44 0F 15 00 02 45 24 // 15 00 02 4A 80 //--- power voltage ----// 15 00 02 55 01 15 00 02 56 01 15 00 02 57 89 15 00 02 58 0A 15 00 02 59 0A //VCL = -2.5V 15 00 02 5A 39 //VGH = 18.4V 2D_VGH = 16V 15 00 02 5B 10 //VGL = -10.2V 15 00 02 5C 16 //--- Gamma ----// 15 00 02 5D 7A 15 00 02 5E 65 15 00 02 5F 56 15 00 02 60 49 15 00 02 61 43 15 00 02 62 33 15 00 02 63 35 15 00 02 64 1C 15 00 02 65 33 15 00 02 66 30 15 00 02 67 2E 15 00 02 68 4A 15 00 02 69 36 15 00 02 6A 3D 15 00 02 6B 2F 15 00 02 6C 2D 15 00 02 6D 23 15 00 02 6E 15 15 00 02 6F 04 15 00 02 70 7A 15 00 02 71 65 15 00 02 72 56 15 00 02 73 49 15 00 02 74 43 15 00 02 75 33 15 00 02 76 35 15 00 02 77 1C 15 00 02 78 33 15 00 02 79 30 15 00 02 7A 2E 15 00 02 7B 4A 15 00 02 7C 36 15 00 02 7D 3D 15 00 02 7E 2F 15 00 02 7F 2D 15 00 02 80 23 15 00 02 81 15 15 00 02 82 04 //Page2, for GIP 15 00 02 E0 02 //GIP_L Pin mapping 15 00 02 00 1E 15 00 02 01 1F 15 00 02 02 57 15 00 02 03 58 15 00 02 04 48 15 00 02 05 4A 15 00 02 06 44 15 00 02 07 46 15 00 02 08 40 15 00 02 09 1F 15 00 02 0A 1F 15 00 02 0B 1F 15 00 02 0C 1F 15 00 02 0D 1F 15 00 02 0E 1F 15 00 02 0F 42 15 00 02 10 1F 15 00 02 11 1F 15 00 02 12 1F 15 00 02 13 1F 15 00 02 14 1F 15 00 02 15 1F //GIP_R Pin mapping 15 00 02 16 1E 15 00 02 17 1F 15 00 02 18 57 15 00 02 19 58 15 00 02 1A 49 15 00 02 1B 4B 15 00 02 1C 45 15 00 02 1D 47 15 00 02 1E 41 15 00 02 1F 1F 15 00 02 20 1F 15 00 02 21 1F 15 00 02 22 1F 15 00 02 23 1F 15 00 02 24 1F 15 00 02 25 43 15 00 02 26 1F 15 00 02 27 1F 15 00 02 28 1F 15 00 02 29 1F 15 00 02 2A 1F 15 00 02 2B 1F //GIP_L_GS Pin mapping 15 00 02 2C 1F 15 00 02 2D 1E 15 00 02 2E 17 15 00 02 2F 18 15 00 02 30 07 15 00 02 31 05 15 00 02 32 0B 15 00 02 33 09 15 00 02 34 03 15 00 02 35 1F 15 00 02 36 1F 15 00 02 37 1F 15 00 02 38 1F 15 00 02 39 1F 15 00 02 3A 1F 15 00 02 3B 01 15 00 02 3C 1F 15 00 02 3D 1F 15 00 02 3E 1F 15 00 02 3F 1F 15 00 02 40 1F 15 00 02 41 1F //GIP_R_GS Pin mapping 15 00 02 42 1F 15 00 02 43 1E 15 00 02 44 17 15 00 02 45 18 15 00 02 46 06 15 00 02 47 04 15 00 02 48 0A 15 00 02 49 08 15 00 02 4A 02 15 00 02 4B 1F 15 00 02 4C 1F 15 00 02 4D 1F 15 00 02 4E 1F 15 00 02 4F 1F 15 00 02 50 1F 15 00 02 51 00 15 00 02 52 1F 15 00 02 53 1F 15 00 02 54 1F 15 00 02 55 1F 15 00 02 56 1F 15 00 02 57 1F //GIP Timing 15 00 02 58 40 15 00 02 59 00 15 00 02 5A 00 15 00 02 5B 30 15 00 02 5C 05 15 00 02 5D 30 15 00 02 5E 01 15 00 02 5F 02 15 00 02 60 30 15 00 02 61 03 15 00 02 62 04 15 00 02 63 6A 15 00 02 64 6A 15 00 02 65 75 15 00 02 66 0D 15 00 02 67 73 15 00 02 68 09 15 00 02 69 6A 15 00 02 6A 6A 15 00 02 6B 08 15 00 02 6C 00 15 00 02 6D 04 15 00 02 6E 00 15 00 02 6F 88 15 00 02 70 00 15 00 02 71 00 15 00 02 72 06 15 00 02 73 7B 15 00 02 74 00 15 00 02 75 BC 15 00 02 76 00 15 00 02 77 0D 15 00 02 78 23 15 00 02 79 00 15 00 02 7A 00 15 00 02 7B 00 15 00 02 7C 00 15 00 02 7D 03 15 00 02 7E 7B //Page4 15 00 02 E0 04 15 00 02 2B 2B 15 00 02 2E 44 //Page0 15 00 02 E0 00 15 00 02 E6 02 15 00 02 E7 02 05 78 01 11 05 05 01 29 // 15 00 02 35 00 ]; display-timings { native-mode = <&timing0>; timing0: timing0 { clock-frequency = <76800000>; hback-porch = <80>; hactive = <800>; hfront-porch = <80>; hsync-len = <20>; vback-porch = <12>; vactive = <1280>; vfront-porch = <20>; vsync-len = <4>; }; }; port { panel0_in: endpoint@0 { reg = <0>; remote-endpoint = <&panel_output_0>; }; }; };

};

&dsi0 {
status = "okay";
pinctrl-0 = <&dsi0_4lane_pins_a>;
pinctrl-1 = <&dsi0_4lane_pins_b>;
pinctrl-names = "active","sleep";

ports { dsi0_out: port@1{ dsi_out_panel: endpoint { remote-endpoint = <&panel_input>; }; }; }; panel: panel@0 { compatible = "allwinner,virtual-panel"; status = "okay"; reg = <0>; ports { panel_in: port@0 { reg = <0>; panel_input: endpoint@0 { reg = <0>; remote-endpoint = <&dsi_out_panel>; }; }; panel_out: port@1 { reg = <1>; panel_output_0: endpoint@0 { reg = <0>; remote-endpoint = <&panel0_in>; }; }; }; };

};
&sunxi_drm {
route {
disp0_dsi0 {
logo,uboot = "bootlogo.bmp";
status = "okay";
};
disp0_lvds0 {
status = "disabled";
};
disp0_lvds1 {
status = "disabled";
};
};
};