好像多逛论坛，很快就可以达到LV2
Z
zhanweixin 发布的最佳帖子
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如何添加自定义主板至tina-linux SDK？发布在 Linux
在新下载的tina SDK(如tina-v853-open)中，其device/config/chips/v853/configs目录中仅有default和vision目录，如下图：
请问如何才能为自己新设计的主板添加到SDK中？
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V851se的u-boot引导发布在 V Series
在《V851SE_PINOUT_V0.1》文档的BOOT_SEL0和BOOT_SEL1 两个引脚，请问是否表示SOC的BOOT ROM在运行时会检测通过哪种存储器加载u-boot吗，如果u-boot存储于SPI0连接的Flash中，能否帮忙提供详细的说明？
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回复: SPI 驱动 ST7789VW 2.4 寸 LCD发生Label or path lcd_fb not found发布在 V Series
通过分析错误日志，并结合阅读$SDK_PATH/bsp/configs/linux-5.4-ansc/sun300iw1p1.dtsi，
将板级board.dts里将&lcd_fb{ .... } 修正为&lcd_fb0{ .... }
该问题顺利解决
zhanweixin 发布的最新帖子
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回复: SPI 驱动 ST7789VW 2.4 寸 LCD发生Label or path lcd_fb not found发布在 V Series
通过分析错误日志，并结合阅读$SDK_PATH/bsp/configs/linux-5.4-ansc/sun300iw1p1.dtsi，
将板级board.dts里将&lcd_fb{ .... } 修正为&lcd_fb0{ .... }
该问题顺利解决 -
implicit declaration of function 'lzma_decode'发布在 V Series
在V821_SDK_V1.1里，采用NOR Flash为介质，当适配SPI LCD，编译时发生如下错误
/data/V821/V821_SDK_V1.1/kernel/linux-5.4-ansc/bsp/modules/gpu/Makefile:72: neither CONFIG_ARM nor CONFIG_ARM64 is found in .config, unsupport 2 sun300iw1p1,/data/V821/V821_SDK_V1.1/kernel/linux-5.4-ansc, /data/V821/V821_SDK_V1.1/out/v821/kernel/build CC drivers/video/backlight/backlight.o AR drivers/video/backlight/built-in.a CC bsp/drivers/video/sunxi/lcd_fb/dev_lcd_fb.o CC bsp/drivers/video/sunxi/lcd_fb/disp_lcd.o CC bsp/drivers/video/sunxi/lcd_fb/dev_fb.o CC bsp/drivers/video/sunxi/lcd_fb/logo.o /data/V821/V821_SDK_V1.1/kernel/linux-5.4-ansc/bsp/drivers/video/sunxi/lcd_fb/logo.c: In function 'Fb_map_kernel_logo': /data/V821/V821_SDK_V1.1/kernel/linux-5.4-ansc/bsp/drivers/video/sunxi/lcd_fb/logo.c:228:10: error: implicit declaration of function 'lzma_decode' [-Werror=implicit-function-declaration] 228 | return lzma_decode(paddr, info); | ^~~~~~~~~~~通过阅读BSP相关代码，发现在/bsp/drivers/video/sunxi/disp2/disp/dev_fb.c实现lzma_decode函数
#if IS_ENABLED(CONFIG_DECOMPRESS_LZMA) int lzma_decode(uintptr_t paddr, struct fb_info *info) { void *vaddr = NULL; long pos = 0; unsigned char *out = NULL; int ret = -1, i = 0; struct lzma_header lzma_head; ......通过在make kernel_menuconfig里搜索CONFIG_DECOMPRESS_LZMA也已配置为Y，但为何还会发生这个现象呢？
│ Symbol: DECOMPRESS_LZMA [=y] │ │ Type : tristate │ │ Defined at lib/Kconfig:316 │ │ Selected by [y]: │ │ - RD_LZMA [=y] && BLK_DEV_INITRD [=y] │ │ - AW_DISP2_FB_DECOMPRESS_LZMA [=y] && FB [=y] && AW_DISP2 [=y] │ │ - AW_REMOTEPROC_USE_UNLZMA [=y] && AW_BSP [=y] && AW_REMOTEPROC [=y] && AW_REMOTEPROC_DECOMPRESS_FW [=y] │ │ │ │ │ │ Symbol: AW_DISP2_FB_DECOMPRESS_LZMA [=y] │ │ Type : bool │ │ Prompt: Framebuffer show bootlogo from lzma file │ │ Location: │ │ -> Allwinner BSP │ │ -> Device Drivers │ │ (1) -> Video Drivers │ │ Defined at bsp/drivers/video/sunxi/Kconfig:59 │ │ Depends on: FB [=y] && AW_DISP2 [=y] │ │ Selects: DECOMPRESS_LZMA [=y] │ │ -
SPI 驱动 ST7789VW 2.4 寸 LCD发生Label or path lcd_fb not found发布在 V Series
在V821的TINA-SDK里，参考链接文本适配2.4寸LCD
在board.dts树里定义如下：&pio { spi1_pins_default: spi1@0 { pins = "PD14", "PD15", "PD16"; /* CS, SCK, SDA */ function = "spi1"; allwinner,drive = <3>; }; spi1_pins_hold: spi1@1 { pins = "PD18"; /* DC */ function = "spi1_hold"; allwinner,drive = <3>; bias-pull-up; }; spi1_pins_sleep: spi1@2 { pins = "PD14", "PD15", "PD16", "PD18"; function = "io_disabled"; }; }； &spi1 { pinctrl-0 = <&spi1_pins_default &spi1_pins_hold>; pinctrl-1 = <&spi1_pins_sleep>; pinctrl-names = "default", "sleep"; clock-frequency = <100000000>; sunxi,spi-bus-mode = <SUNXI_SPI_BUS_DBI>; sunxi,spi-cs-mode = <SUNXI_SPI_CS_AUTO>; status = "okay"; panel_st7789v_spi1: slave@0 { device_type = "spi-panel"; compatible = "allwinner,spi-panel"; reg = <0x0>; spi-max-frequency = <100000000>; lcd_used = <1>; lcd_driver_name = "st7789v"; lcd_if = <0>; lcd_dbi_if = <2>; lcd_data_speed = <48>; lcd_x = <320>; lcd_y = <240>; lcd_pixel_fmt = <10>; lcd_dbi_fmt = <2>; lcd_rgb_order = <0>; lcd_width = <60>; lcd_height = <60>; lcd_pwm_used = <0>; lcd_pwm_ch = <6>; lcd_pwm_freq = <5000>; lcd_pwm_pol = <1>; lcd_frm = <1>; lcd_gamma_en = <1>; fb_buffer_num = <2>; lcd_backlight = <100>; lcd_fps = <60>; lcd_dbi_te = <0>; lcd_dbi_clk_mode = <0>; lcd_gpio_0 = <&pio PD 17 GPIO_ACTIVE_LOW>; status = "okay"; }; }; &lcd_fb { status = "okay"; port { #address-cells = <1>; #size-cells = <0>; spi_panel0: endpoint@0 { reg = <0>; remote-endpoint = <&panel_st7789v_spi1>; }; }; };但在编译过程中发生如下错误：
Nothing to do for unsupport configuration make: Leaving directory '/data/V821/V821_SDK_V1.1/bsp/modules/gpu' [ GPU]: Build done ---build dts for sun300iw1p1 v2w----- INFO: Use die dtsi: /data/V821/V821_SDK_V1.1/bsp/configs/linux-5.4-ansc/sun300iw1p1.dtsi Error: /data/V821/V821_SDK_V1.1/device/config/chips/v821/configs/v2w/board.dts:520.1-8 Label or path lcd_fb not found FATAL ERROR: Syntax error parsing input tree ERROR: build -j4 Failed INFO: build kernel failed如果在设备树里拿掉&lcd_fb { ... } 则可以编译通过，请问这是何故？
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回复: Kernel加载时Waiting for root device /dev/mtdblock4发布在 V Series
通过分析日志发现无法识别到型号为PY25Q256HB的NOR Flash
[ 0.832587] sunxi_spif 44f00000.spif: unrecognized JEDEC id bytes: 85 20 19 85 20 19解决办法如下：
1、打开${SDK_PATH}/bsp/drivers/mtd/spi-nor-5.4/spi-nor.c文件
搜索找到/* PUYA */位置，在后面添加{ "py25q256hb", INFO(0x852019, 0x0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | USE_IO_MODE | USE_RX_DTR) },2、打开${SDK_PATH}/device/config/chips/v821/configs/v2w/linux-5.4-ansc/board.dts文件
将&spif0里添加取消dtr_mode_enabled的注释&spif0 { clock-frequency = <100000000>; pinctrl-0 = <&spif_pins_default &spif_pins_cs>; pinctrl-1 = <&spif_pins_sleep>; pinctrl-names = "default", "sleep"; spif-rx-bus-width = <0x4>; spif-tx-bus-width = <0x4>; //prefetch_read_mode_enabled; /* choose prefect read mode */ dtr_mode_enabled; /* choose double edge trigger mode */ io_mode_enabled; /* 1_x_x && x_x_x mode */ status = "okay"; spif-nor { device_type = "spi_board0"; compatible = "spif-nor"; spi-max-frequency = <0x5f5e100>; reg = <0x0>; status = "disabled"; }; };此问题顺利解决
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回复: Kernel加载时Waiting for root device /dev/mtdblock4发布在 V Series
补充下u-boot的env配置信息如下
=> env print arm-smmu-v3=0 boot_fastboot=fastboot boot_normal=sunxi_flash read 82000000 ${boot_partition};bootm 82000000 boot_partition=boot boot_recovery=sunxi_flash read 82000000 recovery;bootm 82000000 boot_riscv=bootrv 82000000 200000 0 riscv0 riscv0-r bootcmd=run setargs_nor boot_normal bootdelay=3 cma=1M console=ttyS0,115200 earlyprintk=sunxi-uart,0x42500000 fastboot_key_value_max=0x8 fastboot_key_value_min=0x2 fdtcontroladdr=8394bea4 force_normal_boot=1 init=/init initcall_debug=0 loglevel=8 mmc_root=/dev/mmcblk0p5 mtdids=▒Bs▒0▒ mtdparts=▒Bs▒0▒ nor_root=/dev/mtdblock4 partition=▒Bs▒0▒ partitions=env@mtdblock1:boot@mtdblock2:riscv0@mtdblock3:rootfs@mtdblock4:rootfs_data@mtdblock5:UDISK@mtdblock6 rdinit=/rdinit recovery_key_value_max=0x13 recovery_key_value_min=0x10 riscv_partition=riscv0 root_partition=rootfs rotpk_status=0 selinux=0 setargs_mmc=setenv bootargs earlyprintk=${earlyprintk} initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${mmc_root} rootwait init=${init} rdinit=${rdinit} partitions=${partitions} cma=${cma} snum=${snum} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} selinux=${selinux} specialstr=${specialstr} gpt=1 arm-smmu-v3.disable_bypass=${arm-smmu-v3} setargs_nand=setenv bootargs earlyprintk=${earlyprintk} initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${nand_root} rootwait init=${init} rdinit=${rdinit} partitions=${partitions} cma=${cma} snum=${snum} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} selinux=${selinux} specialstr=${specialstr} gpt=1 arm-smmu-v3.disable_bypass=${arm-smmu-v3} setargs_nor=setenv bootargs earlyprintk=${earlyprintk} initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${nor_root} rootwait init=${init} rdinit=${rdinit} partitions=${partitions} cma=${cma} coherent_pool=${coherent_pool} snum=7c000c70f6c107d1fcf wifi_mac=60:c2:2a:10:1b:47 Environment size: 1978/65532 bytes -
Kernel加载时Waiting for root device /dev/mtdblock4发布在 V Series
在V821的TINA-SDK里，参考IPC定义自己的主板，采用32MB NOR Flash，启动时发生了如题错误
一、运行日志如下：U-Boot 2018.07-g90967e5 (Mar 01 2025 - 16:14:15 +0000) Allwinner Technology [00.374]DRAM: 64 MiB [00.376]Relocation Offset is: 01f7c000, reloc addr is: 83f7c000 [00.383]secure enable bit: 0 [00.386]CPU=960 MHz,PERI=3072 Mhz,AHB=192 Mhz, APB=96Mhz FDT sunxi flash disable SPI ALL: ready [00.396]flash init start [00.398]workmode = 0,storage type = 3 sunxi_get_spif_mode()227 - get dtr_mode_enable fail -13 sunxi_get_spif_mode()236 - get io_mode_enable fail -13 [00.416]spi sample_mode:0 sample_delay:24 [00.421]spif sunxi_slave->max_hz:100000000 SF: Detected py25q256hb( ) with page size 256 Bytes, erase size 64 KiB, total 32 MiB [00.433]sunxi flash init ok [00.436]Loading Environment from SUNXI_FLASH... OK root_partition is rootfs set root to /dev/mtdblock4 [00.449]update part info [00.451]update bootcmd [00.455]change working_fdt 0x8394bea4 to 0x8392bea4 [00.471]## error: update_fdt_dram_para : FDT_ERR_NOTFOUND [00.478]update dts Hit any key to stop autoboot: 0 [03.549]no vendor_boot partition is found Android's image name: sun300i_riscv32 Detect comp lzma ERROR: reserving fdt memory region failed (addr=80ffff00 size=100) [04.263] Starting kernel ... [ 0.000000] Linux version 5.4.220 (beaan@ubuntu20-v85x) (gcc version 10.4.0 (2024-02-02_nds32le-linux-glibc-v5d-bbc31ec98)) #7 PREEMPT Tue Apr 22 14:52:16 UTC 2025 [ 0.000000] printk: bootconsole [earlycon0] enabled [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000083c00000, size 4 MiB [ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000081200000, size 0 MiB [ 0.000000] OF: reserved mem: initialized node vdev0buffer@81200000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000081646000, size 0 MiB [ 0.000000] OF: reserved mem: initialized node e907_rpbuf@81646000, compatible id shared-dma-pool [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x0000000080000000-0x0000000083ffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000080000000-0x0000000080ffefff] [ 0.000000] node 0: [mem 0x0000000081244000-0x0000000081643fff] [ 0.000000] node 0: [mem 0x000000008164e000-0x0000000083ffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x0000000083ffffff] [ 0.000000] On node 0 totalpages: 15793 [ 0.000000] Normal zone: 128 pages used for memmap [ 0.000000] Normal zone: 0 pages reserved [ 0.000000] Normal zone: 15793 pages, LIFO batch:3 [ 0.000000] SBI specification v0.3 detected [ 0.000000] SBI implementation ID=0x1 Version=0x10000 [ 0.000000] SBI v0.2 TIME extension detected [ 0.000000] SBI v0.2 IPI extension detected [ 0.000000] SBI v0.2 RFENCE extension detected [ 0.000000] SBI SRST extension detected [ 0.000000] riscv: base ISA extensions acdfim [ 0.000000] riscv: ELF capabilities acdfim [ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 [ 0.000000] pcpu-alloc: [0] 0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 15665 [ 0.000000] Kernel command line: earlyprintk=sunxi-uart,0x42500000 initcall_debug=0 console=ttyS0,115200 loglevel=8 root=/dev/mtdblock4 rootwait init=/init rdinit=/rdinit partitions=env@mtdblock1:boot@mtdblock2:riscv0@mtdblock3:rootfs@mtdblock4:rootfs_data@mtdblock5:UDISK@mtdblock6 cma=1M coherent_pool= androidboot.serialno=7c000c70f6c107d1fcf wifi_mac=60:c2:2a:10:1b:47 androidboot.hardware=sun300iw1p1 boot_type=3 androidboot.boot_type=3 gpt=1 uboot_message=2018.07-g90967e5(03/01/2025-16:14:15) mbr_offset=311296 androidboot.dramfreq=520 androidboot.dramsize=64 uboot_backup=ubootA [ 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes, linear) [ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes, linear) [ 0.000000] Sorting __ex_table... [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] Memory: 35072K/63172K available (3474K kernel code, 650K rwdata, 953K rodata, 136K init, 215K bss, 24004K reserved, 4096K cma-reserved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies. [ 0.000000] NR_IRQS: 72, nr_irqs: 72, preallocated irqs: 0 [ 0.000000] plic: mapped 187 interrupts with 1 handlers for 2 contexts. [ 0.000000] sunxi:ccu-ng:[INFO]: Current HOSC rate is 40000000HZ [ 0.000000] AW BSP version: eb89978d76, 2025-03-02 00:15:40 +0800 [ 0.000000] sunxi:ccu-ng:[INFO]: aon_ccu: sunxi ccu init OK [ 0.000000] sunxi:ccu-ng:[INFO]: sunxi ccu common driver version: 1.2.4 [ 0.000000] sunxi:ccu-ng:[INFO]: ccu: sunxi ccu init OK [ 0.000000] sunxi:ccu-ng:[INFO]: sunxi app ccu driver version: 0.7.1 [ 0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [0] [ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x939a85c40, max_idle_ns: 440795202120 ns [ 0.000010] sched_clock: 64 bits at 40MHz, resolution 25ns, wraps every 4398046511100ns [ 0.008339] Calibrating delay loop (skipped), value calculated using timer frequency.. 80.00 BogoMIPS (lpj=40000) [ 0.018233] pid_max: default: 32768 minimum: 301 [ 0.023029] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.030095] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.039700] rcu: Hierarchical SRCU implementation. [ 0.043472] devtmpfs: initialized [ 0.062482] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns [ 0.066641] futex hash table entries: 256 (order: -1, 3072 bytes, linear) [ 0.073606] pinctrl core: initialized pinctrl subsystem [ 0.087670] phys:80000000 low vir:c0000000 non-cache:dfc80000~e3c80000 [ 0.089706] NET: Registered protocol family 16 [ 0.096365] sunxi:ccu-ng:[INFO]: sunxi prcm ccu driver version: 0.0.4 [ 0.107051] sunxi:pin-42000000.pinctrl:[INFO]: pinctrl withstand voltage config mode=auto_hard [ 0.110063] sunxi:pin:[INFO]: sunxi pinctrl core driver version: 1.4.8 [ 0.116954] sunxi:pin:[INFO]: sunxi rtc-pinctrl version: 0.0.2 [ 0.124598] sunxi:pin-42000540.pinctrl:[INFO]: pinctrl withstand voltage config mode=auto_hard [ 0.147659] usbcore: registered new interface driver usbfs [ 0.147767] usbcore: registered new interface driver hub [ 0.152974] usbcore: registered new device driver usb [ 0.157977] mc: Linux media interface: v0.10 [ 0.162163] videodev: Linux video capture interface: v2.00 [ 0.168154] Advanced Linux Sound Architecture Driver Initialized. [ 0.175306] sun6i-dma 43002000.dma-controller: sunxi dma probed, driver version: 1.2.11 [ 0.182851] sunxi-soc-regulator 4a000800.soc_pmu0: Supply for ldo1 (ldo1) resolved to itself [ 0.190027] ldo1: supplied by regulator-dummy [ 0.194735] ion_size_pool heap_size_pool@0: no small_source configurated, use cma as default [ 0.204297] sunxi:pin-42000000.pinctrl:[INFO]: Auto power withstand voltage configuration detected, automatically exit! [ 0.213709] sunxi-twi 42502000.twi0: 42502000.twi0 supply twi not found, using dummy regulator [ 0.222621] sunxi:twi-42502000.twi0:[INFO]: v2.7.8 probe success [ 0.228681] sunxi:pwm-42000c00.pwm:[INFO]: start probe [ 0.229198] sunxi:pwm-42000c00.pwm:[INFO]: pwmchip probe success [ 0.240034] clocksource: Switched to clocksource riscv_clocksource [ 0.246840] thermal_sys: Registered thermal governor 'fair_share' [ 0.246850] thermal_sys: Registered thermal governor 'bang_bang' [ 0.251474] thermal_sys: Registered thermal governor 'step_wise' [ 0.257360] thermal_sys: Registered thermal governor 'user_space' [ 0.263331] thermal_sys: Registered thermal governor 'power_allocator' [ 0.269890] thermal thermal_zone1: power_allocator: sustainable_power will be estimated [ 0.284341] NET: Registered protocol family 2 [ 0.288496] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear) [ 0.296395] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear) [ 0.303820] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.311396] TCP bind hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.318399] TCP: Hash tables configured (established 1024 bind 1024) [ 0.324826] UDP hash table entries: 256 (order: 0, 4096 bytes, linear) [ 0.331224] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes, linear) [ 0.338366] NET: Registered protocol family 1 [ 0.344960] workingset: timestamp_bits=30 max_order=14 bucket_order=0 [ 0.355367] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.355781] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc. [ 0.362313] fuse: init (API version 7.31) [ 0.366530] NET: Registered protocol family 38 [ 0.370171] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 249) [ 0.377451] io scheduler mq-deadline registered [ 0.381947] io scheduler kyber registered [ 0.405466] loop: module loaded [ 0.405994] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.409559] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 0.415814] i2c /dev entries driver [ 0.421201] uart-ng uart-ng0: uart-ng0 supply uart not found, using dummy regulator [ 0.426996] sunxi:uart-ng-uart-ng0:[INFO]: cannot get the TX DMA channel! [ 0.433547] sunxi:uart-ng-uart-ng0:[INFO]: cannot get the RX DMA channel! [ 0.440339] sunxi:uart-ng:[INFO]: sunxi uart-ng driver version: 1.1.10 [ 0.446835] uart-ng0: ttyS0 at MMIO 0x42500000 (irq = 134, base_baud = 12000000) is a SUNXI [ 0.455158] sunxi:uart-ng-uart-ng0:[INFO]: console setup baud 115200 parity n bits 8, flow n [ 0.463521] sunxi:uart-ng-uart-ng0:[INFO]: uart0, select set 0, baud 115200, uartclk 192000000 beyond rance[24000000, 120000000] [ 0.475128] printk: console [ttyS0] enabled [ 0.475128] printk: console [ttyS0] enabled [ 0.485362] printk: bootconsole [earlycon0] disabled [ 0.485362] printk: bootconsole [earlycon0] disabled [ 0.495925] sunxi:rtc-4a000c00.rtc:[WARN]: Fail to get clock 'rtc-1k' [ 0.507279] sunxi:rtc-4a000c00.rtc:[WARN]: Fail to get clock 'rtc-spi' [ 0.514708] sunxi:rtc:[INFO]: Saving SoC boot-reason: COLD-BOOT [ 0.521518] sunxi:rtc-4a000c00.rtc:[INFO]: errata__fix_alarm_day_reg_default_value(): ALARM0_DAY_REG=0, set it to 1 [ 0.533256] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate! [ 0.544663] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate! [ 0.556135] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate! [ 0.567503] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate! [ 0.578857] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate! [ 0.590751] sunxi-rtc 4a000c00.rtc: registered as rtc0 [ 0.596624] sunxi:rtc-4a000c00.rtc:[INFO]: sunxi rtc probed [ 0.604256] sunxi-wdt 4a001000.watchdog: Watchdog enabled (timeout=300 sec, nowayout=0), driver version: 1.0.5 [ 0.617293] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: SD/MMC/SDIO Host Controller Driver(v5.55 2024-08-26 15:32) [ 0.629260] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: ctl-spec-caps 8 [ 0.636752] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vmmc regulator found [ 0.644971] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vqmmc regulator found [ 0.653292] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vdmmc regulator found [ 0.661615] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vd33sw regulator found [ 0.670021] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vd18sw regulator found [ 0.678491] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vq33sw regulator found [ 0.686940] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: No vq18sw regulator found [ 0.695401] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: manual set ocr [ 0.702677] sunxi:sunxi_mmc_host-44020000.sdmmc:[WARN]: Cann't get pin bias hs pinstate,check if needed [ 0.713386] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: Could not get store clock [ 0.721737] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: Could not get msi_lite clock [ 0.730829] sunxi-mmc 44020000.sdmmc: sunxi:sunxi_mmc_hostcd-set-debounce is missing, function is no used [ 0.742100] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: sdc set ios:clk 0Hz bm PP pm UP vdd 21 width 1 timing LEGACY(SDR12) dt B [ 0.767070] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B [ 0.793091] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B [ 0.806584] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: detmode:data3 [ 0.815739] sunxi:sunxi_spif-44f00000.spif:[INFO]: sample_mode:0 sample_delay:24 [ 0.824329] sunxi:sunxi_spif-44f00000.spif:[INFO]: [spi-flash0] mclk 24000000 [ 0.832587] sunxi_spif 44f00000.spif: unrecognized JEDEC id bytes: 85 20 19 85 20 19 [ 0.841351] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: sdc set ios:clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B [ 0.854851] sunxi:sunxi_spif-44f00000.spif:[ERR]: sunxi spif nor register error:-2 [ 0.863483] sunxi:pin-42000000.pinctrl:[INFO]: Auto power withstand voltage configuration detected, automatically exit! [ 0.876026] sunxi_spif: probe of 44f00000.spif failed with error -2 [ 0.883646] sunxi sbi init success [ 0.887483] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: smc 0 p0 err, cmd 8, RTO !! [ 0.896459] sunxi:gpadc:[INFO]: sunxi_gpadc_init(): 2148: gpadc class register success [ 0.905347] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: smc 0 p0 err, cmd 55, RTO !! [ 0.914484] sunxi:gpadc-42009000.gpadc0:[WARN]: warn: sample rate not set [ 0.922160] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: smc 0 p0 err, cmd 55, RTO !! [ 0.931229] input: sunxi-gpadc0/channel0/input0 as /devices/platform/soc@2002000/42009000.gpadc0/input/input0 [ 0.942436] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: smc 0 p0 err, cmd 55, RTO !! [ 0.951528] input: sunxi-gpadc0/channel1/input0 as /devices/platform/soc@2002000/42009000.gpadc0/input/input1 [ 0.962706] sunxi:sunxi_mmc_host-44020000.sdmmc:[ERR]: smc 0 p0 err, cmd 55, RTO !! [ 0.971421] sunxi:sunxi_mmc_host-44020000.sdmmc:[INFO]: sdc set ios:clk 0Hz bm PP pm OFF vdd 0 width 1 timing LEGACY(SDR12) dt B [ 0.984764] sunxi:gpadc-42009000.gpadc0:[INFO]: sunxi_gpadc probe success [ 0.997416] sunxi-msgbox 43033000.msgbox: sunxi:sunxi_msgboxsunxi_msgbox_probe(): sunxi msgbox start probe [ 1.008649] sunxi-msgbox 43033000.msgbox: sunxi:sunxi_msgboxsunxi_msgbox_probe(): sunxi msgbox probe success [ 1.020538] sunxi-rproc 43030000.e907_rproc: sunxi rproc driver 2.4.3 [ 1.028011] sunxi-rproc 43030000.e907_rproc: rv-cfg base: 0x43030000, va: 0xe3c95000 [ 1.036810] sunxi-rproc 43030000.e907_rproc: find rproc standby error [ 1.044313] sunxi-rproc 43030000.e907_rproc: timeout_ms: 6000 [ 1.050853] sunxi-rproc 43030000.e907_rproc: reset_type: 2 [ 1.057058] sunxi-rproc 43030000.e907_rproc: reg: 43031000 [ 1.063922] sunxi-rproc 43030000.e907_rproc: irq_num: 151 [ 1.070306] sunxi-rproc 43030000.e907_rproc: panic_on_timeout: 1 [ 1.077309] sunxi-rproc 43030000.e907_rproc: register memory firmware('amp_rv0.bin') for 'e907', addr: 0x81244000, size: 2097152 [ 1.090342] sunxi_remoteproc: register mem fw('amp_rv0.bin'), addr=0x0000000081244000, len=2097152 [ 1.100406] sunxi_remoteproc: Image is corrupted (bad magic) [ 1.106807] sunxi_remoteproc: please confirm the length of reserved mem in dts is greater or equal than the size of ELF firmware file('amp_rv0.bin') [ 1.121736] sunxi-rproc 43030000.e907_rproc: register memory firmware('amp_rv0.bin') failed. ret: -22 [ 1.132639] Freeing amp_rv0.bin memory: 2048K [ 1.137590] sunxi-rproc 43030000.e907_rproc: Register memory firmware failed when auto-boot is enabled! [ 1.148157] sunxi-rproc 43030000.e907_rproc: is_using_kernel_fw: 0 [ 1.155206] remoteproc remoteproc0: e907_rproc is available [ 1.161646] sunxi-rproc 43030000.e907_rproc: sunxi rproc driver probe ok [ 1.169809] sunxi-rpbuf-controller rpbuf_controller0@0: assigned reserved memory node e907_rpbuf@81646000 [ 1.181238] [ADDR_MGT] addr_mgt_probe: module version: v1.0.13 [ 1.188379] [ADDR_MGT] addr_mgt_probe: success. [ 1.194496] sunxi_gpio_motor: init success. [ 1.199562] NET: Registered protocol family 17 [ 1.204662] NET: Registered protocol family 15 [ 1.226117] sunxi:rtc-4a000c00.rtc:[WARN]: Warning: Using internal RC 16M clock source. Time may be inaccurate! [ 1.237547] sunxi-rtc 4a000c00.rtc: setting system clock to 1970-01-01T00:00:05 UTC (5) [ 1.248953] sunxi:disp:[WARN]: [DE]: not found boot_disp0 [ 1.255190] sunxi:disp:[WARN]: [DE]: sel 0, gamma_base=0xe4030040 [ 1.262087] sunxi:disp:[WARN]: [DE]: sel 0, gamma_ctrl_block 0xe4030040 val c36e0000 dirty 0 size 8 gamma_tab_block 0xe4030100 val c36e00c0 dirty 0 size 1024 [ 1.278711] sunxi:disp:[ERR]: [FB]: fb_num 1 fb_format 0 [ 1.284819] sunxi:disp:[ERR]: [FB]: fbinfo: fb: 0, disp: 0 channel: 0 layer: 0 zorder: 16 w: 320 h: 192 [ 1.295626] sunxi:disp:[ERR]: [FB]: fb_num 0 use rot 0 degree0 [ 1.302217] sunxi:disp:[ERR]: [FB]: smooth display disp0: type64 mode4 disp1: type0 mode0 [ 1.313217] sunxi:disp:[ERR]: [FB]: display logo on display 0 channel 0 layer 0 type 0 [ 1.322317] sunxi:disp:[ERR]: [FB]: fb 0 vir 0x(ptrval) phy 0x83c80000 [ 1.329688] sunxi:disp:[ERR]: [FB]: platform_fb_post_init start [ 1.336679] sunxi:disp:[WARN]: [DE]: attached ok, mgr0<-->dev0 [ 1.343650] sunxi:VE:[INFO]: 2227 sunxi_cedar_init(): sunxi cedar version 1.1 [ 1.351730] sunxi:disp:[WARN]: [DE]: type:64,mode:4,fmt:rgb,bits:8bits,eotf:0,cs:0 dvi_hdmi:2, range:0 scan:0 ratio:8 [ 1.363962] sunxi:VE:[INFO]: 2149 sunxi_cedar_probe(): probe ve [ 1.370986] sunxi-cedar 41c0e000.ve: 41c0e000.ve supply ve not found, using dummy regulator [ 1.381740] sunxi:sound-common:[WARN]: 326 pacfg_level_trig_init(): pa-pin-msleep1-0 get failed, default 0 [ 1.393954] sunxi:sound-mach:[WARN]: 372 asoc_simple_parse_ucfmt(): set data late to default [ 1.403924] debugfs: Directory 'soc@2002000:codec_plat' with parent 'audiocodec' already present! [ 1.414137] sunxi-snd-mach soc@2002000:codec_mach: 42030000.codec <-> soc@2002000:codec_plat mapping ok [ 1.428768] ALSA device list: [ 1.432192] #0: audiocodec [ 1.435682] sunxi:uart-ng-uart-ng0:[INFO]: uart0, select set 0, baud 115200, uartclk 192000000 beyond rance[24000000, 120000000] [ 1.448804] Waiting for root device /dev/mtdblock4... awbase abnormal...[0x33330001] awbase abnormal...[0x33330001]二、uboot-board.dts
/* * Allwinner Technology CO., Ltd. sun300iw1p1 soc board. * * soc board support. */ &platform { eraseflag = <1>; next_work = <3>; debug_mode = <1>; }; &target { boot_clock = <1008>; /*CPU boot frequency, Unit: MHz*/ storage_type = <3>; /*boot medium, 0-nand, 1-card0, 2-card2, 3-nor, -1(defualt)auto scan*/ burn_key = <1>; /*1:support burn key; 0:not support burn key*/ }; &sdc0_pins_a { allwinner,pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5"; allwinner,function = "sdc0"; allwinner,muxsel = <2>; allwinner,drive = <3>; allwinner,pull = <1>; pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5"; function = "sdc0"; drive-strength = <30>; bias-pull-up; power-source = <3300>; }; &sdc0_pins_b { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "sdc0"; drive-strength = <30>; bias-pull-up; power-source = <1800>; }; &sdc0_pins_c { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "gpio_in"; }; &sdc2_pins_a { allwinner,pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; allwinner,function = "sdc2"; allwinner,muxsel = <3>; allwinner,drive = <3>; allwinner,pull = <1>; pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; function = "sdc2"; drive-strength = <30>; bias-pull-up; }; &sdc2_pins_b { pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; function = "gpio_in"; }; &card0_boot_para { /* Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value */ /* reg = <0x0 0x2 0x0 0x0>; [> Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value <] */ device_type = "card0_boot_para"; card_ctrl = <0x0>; card_high_speed = <0x1>; card_line = <0x4>; pinctrl-0 = <&sdc0_pins_a>; clk_type = "typ1"; }; &card2_boot_para { /* Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value */ /* reg = <0x0 0x3 0x0 0x0>; [> Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value <] */ device_type = "card2_boot_para"; card_ctrl = <0x2>; card_high_speed = <0x1>; card_line = <0x4>; pinctrl-0 = <&sdc2_pins_a>; sdc_ex_dly_used = <0x2>; sdc_tm4_hs200_max_freq = <150>; sdc_tm4_hs400_max_freq = <100>; }; &gpio_bias { /* Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value */ device_type = "gpio_bias"; }; &aliases { spi0 = &spi0; spif = &spif; }; &pio{ spi0_pins_a: spi0@0 { allwinner,pins = "PC9", "PC8", "PC11"; allwinner,pname = "spi0_sclk", "spi0_mosi", "spi0_miso"; allwinner,function = "spi0"; allwinner,muxsel = <3>; allwinner,drive = <3>; allwinner,pull = <0>; }; spi0_pins_b: spi0@1 { allwinner,pins = "PC10", "PC7", "PC6"; allwinner,pname = "spi0_cs0", "spi0_hold", "spi0_wp"; allwinner,function = "spi0"; allwinner,muxsel = <3>; allwinner,drive = <3>; allwinner,pull = <1>; // only CS should be pulled up }; spi0_pins_c: spi0@2 { allwinner,pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11"; allwinner,function = "gpio_in"; allwinner,muxsel = <0xf>; allwinner,drive = <1>; allwinner,pull = <0>; }; spif_pins_a: spif@0 { allwinner,pins = "PC8", "PC9", "PC11"; allwinner,pname = "spif_mosi", "spif_clk", "spif_miso"; allwinner,function = "spif"; allwinner,muxsel = <2>; allwinner,drive = <3>; allwinner,pull = <0>; }; spif_pins_b: spif@1 { allwinner,pins = "PC6", "PC7", "PC10"; allwinner,pname = "spif_wp", "spif_hold", "spif_cs0"; allwinner,function = "spif"; allwinner,muxsel = <2>; allwinner,drive = <3>; allwinner,pull = <1>; // only CS should be pulled up }; spif_pins_c: spif@2 { allwinner,pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11"; allwinner,function = "gpio_in"; allwinner,muxsel = <0xf>; allwinner,drive = <1>; allwinner,pull = <0>; }; }; &spi0 { clock-frequency = <100000000>; pinctrl-0 = <&spi0_pins_a &spi0_pins_b>; pinctrl-1 = <&spi0_pins_c>; pinctrl-names = "default", "sleep"; spi_slave_mode = <0>; spi_dbi_enable = <0>; spi0_cs_number = <1>; status = "disabled"; spi_board0 { device_type = "spi_board0"; compatible = "spi-nor"; spi-max-frequency = <100000000>; m25p,fast-read = <1>; /*individual_lock;*/ reg = <0x0>; spi-rx-bus-width=<0x04>; spi-tx-bus-width=<0x04>; status="disabled"; }; spi-nand@0 { compatible = "spi-nand"; spi-max-frequency=<0x05F5E100>; reg = <0x0>; spi-rx-bus-width=<0x01>; spi-tx-bus-width=<0x01>; status="disabled"; }; }; &spif { clock-frequency = <100000000>; pinctrl-0 = <&spif_pins_a &spif_pins_b>; pinctrl-1 = <&spif_pins_c>; pinctrl-names = "default", "sleep"; /*spi-supply = <®_dcdc1>;*/ status = "okay"; spif-nor { device_type = "spi_board0"; compatible = "spi-nor"; spif-max-frequency = <100000000>; m25p,fast-read = <1>; /*individual_lock;*/ reg = <0x0>; spif-rx-bus-width=<0x04>; spif-tx-bus-width=<0x04>; status="disabled"; }; }; &sunxi_flashmap { /* Unit: Sector */ sdmmc_map { logic_offset = <40960>; boot_param_start = <24504>; boot_param_size = <1>; uboot_start = <32800>; uboot_size = <4096>; uboot_bak_start = <24576>; uboot_bak_size = <4096>; secure_storage_start = <12288>; secure_storage_size = <512>; tuning_data_start = <24512>; tuning_data_size = <60>; status = "disabled"; }; /* * |-44k-| -4k- | -uboot size- |-16k-| * * |boot0|boot_param|uboot(boot_package)| mbr | ===> mtdblock0(need 64k aligned) * * | |->uboot_start | |-> kernel start * |->boot_param_start |->logic_offset */ nor_map { /*Unit: Sector, 8M flash:16384, 16M flash:32768, 32M flash:65536*/ /* logic offset requires block size(64K) alignment - 32(mbr size) */ flash_size = <65536>; logic_offset = <608>; secure_logic_offset = <2016>; rtos_logic_offset = <2016>; rtos_secure_logic_offset = <2016>; boot_param_start = <88>; boot_param_size = <8>; uboot_start = <96>; uboot_size = <384>; boot0_start = <0>; status = "okay"; }; };三、board.dts
// SPDX-License-Identifier: (GPL-2.0+ or MIT) /dts-v1/; #include "sun300iw1p1.dtsi" /{ board = "V821", "V821-ipc"; compatible = "allwinner,v821", "riscv,sun300iw1p1"; aliases { }; reg_vdd_cpu: vdd-cpu { compatible = "regulator-fixed"; regulator-name = "vdd_cpu"; regulator-min-microvolt = <920000>; regulator-max-microvolt = <920000>; regulator-always-on; regulator-boot-on; status = "okay"; }; /* used for hib & ultra standby poweron source enable mask */ /* bit 0 ~ bit 7 - pl 0 ~pl 7 */ /* bit 9 rtc alarm0 */ /* bit 10 rtc alarm1 */ /* bit 11 wakeuptimer */ /* bit 12 wlan, keep 0 because hib has no wlan and ultra wakes up by wlan on remote core */ poweron-source { hib_poweron_source = <0x000007FF>; ultra_poweron_source = <0x000007FF>; }; reserved-memory { rv_ddr_reserved: rvddrreserved@81000000 { reg = <0x0 0x81000000 0x0 0x200000>; no-map; }; /* * The name should be "vdev%dbuffer". * Its size should be not less than * RPMSG_BUF_SIZE * (num of buffers in a vring) * 2 * = 512 * (num of buffers in a vring) * 2 */ rv_vdev0buffer: vdev0buffer@81200000 { compatible = "shared-dma-pool"; reg = <0x0 0x81200000 0x0 0x40000>; no-map; }; /* * The name should be "vdev%dvring%d". * The size of each should be not less than * PAGE_ALIGN(vring_size(num, align)) * = PAGE_ALIGN(16 * num + 6 + 2 * num + (pads for align) + 6 + 8 * num) * * (Please refer to the vring layout in include/uapi/linux/virtio_ring.h) */ rv_vdev0vring0: vdev0vring0@81240000 { reg = <0x0 0x81240000 0x0 0x2000>; no-map; }; rv_vdev0vring1: vdev0vring1@81242000 { reg = <0x0 0x81242000 0x0 0x2000>; no-map; }; e907_mem_fw: e907_mem_fw@81244000 { /* boot0 & uboot0 load elf addr */ reg = <0x0 0x81244000 0x0 0x00200000>; }; e907_share_irq_table: share_irq_table@81644000 { reg = <0x0 0x81644000 0x0 0x2000>; no-map; }; e907_rpbuf_reserved:e907_rpbuf@81646000 { compatible = "shared-dma-pool"; reg = <0x0 0x81646000 0x0 0x8000>; no-map; }; size_pool { reg = <0 0x82000000 0 0x0f00000>; }; linux,cma { size = <0x0 0x400000>; }; }; reserved-irq { share-e907 { arch-name = "e907"; memory-region = <&e907_share_irq_table>; /* defined by sun300iw1-share-irq-dt.h */ share-irq = <1 0x1 E907_PA_IRQ_NUM A27_PA_IRQ_NUM 0x00000000>, <3 0x3 E907_PC_IRQ_NUM A27_PC_IRQ_NUM 0x00000000>, <4 0x4 E907_PD_IRQ_NUM A27_PD_IRQ_NUM 0x00000000>, <12 0xc E907_PL_IRQ_NUM A27_PL_IRQ_NUM 0x00000000>; }; }; hifbypass: hifbypass { compatible = "allwinner,sun300wi-sip-wifi"; interrupts-extended = <&plic0 160 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; rpbuf_controller0: rpbuf_controller0@0 { compatible = "allwinner,rpbuf-controller"; remoteproc = <&e907_rproc>; ctrl_id = <0>; memory-region = <&e907_rpbuf_reserved>; status = "okay"; }; rpbuf_xradio: rpbuf_xradio@0 { compatible = "allwinner,rpbuf-xradio"; rpbuf = <&rpbuf_controller0>; status = "okay"; }; heap_size_pool@0{ compatible = "allwinner,size_pool"; heap-name = "size_pool"; heap-id = <0x7>; heap-base = <0x82000000>; heap-size = <0x0f00000>; heap-type = "ion_size_pool"; thrs = <100>; sizes = <0 15360>; fall_to_big_pool = <1>; }; gpio-motor@0 { compatible = "allwinner,gpio-motor"; ab-pin-black = <&pio PD 12 GPIO_ACTIVE_HIGH>; ab-pin-yellow = <&pio PD 13 GPIO_ACTIVE_HIGH>; ab-pin-brown = <&pio PD 14 GPIO_ACTIVE_HIGH>; ab-pin-blue = <&pio PD 15 GPIO_ACTIVE_HIGH>; cd-pin-black = <&pio PD 16 GPIO_ACTIVE_HIGH>; cd-pin-yellow = <&pio PD 17 GPIO_ACTIVE_HIGH>; cd-pin-brown = <&pio PD 18 GPIO_ACTIVE_HIGH>; cd-pin-blue = <&pio PD 19 GPIO_ACTIVE_HIGH>; status = "okay"; }; ae350_standby_debug:ae350_standby_debug@1 { compatible = "allwinner,sun300iw1-ae350-standby-debug"; mboxes = <&msgbox 2>; mbox-names = "ae350-notify"; status = "okay"; }; }; &rtc_pio { uart0_pins_default: uart0_pins@0 { pins = "PL4", "PL5"; function = "uart0"; }; uart0_pins_sleep: uart0_pins@1 { pins = "PL4", "PL5"; function = "io_disabled"; }; uart3_pins_default: uart3_pins@0 { pins = "PL2", "PL3"; function = "uart3"; }; uart3_pins_sleep: uart3_pins@1 { pins = "PL2", "PL3"; function = "io_disabled"; }; }; &pio { uart1_pins_default: uart1_pins@0 { pins = "PD7", "PD8", "PD9", "PD10"; function = "uart1"; }; uart1_pins_sleep: uart1_pins@1 { pins = "PD7", "PD8", "PD9", "PD10"; function = "io_disabled"; }; uart2_pins_default: uart2_pins@0 { pins = "PA5", "PA6", "PA7", "PA8"; function = "uart2"; }; uart2_pins_sleep: uart2_pins@1 { pins = "PA5", "PA6", "PA7", "PA8"; function = "io_disabled"; }; gmac0_pins_default: gmac_pins@0 { pins = "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11"; function = "rmii"; allwinner,drive = <3>; bias-pull-up; }; gmac0_pins_sleep: gmac_pins@1 { pins = "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11"; function = "io_disabled"; }; pwm8_pins_active: pwm8@0 { pins = "PD18"; function = "pwm0_8"; }; pwm8_pins_sleep: pwm8@1 { pins = "PD18"; function = "gpio_in"; bias-pull-down; }; pwm9_pins_active: pwm9@0 { pins = "PD19"; function = "pwm0_9"; }; pwm9_pins_sleep: pwm9@1 { pins = "PD19"; function = "gpio_in"; bias-pull-down; }; twi0_pins_default: twi0@0 { pins = "PA3", "PA4"; function = "twi0"; allwinner,drive = <0>; bias-pull-up; }; twi0_pins_sleep: twi0@1 { pins = "PA3", "PA4"; function = "gpio_in"; }; spi0_pins_default: spi0@0 { pins = "PC9", "PC8", "PC11"; /* clk, mosi, miso */ function = "spi0"; allwinner,drive = <0>; }; spi0_pins_cs: spi0@1 { pins = "PC6", "PC7", "PC10"; /* wp, hold, cs */ function = "spi0"; allwinner,drive = <0>; bias-pull-up; }; spi0_pins_sleep: spi0@2 { pins = "PC6", "PC7", "PC9", "PC8", "PC11", "PC10"; function = "io_disabled"; }; sdc0_pins_a: sdc0@0 { pins = "PC0", "PC1", "PC2", "PC3", "PC5"; function = "sdc0"; allwinner,drive = <3>; bias-pull-up; }; sdc0_pins_c: sdc0@2 { pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5"; function = "gpio_in"; }; sdc0_pins_d: sdc0@3 { pins = "PC4"; function = "sdc0"; allwinner,drive = <3>; bias-disable; }; /* for uboot card probe */ sdc0_pins_uboot: sdc0@4 { allwinner,pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5"; allwinner,function = "sdc0"; allwinner,muxsel = <2>; allwinner,drive = <3>; allwinner,pull = <1>; power-source = <3300>; }; spif_pins_default: spif@0 { pins = "PC9", "PC8", "PC11"; /* clk, mosi, miso */ function = "spif"; allwinner,drive = <1>; }; spif_pins_cs: spif@1 { pins = "PC6", "PC7", "PC10"; /* wp, hold, cs */ function = "spif"; allwinner,drive = <1>; bias-pull-up; }; spif_pins_sleep: spif@2 { pins = "PC6", "PC7", "PC9", "PC8", "PC11", "PC10"; function = "io_disabled"; }; }; &soc { card0_boot_para@0 { device_type = "card0_boot_para"; card_ctrl = <0x0>; card_high_speed = <0x1>; card_line = <0x4>; pinctrl-0 = <&sdc0_pins_uboot>; clk_type = "typ1"; }; addr_mgt: addr_mgt { compatible = "allwinner,sunxi-addr_mgt"; type_addr_wifi = <0x0>; type_addr_bt = <0x0>; type_addr_eth = <0x0>; status = "okay"; }; }; &uart0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pins_default>; pinctrl-1 = <&uart0_pins_sleep>; status = "okay"; }; &uart1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart1_pins_default>; pinctrl-1 = <&uart1_pins_sleep>; status = "disabled"; }; &uart2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart2_pins_default>; pinctrl-1 = <&uart2_pins_sleep>; status = "disabled"; }; &uart3 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pins_default>; pinctrl-1 = <&uart3_pins_sleep>; status = "disabled"; }; &twi0 { clock-frequency = <400000>; pinctrl-0 = <&twi0_pins_default>; pinctrl-1 = <&twi0_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting 'twi_drv_used' to 1 */ twi_drv_used = <1>; status = "okay"; }; &soc_pmu0 { status = "okay"; }; &sdc0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc0_pins_a &sdc0_pins_d>; pinctrl-1 = <&sdc0_pins_c>; bus-width = <4>; cd-used-24M; /*cd-gpios = <&pio PC 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;*/ /*non-removable;*/ /*broken-cd;*/ /*cd-inverted*/ data3-detect; cap-sd-highspeed; /*sd-uhs-sdr50;*/ /*sd-uhs-ddr50;*/ /*sd-uhs-sdr104;*/ no-sdio; no-mmc; /*sunxi-power-save-mode;*/ sunxi-dis-signal-vol-sw; max-frequency = <50000000>; ctl-spec-caps = <0x8>; status = "okay"; }; &pwm0_8 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm8_pins_active>; pinctrl-1 = <&pwm8_pins_sleep>; status = "disabled"; }; &pwm0_9 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm9_pins_active>; pinctrl-1 = <&pwm9_pins_sleep>; status = "disabled"; }; &spi0 { pinctrl-0 = <&spi0_pins_default &spi0_pins_cs>; pinctrl-1 = <&spi0_pins_sleep>; pinctrl-names = "default", "sleep"; sunxi,spi-bus-mode = <SUNXI_SPI_BUS_NOR>; sunxi,spi-cs-mode = <SUNXI_SPI_CS_SOFT>; status = "disabled"; dmas; dma-names; spi_board0 { device_type = "spi_board0"; compatible = "spi-nor"; spi-max-frequency = <100000000>; m25p,fast-read = <1>; /*individual_lock;*/ reg = <0x0>; spi-rx-bus-width = <4>; spi-tx-bus-width = <4>; status = "disabled"; }; }; &spif0 { clock-frequency = <100000000>; pinctrl-0 = <&spif_pins_default &spif_pins_cs>; pinctrl-1 = <&spif_pins_sleep>; pinctrl-names = "default", "sleep"; spif-rx-bus-width = <0x4>; spif-tx-bus-width = <0x4>; //prefetch_read_mode_enabled; /* choose prefect read mode */ //dtr_mode_enabled; /* choose double edge trigger mode */ //dqs_mode_enabled; /* choose dqs mode(nand provide clk mode) */ status = "okay"; spif-nor { device_type = "spi_board0"; compatible = "spif-nor"; spi-max-frequency = <0x5f5e100>; reg = <0x0>; status = "disabled"; }; }; &mdio0 { status = "disabled"; phy0: ethernet-phy@0 { /* JL11x1 */ compatible = "ethernet-phy-id937c.4024", "ethernet-phy-ieee802.3-c22"; reg = <0>; max-speed = <100>; /* Max speed capability for rmii */ reset-gpios = <&pio PC 16 GPIO_ACTIVE_LOW>; /* PHY datasheet rst time */ reset-assert-us = <200000>; reset-deassert-us = <150000>; status = "disabled"; }; }; &gmac0 { phy-mode = "rmii"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&gmac0_pins_default>; pinctrl-1 = <&gmac0_pins_sleep>; sunxi,phy-clk-type = <0>; phy-handle = <&phy0>; tx-delay = <0>; rx-delay = <0>; status = "disabled"; }; &vind0 { csi_top = <200000000>; status = "disabled"; csi1: csi@45821000 { pinctrl-names = "default","sleep"; pinctrl-0 = <&ncsi_bt656_pins_a>; pinctrl-1 = <&ncsi_bt656_pins_b>; status = "disabled"; }; tdm0: tdm@45908000 { work_mode = <0x0>; }; isp00:isp@45900000 { work_mode = <0x0>; ldci_select = <0x1>; }; isp01:isp@458ffffc { status = "disabled"; ldci_select = <0x1>; }; isp10:isp@4 { status = "disabled"; }; scaler00:scaler@45910000 { work_mode = <0x0>; status = "disabled"; }; scaler01:scaler@4590fffc { work_mode = <0xff>; status = "disabled"; }; scaler10:scaler@45910400 { work_mode = <0x0>; status = "disabled"; }; scaler11:scaler@459103fc { work_mode = <0xff>; status = "disabled"; }; actuator0: actuator@2108180 { device_type = "actuator0"; actuator0_slave = <0x18>; actuator0_af_pwdn = <>; actuator0_afvdd = "afvcc-csi"; actuator0_afvdd_vol = <2800000>; status = "disabled"; actuator0_name; }; flash0: flash@2108190 { device_type = "flash0"; flash0_type = <2>; flash0_en = <>; flash0_mode = <>; flash0_flvdd = ""; flash0_flvdd_vol = <>; device_id = <0>; status = "disabled"; }; sensor0: sensor@5812000 { device_type = "sensor0"; sensor0_mname = "gc1084_mipi"; sensor0_twi_cci_id = <0>; sensor0_twi_addr = <0x6e>; sensor0_mclk_id = <0>; sensor0_pos = "rear"; sensor0_isp_used = <1>; sensor0_fmt = <1>; sensor0_stby_mode = <0>; sensor0_vflip = <0>; sensor0_hflip = <0>; sensor0_iovdd-supply = <>; sensor0_iovdd_vol = <>; sensor0_avdd-supply = <&pmu_soc_ldo1>; sensor0_avdd_vol = <2800000>; sensor0_dvdd-supply = <>; sensor0_dvdd_vol = <>; sensor0_power_en = <>; sensor0_reset = <&pio PA 0 GPIO_ACTIVE_LOW>; sensor0_pwdn = <>; status = "disabled"; act_handle = <>; }; sensor1: sensor@5812010 { device_type = "sensor1"; sensor1_mname = "gc1084_2"; sensor1_twi_cci_id = <0>; sensor1_twi_addr = <0x6c>; sensor1_mclk_id = <1>; sensor1_pos = "front"; sensor1_isp_used = <1>; sensor1_fmt = <1>; sensor1_stby_mode = <0>; sensor1_vflip = <0>; sensor1_hflip = <0>; sensor1_iovdd-supply = <>; sensor1_iovdd_vol = <>; sensor1_avdd-supply = <>; sensor1_avdd_vol = <>; sensor1_dvdd-supply = <>; sensor1_dvdd_vol = <>; sensor1_power_en = <>; sensor1_reset = <&pio PD 13 GPIO_ACTIVE_LOW>; status = "disabled"; }; sensor_list0:sensor_list@200b820 { sensor00_mname = "gc5035_mipi"; sensor00_twi_addr = <0x6c>; sensor00_type = <1>; sensor00_hflip = <0>; sensor00_vflip = <0>; sensor00_act_used = <1>; sensor00_act_name = "dw9714_act"; sensor00_act_twi_addr = <0x18>; sensor01_mname = "ov5675_mipi"; sensor01_twi_addr = <0x6c>; sensor01_type = <1>; sensor01_hflip = <0>; sensor01_vflip = <0>; sensor01_act_used = <1>; sensor01_act_name = "dw9714_act"; sensor01_act_twi_addr = <0x18>; sensor02_mname = "sp5409_mipi"; sensor02_twi_addr = <0x78>; sensor02_type = <1>; sensor02_hflip = <0>; sensor02_vflip = <0>; sensor02_act_used = <1>; sensor02_act_name = "dw9714_act"; sensor02_act_twi_addr = <0x18>; status = "disabled"; }; sensor_list1:sensor_list@200b830 { sensor10_mname = "gc02m2_mipi"; sensor10_twi_addr = <0x20>; sensor10_type = <1>; sensor10_hflip = <0>; sensor10_vflip = <0>; sensor10_act_used = <0>; sensor10_act_name = ""; sensor10_act_twi_addr = <>; sensor11_mname = "ov02a10_mipi"; sensor11_twi_addr = <0x7a>; sensor11_type = <1>; sensor11_hflip = <1>; sensor11_vflip = <0>; sensor11_act_used = <0>; sensor11_act_name = ""; sensor11_act_twi_addr = <>; sensor12_mname = "gc030a_mipi"; sensor12_twi_addr = <0x42>; sensor12_type = <1>; sensor12_hflip = <0>; sensor12_vflip = <0>; sensor12_act_used = <0>; sensor12_act_name = ""; sensor12_act_twi_addr = <>; status = "disabled"; }; vinc00:vinc@45830000 { vinc0_csi_sel = <0>; vinc0_mipi_sel = <0>; vinc0_isp_sel = <0>; vinc0_isp_tx_ch = <0>; vinc0_tdm_rx_sel = <0>; vinc0_rear_sensor_sel = <0>; vinc0_front_sensor_sel = <0>; vinc0_sensor_list = <0>; work_mode = <0x0>; status = "disabled"; }; vinc01:vinc@4582fffc { vinc1_csi_sel = <1>; vinc1_mipi_sel = <1>; vinc1_isp_sel = <1>; vinc1_isp_tx_ch = <0>; vinc1_tdm_rx_sel = <1>; vinc1_rear_sensor_sel = <0>; vinc1_front_sensor_sel = <0>; vinc1_sensor_list = <0>; status = "disabled"; }; vinc10:vinc@45831000 { vinc4_csi_sel = <0>; vinc4_mipi_sel = <0>; vinc4_isp_sel = <0>; vinc4_isp_tx_ch = <0>; vinc4_tdm_rx_sel = <0>; vinc4_rear_sensor_sel = <0>; vinc4_front_sensor_sel = <0>; vinc4_sensor_list = <0>; work_mode = <0x0>; status = "disabled"; }; vinc11:vinc@45830ffc { vinc5_csi_sel = <1>; vinc5_mipi_sel = <1>; vinc5_isp_sel = <1>; vinc5_isp_tx_ch = <0>; vinc5_tdm_rx_sel = <1>; vinc5_rear_sensor_sel = <0>; vinc5_front_sensor_sel = <0>; vinc5_sensor_list = <0>; status = "disabled"; }; }; &msgbox { status = "okay"; }; /* audio dirver module -> audio codec */ &codec { tx-hub-en; rx-sync-en; dac-vol = <63>; /* default value:63 range:0->63 */ dacl-vol = <160>; /* default value:160 range:0->255 */ adc-vol = <160>; /* default value:160 range:0->255 */ lineout-gain = <31>; /* default value:31 range:0->31 */ mic-gain = <31>; /* default value:31 range:0->31 */ adcdelaytime = <0>; /* default value:0 range:0,5,10,20,30 */ pa-pin-max = <1>; pa-pin-0 = <&pio PC 15 GPIO_ACTIVE_HIGH>; pa-pin-level-0 = <1>; pa-pin-msleep-0 = <0>; rglt-max = <0>; //rglt0-mode = "AUDIO"; //rglt0-voltage = <1800000>; //rglt1-mode = "PMU"; //rglt1-voltage = <3300000>; //rglt1-supply = <®_dldo1>; status = "okay"; }; &codec_plat { status = "okay"; }; &codec_mach { status = "okay"; soundcard-mach,cpu { sound-dai = <&codec_plat>; }; soundcard-mach,codec { sound-dai = <&codec>; }; }; /* audio dirver module -> I2S/PCM */ &i2s0_plat { tdm-num = <0>; /* "tx-pin" * 1. tx pin enable setting. * 2. we can set it like tx_pin = <3 0> - enable tx_pin0 and tx_pin3. * * "rx-pin" * 1. rx pin enable setting. * 2. we can set it like rx_pin = <1 2> - enable rx_pin1 and rx_pin2. * * "tx-pin-chmap" * 1. tx pin channel map setting. * 2. the subscript of value corresponds to the channel number. * 3. the value corresponds to slot number. * 4. we can use it like tx-pin1-chmap = <1 2 ... 15> to set pin1 channel map. * 5. if enabled the pin, but not set "tx-pin-chmap", default set <0 1 2 ...>. * 6. if the count of value is less than 16, then missing member will be set 0. * * rxfifo map * 1. "rxfifo-pinmap" - set the corresponding pin. * 2. "rxfifo-chmap" - set the corresponding slot. * 3. we can use it like rxfifo-pinmap = <0 1 2>; rxfifo-chmap = <1 2 14>; to set rxfifo map. * 4. the count of value of "rxfifo-pinmap" can != the count of value of "rxfifo-pinmap", * then missing member would be set 0. */ tx-pin = <0>; rx-pin = <0>; /* tx-pin0-chmap = <0 1 5>; */ /* rxfifo-pinmap = <0 0>; */ /* rxfifo-chmap = <0 1>; */ //pinctrl-used; //pinctrl-names = "default","sleep"; //pinctrl-0 = <&i2s0_pins_a &i2s0_pins_c &i2s0_pins_d>; //pinctrl-1 = <&i2s0_pins_b>; tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s0_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s0_cpu>; soundcard-mach,bitclock-master = <&i2s0_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; i2s0_cpu: soundcard-mach,cpu { sound-dai = <&i2s0_plat>; /* note: pll freq = 24.576M or 22.5792M * pll-fs */ soundcard-mach,pll-fs = <1>; /* note: * "mclk-fs" * if not defined it or equal to 0, disable mclk. * * "mclk-fp" (if defined "mclk-fs") * 1. if not defined "mclk-fp", mclk_freq = mclk-fs * sample_rate; * 2. if defined "mclk-fp" but no value, mclk_freq = mclk-fs * 11.2896M or 12.288M; * 3. if defined "mclk-fp" with 2 value, like: mclk-fp = <val1 val2>; * it means: mclk_freq(44.1k fp) = mclk-fs * val1; * mclk_freq(48k fp) = mclk-fs * val2. */ }; i2s0_codec: soundcard-mach,codec { }; }; &e907_rproc { firmware-name = "amp_rv0.bin"; mboxes = <&msgbox 0>; mbox-names = "arm-kick"; auto-boot; skip-shutdown; fw-region = <&e907_mem_fw>; memory-region = <&rv_ddr_reserved>, <&rv_vdev0buffer>, <&rv_vdev0vring0>, <&rv_vdev0vring1>, <&e907_share_irq_table>; fw-partitions = "riscv0", "riscv0-r"; fw-partition-sectors = <2176>; memory-mappings = /* < DA len PA > */ /* SRAM ISP */ < 0x2000000 0xa800 0x2000000 >, /* SRAM VE */ < 0x200a800 0x17400 0x200a800 >, /* SRAM WIFI */ < 0x68000000 0x1000000 0x68000000 >, /* DRAM */ < 0x80000000 0x0fffffff 0x80000000 >; stop-record-reg = <0x4a00020c>; share-irq = "e907"; status = "okay"; rproc_wdt: rproc_wdt@0 { timeout_ms = <6000>; try_times = <1>; reset_type = <0x2>; panic_on_timeout = <1>; status = "okay"; }; }; /* *usb_port_type: usb mode: 0-device, 1-host, 2-otg. *usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-id/dpdm detect. *usb_detect_mode: 0-thread scan, 1-id gpio interrupt. *usb_id_gpio: gpio for id detect. *usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl"; *usb_wakeup_suspend：0-SUPER_STANDBY, 1-USB_STANDBY. */ &usbc0 { device_type = "usbc0"; usb_port_type = <0x2>; usb_detect_type = <0x0>; usb_detect_mode = <0x0>; //usb_id_gpio; //usb_det_vbus_gpio; //usb_det_vbus_gpio = "axp_ctrl"; //det_vbus_supply; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0x0>; usb_luns = <0x3>; usb_serial_unique = <0x0>; usb_serial_number = "20080411"; status = "okay"; }; &udc { //det_vbus_supply = <&gpio_charger>; status = "disabled"; }; &ehci0 { //drvvbus-supply = <®_usb_vbus>; status = "okay"; }; &ohci0 { //drvvbus-supply = <®_usb_vbus>; status = "okay"; }; &gpadc0 { channel_num = <4>; channel_select = <0x3>; channel_data_select = <0x0>; channel_compare_select = <0x0>; channel_cld_select = <0x0>; channel_chd_select = <0x0>; channel0_compare_lowdata = <1700000>; channel0_compare_higdata = <1200000>; channel1_compare_lowdata = <460000>; channel1_compare_higdata = <1200000>; status = "okay"; }; /*---------------------------------------------------------------------------------- disp init configuration disp_mode (0:screen0<screen0,fb0>) screenx_output_type (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo) screenx_output_mode (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50) (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60) screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420) screenx_output_bits (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit) screenx_output_eotf (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG) screenx_output_cs (for hdmi, 0:undefined 257:BT709 260:BT601 263:BT2020) screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode) screen0_output_range (for hdmi, 0:default 1:full 2:limited) screen0_output_scan (for hdmi, 0:no data 1:overscan 2:underscan) screen0_output_aspect_ratio (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9) fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444) fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA) fb0_scaler_mode_enable(scaler mode enable, used FE) fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0) lcdx_backlight (lcd init backlight,the range:[0,256],default:197 lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50) lcd0_contrast (LCD contrast, 0~100) lcd0_saturation (LCD saturation, 0~100) lcd0_hue (LCD hue, 0~100) framebuffer software rotation setting: disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y, set fbX_height to lcd_x) degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree) degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree) devX_output_type : config output type in bootGUI framework in UBOOT-2018. (0:none; 1:lcd; 2:tv; 4:hdmi;) devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018 devX_screen_id : config display index of bootGUI framework in UBOOT-2018 devX_do_hpd : whether do hpd detectation or not in UBOOT-2018 chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6 channel, 1:dual display with 4 channel in main display and 2 channel in second display, 2:dual display with 3 channel in main display and 3 channel in second in display. ----------------------------------------------------------------------------------*/ &disp { disp_init_enable = <1>; disp_mode = <0>; screen0_output_type = <7>; screen0_output_mode = <4>; screen0_to_lcd_index = <0>; screen1_output_type = <3>; screen1_output_mode = <10>; screen1_to_lcd_index = <2>; screen1_output_format = <0>; screen1_output_bits = <0>; screen1_output_eotf = <4>; screen1_output_cs = <257>; screen1_output_dvi_hdmi = <2>; screen1_output_range = <2>; screen1_output_scan = <0>; screen1_output_aspect_ratio = <8>; fb_format = <0>; fb_num = <1>; fb_debug = <1>; /*<disp channel layer zorder>*/ fb0_map = <0 0 0 16>; fb0_width = <320>; fb0_height = <192>; /*<disp channel layer zorder>*/ fb1_map = <0 2 0 16>; fb1_width = <300>; fb1_height = <300>; /*<disp channel layer zorder>*/ fb2_map = <1 0 0 16>; fb2_width = <1280>; fb2_height = <720>; /*<disp channel layer zorder>*/ fb3_map = <1 1 0 16>; fb3_width = <300>; fb3_height = <300>; chn_cfg_mode = <1>; disp_para_zone = <1>; }; /*------------------------------------------ ircut_pin_a : IRCUT PIN+ ircut_pin_b : IRCUT PIN- ircut_pin_drv : Set the driver strength for the IR cut pins ircut_open : Define the GPIO states for opening the IR cut <ircut_pin_a ircut_pin_b> hold_time : Set the hold time for the IR cut operation (in milliseconds) --------------------------------------------*/ &ircut { ircut_pin_a = <&pio PD 22 GPIO_ACTIVE_HIGH>; ircut_pin_b = <&pio PD 23 GPIO_ACTIVE_HIGH>; ircut_pin_drv = <3>; ircut_open = <GPIO_ACTIVE_HIGH GPIO_ACTIVE_LOW>; hold_time = <100>; status = "disabled"; }; &cpu0 { cpu-supply = <®_vdd_cpu>; }; -
USB连接USB HUB后能否继续用Phoenixsuit烧录固件？发布在 V Series
对于部份只有1路USB2.0的SOC，USB还需要连接其它USB设备，请问如果通过如CH334等USB HUB进行扩展出更多的USB端口，透过扩展出来的USB端口是否还能够继续使用Phoenixsuit烧录固件吗？
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V821同时使用RMII和I2S功能时PD11脚该如何处理？发布在 V Series
在目标产品中需要使用RMII外接RTL8201F，同时采用I2S连接音频IC，请问下PD11复用为I2S0-MCLK功能时，需要如何处理与RTL8201F之间的电路？
