【FAQ】全志V853芯片 如何查看NPU时钟电源配置以及信息?
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[KERNEL_DIR]/arch/arm/boot/dts/sun8iw21p1.dtsi
npu: npu@03050000 { compatible = "allwinner,npu"; reg = <0x0 0x03050000 0x0 0x1000>; device_type = "npu"; dev_name = "npu"; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_npu>, <&clk_pll_npux4>; clock-frequency = <504000000>; interrupt-names = "npu"; iommus = <&mmu_aw 6 1>; status = "okay"; power-domains = <&pd V853_PD_NPU>; };
一:如何使能电源控制以及电源状态确认
在dts确认配置power-domains后,电源默认打开,如果NPU模块电源需要关闭,需要内核支持CONFIG_SUNXI_POWER_DOMAINS=y;不用的时候应用层软件会默认将其关闭;root@TinaLinux:/# echo 0x070010a0,0x070010ac > /sys/class/sunxi_dump/dump && cat /sys/class/sunxi_dump/dump 0x070010a0: 0x00000002 0x00020000 0x00000000 0x00000000
如上为电源处理关闭状态
echo 0x070010a0,0x070010ac > /sys/class/sunxi_dump/dump && cat /sys/class/sunxi_dump/dump 0x070010a0: 0x00000001 0x00010000 0x00000000 0x00000000
如上电源处于开启状态
二:如何配置支持的频率
clock-frequency = <504000000>;代表现在设置的频率为504M;客户请严格按照原厂建议配置,或直接默认配置,勿随意更改其频点;
clocks = <&clk_npu>,<&clk_pll_npux4>;前面为模块时钟,后面为父时钟;
在[KERNEL_DIR]/drivers/clk/sunxi/clk-sun8iw21_tbl.c中有如下table代表目前所支持的频点;
/* PLL_NPU(n, d1, freq) F_N8X8_D1V1X1 */ struct sunxi_clk_factor_freq factor_pllnpux4_tbl[] = { PLLNPU(24, 1, 300000000U), PLLNPU(40, 1, 492000000U), PLLNPU(20, 0, 504000000U), PLLNPU(25, 0, 624000000U), PLLNPU(28, 0, 696000000U), PLLNPU(41, 0, 1008000000U), PLLNPU(57, 0, 1392000000U), }; 配置规则为: npu4x的计算公式为:24M * (N+1) / (M+1)N:0-254M:0-1 在clk-sun8iw21_tbl.c中截图部分添加新的频率组即可 如:492PLLNPU(40, 1, 492000000U),24*(40+1)/(1+1)= 492
通过clk_summary我们可以看到配置是否生效
root@TinaLinux:/# cat /sys/kernel/debug/clk/clk_summary pll_npux4 0 2 504000000 0 0 npu 0 1 504000000 0 0
当然我们也可以从probe的打印看到时钟的相关配置
[ 843.717406] Want set pclk rate(504000000) support(504000000) real(504000000) [ 843.725445] Want set mclk rate(504000000) support(504000000) real(504000000)
三:怎么用命令修改时钟的频率
reboot uboot #等待其处于uboot中后: fdt list /soc/npu fdt set /soc/npu clock-frequency <696000000> fdt list /soc/npu save boot
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