pinctrl与gpio子系统耦合出问题，芯片是v3s。
现在设备树中内容如下：

在PIO内加入：
my_btn_pins:my_btn_pins_{
		pins		= "PB0";
		function	= "gpio_in";
};
在根节点内加入：
myBtn{
		compatible		= "my_led_pb0";
		status 			= "okay";

		pinctrl-names	        = "default";
		pinctrl-0		= <&my_btn_pins>;
		
                mybtn-gpios		= <&pio 1 0 GPIO_ACTIVE_HIGH>;
};

我的platform里的probe通过以下代码获取引脚：

gDesc   = gpiod_get(&pdev->dev, "mybtn", GPIOD_IN);
gpiod_get_value(gDesc);

出现错误：

错误是重复申请同一个引脚。这是pinctrl与gpio起冲突了？
如果在上面的基础上去掉pinctrl-names pinctrl-0的话，没有错误。但是逻辑就不对了。因为这是个输入引脚，需要内部上拉才能使用。要是去掉mybtn-gpios的话，驱动里就没有操作该gpio的接口了，还是不行。
求助诸位大神提点一二。

@wj8331585 我的也没显示， 一片黑。

使用fel，下面的代码可以调通dram:

sunxi-fel writel	  	0x1C2015C	 0x0
sunxi-fel writel	  	0x1C200FC	 0x0
sunxi-fel writel	  	0x1C20060	 0x1000000
sunxi-fel writel	  	0x1C202C0	 0x1000000
sunxi-fel writel	  	0x1C20020	 0x1000
10	  		
sunxi-fel writel	  	0x1C20100	 0x0
1000	  		
sunxi-fel writel	  	0x1C20020	 0x80101D00
5500	  		
sunxi-fel writel	  	0x1C200F4	 0x10000
sunxi-fel writel	  	0x1C202C0	 0x1004000
sunxi-fel writel	  	0x1C20060	 0x1004000
sunxi-fel writel	  	0x1C2015C	 0x80000000
sunxi-fel writel	  	0x1C200FC	 0x80000000
sunxi-fel writel	  	0x1C200F4	 0x80000000
10	  		
sunxi-fel writel	  	0x1C6300C	 0xC00E
500	  		
sunxi-fel writel	  	0x1C62000	 0x4219E4
sunxi-fel writel	  	0x1C63030	 0x263
sunxi-fel writel	  	0x1C63034	 0x4
sunxi-fel writel	  	0x1C63038 	 0
sunxi-fel writel	  	0x1C6303C               0
sunxi-fel writel	  	0x1C63058	 0x8091B09
sunxi-fel writel	  	0x1C6305C	 0x2020C
sunxi-fel writel	  	0x1C63060	 0x3030307
sunxi-fel writel	  	0x1C63064	 0x200C
sunxi-fel writel	  	0x1C63068	 0x4010203
sunxi-fel writel	  	0x1C6306C	 0x5050403
sunxi-fel writel	  	0x1C63078	 0x90006610
sunxi-fel writel	  	0x1C63080	 0x2010101
sunxi-fel writel	  	0x1C63050	 0xB523281
sunxi-fel writel	  	0x1C63054	 0x16911941
sunxi-fel writel	  	0x1C63090	 0x2B003C
sunxi-fel writel	  	0x1C62090	 0x10190
sunxi-fel writel	  	0x1C62098	 0x1
sunxi-fel writel	  	0x1C62010	 0x200000D
sunxi-fel writel	  	0x1C62014	 0x800100
sunxi-fel writel	  	0x1C62018	 0x6000009
sunxi-fel writel	  	0x1C6201C	 0x1000400
sunxi-fel writel	  	0x1C62020	 0x200000D
sunxi-fel writel	  	0x1C62024	 0x600100
sunxi-fel writel	  	0x1C62028	 0x100000D
sunxi-fel writel	  	0x1C6202C	 0x200080
sunxi-fel writel	  	0x1C62030	 0x7000009
sunxi-fel writel	  	0x1C62034	 0x1000640
sunxi-fel writel	  	0x1C62038	 0x100000D
sunxi-fel writel	  	0x1C6203C	 0x200080
sunxi-fel writel	  	0x1C62040	 0x1000009
sunxi-fel writel	  	0x1C62044	 0x400080
sunxi-fel writel	  	0x1C62048	 0x100000D
sunxi-fel writel	  	0x1C6204C	 0x400080
sunxi-fel writel	  	0x1C62050	 0x100000D
sunxi-fel writel	  	0x1C62054	 0x400080
sunxi-fel writel	  	0x1C62058	 0x4000009
sunxi-fel writel	  	0x1C6205C	 0x400100
sunxi-fel writel	  	0x1C62060	 0x2000030D
sunxi-fel writel	  	0x1C62064	 0x4001800
sunxi-fel writel	  	0x1C62068	 0x4000009
sunxi-fel writel	  	0x1C6206C	 0x400120
sunxi-fel writel	  	0x1C63100	 0x4005400
sunxi-fel writel	  	0x1C63104	 0x4680C620
sunxi-fel writel	  	0x1C62800	 0x94BE6FA3
100	  		
sunxi-fel writel	  	0x1C63888	 0x80500010
sunxi-fel writel	  	0x1C62800	 0x0
100	  		
sunxi-fel writel	  	0x1C63344	 0x7C0002A1
sunxi-fel writel	  	0x1C633C4	 0x7C0002A1
sunxi-fel writel	  	0x1C63444	 0x20
sunxi-fel writel	  	0x1C634C4	 0x20
sunxi-fel writel	  	0x1C63208	 0x34A
sunxi-fel writel	  	0x1C63108	 0x2CC0
sunxi-fel writel	  	0x1C63100	 0x4000400
sunxi-fel writel	  	0x1C63108	 0x26C0
sunxi-fel writel	  	0x1C630C0	 0x81003087
sunxi-fel writel	  	0x1C63310	 0x10
sunxi-fel writel	  	0x1C63314	 0x10
sunxi-fel writel	  	0x1C63318	 0x10
l	  	
sunxi-fel writel	  	0x1C6331C	 0x10
sunxi-fel writel	  	0x1C63320	 0x10
sunxi-fel writel	  	0x1C63324	 0x10
sunxi-fel writel	  	0x1C63328	 0x10
sunxi-fel writel	  	0x1C6332C	 0x10
sunxi-fel writel	  	0x1C63330	 0x10
sunxi-fel writel	  	0x1C63390	 0xE
sunxi-fel writel	  	0x1C63394	 0xE
sunxi-fel writel	  	0x1C63398	 0xE
sunxi-fel writel	  	0x1C6339C	 0xE
sunxi-fel writel	  	0x1C633A0	 0xE
sunxi-fel writel	  	0x1C633A4	 0xE
sunxi-fel writel	  	0x1C633A8	 0xE
sunxi-fel writel	  	0x1C633AC	 0xE
sunxi-fel writel	  	0x1C633B0	 0xE
sunxi-fel writel	  	0x1C63410	 0x10
sunxi-fel writel	  	0x1C63414	 0x10
sunxi-fel writel	  	0x1C63418	 0x10
sunxi-fel writel	  	0x1C6341C	 0x10
sunxi-fel writel	  	0x1C63420	 0x10
sunxi-fel writel	  	0x1C63424	 0x10
sunxi-fel writel	  	0x1C63428	 0x10
sunxi-fel writel	  	0x1C6342C	 0x10
sunxi-fel writel	  	0x1C63430	 0x10
sunxi-fel writel	  	0x1C63490	 0xE
sunxi-fel writel	  	0x1C63494	 0xE
sunxi-fel writel	  	0x1C63498	 0xE
sunxi-fel writel	  	0x1C6349C	 0xE
sunxi-fel writel	  	0x1C634A0	 0xE
sunxi-fel writel	  	0x1C634A4	 0xE
sunxi-fel writel	  	0x1C634A8	 0xE
sunxi-fel writel	  	0x1C634AC	 0xE
sunxi-fel writel	  	0x1C634B0	 0xE
sunxi-fel writel	  	0x1C63100	 0x400
sunxi-fel writel	  	0x1C63334	 0x400
sunxi-fel writel	  	0x1C63338	 0x400
sunxi-fel writel	  	0x1C633B4	 0x400
sunxi-fel writel	  	0x1C633B8	 0x400
sunxi-fel writel	  	0x1C63434	 0xA00
sunxi-fel writel	  	0x1C63438	 0xA00
sunxi-fel writel	  	0x1C634B4	 0x600
sunxi-fel writel	  	0x1C634B8	 0x600
sunxi-fel writel	  	0x1C63100	 0x4000400
1	  	 	
50	  		
sunxi-fel writel	  	0x1C63150	 0xA0A0A0A
sunxi-fel writel	  	0x1C63140	 0xBBBBBB
sunxi-fel writel	  	0x1C63000	 0x8000000
sunxi-fel writel	  	0x1C63000	 0x3
sunxi-fel writel	  	0x1C63150	 0xA0A0A0A
sunxi-fel writel	  	0x1C63000	 0x8000000
sunxi-fel writel	  	0x1C63000	 0x3
sunxi-fel writel	  	0x1C63140	 0xBBBBBB
sunxi-fel writel	  	0x1C63000	 0x8000000
sunxi-fel writel	  	0x1C63000	 0x3
sunxi-fel writel	  	0x1C63150	 0xA0A0A0A
sunxi-fel writel	  	0x1C63000	 0x8000000
sunxi-fel writel	  	0x1C63000	 0x3
sunxi-fel writel	  	0x1C63140	 0x999999
sunxi-fel writel	  	0x1C63000	 0x8000000
sunxi-fel writel	  	0x1C63000	 0x3
sunxi-fel writel	  	0x1C63150	 0xE0E0E0E
sunxi-fel writel	  	0x1C63000	 0x8000000
sunxi-fel writel	  	0x1C63000	 0x3
sunxi-fel writel	  	0x1C63140	 0x333333
sunxi-fel writel	  	0x1C63000	 0x8000000
sunxi-fel writel	  	0x1C63000	 0x3
sunxi-fel writel	  	0x1C63150	 0x7070707
sunxi-fel writel	  	0x1C63000	 0x8000000
sunxi-fel writel	  	0x1C63000	 0x3
sunxi-fel writel	  	0x1C63148	 0xA0A0A0A
sunxi-fel writel	  	0x1C6314C	 0x7070E0E
sunxi-fel writel	  	0x1C63000	 0x571
sunxi-fel writel	  	0x1C6308C	 0x80200010
10	  		
sunxi-fel writel	  	0x1C6308C	 0x200010
10	  		
sunxi-fel writel	  	0x1C6310C	 0xAA0060
sunxi-fel writel	  	0x1C63140	 0x80333333
sunxi-fel writel	  	0x1C62094	 0xFFFFFFFF
sunxi-fel writel	  	0x1C63120	 0x201
1	  		
sunxi-fel writel	  	0x1C6307C	 0x4000400
sunxi-fel writel	  	0x1C63108	 0x6C0
sunxi-fel writel	  	0x1C620D0	 0x80103040
10	  		
sunxi-fel writel	  	0x1C62000	 0x4216F0
sunxi-fel writel	  	0x40000000	 0x0
sunxi-fel writel	  	0x40400000	 0xAA55AA55
sunxi-fel writel	  	0x40000000             0x0	
sunxi-fel writel	  	0x40800000	 0xAA55AA55
sunxi-fel writel	  	0x40000000	 0x0
sunxi-fel writel	  	0x41000000	 0xAA55AA55
sunxi-fel writel	  	0x1C62000	 0x421AC0
sunxi-fel writel	  	0x40000000	 0x0
sunxi-fel writel	  	0x40000200	 0xAA55AA55
sunxi-fel writel	  	0x40000000	 0x0
sunxi-fel writel	  	0x40000400	 0xAA55AA55
sunxi-fel writel	  	0x40000000	 0
sunxi-fel writel	  	0x40000800	 0xAA55AA55
sunxi-fel writel	  	0x1C62000	 0x4218C0

天呐，雷姆。
我才发现为什么我的程序不可以启动SDRAM的真正原因。

我今天在网上找了一个使用IAR的.mac的文件，功能是进入调试前初始化SDRAM，将其一点点剥离，通过fel烧录到板子上。因为别人使用IAR能初始化SDRAM，我提取出地址与值，使用fel应该能初始化SDRAM吧。
一百多行的写寄存器，硬是被我折腾了好几遍，可结果还是卡死（读0x41000000 提示timeout）。
这没道理呀，使用程序初始化可能因为我没有改好，导致初始化失败，但是直接写寄存器我可是核对了过了呀。
又在网上找到一个硬件测试软件DragonHD。用其测试串口通过，于是测试DRAM，可是失败。那到这里就知道是硬件的问题了。
由于板子是别人画的，我猜测可能是DDR供电异常（因为电源芯片SY8088很多）。
测量1.8V的供电，发现只有0.6-0.7V。
将两个反馈电阻去掉测量发现值正常，分别为150K、300K。
偷了个懒，不焊回电阻，准备直接测芯片输入电压。闻到一股糊味。被吓了一跳。赶紧拔掉电源，摸芯片发烫。
后悔并害怕，心想这芯片玩了，还得换芯片，说不定要拖到明天了。将两个新电阻补焊上后，再上电，发现仍然能通过fel识别芯片。
长舒一口气。
使用DragonHD测试，发现DDR通了。
狂喜，测试1.8V，发现正常了。
怀疑是电阻焊接不良吗？

不过，DDR可算是通了。
现在已经把裸机驱动调通了IO，TIMER，UART，GIC。这样就算是入坑了吧。

然后我就修改了一下，根据判断将除变量改为除常量，

static void clock_set_pll_ddr(u32_t clk)
{
	int n = 32;
	int k = 1;
	int m = 2;
	u32_t val;

	/* ddr pll rate = 24000000 * n * k / m=2 */
	if(clk > 24000000 * k * n / 2)
	{
		m = 1;
		if(clk > 24000000 * k * n / 1)
		{
			k = 2;
			val = (0x1 << 31);
			val |= (0x0 << 24);
			val |= (0x1 << 20);
			val |= ((((clk / (24000000 * 2 / 1)) - 1) & 0x1f) << 8);
			val |= (((2 - 1) & 0x3) << 4);
			val |= (((1 - 1) & 0x3) << 0);
			write32(S3_CCU_BASE + CCU_PLL_DDR0_CTRL, val);
			sdelay(5500);
		}else{
			val = (0x1 << 31);
			val |= (0x0 << 24);
			val |= (0x1 << 20);
			val |= ((((clk / (24000000 * 1 / 1)) - 1) & 0x1f) << 8);
			val |= (((k - 1) & 0x3) << 4);
			val |= (((1 - 1) & 0x3) << 0);
			write32(S3_CCU_BASE + CCU_PLL_DDR0_CTRL, val);
			sdelay(5500);
		}
	}else{
		//k=1 n=32 m=2

		val = (0x1 << 31);
		val |= (0x0 << 24);
		val |= (0x1 << 20);
		val |= ((((clk / (24000000 * 1 / 2)) - 1) & 0x1f) << 8);
		val |= (((1 - 1) & 0x3) << 4);
		val |= (((2 - 1) & 0x3) << 0);
		write32(S3_CCU_BASE + CCU_PLL_DDR0_CTRL, val);
		sdelay(5500);

	}
}

原来的函数为：

static void clock_set_pll_ddr(u32_t clk)
{
	int n = 32;
	int k = 1;
	int m = 2;
	u32_t val;

	/* ddr pll rate = 24000000 * n * k / m */
	if(clk > 24000000 * k * n / m)
	{
		m = 1;
		if(clk > 24000000 * k * n / m)
		{
			k = 2;
		}
	}

	val = (0x1 << 31);
	val |= (0x0 << 24);
	val |= (0x1 << 20);
	val |= ((((clk / (24000000 * k / m)) - 1) & 0x1f) << 8);
	val |= (((k - 1) & 0x3) << 4);
	val |= (((m - 1) & 0x3) << 0);
	write32(S3_CCU_BASE + CCU_PLL_DDR0_CTRL, val);
	sdelay(5500);
}

结果运行后，发现读取dram中的数据(位置0x41000000)程序直接卡死。

@awwwwa 主要我用的是vscode + make，没有除法选项这个配置

我按照上面几个文件编译，结果出现了如下错误：
dram.c:(.text+0x2a0): undefined reference to __aeabi_idiv' arm-linux-gnueabihf-ld: dram.c:(.text+0x2ca): undefined reference to __aeabi_idiv'
就是说a=3,b=1，
a/1可以
a/b不行
就是在这个函数里面：
static void clock_set_pll_ddr(u32_t clk)
不知怎么办

看了全志的DRAM，在手册里(包括Allwinner_V3s_User_Manual_V1.0)根本没有REG描述。
难道用全志的芯片这么折磨人吗。
看中V3S的内置DDR才选用，但现在DRAM根本不提怎么初始化。
大佬们谁有方法，帮一把，小弟跪求。