T113S3 主线内核 如何使能EMAC 25MHz时钟

[breaktime1903]

内核版本是6.12.35
内核日志如下:
[ 0.264623] dwmac-sun8i 4500000.ethernet: IRQ eth_wake_irq not found
[ 0.268356] ehci-platform 4200000.usb: irq 36, io mem 0x04200000
[ 0.272992] dwmac-sun8i 4500000.ethernet: IRQ eth_lpi not found
[ 0.273002] dwmac-sun8i 4500000.ethernet: IRQ sfty not found
[ 0.273382] dwmac-sun8i 4500000.ethernet: PTP uses main clock
[ 0.275620] hub 2-0:1.0: 1 port detected
[ 0.281819] dwmac-sun8i 4500000.ethernet: Current syscon value is not the default 58000 (expect 0)
[ 0.303961] ehci-platform 4200000.usb: USB 2.0 started, EHCI 1.00
[ 0.314219] dwmac-sun8i 4500000.ethernet: No HW DMA feature register supported
[ 0.319352] hub 1-0:1.0: USB hub found
[ 0.323451] dwmac-sun8i 4500000.ethernet: RX Checksum Offload Engine supported
[ 0.329956] hub 1-0:1.0: 1 port detected
[ 0.339431] dwmac-sun8i 4500000.ethernet: COE Type 2
[ 0.623933] usb 1-1: new high-speed USB device number 2 using ehci-platform
[ 0.629268] dwmac-sun8i 4500000.ethernet: TX Checksum insertion supported
[ 0.815287] hub 1-1:1.0: USB hub found
[ 0.819142] dwmac-sun8i 4500000.ethernet: Normal descriptors
[ 0.827001] hub 1-1:1.0: 4 ports detected
[ 0.835403] dwmac-sun8i 4500000.ethernet: Chain mode enabled
[ 1.263936] usb 1-1.3: new high-speed USB device number 3 using ehci-platform
[ 1.537277] dwmac-sun8i 4500000.ethernet: EMAC reset timeout
[ 1.542964] dwmac-sun8i 4500000.ethernet eth0: stmmac_dvr_remove: removing driver
[ 1.584892] dwmac-sun8i 4500000.ethernet: probe with driver dwmac-sun8i failed with error -110
设备树配置如下:
&emac {
pinctrl-0 = <&rmii_pg_clk25m_pins>;
pinctrl-names = "default";
phy-mode = "rmii";
phy-handle = <&ip101gr>;
phy-supply = <&reg_3v3>;
clocks = <&ccu CLK_BUS_EMAC>,<&ccu CLK_EMAC_25M>;
clock-names = "stmmaceth","ephy25m";
use_ephy25m = <1>;
status = "okay";
};

&mdio{
status = "okay";
reset-assert-us = <10000>;
reset-post-delay-us = <150000>;
reset-deassert-us = <150000>;
reset-gpios = <&pio 6 6 GPIO_ACTIVE_LOW>; /* PG6 */
ip101gr: ethernet-phy@0 {
// compatible = "ethernet-phy-ieee802.3-c22";
// compatible = "ethernet-phy-id001c.c816";
compatible = "ethernet-phy-id0243.0c54","ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};

现在的问题是我没办法识别出PHY，而且用示波器去看EPHY-25M引脚也没有时钟输出，问一下主线内核该怎么开启内部时钟输出？

[awwwwa]

主线内核需要IRC去问一下主线的实现，https://linux-sunxi.org/IRC

[asf66]

参照这个补丁修改对应的phy驱动：
https://lore.kernel.org/netdev/20230605154010.49611-2-detlev.casanova@collabora.com/T/#u
然后在设备树phy节点添加 clocks = <&ccu CLK_EMAC_25M>;

[asf66]

我对icplus的修改（内核版本6.12.0）：

diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index a00a667454a9..411ca8fbb30e 100644
--- a/drivers/net/phy/icplus.c
+++ b/drivers/net/phy/icplus.c
@@ -21,6 +21,7 @@
 #include <linux/ethtool.h>
 #include <linux/phy.h>
 #include <linux/property.h>
+#include <linux/clk.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
@@ -89,6 +90,7 @@ static struct ip101g_hw_stat ip101g_hw_stats[] = {
 struct ip101a_g_phy_priv {
 	enum ip101gr_sel_intr32 sel_intr32;
 	u64 stats[ARRAY_SIZE(ip101g_hw_stats)];
+	struct clk *clk;
 };
 
 static int ip175c_config_init(struct phy_device *phydev)
@@ -210,6 +212,11 @@ static int ip101a_g_probe(struct phy_device *phydev)
 	if (!priv)
 		return -ENOMEM;
 
+	priv->clk = devm_clk_get_optional_enabled(dev, NULL);
+	if (IS_ERR(priv->clk))
+		return dev_err_probe(dev, PTR_ERR(priv->clk),
+				     "failed to get phy clock\n");
+
 	/* Both functions (RX error and interrupt status) are sharing the same
 	 * pin on the 32-pin IP101GR, so this is an exclusive choice.
 	 */
@@ -571,6 +578,33 @@ static void ip101g_get_stats(struct phy_device *phydev,
 		data[i] = ip101g_get_stat(phydev, i);
 }
 
+static int ip101a_g_suspend(struct phy_device *phydev)
+{
+	struct ip101a_g_phy_priv *priv = phydev->priv;
+	int ret = 0;
+
+	if (!phydev->wol_enabled) {
+		ret = genphy_suspend(phydev);
+
+		if (ret)
+			return ret;
+
+		clk_disable_unprepare(priv->clk);
+	}
+
+	return ret;
+}
+
+static int ip101a_g_resume(struct phy_device *phydev)
+{
+	struct ip101a_g_phy_priv *priv = phydev->priv;
+
+	if (!phydev->wol_enabled)
++		clk_prepare_enable(priv->clk);
+
+	return genphy_resume(phydev);
+}
+
 static struct phy_driver icplus_driver[] = {
 {
 	PHY_ID_MATCH_MODEL(IP175C_PHY_ID),
@@ -601,8 +635,9 @@ static struct phy_driver icplus_driver[] = {
 	.config_aneg	= ip101a_g_config_aneg,
 	.read_status	= ip101a_g_read_status,
 	.soft_reset	= genphy_soft_reset,
-	.suspend	= genphy_suspend,
-	.resume		= genphy_resume,
+	.suspend	= ip101a_g_suspend,
+	.resume		= ip101a_g_resume,
+	.flags		= PHY_ALWAYS_CALL_SUSPEND,
 }, {
 	.name		= "ICPlus IP101G",
 	.match_phy_device = ip101g_match_phy_device,
@@ -618,8 +653,9 @@ static struct phy_driver icplus_driver[] = {
 	.get_sset_count = ip101g_get_sset_count,
 	.get_strings	= ip101g_get_strings,
 	.get_stats	= ip101g_get_stats,
-	.suspend	= genphy_suspend,
-	.resume		= genphy_resume,
+	.suspend	= ip101a_g_suspend,
+	.resume		= ip101a_g_resume,
+	.flags		= PHY_ALWAYS_CALL_SUSPEND,
 } };
 
 module_phy_driver(icplus_driver);

&emac {
	pinctrl-names = "default";
	pinctrl-0 = <&rmii_pg_pins>;
	phy-mode = "rmii";
	phy-handle = <&phy1>;
	phy-supply = <&reg_vcc3v3>;
	status = "okay";
};

&mdio {
	status = "okay";

	phy1: ethernet-phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <1>;
		reset-gpios = <&pio 6 6 GPIO_ACTIVE_LOW>; /* PG6 */
		reset-assert-us = <5000>;
		reset-deassert-us = <5000>;
		clocks = <&ccu CLK_EMAC_25M>;
	};
};

[asf66]

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