@ftwtwzy 板子很漂亮啊，自己手焊接的还是找工厂贴片的？
S
suitjune 发布的帖子
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回复: T113-S3进不了内核问题咨询发布在 其它全志芯片讨论区
@yuzukitsuru 在 T113-S3进不了内核问题咨询 中说：
bootargs里加一个
panic=5你就会发现是panic了请问为什么会发生panic?那些多媒体的组件不能移除？还是我哪个操作会导致这个panic?
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T113-S3进不了内核问题咨询发布在 其它全志芯片讨论区
T113-S3+longan sdk
之前是可以进入内核，uart2也会打印内核信息的，用的EVM板默认的uart2。
但是前两天我把csi,ve,g2d这些音视频功能从内核中移除了，然后board.dts和sun8iw20p1.dtsi中用不到的音视频组件status改为"disabled"，启动后出来下面两句，就没了。
[02.774][mmc]: MMC Device 2 not found
[02.778][mmc]: mmc 2 not find, so not exit可能什么问题？csi,ve这些音视频组件在内核中不能移除？还是sun8iw20p1.dtsi这里面音视频组件不能改 disabled?还是可能串口变化了（但是我没改过串口）？
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T113 做USB主机连接4G模块，时断时续发布在 其它全志芯片讨论区
HI，各位大佬，请教下：我用T113连接4G模块，不停打印 断开连接，连接，如下。。。可能是什么问题呢？
测量4G模块电源正常，USB DP DM没接反，有时也会显示出4个设备和枚举出来的一堆串口，可能是dts吗？高速信号layout的不好？
&usbc1 {
device_type = "usbc1";
usb_port_type = <0x01>;
usb_regulator_io = "nocare";
status = "okay";
};
上面是我的USB1口 DTS下面是串口打印：
[ 5.543126] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 5.648240] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect
[ 5.983112] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 5.992030] usb usb1-port1: Cannot enable. Maybe the USB cable is bad?
[ 6.118241] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect
[ 6.373139] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 6.588242] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect
[ 6.813122] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 6.838240] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect
[ 7.033142] usb usb1-port1: Cannot enable. Maybe the USB cable is bad?
[ 7.040503] usb usb1-port1: attempt power cycle
[ 7.463116] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 7.513157] usb usb2-port1: Cannot enable. Maybe the USB cable is bad?
[ 7.536238] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect
[ 7.903116] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 7.938236] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect
[ 8.343114] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 8.352034] usb usb1-port1: Cannot enable. Maybe the USB cable is bad?
[ 8.408240] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect
[ 8.653112] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 8.878240] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect
[ 9.313116] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 9.348239] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect
[ 9.533146] usb usb1-port1: Cannot enable. Maybe the USB cable is bad?
[ 9.540507] usb usb1-port1: unable to enumerate USB device
[ 9.546722] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 9.583158] usb usb2-port1: Cannot enable. Maybe the USB cable is bad?
[ 9.590607] usb usb2-port1: attempt power cycle
[ 9.948238] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect
[ 10.153132] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device disconnect
[ 10.358238] sunxi-ehci 4200000.ehci1-controller: ehci_irq: highspeed device connect -
T113 sdNand启动经常在跑到根文件系统时挂掉，可能是什么原因？发布在 其它全志芯片讨论区
根文件系统是ext4,电源查了也正常，经常启动时跑到根文件系统就打印下面错误，有时再断电上电自己就好了，请问可能什么原因？换ext3?感觉像是软件问题。
[ 15.443822] sun8iw20-pinctrl pio: pin-131 (5800800.vind) status -22
[ 15.450873] sun8iw20-pinctrl pio: could not request pin 131 (PE3) from group PE3 on device pio
[ 15.460660] sunxi-vin-media 5800800.vind: Error applying setting, reverse things back
[ 15.469515] [VIN_ERR]mclk0 request pin handle failed!
[ 15.475627] [VIN_ERR]registering n5, No such device!
[ 15.523436] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[ 15.545155] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[ 15.558190] clk: Not disabling unused clocks
[ 15.558236] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[ 15.563014] ALSA device list:
[ 15.572679] cfg80211: failed to load regulatory.db
[ 15.581538] #0: audiocodec
[ 15.584805] alloc_fd: slot 0 not NULL!
[ 15.589509] VFS: Cannot open root device "mmcblk0p5" or unknown-block(0,0): error -6
[ 15.598216] Please append a correct "root=" boot option; here are the available partitions:
[ 15.607620] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
[ 15.616893] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.4.61+ #5
[ 15.623627] Hardware name: Generic DT based system
[ 15.629021] [<c010e2f8>] (unwind_backtrace) from [<c010a8bc>] (show_stack+0x10/0x14)
[ 15.637712] [<c010a8bc>] (show_stack) from [<c0720a90>] (dump_stack+0x7c/0x98)
[ 15.645820] [<c0720a90>] (dump_stack) from [<c0119808>] (panic+0x104/0x3dc)
[ 15.653637] [<c0119808>] (panic) from [<c0b01294>] (mount_block_root+0x278/0x32c)
[ 15.662035] [<c0b01294>] (mount_block_root) from [<c0b014e4>] (prepare_namespace+0x118/0x178)
[ 15.671603] [<c0b014e4>] (prepare_namespace) from [<c073513c>] (kernel_init+0x8/0x118)
[ 15.680487] [<c073513c>] (kernel_init) from [<c01010e8>] (ret_from_fork+0x14/0x2c)
[ 15.688975] Exception stack(0xc6817fb0 to 0xc6817ff8)
[ 15.694639] 7fa0: 00000000 00000000 00000000 00000000
[ 15.703812] 7fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 15.712984] 7fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 15.720412] CPU1: stopping
[ 15.723448] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.4.61+ #5
[ 15.730182] Hardware name: Generic DT based system
[ 15.735560] [<c010e2f8>] (unwind_backtrace) from [<c010a8bc>] (show_stack+0x10/0x14)
[ 15.744248] [<c010a8bc>] (show_stack) from [<c0720a90>] (dump_stack+0x7c/0x98)
[ 15.752351] [<c0720a90>] (dump_stack) from [<c010c6b0>] (handle_IPI+0xc0/0x168)
[ 15.760554] [<c010c6b0>] (handle_IPI) from [<c036bf14>] (gic_handle_irq+0x70/0x78)
[ 15.769048] [<c036bf14>] (gic_handle_irq) from [<c01021cc>] (__irq_svc+0x6c/0xa8)
[ 15.777438] Exception stack(0xc6841f80 to 0xc6841fc8)
[ 15.783104] 1f80: 00000d2c c6ec4534 00000000 c0114d20 00000002 c6840000 c0c03de8 c0c03e24
[ 15.792278] 1fa0: 4000406a 410fc075 00000000 00000000 c0c718b0 c6841fd0 c0107fb8 c0107fbc
[ 15.801448] 1fc0: 60000113 ffffffff
[ 15.805363] [<c01021cc>] (__irq_svc) from [<c0107fbc>] (arch_cpu_idle+0x2c/0x38)
[ 15.813663] [<c0107fbc>] (arch_cpu_idle) from [<c013e3d0>] (do_idle+0xb8/0x120)
[ 15.821864] [<c013e3d0>] (do_idle) from [<c013e6d4>] (cpu_startup_entry+0x18/0x1c)
[ 15.830356] [<c013e6d4>] (cpu_startup_entry) from [<40102c0c>] (0x40102c0c)
[ 15.838177] ---[ end Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) ]--- -
D1S/T113根文件系统分区在哪里设置？发布在 其它全志芯片讨论区
全志自己有sys_partition.fex，在那里面可以设置rootfs的大小，但是在buildroot里又可以进filesystem images中设置exact size，这两个大小要如何关联设置？一样大？还是谁比谁大点儿？
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T113-S3 24M晶振出来的波形，幅度是多少？发布在 其它全志芯片讨论区
T113-S3 24M晶振出来的波形，幅度是多少？
PIN22 PIN23 DXIN DXOUT的波形幅度多少，我用示波器看是1.0V峰峰值，这正确吗，我看全志设计指南要求直流电压1.4V，也就是峰峰值3V？ -
回复: 请教T113-S3调试IP101GRI，不能发送的问题。发布在 其它全志芯片讨论区
@aozima
<1> 我用的T113，50M时钟要用外部PHY提供；
<2> T113，没有50M时钟输出；
<3> 我用的PEx这组IO。
<4> PG11？我用的应该是PE10，是对外输出25M时钟，如果你的PHY需要25M时钟，可以用全志SOC片内这个时钟输出，但要注意一点，就是这个时钟，目前我看，是ifconfig eth0 up后，他才可以输出，当然，想早输出，可能改内核驱动也行？我没试过。但是有的PHY可能要复位后，时钟立马给过去，建议还是保留25M外部晶振，到时候电阻跳接。 -
回复: 请教T113-S3调试IP101GRI，不能发送的问题。发布在 其它全志芯片讨论区
@aozima 对大佬万分感谢，我测试了很久，我看了好久，还拍照CPU那部分引脚，焊接是好的，PHY那边我也测试了发送那几个淫家有信号，可能CRS_DV那边也关联发送吧，我找了一周这个问题，刚才看你回复后又测试了一下，把T113那部分引脚又焊接了一下，好了，非常感谢，非常感谢。
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回复: 请教T113-S3调试IP101GRI，不能发送的问题。发布在 其它全志芯片讨论区
@aozima 谢谢指导，我把phy设置成loopback测试后，ping一个外面地址，发送包变多了，接收包不长，说明还是发送不出去，也就是RMII接口发送和PHY之间有问题。
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回复: 请教T113-S3调试IP101GRI，不能发送的问题。发布在 其它全志芯片讨论区
@aozima 自协商应该是不过RMII接口的，就是MDC接口让PHY自己去协商了吧，我的理解是这样。我测量了PHY这边TXD0，TXD1，TX_EN都有信号的，TXCK也有，如果TXCK没信号，直接就段错误，收发都有计数器都不是0，都会涨的，loopback我也测试了，我是用系统自己带的那个loopback，我再用ethtool或者mii-diagl测试下。我都怀疑longan sdk这个版本以太网通信 是不是有问题。。。。
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请教T113-S3调试IP101GRI，不能发送的问题。发布在 其它全志芯片讨论区
问题描述：T113-S3，调试IP101GRI，采用RMII接口，longan sdk v1.0，可以识别到百兆全双工，ping不通；
调试步骤：
<1> 用tcpdump在板子这边抓，可以看到能接收对端过来的ARP包，打印也返回数据了，但实际上对端用wireshark抓，看不到包，看不到返回;
<2> 用示波器测量RJ45座子（HR911105A）的两个发送引脚，也有波形，但是对端就是看不到东西。包括RMII这边，测量TXD0，TXD1也是有信号的。ACT灯在板子往外PING时候也闪，不PING时候就不闪。
清大佬指点一下。 -
回复: RMII接口调试全志的外置PHY网口时，tx-delay，rx-delay参数怎么填？发布在 其它全志芯片讨论区
@qq1847123212 有文档提过吗？现在是网口能接收到数据，但发送不出去。。。
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RMII接口调试全志的外置PHY网口时，tx-delay，rx-delay参数怎么填？发布在 其它全志芯片讨论区
目前用T113-S3，ifconfig eth0 up可以看到link is up,100M全双工，但是ping对端设备不通，ifconfg eth0可以看到收发包数量是有的，是RMII对接的ip101gri，可能有什么问题呢?目前怀疑是RMII接口SOC和PHY之间有问题，但该测试的都测试了，时钟，电源什么都正常。tx-delay，rx-delay可以填0吗？
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phoenixsuit v1.17后面的版本哪个大佬请提供下？发布在 编译和烧写问题专区
phoenixsuit v1.17后面的版本哪个大佬请提供下？后面T113-S3需要高版本的phoenixsuit，哪个大佬清提供一下，多谢。
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请问如果D1S没有程序，上电后LDOA和LDOB，分别输出电压多少？发布在 D1系列-RISC-V
请问如果D1S没有程序，上电后LDOA和LDOB，分别输出电压多少？
其实我是调试的T113-S3，但这个芯片用的少吧，我测试了是1.0V和0.9V，而且通过xfel，USB识别不到，所以想问下D1S这两个是多少，应该都是一样芯片。 -
回复: 简单修改 哪吒d1 tina sdk 的 sys_config.fex 和 board.dts，让D1s先把Linux跑起来。发布在 D1系列-RISC-V
@whycan 在 简单修改 哪吒d1 tina sdk 的 sys_config.fex 和 board.dts，让D1s先把Linux跑起来。 中说：
最终修改两个文件即可：
device/config/chips/d1/configs/nezha/sys_config.fex
;sunxi platform application ;--------------------------------------------------------------------------------------------------------- ; 说明： 脚本中的字符串区分大小写，用户可以修改"="后面的数值，但是不要修改前面的字符串 ; 描述gpio的形式：Port:端口+组内序号<功能分配><内部电阻状态><驱动能力><输出电平状态> ;--------------------------------------------------------------------------------------------------------- ;--------------------------------------------------------------------------------- ; version:版本1.00 ; machine:板级文件名 ;--------------------------------------------------------------------------------- [product] version = "100" machine = "nezha" ;---------------------------------------------------------------------------------- ;debug_mode = 0-close printf, > 0-open printf ;---------------------------------------------------------------------------------- [platform] debug_mode = 8 ;---------------------------------------------------------------------------------- ;storage_type = boot medium, 0-nand, 1-sd, 2-emmc, 3-nor, 4-emmc3, 5-spinand -1(defualt)auto scan ;---------------------------------------------------------------------------------- [target] storage_type = 5 ;---------------------------------------------------------------------------------- ;card_ctrl -卡量产相关的控制器选择0 | ;card_high_speed -速度模式 0为低速，1为高速| ;card_line -4：4线卡，8：8线卡| ;sdc_d1 -sdc卡数据1线信号的GPIO配置 | ;sdc_d0 -sdc卡数据0线信号的GPIO配置 | ;sdc_clk -sdc卡时钟信号的GPIO配置 | ;sdc_cmd -sdc命令信号的GPIO配置| ;sdc_d3 -sdc卡数据3线信号的GPIO配置 | ;sdc_d2 -sdc卡数据2线信号的GPIO配置 | ;---------------------------------------------------------------------------------- [card0_boot_para] card_ctrl = 0 card_high_speed = 1 card_line = 4 sdc_d1 = port:PF0<2><1><2><default> sdc_d0 = port:PF1<2><1><2><default> sdc_clk = port:PF2<2><1><2><default> sdc_cmd = port:PF3<2><1><2><default> sdc_d3 = port:PF4<2><1><2><default> sdc_d2 = port:PF5<2><1><2><default> bus-width = 4 cap-sd-highspeed = cap-wait-while-busy = no-sdio = no-mmc = sunxi-power-save-mode = ;---------------------------------------------------------------------------------- ;card_ctrl -卡启动控制器选择2 ;card_high_speed -速度模式 0为低速，1为高速 ;card_line -4：4线卡，8：8线卡 ;sdc_ds -ds信号的GPIO配置 ;sdc_d1 -sdc卡数据1线信号的GPIO配置 ;sdc_d0 -sdc卡数据0线信号的GPIO配置 ;sdc_clk -sdc卡时钟信号的GPIO配置 ;sdc_cmd -sdc命令信号的GPIO配置 ;sdc_d3 -sdc卡数据3线信号的GPIO配置 ;sdc_d2 -sdc卡数据2线信号的GPIO配置 ;sdc_d4 -sdc卡数据4线信号的GPIO配置 ;sdc_d5 -sdc卡数据5线信号的GPIO配置 ;sdc_d6 -sdc卡数据6线信号的GPIO配置 ;sdc_d7 -sdc卡数据7线信号的GPIO配置 ;sdc_emmc_rst -emmc_rst信号的GPIO配置 ;sdc_ex_dly_used -ex_dly_used信号 ;sdc_io_1v8 -sdc_io_1v8高速emmc模式配置 ;---------------------------------------------------------------------------------- [card2_boot_para] card_ctrl = 2 card_high_speed = 1 card_line = 8 sdc_clk = port:PF25<2><1><3><default> sdc_cmd = port:PF24<2><1><3><default> sdc_d0 = port:PF16<2><1><3><default> sdc_d1 = port:PF17<2><1><3><default> sdc_d2 = port:PF18<2><1><3><default> sdc_d3 = port:PF19<2><1><3><default> sdc_d4 = port:PF20<2><1><3><default> sdc_d5 = port:PF21<2><1><3><default> sdc_d6 = port:PF22<2><1><3><default> sdc_d7 = port:PF23<2><1><3><default> sdc_emmc_rst = port:PF31<2><1><3><default> sdc_ds = port:PF27<2><1><3><default> ;---------------------------------------------------------------------------------- ;jtag_enable |JTAG使能 | ;jtag_ms |测试模式选择输入(TMS) 的GPIO配置| ;jtag_ck |测试时钟输入(CLK) 的GPIO配置 | ;jtag_do |测试数据输出(TDO) 的GPIO配置 | ;jtag_di |测试数据输出(TDI) 的GPIO配置 | ;---------------------------------------------------------------------------------- [jtag_para] jtag_enable = 0 jtag_ms = port:PF0<4><default><default><default> jtag_ck = port:PF5<4><default><default><default> jtag_do = port:PF3<4><default><default><default> jtag_di = port:PF1<4><default><default><default> ;***************************************************************************** ; ;dram select configuration ; ;select_mode : dram模式选择, 0:不进行自动识别 ; 1:gpio识别模式(dram_para, dram_para1-15, 共16组有效) ; 2:gpadc识别模式(dram_para, dram_para1-7, 共8组有效) ; 3:1个IO+gpadc识别模式(dram_para, dram_para1-15, 共16组有效)。其中IO配置优先级按select_gpio0>select_gpio1>select_gpio2>select_gpio3 ;gpadc_channel : 选择gpadc通道 有效值(0-3) ;select_gpio1-4 : 选择gpio pin ;***************************************************************************** [dram_select_para] select_mode = 0 gpadc_channel = 1 select_gpio0 = port:PB7<0><1><default><default> select_gpio1 = port:PB4<0><1><default><default> select_gpio2 = port:PH1<0><1><default><default> select_gpio3 = port:PH0<0><1><default><default> ;***************************************************************************** ;sdram configuration ; ;***************************************************************************** [dram_para] dram_clk = 528 dram_type = 2 dram_zq = 0x07b7bf9 dram_odt_en = 0x00 dram_para1 = 0x000000d2 dram_para2 = 0x00000000 dram_mr0 = 0x00000E73 dram_mr1 = 0x02 dram_mr2 = 0x0 dram_mr3 = 0x0 dram_tpr0 = 0x00471992 dram_tpr1 = 0x0131A10C dram_tpr2 = 0x00057041 dram_tpr3 = 0xB4787896 dram_tpr4 = 0x0 dram_tpr5 = 0x48484848 dram_tpr6 = 0x48 dram_tpr7 = 0x1621121e dram_tpr8 = 0x0 dram_tpr9 = 0x0 dram_tpr10 = 0x00000000 dram_tpr11 = 0x00030010 dram_tpr12 = 0x00000035 dram_tpr13 = 0x34000000 [dram_para1] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para2] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para3] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para4] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para5] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para6] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para7] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para8] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para9] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para10] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para11] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para12] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para13] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para14] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 [dram_para15] dram_clk = 672 dram_type = 7 dram_dx_odt = 0x06060606 dram_dx_dri = 0x0c0c0c0c dram_ca_dri = 0x1919 dram_para0 = 0x16171411 dram_para1 = 0x30eb dram_para2 = 0x0000 dram_mr0 = 0x0 dram_mr1 = 0xc3 dram_mr2 = 0x6 dram_mr3 = 0x2 dram_mr4 = 0x0 dram_mr5 = 0x0 dram_mr6 = 0x0 dram_mr11 = 0x0 dram_mr12 = 0x0 dram_mr13 = 0x0 dram_mr14 = 0x0 dram_mr16 = 0x0 dram_mr17 = 0x0 dram_mr22 = 0x0 dram_tpr0 = 0x0 dram_tpr1 = 0x0 dram_tpr2 = 0x0 dram_tpr3 = 0x0 dram_tpr6 = 0x2fb48080 dram_tpr10 = 0x002f876b dram_tpr11 = 0x10120c05 dram_tpr12 = 0x12121111 dram_tpr13 = 0x61 dram_tpr14 = 0x211e1e22 ;---------------------------------------------------------------------------------- ;twi configuration ;twi_used 0：关闭, 1：打开 ;twi_port 0:twi0, 1:twi1, 2:twi2, 3:twi3, 4:twi4, 5:twi5, 6:r_twi0, 7:r_twi1 ;twi_scl boot0 scl的GPIO配置 ;twi_sda boot0 sda的GPIO配置 ;---------------------------------------------------------------------------------- [twi_para] twi_used = 0 twi_port = 2 twi_scl = port:PG14<3><1><default><default> twi_sda = port:PG15<3><1><default><default> ;---------------------------------------------------------------------------------- ;uart configuration ;uart_debug_port |Boot串口控制器编号 | ;uart_debug_tx |Boot串口发送的GPIO配置| ;uart_debug_rx |Boot串口接收的GPIO配置 | ;---------------------------------------------------------------------------------- [uart_para] uart_debug_port = 0 uart_debug_tx = port:PE02<6><1><default><default> uart_debug_rx = port:PE03<6><1><default><default> ;---------------------------------------------------------------------------------- ;dram_region_mbytes :设置drm大小以bytes为单位 ;---------------------------------------------------------------------------------- [secure] dram_region_mbytes = 80 drm_region_mbytes = 0 drm_region_start_mbytes = 0device/config/chips/d1/configs/nezha/board.dts
/* * Allwinner Technology CO., Ltd. sun20iw1p1 fpga. * * fpga support. */ /dts-v1/; #include "sun20iw1p1.dtsi" /{ compatible = "allwinner,d1", "arm,sun20iw1p1", "allwinner,sun20iw1p1"; aliases { dsp0 = &dsp0; dsp0_gpio_int= &dsp0_gpio_int; }; dsp0: dsp0 { compatible = "allwinner,sun20iw1-dsp"; status = "okay"; }; dsp0_gpio_int: dsp0_gpio_int { compatible = "allwinner,sun20iw1-dsp-gpio-int"; pin-group = "PB", "PC", "PD", "PE"; status = "disabled"; }; reg_vdd_cpu: vdd-cpu { compatible = "sunxi-pwm-regulator"; pwms = <&pwm 0 5000 0>; regulator-name = "vdd_cpu"; regulator-min-microvolt = <810000>; regulator-max-microvolt = <1160000>; regulator-ramp-delay = <25>; regulator-always-on; regulator-boot-on; status = "okay"; }; reg_usb1_vbus: usb1-vbus { compatible = "regulator-fixed"; regulator-name = "usb1-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-enable-ramp-delay = <1000>; gpio = <&pio PD 19 GPIO_ACTIVE_HIGH>; enable-active-high; }; }; &CPU0 { cpu-supply = <®_vdd_cpu>; }; &pio { sdc0_pins_a: sdc0@0 { allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; allwinner,function = "sdc0"; allwinner,muxsel = <2>; allwinner,drive = <3>; allwinner,pull = <1>; pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "sdc0"; drive-strength = <30>; bias-pull-up; power-source = <3300>; }; sdc0_pins_b: sdc0@1 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "sdc0"; drive-strength = <30>; bias-pull-up; power-source = <1800>; }; sdc0_pins_c: sdc0@2 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "gpio_in"; }; /* TODO: add jtag pin */ sdc0_pins_d: sdc0@3 { pins = "PF2", "PF4"; function = "uart0"; drive-strength = <10>; bias-pull-up; }; sdc0_pins_e: sdc0@4 { pins = "PF0", "PF1", "PF3", "PF5"; function = "jtag"; drive-strength = <10>; bias-pull-up; }; sdc1_pins_a: sdc1@0 { pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; function = "sdc1"; drive-strength = <30>; bias-pull-up; }; sdc1_pins_b: sdc1@1 { pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; function = "gpio_in"; }; sdc2_pins_a: sdc2@0 { allwinner,pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; allwinner,function = "sdc2"; allwinner,muxsel = <3>; allwinner,drive = <3>; allwinner,pull = <1>; pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; function = "sdc2"; drive-strength = <30>; bias-pull-up; }; sdc2_pins_b: sdc2@1 { pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; function = "gpio_in"; }; wlan_pins_a:wlan@0 { pins = "PG11"; function = "clk_fanout1"; }; uart0_pins_a: uart0_pins@0 { /* For nezha board */ pins = "PB8", "PB9"; function = "uart0"; drive-strength = <10>; bias-pull-up; }; uart0_pins_b: uart0_pins@1 { /* For nezha board */ pins = "PB8", "PB9"; function = "gpio_in"; }; uart1_pins_a: uart1_pins@0 { /* For EVB1 board */ pins = "PG6", "PG7", "PG8", "PG9"; function = "uart1"; drive-strength = <10>; bias-pull-up; }; uart1_pins_b: uart1_pins { /* For EVB1 board */ pins = "PG6", "PG7", "PG8", "PG9"; function = "gpio_in"; }; uart2_pins_a: uart2_pins@0 { /* For EVB1 board */ pins = "PC0", "PC1"; function = "uart2"; drive-strength = <10>; bias-pull-up; }; uart2_pins_b: uart2_pins@1 { /* For EVB1 board */ pins = "PC0", "PC1"; function = "gpio_in"; }; uart3_pins_a: uart3_pins@0 { /* For EVB1 board */ pins = "PD10", "PD11"; function = "uart3"; muxsel = <5>; drive-strength = <10>; bias-pull-up; }; twi0_pins_a: twi0@0 { pins = "PB10", "PB11"; /*sck sda*/ function = "twi0"; drive-strength = <10>; }; twi0_pins_b: twi0@1 { pins = "PB10", "PB11"; function = "gpio_in"; }; twi1_pins_a: twi1@0 { pins = "PB4", "PB5"; function = "twi1"; drive-strength = <10>; }; twi1_pins_b: twi1@1 { pins = "PB4", "PB5"; function = "gpio_in"; }; twi2_pins_a: twi2@0 { pins = "PB0", "PB1"; function = "twi2"; drive-strength = <10>; }; twi2_pins_b: twi2@1 { pins = "PB0", "PB1"; function = "gpio_in"; }; twi3_pins_a: twi3@0 { pins = "PB6", "PB7"; function = "twi3"; drive-strength = <10>; }; twi3_pins_b: twi3@1 { pins = "PB6", "PB7"; function = "gpio_in"; }; gmac_pins_a: gmac@0 { pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5", "PE6", "PE7", "PE8", "PE9", "PE10", "PE11", "PE12", "PE13", "PE14", "PE15"; function = "gmac0"; drive-strength = <10>; }; gmac_pins_b: gmac@1 { pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5", "PE6", "PE7", "PE8", "PE9", "PE10", "PE11", "PE12", "PE13", "PE14", "PE15"; function = "gpio_in"; }; dmic_pins_a: dmic@0 { /* DMIC_PIN: CLK, DATA0, DATA1, DATA2 */ pins = "PE17", "PB11", "PB10", "PD17"; function = "dmic"; drive-strength = <20>; bias-disable; }; dmic_pins_b: dmic@1 { pins = "PE17", "PB11", "PB10", "PD17"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; daudio0_pins_a: daudio0@0 { pins = "PE17", "PE16", "PE15", "PE14", "PE13"; function = "i2s0"; drive-strength = <20>; bias-disable; }; daudio0_pins_b: daudio0_sleep@0 { pins = "PE17", "PE16", "PE15", "PE14", "PE13"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; daudio1_pins_a: daudio1@0 { pins = "PG11", "PG12", "PG13", "PG14", "PG15"; function = "i2s1"; drive-strength = <20>; bias-disable; }; daudio1_pins_b: daudio1_sleep@0 { pins = "PG11", "PG12", "PG13", "PG14", "PG15"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; daudio2_pins_a: daudio2@0 { /* I2S_PIN: MCLK, BCLK, LRCK */ pins = "PB7", "PB5", "PB6"; function = "i2s2"; drive-strength = <20>; bias-disable; }; daudio2_pins_b: daudio2@1 { /* I2S_PIN: DOUT0 */ pins = "PB4"; function = "i2s2_dout"; drive-strength = <20>; bias-disable; }; daudio2_pins_c: daudio2@2 { /* I2S_PIN: DIN0 */ pins = "PB3"; function = "i2s2_din"; drive-strength = <20>; bias-disable; }; daudio2_pins_d: daudio2_sleep@0 { pins = "PB7", "PB5", "PB6", "PB4", "PB3"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; spdif_pins_a: spdif@0 { /* SPDIF_PIN: SPDIF_OUT */ pins = "PB0"; function = "spdif"; drive-strength = <20>; bias-disable; }; spdif_pins_b: spdif_sleep@0 { pins = "PB0"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; spi0_pins_a: spi0@0 { pins = "PC2", "PC4", "PC5","PC7", "PC6"; /*clk mosi miso hold wp*/ function = "spi0"; muxsel = <2>; drive-strength = <10>; }; spi0_pins_b: spi0@1 { pins = "PC3", "PC7", "PC6"; function = "spi0"; muxsel = <2>; drive-strength = <10>; bias-pull-up; /* only CS should be pulled up */ }; spi0_pins_c: spi0@2 { pins = "PC2", "PC3", "PC4", "PC5","PC6", "PC7"; function = "gpio_in"; muxsel = <0>; drive-strength = <10>; }; spi1_pins_a: spi1@0 { pins = "PD11", "PD12", "PD13","PD14", "PD15"; /*clk mosi miso hold wp*/ function = "spi1"; drive-strength = <10>; }; spi1_pins_b: spi1@1 { pins = "PD10"; function = "spi1"; drive-strength = <10>; bias-pull-up; // only CS should be pulled up }; spi1_pins_c: spi1@2 { pins = "PD10", "PD11", "PD12", "PD13","PD14", "PD15"; function = "gpio_in"; drive-strength = <10>; }; ledc_pins_a: ledc@0 { pins = "PC0"; function = "ledc"; drive-strength = <10>; }; ledc_pins_b: ledc@1 { pins = "PC0"; function = "gpio_in"; }; pwm0_pin_a: pwm0@0 { pins = "PD16"; function = "pwm0"; drive-strength = <10>; bias-pull-up; }; pwm0_pin_b: pwm0@1 { pins = "PD16"; function = "gpio_in"; bias-disable; }; pwm2_pin_a: pwm2@0 { pins = "PD18"; function = "pwm2"; drive-strength = <10>; bias-pull-up; }; pwm2_pin_b: pwm2@1 { pins = "PD18"; function = "gpio_in"; }; /* pwm7_pin_a: pwm7@0 { pins = "PD22"; function = "pwm7"; drive-strength = <10>; bias-pull-up; }; pwm7_pin_b: pwm7@1 { pins = "PD22"; function = "gpio_in"; }; */ s_cir0_pins_a: s_cir@0 { pins = "PB12"; function = "ir"; drive-strength = <10>; bias-pull-up; }; s_cir0_pins_b: s_cir@1 { pins = "PB12"; function = "gpio_in"; }; ir1_pins_a: ir1@0 { pins = "PB0"; function = "ir"; drive-strength = <10>; bias-pull-up; }; ir1_pins_b: ir1@1 { pins = "PB0"; function = "gpio_in"; }; }; &uart0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pins_a>; pinctrl-1 = <&uart0_pins_b>; status = "okay"; }; &uart1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart1_pins_a>; pinctrl-1 = <&uart1_pins_b>; status = "okay"; }; &uart2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart2_pins_a>; pinctrl-1 = <&uart2_pins_b>; status = "disabled"; }; &uart3 { /*compatible = "allwinner,sun20iw1-dsp-uart";*/ pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pins_a>; pinctrl-1 = <&uart3_pins_a>; status = "disabled"; }; &soc { card0_boot_para@2 { /* * Avoid dtc compiling warnings. * @TODO: Developer should modify this to the actual value */ reg = <0x0 0x2 0x0 0x0>; device_type = "card0_boot_para"; card_ctrl = <0x0>; card_high_speed = <0x1>; card_line = <0x4>; pinctrl-0 = <&sdc0_pins_a>; }; card2_boot_para@3 { /* * Avoid dtc compiling warnings. * @TODO: Developer should modify this to the actual value */ reg = <0x0 0x3 0x0 0x0>; device_type = "card2_boot_para"; card_ctrl = <0x2>; card_high_speed = <0x1>; card_line = <0x4>; pinctrl-0 = <&sdc2_pins_a>; /*pinctrl-0 = <&sdc0_pins_a>;*/ /*sdc_ex_dly_used = <0x2>;*/ sdc_io_1v8 = <0x1>; /*sdc_type = "tm4";*/ sdc_tm4_hs200_max_freq = <150>; sdc_tm4_hs400_max_freq = <100>; sdc_ex_dly_used = <2>; /*sdc_tm4_win_th = <8>;*/ /*sdc_dis_host_caps = <0x180>;*/ }; rfkill: rfkill@0 { compatible = "allwinner,sunxi-rfkill"; chip_en; power_en; status = "okay"; wlan: wlan@0 { compatible = "allwinner,sunxi-wlan"; pinctrl-0 = <&wlan_pins_a>; pinctrl-names = "default"; clock-names = "32k-fanout1"; clocks = <&ccu CLK_FANOUT1_OUT>; wlan_busnum = <0x1>; wlan_regon = <&pio PG 12 GPIO_ACTIVE_HIGH>; wlan_hostwake = <&pio PG 10 GPIO_ACTIVE_HIGH>; /*wlan_power = "VCC-3V3";*/ /*wlan_power_vol = <3300000>;*/ /*interrupt-parent = <&pio>; interrupts = < PG 10 IRQ_TYPE_LEVEL_HIGH>;*/ wakeup-source; }; bt: bt@0 { compatible = "allwinner,sunxi-bt"; pinctrl-0 = <&wlan_pins_a>; pinctrl-names = "default"; clock-names = "32k-fanout1"; clocks = <&ccu CLK_FANOUT1_OUT>; /*bt_power_num = <0x01>;*/ /*bt_power = "axp803-dldo1";*/ /*bt_io_regulator = "axp803-dldo1";*/ /*bt_io_vol = <3300000>;*/ /*bt_power_vol = <330000>;*/ bt_rst_n = <&pio PG 18 GPIO_ACTIVE_LOW>; status = "okay"; }; }; btlpm: btlpm@0 { compatible = "allwinner,sunxi-btlpm"; uart_index = <0x1>; bt_wake = <&pio PG 16 GPIO_ACTIVE_HIGH>; bt_hostwake = <&pio PG 17 GPIO_ACTIVE_HIGH>; status = "okay"; }; addr_mgt: addr_mgt@0 { compatible = "allwinner,sunxi-addr_mgt"; type_addr_wifi = <0x0>; type_addr_bt = <0x0>; type_addr_eth = <0x0>; status = "okay"; }; }; &sdc2 { non-removable; bus-width = <4>; mmc-ddr-1_8v; mmc-hs200-1_8v; no-sdio; no-sd; ctl-spec-caps = <0x308>; cap-mmc-highspeed; sunxi-power-save-mode; sunxi-dis-signal-vol-sw; mmc-bootpart-noacc; max-frequency = <150000000>; /*vmmc-supply = <®_dcdc1>;*/ /*emmc io vol 3.3v*/ /*vqmmc-supply = <®_aldo1>;*/ /*emmc io vol 1.8v*/ /*vqmmc-supply = <®_eldo1>;*/ status = "disabled"; }; &sdc0 { bus-width = <4>; cd-gpios = <&pio PF 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /*non-removable;*/ /*broken-cd;*/ /*cd-inverted*/; /*data3-detect;*/ /*card-pwr-gpios = <&pio PH 14 1 1 2 0xffffffff>;*/ cd-used-24M; cap-sd-highspeed; /*sd-uhs-sdr50;*/ /*sd-uhs-ddr50;*/ /*sd-uhs-sdr104;*/ no-sdio; no-mmc; sunxi-power-save-mode; /*sunxi-dis-signal-vol-sw;*/ max-frequency = <150000000>; ctl-spec-caps = <0x8>; /*vmmc-supply = <®_dcdc1>;*/ /*vqmmc33sw-supply = <®_dcdc1>;*/ /*vdmmc33sw-supply = <®_dcdc1>;*/ /*vqmmc18sw-supply = <®_eldo1>;*/ /*vdmmc18sw-supply = <®_eldo1>;*/ status = "okay"; }; &sdc1 { bus-width = <4>; no-mmc; no-sd; cap-sd-highspeed; /*sd-uhs-sdr12*/ /*sd-uhs-sdr25;*/ /*sd-uhs-sdr50;*/ /*sd-uhs-ddr50;*/ /*sd-uhs-sdr104;*/ /*sunxi-power-save-mode;*/ /*sunxi-dis-signal-vol-sw;*/ cap-sdio-irq; keep-power-in-suspend; ignore-pm-notify; max-frequency = <150000000>; ctl-spec-caps = <0x8>; status = "okay"; }; /* tvd configuration used (create device, 0: do not create device, 1: create device) agc_auto_enable (0: agc manual mode,agc_manual_value is valid; 1: agc auto mode) agc_manual_value (agc manual value, default value is 64) cagc_enable (cagc 0: disable, 1: enable) fliter_used (3d fliter 0: disable, 1: enable) support two PMU power (tvd_power0, tvd_power1) support two GPIO power (tvd_gpio0, tvd_gpio1) NOTICE: If tvd need pmu power or gpio power,params need be configured under [tvd] tvd_sw (the switch of all tvd driver.) tvd_interface (0: cvbs, 1: ypbpr,) tvd_format (0:TVD_PL_YUV420 , 1: MB_YUV420, 2: TVD_PL_YUV422) tvd_system (0:ntsc, 1:pal) tvd_row (total row number in multi channel mode 1-2) tvd_column (total column number in multi channel mode 1-2) tvd_channelx_en (0:disable, 1~4:position in multi channel mode,In single channel mode,mean enable) tvd_row*tvd_column is the total tvd channel number to be used in multichannel mode +--------------------+--------------------+ | | | | | | | 1 | 2 | | | | | | | +--------------------+--------------------+ | | | | | | | 3 | 4 | | | | | | | +--------------------+--------------------+ */ &tvd { tvd_sw = <1>; tvd_interface = <0>; tvd_format = <0>; tvd_system = <1>; tvd_row = <1>; tvd_column = <1>; tvd_channel0_en = <1>; tvd_channel1_en = <0>; tvd_channel2_en = <0>; tvd_channel3_en = <0>; /*tvd_gpio0 = <&pio PD 22 GPIO_ACTIVE_HIGH>;*/ /*tvd_gpio1 = <&pio PD 23 GPIO_ACTIVE_HIGH>;*/ /*tvd_gpio2 = <&pio PD 24 GPIO_ACTIVE_HIGH>;*/ /* dc1sw-supply = <®_dc1sw>;*/ /* eldo3-supply = <®_eldo3>;*/ /*tvd_power0 = "dc1sw"*/ /*tvd_power1 = "eldo3"*/ }; &tvd0 { used = <1>; agc_auto_enable = <1>; agc_manual_value = <64>; cagc_enable = <1>; fliter_used = <1>; }; /* Audio Driver modules */ &sunxi_rpaf_dsp0 { status = "okay"; }; /* if audiocodec is used, sdc0 and uart0 should be closed to enable PA. */ &codec { /* MIC and headphone gain setting */ mic1gain = <0x13>; mic2gain = <0x13>; mic3gain = <0x13>; /* ADC/DAC DRC/HPF func enabled */ /* 0x1:DAP_HP_EN; 0x2:DAP_SPK_EN; 0x3:DAP_HPSPK_EN */ adcdrc_cfg = <0x0>; adchpf_cfg = <0x1>; dacdrc_cfg = <0x0>; dachpf_cfg = <0x0>; /* Volume about */ digital_vol = <0x00>; lineout_vol = <0x1a>; headphonegain = <0x03>; /* Pa enabled about */ pa_level = <0x01>; pa_pwr_level = <0x01>; pa_msleep_time = <0x78>; /* gpio-spk = <&pio PF 2 GPIO_ACTIVE_HIGH>; */ /* gpio-spk-pwr = <&pio PF 4 GPIO_ACTIVE_HIGH>; */ /* regulator about */ /* avcc-supply = <®_aldo1>; */ /* hpvcc-supply = <®_eldo1>; */ status = "okay"; }; &sndcodec { hp_detect_case = <0x01>; jack_enable = <0x01>; status = "okay"; }; &dummy_cpudai { /* CMA config about */ playback_cma = <128>; capture_cma = <256>; status = "okay"; }; &dmic { pinctrl-names = "default","sleep"; pinctrl-0 = <&dmic_pins_a>; pinctrl-1 = <&dmic_pins_b>; status = "okay"; }; &sounddmic { status = "okay"; }; &dmic_codec { status = "okay"; }; /*----------------------------------------------------------------------------- * pcm_lrck_period 16/32/64/128/256 * (set 0x20 for HDMI audio out) * slot_width_select 16bits/20bits/24bits/32bits * (set 0x20 for HDMI audio out) * frametype 0 --> short frame = 1 clock width; * 1 --> long frame = 2 clock width; * tdm_config 0 --> pcm * 1 --> i2s * (set 0x01 for HDMI audio out) * mclk_div 0 --> not output * 1/2/4/6/8/12/16/24/32/48/64/96/128/176/192 * (set mclk as external codec clk source, freq is pll_audio/mclk_div) * pinctrl_used 0 --> I2S/PCM use for internal (e.g. HDMI) * 1 --> I2S/PCM use for external audio * daudio_type: 0 --> external audio type * 1 --> HDMI audio type *---------------------------------------------------------------------------*/ &daudio0 { mclk_div = <0x01>; frametype = <0x00>; tdm_config = <0x01>; sign_extend = <0x00>; msb_lsb_first = <0x00>; pcm_lrck_period = <0x80>; slot_width_select = <0x20>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&daudio0_pins_a>; pinctrl-1 = <&daudio0_pins_b>; pinctrl_used = <0x0>; status = "disabled"; }; /*----------------------------------------------------------------------------- * simple-audio-card,name name of sound card, e.g. * "snddaudio0" --> use for external audio * "sndhdmi" --> use for HDMI audio * sound-dai "snd-soc-dummy" --> use for I2S * "hdmiaudio" --> use for HDMI audio * "ac108" --> use for external audio of ac108 *---------------------------------------------------------------------------*/ &sounddaudio0 { /* simple-audio-card,format = "i2s"; */ /* simple-audio-card,frame-master = <&daudio0_master>; */ /* simple-audio-card,bitclock-master = <&daudio0_master>; */ /* simple-audio-card,bitclock-inversion; */ /* simple-audio-card,frame-inversion; */ status = "disabled"; daudio0_master: simple-audio-card,codec { /* sound-dai = <&ac108>; */ }; }; &daudio1 { mclk_div = <0x01>; frametype = <0x00>; tdm_config = <0x01>; sign_extend = <0x00>; msb_lsb_first = <0x00>; pcm_lrck_period = <0x80>; slot_width_select = <0x20>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&daudio1_pins_a>; pinctrl-1 = <&daudio1_pins_b>; pinctrl_used = <0x0>; status = "disabled"; }; &sounddaudio1 { status = "disabled"; daudio1_master: simple-audio-card,codec { /* sound-dai = <&ac108>; */ }; }; &daudio2 { mclk_div = <0x00>; frametype = <0x00>; tdm_config = <0x01>; sign_extend = <0x00>; tx_data_mode = <0x00>; rx_data_mode = <0x00>; msb_lsb_first = <0x00>; pcm_lrck_period = <0x20>; slot_width_select = <0x20>; asrc_function_en = <0x00>; pinctrl-names = "default", "sleep"; /*pinctrl-0 = <&daudio2_pins_a &daudio2_pins_b &daudio2_pins_c>;*/ /*pinctrl-1 = <&daudio2_pins_d>;*/ /* HDMI audio, no need pin */ pinctrl-0; pinctrl-1; pinctrl_used = <0x0>; daudio_type = <0x1>; status = "okay"; }; /* if HDMI audio is used, daudio2 should be enable. */ &hdmiaudio { status = "okay"; }; &sounddaudio2 { status = "okay"; simple-audio-card,name = "sndhdmi"; daudio2_master: simple-audio-card,codec { sound-dai = <&hdmiaudio>; }; }; &spdif { pinctrl-names = "default","sleep"; pinctrl-0 = <&spdif_pins_a>; pinctrl-1 = <&spdif_pins_b>; status = "disabled"; }; &soundspdif { status = "disabled"; }; /* *usb_port_type: usb mode. 0-device, 1-host, 2-otg. *usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-id/dpdm detect. *usb_detect_mode: 0-thread scan, 1-id gpio interrupt. *usb_id_gpio: gpio for id detect. *usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl"; *usb_wakeup_suspend：0-SUPER_STANDBY, 1-USB_STANDBY. */ &usbc0 { device_type = "usbc0"; usb_port_type = <0x2>; usb_detect_type = <0x1>; usb_detect_mode = <0>; usb_id_gpio = <&pio PD 21 GPIO_ACTIVE_HIGH>; enable-active-high; usb_det_vbus_gpio = <&pio PD 20 GPIO_ACTIVE_HIGH>; usb_wakeup_suspend = <0>; usb_serial_unique = <0>; usb_serial_number = "20080411"; rndis_wceis = <1>; status = "okay"; }; &ehci0 { drvvbus-supply = <®_usb1_vbus>; }; &ohci0 { drvvbus-supply = <®_usb1_vbus>; }; &usbc1 { device_type = "usbc1"; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "okay"; }; &ehci1 { status = "okay"; }; &ohci1 { status = "okay"; }; &twi0 { clock-frequency = <400000>; pinctrl-0 = <&twi0_pins_a>; pinctrl-1 = <&twi0_pins_b>; pinctrl-names = "default", "sleep"; status = "disabled"; eeprom@50 { compatible = "atmel,24c16"; reg = <0x50>; status = "disabled"; }; }; &twi1 { clock-frequency = <400000>; pinctrl-0 = <&twi1_pins_a>; pinctrl-1 = <&twi1_pins_b>; pinctrl-names = "default", "sleep"; status = "disabled"; }; &twi2 { clock-frequency = <400000>; pinctrl-0 = <&twi2_pins_a>; pinctrl-1 = <&twi2_pins_b>; pinctrl-names = "default", "sleep"; dmas = <&dma 45>, <&dma 45>; dma-names = "tx", "rx"; status = "okay"; /* pcf8574-usage: * only use gpio0~7, 0 means PP0. * pin set: * gpios = <&pcf8574 0 GPIO_ACTIVE_LOW>; * interrupt set: * interrupt-parent = <&pcf8574>; * interrupts = <0 IRQ_TYPE_EDGE_FALLING>; */ pcf8574: gpio@38 { compatible = "nxp,pcf8574"; reg = <0x38>; gpio_base = <2020>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupt-parent = <&pio>; interrupts = <PB 2 IRQ_TYPE_EDGE_FALLING>; status = "okay"; }; ctp@14 { compatible = "allwinner,goodix"; device_type = "ctp"; reg = <0x14>; status = "disabled"; ctp_name = "gt9xxnew_ts"; ctp_twi_id = <0x2>; ctp_twi_addr = <0x14>; ctp_screen_max_x = <0x320>; ctp_screen_max_y = <0x500>; ctp_revert_x_flag = <0x0>; ctp_revert_y_flag = <0x0>; ctp_exchange_x_y_flag = <0x0>; ctp_int_port = <&pio PG 14 GPIO_ACTIVE_HIGH>; ctp_wakeup = <&pio PG 15 GPIO_ACTIVE_HIGH>; }; }; &twi3 { clock-frequency = <400000>; pinctrl-0 = <&twi3_pins_a>; pinctrl-1 = <&twi3_pins_b>; pinctrl-names = "default", "sleep"; status = "disabled"; }; &gmac0 { phy-mode = "rgmii"; use_ephy25m = <1>; pinctrl-0 = <&gmac_pins_a>; pinctrl-1 = <&gmac_pins_b>; pinctrl-names = "default", "sleep"; phy-rst = <&pio PE 16 GPIO_ACTIVE_HIGH>; tx-delay = <3>; /*2~4*/ rx-delay = <0>; status = "disable"; }; &spi0 { clock-frequency = <100000000>; pinctrl-0 = <&spi0_pins_a &spi0_pins_b>; pinctrl-1 = <&spi0_pins_c>; pinctrl-names = "default", "sleep"; /*spi-supply = <®_dcdc1>;*/ spi_slave_mode = <0>; spi0_cs_number = <1>; spi0_cs_bitmap = <1>; status = "disabled"; spi-nand@0 { compatible = "spi-nand"; spi-max-frequency=<0x5F5E100>; reg = <0x0>; spi-rx-bus-width=<0x04>; spi-tx-bus-width=<0x04>; status="disabled"; }; }; &spi1 { clock-frequency = <100000000>; pinctrl-0 = <&spi1_pins_a &spi1_pins_b>; pinctrl-1 = <&spi1_pins_c>; pinctrl-names = "default", "sleep"; spi_slave_mode = <0>; status = "disabled"; spi_board1@0 { device_type = "spi_board1"; compatible = "rohm,dh2228fv"; spi-max-frequency = <0x5f5e100>; reg = <0x0>; spi-rx-bus-width = <0x4>; spi-tx-bus-width = <0x4>; status = "disabled"; }; }; &ledc { pinctrl-names = "default", "sleep"; pinctrl-0 = <&ledc_pins_a>; pinctrl-1 = <&ledc_pins_b>; led_count = <12>; output_mode = "GRB"; reset_ns = <84>; t1h_ns = <800>; t1l_ns = <320>; t0h_ns = <300>; t0l_ns = <800>; wait_time0_ns = <84>; wait_time1_ns = <84>; wait_data_time_ns = <600000>; status = "okay"; }; &keyboard0 { key0 = <210 0x160>; wakeup-source; status = "okay"; }; /*---------------------------------------------------------------------------------- disp init configuration disp_mode (0:screen0<screen0,fb0>) screenx_output_type (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo) screenx_output_mode (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50) (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60) screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420) screenx_output_bits (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit) screenx_output_eotf (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG) screenx_output_cs (for hdmi, 0:undefined 257:BT709 260:BT601 263:BT2020) screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode) screen0_output_range (for hdmi, 0:default 1:full 2:limited) screen0_output_scan (for hdmi, 0:no data 1:overscan 2:underscan) screen0_output_aspect_ratio (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9) fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444) fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA) fb0_scaler_mode_enable(scaler mode enable, used FE) fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0) lcdx_backlight (lcd init backlight,the range:[0,256],default:197 lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50) lcd0_contrast (LCD contrast, 0~100) lcd0_saturation (LCD saturation, 0~100) lcd0_hue (LCD hue, 0~100) framebuffer software rotation setting: disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y, set fbX_height to lcd_x) degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree) degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree) devX_output_type : config output type in bootGUI framework in UBOOT-2018. (0:none; 1:lcd; 2:tv; 4:hdmi;) devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018 devX_screen_id : config display index of bootGUI framework in UBOOT-2018 devX_do_hpd : whether do hpd detectation or not in UBOOT-2018 chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6 channel, 1:dual display with 4 channel in main display and 2 channel in second display, 2:dual display with 3 channel in main display and 3 channel in second in display. ----------------------------------------------------------------------------------*/ &disp { disp_init_enable = <1>; disp_mode = <0>; screen0_output_type = <1>; screen0_output_mode = <4>; screen1_output_type = <3>; screen1_output_mode = <10>; screen1_output_format = <0>; screen1_output_bits = <0>; screen1_output_eotf = <4>; screen1_output_cs = <257>; screen1_output_dvi_hdmi = <2>; screen1_output_range = <2>; screen1_output_scan = <0>; screen1_output_aspect_ratio = <8>; dev0_output_type = <1>; dev0_output_mode = <4>; dev0_screen_id = <0>; dev0_do_hpd = <0>; dev1_output_type = <4>; dev1_output_mode = <10>; dev1_screen_id = <1>; dev1_do_hpd = <1>; def_output_dev = <0>; hdmi_mode_check = <1>; fb0_format = <0>; fb0_width = <0>; fb0_height = <0>; fb1_format = <0>; fb1_width = <0>; fb1_height = <0>; chn_cfg_mode = <1>; disp_para_zone = <1>; /*VCC-LCD*/ /* dc1sw-supply = <®_dc1sw>;*/ /*VCC-DSI*/ /* eldo3-supply = <®_eldo3>;*/ /*VCC-PD*/ /* dcdc1-supply = <®_dcdc1>;*/ }; /*---------------------------------------------------------------------------------- ;lcd0 configuration ;lcd_if: 0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi ;lcd_hv_if 0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656 ;lcd_hv_clk_phase 0:0 degree;1:90 degree;2:180 degree;3:270 degree ;lcd_hv_sync_polarity 0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high ;lcd_hv_syuv_seq 0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY ;lcd_cpu_if 0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565) ; 6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565) ;lcd_cpu_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge; ;lcd_dsi_if 0:video mode; 1: Command mode; 2:video burst mode ;lcd_dsi_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge; ;lcd_x: lcd horizontal resolution ;lcd_y: lcd vertical resolution ;lcd_width: width of lcd in mm ;lcd_height: height of lcd in mm ;lcd_dclk_freq: in MHZ unit ;lcd_pwm_freq: in HZ unit ;lcd_pwm_pol: lcd backlight PWM polarity ;lcd_pwm_max_limit lcd backlight PWM max limit(<=255) ;lcd_hbp: hsync back porch(pixel) + hsync plus width(pixel); ;lcd_ht: hsync total cycle(pixel) ;lcd_vbp: vsync back porch(line) + vysnc plus width(line) ;lcd_vt: vysnc total cycle(line) ;lcd_hspw: hsync plus width(pixel) ;lcd_vspw: vysnc plus width(pixel) ;lcd_lvds_if: 0:single link; 1:dual link ;lcd_lvds_colordepth: 0:8bit; 1:6bit ;lcd_lvds_mode: 0:NS mode; 1:JEIDA mode ;lcd_frm: 0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither ;lcd_io_phase: 0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase; ; 8~11bit:dclk phase; 12~15bit:de phase) ;lcd_gamma_en lcd gamma correction enable ;lcd_bright_curve_en lcd bright curve correction enable ;lcd_cmap_en lcd color map function enable ;deu_mode 0:smoll lcd screen; 1:large lcd screen(larger than 10inch) ;lcdgamma4iep: Smart Backlight parameter, lcd gamma vale * 10; ; decrease it while lcd is not bright enough; increase while lcd is too bright ;smart_color 90:normal lcd screen 65:retina lcd screen(9.7inch) ;Pin setting for special function ie.LVDS, RGB data or vsync ; name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level> ;Pin setting for gpio: ; lcd_gpio_X = port:PD12<pin function><pull up or pull down><drive ability><output level> ;Pin setting for backlight enable pin ; lcd_bl_en = port:PD12<pin function><pull up or pull down><drive ability><output level> ;fsync setting, pulse to csi ;lcd_fsync_en (0:disable fsync,1:enable) ;lcd_fsync_act_time (active time of fsync, unit:pixel) ;lcd_fsync_dis_time (disactive time of fsync, unit:pixel) ;lcd_fsync_pol (0:positive;1:negative) ;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function, pull up or pull down(default 0), driver level(default 1), data> ;For dual link lvds: use lvds2link_pins_a and lvds2link_pins_b instead ;For rgb24: use rgb24_pins_a and rgb24_pins_b instead ;For lvds1: use lvds1_pins_a and lvds1_pins_b instead ;For lvds0: use lvds0_pins_a and lvds0_pins_b instead ;----------------------------------------------------------------------------------*/ &lcd0 { lcd_used = <1>; lcd_driver_name = "tft08006"; lcd_backlight = <100>; lcd_if = <4>; lcd_x = <800>; lcd_y = <1280>; lcd_width = <52>; lcd_height = <52>; lcd_dclk_freq = <70>; lcd_pwm_used = <1>; lcd_pwm_ch = <2>; lcd_pwm_freq = <1000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_hbp = <32>; lcd_ht = <868>; lcd_hspw = <4>; lcd_vbp = <12>; lcd_vt = <1311>; lcd_vspw = <4>; lcd_dsi_if = <0>; lcd_dsi_lane = <4>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <0>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_io_phase = <0x0000>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_fsync_en = <0>; lcd_fsync_act_time = <1000>; lcd_fsync_dis_time = <1000>; lcd_fsync_pol = <0>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_gpio_0 = <&pio PG 13 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&dsi4lane_pins_a>; pinctrl-1 = <&dsi4lane_pins_b>; }; &hdmi { hdmi_used = <1>; hdmi_power_cnt = <0>; hdmi_cts_compatibility = <1>; hdmi_hdcp_enable = <1>; hdmi_hdcp22_enable = <0>; hdmi_cec_support = <1>; hdmi_cec_super_standby = <0>; ddc_en_io_ctrl = <0>; power_io_ctrl = <0>; }; &pwm0 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_pin_a>; pinctrl-1 = <&pwm0_pin_b>; status = "okay"; }; &pwm2 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm2_pin_a>; pinctrl-1 = <&pwm2_pin_b>; status = "okay"; }; /* &pwm7 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm7_pin_a>; pinctrl-1 = <&pwm7_pin_b>; status = "okay"; }; */ &rtp { allwinner,tp-sensitive-adjust = <0xf>; allwinner,filter-type = <0x1>; allwinner,ts-attached; status = "disabled"; }; &gpadc { channel_num = <2>; channel_select = <3>; channel_data_select = <3>; channel_compare_select = <3>; channel_cld_select = <3>; channel_chd_select = <3>; channel0_compare_lowdata = <1700000>; channel0_compare_higdata = <1200000>; channel1_compare_lowdata = <460000>; channel1_compare_higdata = <1200000>; status = "disabled"; }; &s_cir0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&s_cir0_pins_a>; pinctrl-1 = <&s_cir0_pins_b>; status = "disabled"; }; &ir1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&ir1_pins_a>; pinctrl-1 = <&ir1_pins_b>; status = "disabled"; };用烧卡工具烧到TF卡启动：
固件下载：
tina_d1-nezha_uart0_f133_nolcd.7zLCD 还没有测试!!!
LCD 还没有测试!!!
LCD 还没有测试!!!root@TinaLinux:/# cat /proc/meminfo MemTotal: 50600 kB MemFree: 10944 kB MemAvailable: 25120 kB Buffers: 5188 kB Cached: 8908 kB SwapCached: 0 kB Active: 12464 kB Inactive: 4476 kB Active(anon): 2860 kB Inactive(anon): 28 kB Active(file): 9604 kB Inactive(file): 4448 kB Unevictable: 0 kB Mlocked: 0 kB SwapTotal: 0 kB SwapFree: 0 kB Dirty: 0 kB Writeback: 0 kB AnonPages: 2892 kB Mapped: 3396 kB Shmem: 44 kB KReclaimable: 3708 kB Slab: 14092 kB SReclaimable: 3708 kB SUnreclaim: 10384 kB KernelStack: 944 kB PageTables: 304 kB NFS_Unstable: 0 kB Bounce: 0 kB WritebackTmp: 0 kB CommitLimit: 25300 kB Committed_AS: 56192 kB VmallocTotal: 67108863 kB VmallocUsed: 2340 kB VmallocChunk: 0 kB Percpu: 32 kB CmaTotal: 8192 kB CmaFree: 5388 kB root@TinaLinux:/#还有25M内存可用。
就只有25M了，64M被系统吃掉40M？？？？
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回复: 自制D1S 启动卡住发布在 D1系列-RISC-V
@zengxh 在 自制D1S 启动卡住 中说：
[ 1.093076] sunxi-rfkill soc@3000000:rfkill@0: module version: v1.0.9 [ 1.100338] sunxi-rfkill soc@3000000:rfkill@0: devm_pinctrl_get() failed! [ 1.107959] sunxi-rfkill soc@3000000:rfkill@0: get gpio chip_en failed [ 1.115249] sunxi-rfkill soc@3000000:rfkill@0: get gpio power_en failed [ 1.122672] sunxi-rfkill soc@3000000:rfkill@0: wlan_busnum (1) [ 1.129212] sunxi-rfkill soc@3000000:rfkill@0: Missing wlan_power. [ 1.136124] sunxi-rfkill soc@3000000:rfkill@0: wlan clock[0] (32k-fanout1) [ 1.143859] sunxi-rfkill soc@3000000:rfkill@0: wlan_regon gpio=204 assert=1 [ 1.151742] sunxi-rfkill soc@3000000:rfkill@0: wlan_hostwake gpio=202 assert=1 [ 1.159890] sunxi-rfkill soc@3000000:rfkill@0: wakeup source is enabled [ 1.167574] sunxi-rfkill soc@3000000:rfkill@0: Missing bt_power. [ 1.174300] sunxi-rfkill soc@3000000:rfkill@0: bt clock[0] (32k-fanout1) [ 1.181862] sunxi-rfkill soc@3000000:rfkill@0: bt_rst gpio=210 assert=0 [ 1.190255] [ADDR_MGT] addr_mgt_probe: module version: v1.0.9 [ 1.197980] [ADDR_MGT] addr_mgt_probe: success. [ 1.204489] libphy: Fixed MDIO Bus: probed [ 1.209167] CAN device driver interface [ 1.214593] sun8iw20-pinctrl 2000000.pinctrl: 2000000.pinctrl supply vcc-pe not found, using dummy regulator使用晕哥 简单修改 哪吒d1 tina sdk 的 sys_config.fex 和 board.dts，让D1s先把Linux跑起来。 编译烧写固件后每次都卡在这里 但是用帖子里面的固件烧写可以进去 大佬们指导下
请问复位和晶振要遵守数据手册的时序吗？我看要求挺严格，要先电源稳定，然后延时一会儿，再起晶振和复位。
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有D1S/F133连接以太网的参考吗发布在 D1系列-RISC-V
我看各个板子都没有F133连接以太网，百兆PHY这种参考设计，硬件都没有，软件也没看有验证过的，官方的有吗？好像mango pi还是荔枝派的要做？
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回复: 资源都够用情况下，选V3S还是D1S?发布在 其它全志芯片讨论区
@xiaowenge 在 资源都够用情况下，选V3S还是D1S? 中说：
都够用当然选便宜的啦，而且你比较的只是芯片成本，还要考虑外围元器件成本
我也想用D1S，但是官方有D1S连接百兆PHY的参考设计吗，一直没找到，也没找到网友自己做的。
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资源都够用情况下，选V3S还是D1S?发布在 其它全志芯片讨论区
想做一个物联网关，加强版DTU什么的，选V3S还是D1S好呢？两者对于需求来说都够用。D1S是V3S降成本版本？我看淘宝上D1S比V3S便宜10块钱。
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回复: D1哪吒v1.2测试固件，还没测试，邀请大家一起测试一下发布在 D1系列-RISC-V
@xiaowenge 在 D1哪吒v1.2测试固件，还没测试，邀请大家一起测试一下 中说：
D1哪吒v1.2测试固件，还没测试，邀请大家一起测试一下：
tina_d1-nezha_uart0_v1.2test20211206.img修改内容有：
2021年6月v1.01版本发布后-2021年11月期间全志内部Tina主分支更新的各种功能patch哪里可以下载到1.2的SDK？
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回复: 问问D1S/F133会有128M或256M SIP DDR的版本么发布在 D1系列-RISC-V
@minmin 在 问问D1S/F133会有128M或256M SIP DDR的版本么 中说：
D1系没有H264编码器（我有点好奇为什么主推视频的芯片把这个以前V3s都有的组件干掉）似乎很大一块限制了应用
以及按照D1的规格来说，主推128M竞争力可能会更大点（前提是不要太贵）我也觉得D1S做到128MB会更好，要不然不和V3S没有差异化了。