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    YuzukiTsuru 发布的最佳帖子

    • 回复: D1 / D1s 可以用的 5.5元的 1280*400 长条形MIPI屏, 未验证
      {0xB0, 1, {0x5A}},
      
      {0xB1, 1, {0x00}},
      {0x89, 1, {0x01}},
      {0x91, 1, {0x17}},
      {0xB1, 1, {0x03}},
      {0x2C, 1, {0x28}},
      
      {0x00, 1, {0xB7}},
      {0x01, 1, {0x1B}},
      {0x02, 1, {0x00}},
      {0x03, 1, {0x00}},
      {0x04, 1, {0x00}},
      {0x05, 1, {0x00}},
      {0x06, 1, {0x00}},
      {0x07, 1, {0x00}},
      {0x08, 1, {0x00}},
      {0x09, 1, {0x00}},
      {0x0A, 1, {0x01}},
      {0x0B, 1, {0x01}},
      {0x0C, 1, {0x00}},
      {0x0D, 1, {0x00}},
      {0x0E, 1, {0x24}},
      {0x0F, 1, {0x1C}},
      {0x10, 1, {0xC9}},
      {0x11, 1, {0x60}},
      {0x12, 1, {0x70}},
      {0x13, 1, {0x01}},
      {0x14, 1, {0xE7}},
      {0x15, 1, {0xFF}},
      {0x16, 1, {0x3D}},
      {0x17, 1, {0x0E}},
      {0x18, 1, {0x01}},
      {0x19, 1, {0x00}},
      {0x1A, 1, {0x00}},
      {0x1B, 1, {0xFC}},
      {0x1C, 1, {0x0B}},
      {0x1D, 1, {0xA0}},
      {0x1E, 1, {0x03}},
      {0x1F, 1, {0x04}},
      {0x20, 1, {0x0C}},
      {0x21, 1, {0x00}},
      {0x22, 1, {0x04}},
      {0x23, 1, {0x81}},
      {0x24, 1, {0x1F}},
      {0x25, 1, {0x10}},
      {0x26, 1, {0x9B}},
      {0x2D, 1, {0x01}},
      {0x2E, 1, {0x84}},
      {0x2F, 1, {0x00}},
      {0x30, 1, {0x02}},
      {0x31, 1, {0x08}},
      {0x32, 1, {0x01}},
      {0x33, 1, {0x1C}},
      {0x34, 1, {0x40}},
      {0x35, 1, {0xFF}},
      {0x36, 1, {0xFF}},
      {0x37, 1, {0xFF}},
      {0x38, 1, {0xFF}},
      {0x39, 1, {0xFF}},
      {0x3A, 1, {0x05}},
      {0x3B, 1, {0x00}},
      {0x3C, 1, {0x00}},
      {0x3D, 1, {0x00}},
      {0x3E, 1, {0xCF}},
      {0x3F, 1, {0x84}},
      {0x40, 1, {0x2F}},
      {0x41, 1, {0xFC}},
      {0x42, 1, {0x01}},
      {0x43, 1, {0x40}},
      {0x44, 1, {0x05}},
      {0x45, 1, {0xE8}},
      {0x46, 1, {0x16}},
      {0x47, 1, {0x00}},
      {0x48, 1, {0x00}},
      {0x49, 1, {0x88}},
      {0x4A, 1, {0x08}},
      {0x4B, 1, {0x05}},
      {0x4C, 1, {0x03}},
      {0x4D, 1, {0xD0}},
      {0x4E, 1, {0x13}},
      {0x4F, 1, {0xFF}},
      {0x50, 1, {0x0A}},
      {0x51, 1, {0x53}},
      {0x52, 1, {0x26}},
      {0x53, 1, {0x22}},
      {0x54, 1, {0x09}},
      {0x55, 1, {0x22}},
      {0x56, 1, {0x00}},
      {0x57, 1, {0x1C}},
      {0x58, 1, {0x03}},
      {0x59, 1, {0x3F}},
      {0x5A, 1, {0x28}},
      {0x5B, 1, {0x01}},
      {0x5C, 1, {0xCC}},
      {0x5D, 1, {0x21}},
      {0x5E, 1, {0x84}},
      {0x5F, 1, {0x10}},
      {0x60, 1, {0x42}},
      {0x61, 1, {0x08}},
      {0x62, 1, {0x21}},
      {0x63, 1, {0x84}},
      {0x64, 1, {0x80}},
      {0x65, 1, {0x0C}},
      {0x66, 1, {0x74}},
      {0x67, 1, {0x4C}},
      {0x68, 1, {0x09}},
      {0x69, 1, {0x12}},
      {0x6A, 1, {0x42}},
      {0x6B, 1, {0x08}},
      {0x6C, 1, {0x21}},
      {0x6D, 1, {0x84}},
      {0x6E, 1, {0x10}},
      {0x6F, 1, {0x42}},
      {0x70, 1, {0x08}},
      {0x71, 1, {0xE9}},
      {0x72, 1, {0xC4}},
      {0x73, 1, {0xD7}},
      {0x74, 1, {0xD6}},
      {0x75, 1, {0x28}},
      {0x76, 1, {0x00}},
      {0x77, 1, {0x00}},
      {0x78, 1, {0x0F}},
      {0x79, 1, {0xE0}},
      {0x7A, 1, {0x01}},
      {0x7B, 1, {0xFF}},
      {0x7C, 1, {0xFF}},
      {0x7D, 1, {0x0F}},
      {0x7E, 1, {0x41}},
      {0x7F, 1, {0xFE}},
      
      {0xB1, 1, {0x02}},
      {0x00, 1, {0xFF}},
      {0x01, 1, {0x05}},
      {0x02, 1, {0xF0}},
      {0x03, 1, {0x00}},
      {0x04, 1, {0x94}},
      {0x05, 1, {0x48}},
      {0x06, 1, {0xC8}},
      {0x07, 1, {0x0A}},
      {0x08, 1, {0x00}},
      {0x09, 1, {0x00}},
      {0x0A, 1, {0x00}},
      {0x0B, 1, {0x10}},
      {0x0C, 1, {0xE6}},
      {0x0D, 1, {0x0D}},
      {0x0F, 1, {0x00}},
      {0x10, 1, {0xF9}},
      {0x11, 1, {0x4D}},
      {0x12, 1, {0x9E}},
      {0x13, 1, {0x8F}},
      {0x14, 1, {0xDF}},
      {0x15, 1, {0x15}},
      {0x16, 1, {0xE4}},
      {0x17, 1, {0x6A}},
      {0x18, 1, {0xAB}},
      {0x19, 1, {0xD7}},
      {0x1A, 1, {0x78}},
      {0x1B, 1, {0xFE}},
      {0x1C, 1, {0xFF}},
      {0x1D, 1, {0xFF}},
      {0x1E, 1, {0xFF}},
      {0x1F, 1, {0xFF}},
      {0x20, 1, {0xFF}},
      {0x21, 1, {0xFF}},
      {0x22, 1, {0xFF}},
      {0x23, 1, {0xFF}},
      {0x24, 1, {0xFF}},
      {0x25, 1, {0xFF}},
      {0x26, 1, {0xFF}},
      {0x27, 1, {0x1F}},
      {0x28, 1, {0xFF}},
      {0x29, 1, {0xFF}},
      {0x2A, 1, {0xFF}},
      {0x2B, 1, {0xFF}},
      {0x2C, 1, {0xFF}},
      {0x2D, 1, {0x07}},
      {0x33, 1, {0x3F}},
      {0x35, 1, {0x7F}},
      {0x36, 1, {0x3F}},
      {0x38, 1, {0xFF}},
      {0x3A, 1, {0x80}},
      {0x3B, 1, {0x01}},
      {0x3C, 1, {0x00}},
      {0x3D, 1, {0x2F}},
      {0x3E, 1, {0x00}},
      {0x3F, 1, {0xE0}},
      {0x40, 1, {0x05}},
      {0x41, 1, {0x00}},
      {0x42, 1, {0xBC}},
      {0x43, 1, {0x00}},
      {0x44, 1, {0x80}},
      {0x45, 1, {0x07}},
      {0x46, 1, {0x00}},
      {0x47, 1, {0x00}},
      {0x48, 1, {0x9B}},
      {0x49, 1, {0xD2}},
      {0x4A, 1, {0xC1}},
      {0x4B, 1, {0x83}},
      {0x4C, 1, {0x17}},
      {0x4D, 1, {0xC0}},
      {0x4E, 1, {0x0F}},
      {0x4F, 1, {0xF1}},
      {0x50, 1, {0x78}},
      {0x51, 1, {0x7A}},
      {0x52, 1, {0x34}},
      {0x53, 1, {0x99}},
      {0x54, 1, {0xA2}},
      {0x55, 1, {0x02}},
      {0x56, 1, {0x14}},
      {0x57, 1, {0xB8}},
      {0x58, 1, {0xDC}},
      {0x59, 1, {0xD4}},
      {0x5A, 1, {0xEF}},
      {0x5B, 1, {0xF7}},
      {0x5C, 1, {0xFB}},
      {0x5D, 1, {0xFD}},
      {0x5E, 1, {0x7E}},
      {0x5F, 1, {0xBF}},
      {0x60, 1, {0xEF}},
      {0x61, 1, {0xE6}},
      {0x62, 1, {0x76}},
      {0x63, 1, {0x73}},
      {0x64, 1, {0xBB}},
      {0x65, 1, {0xDD}},
      {0x66, 1, {0x6E}},
      {0x67, 1, {0x37}},
      {0x68, 1, {0x8C}},
      {0x69, 1, {0x08}},
      {0x6A, 1, {0x31}},
      {0x6B, 1, {0xB8}},
      {0x6C, 1, {0xB8}},
      {0x6D, 1, {0xB8}},
      {0x6E, 1, {0xB8}},
      {0x6F, 1, {0xB8}},
      {0x70, 1, {0x5C}},
      {0x71, 1, {0x2E}},
      {0x72, 1, {0x17}},
      {0x73, 1, {0x00}},
      {0x74, 1, {0x00}},
      {0x75, 1, {0x00}},
      {0x76, 1, {0x00}},
      {0x77, 1, {0x00}},
      {0x78, 1, {0x00}},
      {0x79, 1, {0x00}},
      {0x7A, 1, {0xDC}},
      {0x7B, 1, {0xDC}},
      {0x7C, 1, {0xDC}},
      {0x7D, 1, {0xDC}},
      {0x7E, 1, {0xDC}},
      {0x7F, 1, {0x6E}},
      {0x0B, 1, {0x00}},
      {0xB1, 1, {0x03}},
      {0x2C, 1, {0x2C}},
      {0xB1, 1, {0x00}},
      {0x89, 1, {0x03}},
      
      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: Porject Yosemite - 基于全志V853的开发板

      项目文件:
      bcbb006b-a850-4185-832b-8096ca195f40-yosemite_0.5.tar.gz

      需要配合Tina 5.0使用

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 芒果派 麻雀 Dual T113使用Buildroot一键构建

      测试镜像:
      百度云:链接:https://pan.baidu.com/s/1dPSaKJQrOMy8X1Xs_604Dw 提取码:awol
      奶牛快传:https://cowtransfer.com/s/76711e52ad304f 或 打开【奶牛快传】cowtransfer.com 使用传输口令:gl9jyq 提取;

      串口是PE2,PE3

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: Buildroot-2022.2主线已经支持Nezha开发板,原来有这么多大佬喜欢这款芯片,真的太香了!

      不过Linux和Uboot都是smaeul 的 fork,更倾向于主线kernel+patch这样的。

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: isp子通道

      isp后可以用vipp通道,mipi到isp好像没有

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 自制V831小相机适配 i80 LCD 显示屏

      V831没有RGB也没有MIPI,正好手上有几片i80 MCU屏幕可以用(320*480 3.5寸的,15块钱一片)

      电路部分

      屏幕部分:

      c5055b16-5e41-4fdc-a55b-caf19a844472-image.png

      主控部分:

      f0a27731-1fc7-4adf-b4d8-30c8084d0302-image.png

      09adb270-20ef-4fa6-aeb9-db74005834d9-image.png

      没啥好说的,照着Sipeed的抄就行了

      配置设备树

      lcd0: lcd0@01c0c000 {
      			lcd_used            = <1>;
      
      			lcd_driver_name     = "ili9481";
      
      			lcd_x               = <320>;
      			lcd_y               = <480>;
      			lcd_width           = <108>;
      			lcd_height          = <64>;
      			lcd_dclk_freq       = <5>;
      
      			lcd_pwm_used        = <0>;
      
      			lcd_hbp             = <20>;
      			lcd_ht              = <382>;
      			lcd_hspw            = <2>;
      			lcd_vbp             = <2>; // 320
      			lcd_vt              = <486>; // 320
      			lcd_vspw            = <2>;
      
      			lcd_if              = <1>;
      			lcd_frm             = <2>;
      			lcd_cpu_mode        = <1>;
      			lcd_cpu_te          = <0>;
      			lcd_cpu_if	        = <14>;
      
      			lcd_io_phase        = <0x0000>;
      			lcdgamma4iep        = <22>;
      			lcd_gamma_en        = <0>;
      			lcd_cmap_en         = <0>;
      			lcd_bright_curve_en = <0>;
      			lcd_rb_swap         = <0>;
      
      			lcd_gpio_0 = <&pio PH 5 1 0 3 0>; /* rst */
      			lcd_gpio_1 = <&pio PD 21 1 0 3 0>; /* cs */
      			lcd_bl_en = <&pio PH 6 1 0 3 1>;
      
      			pinctrl-0 = <&rgb8_pins_a>;
      			pinctrl-1 = <&rgb8_pins_b>;
      		};
      

      因为这里用的是Kernel刷屏,所以就不配uboot的了

      驱动

      然后找大佬鼠嫖驱动,放到 lichee/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/文件夹下。

      编辑 lichee/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/panels.c,找一个顺眼的地方加一下配置。

      #ifdef CONFIG_LCD_SUPPORT_ILI9481
      	&ili9481_panel,
      #endif
      

      编辑lichee/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/panels.h,找一个顺眼的地方加一下配置。

      #ifdef CONFIG_LCD_SUPPORT_ILI9481
      extern struct __lcd_panel ili9481_panel;
      #endif
      

      编辑lichee/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/Kconfig,找一个顺眼的地方加一下配置。

      config LCD_SUPPORT_ILI9481
      	bool "LCD support ili9481 panel"
      	default n
      	---help---
      		If you want to support ili9481 panel for display driver, select it.
      

      编辑 lichee/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/Makefile,找一个顺眼的地方加一下配置。

      disp-$(CONFIG_LCD_SUPPORT_ILI9481) += lcd/ili9481.o
      

      再打开 m kernel_menuconfig

      Device Drivers  --->
      	Graphics support  ---> 
      		Frame buffer Devices  --->
      			Video support for sunxi  --->
      				LCD panels select  --->
      					 [*] LCD support ili9481 panel        
      

      9af83cdc-df76-4ebe-9e15-8d5ee311ff61-image.png

      保存,编译kernel打包就好了。

      启动系统

      刷卡,启动系统,可以看到屏幕背光已经亮了。

      351a6b51-99ca-4715-af69-645c5461ce8e-image.png

      测试一下

      echo 1 > sys/class/disp/disp/attr/colorbar
      

      5aca52eb-65ae-4d00-8308-8a61e907d842-image.png

      驱动和配置已经上传Github,自取

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 【硬核干货】D1-H / D1 与D1s 比较图 ,一眼看出区别

      @qiaoly
      在画了在画了

      d81ef714-8296-477a-809d-8a7297bba3cc-image.png

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: adb shell 这是啥原因啊?求大佬解答!!

      adb是插入usb的

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 超级萌新学晕哥也整了一台“台电” P85 TLA016 平板电脑

      串口可以输入了。抓到完整的设备树

      / {
      	model = "sun50iw10";
      	compatible = "allwinner,a100", "arm,sun50iw10p1";
      	interrupt-parent = <0x00000001>;
      	#address-cells = <0x00000002>;
      	#size-cells = <0x00000002>;
      	clocks {
      		compatible = "allwinner,clk-init";
      		device_type = "clocks";
      		#address-cells = <0x00000002>;
      		#size-cells = <0x00000002>;
      		ranges;
      		reg = <0x00000000 0x03001000 0x00000000 0x00001000 0x00000000 0x07010000 0x00000000 0x00000400 0x00000000 0x07000000 0x00000000 0x00000004>;
      		losc {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-clock";
      			clock-frequency = <0x00008000>;
      			clock-output-names = "losc";
      			phandle = <0x000000b3>;
      		};
      		iosc {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-clock";
      			clock-frequency = "", ".$";
      			clock-output-names = "iosc";
      			phandle = <0x000000b4>;
      		};
      		hosc {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-clock";
      			clock-frequency = <0x016e3600>;
      			clock-output-names = "hosc";
      			phandle = <0x0000000a>;
      		};
      		osc48m {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-clock";
      			clock-frequency = <0x02dc6c00>;
      
      			clock-output-names = "osc48m";
      			phandle = <0x0000000b>;
      		};
      		hoscdiv32k {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-clock";
      			clock-frequency = <0x00008000>;
      			clock-output-names = "hoscdiv32k";
      			phandle = <0x000000b5>;
      		};
      		pll_periph0div25m {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-clock";
      			clock-frequency = <0x017d7840>;
      			clock-output-names = "pll_periph0div25m";
      			phandle = <0x000000b6>;
      		};
      		pll_cpu {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			lock-mode = "new";
      			clock-output-names = "pll_cpu";
      			phandle = <0x000000b7>;
      		};
      		pll_ddr {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			lock-mode = "new";
      			clock-output-names = "pll_ddr";
      			phandle = <0x000000b8>;
      		};
      		pll_periph0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			assigned-clock-rates = "#.F";
      			lock-mode = "new";
      			clock-output-names = "pll_periph0";
      			phandle = <0x00000006>;
      		};
      		pll_periph1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			assigned-clock-rates = "#.F";
      			lock-mode = "new";
      			clock-output-names = "pll_periph1";
      			phandle = <0x00000007>;
      		};
      		pll_gpu {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			lock-mode = "new";
      			clock-output-names = "pll_gpu";
      			phandle = <0x000000b9>;
      		};
      		pll_video0x4 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			lock-mode = "new";
      			clock-output-names = "pll_video0x4";
      			phandle = <0x00000008>;
      		};
      		pll_video1x4 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			lock-mode = "new";
      			clock-output-names = "pll_video1x4";
      			phandle = <0x00000009>;
      		};
      		pll_video2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			lock-mode = "new";
      			assigned-clocks = <0x00000002>;
      			assigned-clock-rates = <0x1406f400>;
      			clock-output-names = "pll_video2";
      			phandle = <0x00000002>;
      		};
      		pll_video3 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			lock-mode = "new";
      			assigned-clocks = <0x00000003>;
      			assigned-clock-rates = <0x11e1a300>;
      			clock-output-names = "pll_video3";
      			phandle = <0x00000003>;
      		};
      		pll_ve {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			device_type = "clk_pll_ve";
      			lock-mode = "new";
      			clock-output-names = "pll_ve";
      
      			phandle = <0x000000ba>;
      		};
      		pll_com {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			assigned-clocks = <0x00000004>;
      			assigned-clock-rates = "#.F";
      			lock-mode = "new";
      			clock-output-names = "pll_com";
      			phandle = <0x00000004>;
      		};
      		pll_audiox4 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,pll-clock";
      			assigned-clocks = <0x00000005>;
      			assigned-clock-rates = <0x05dc0000>;
      			lock-mode = "new";
      			clock-output-names = "pll_audiox4";
      			phandle = <0x00000005>;
      		};
      		pll_periph0x2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000006>;
      			clock-mult = <0x00000002>;
      			clock-div = <0x00000001>;
      			clock-output-names = "pll_periph0x2";
      			phandle = <0x0000000c>;
      		};
      		pll_periph0x4 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000006>;
      			clock-mult = <0x00000004>;
      			clock-div = <0x00000001>;
      			clock-output-names = "pll_periph0x4";
      			phandle = <0x000000bb>;
      		};
      		periph32k {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000006>;
      			clock-mult = <0x00000002>;
      			clock-div = <0x00008f0d>;
      			clock-output-names = "periph32k";
      			phandle = <0x000000bc>;
      		};
      		pll_periph1x2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000007>;
      			clock-mult = <0x00000002>;
      			clock-div = <0x00000001>;
      
      			clock-output-names = "pll_periph1x2";
      			phandle = <0x000000bd>;
      		};
      		pll_comdiv5 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000004>;
      			clock-mult = <0x00000001>;
      			clock-div = <0x00000005>;
      			clock-output-names = "pll_comdiv5";
      			phandle = <0x000000be>;
      		};
      		pll_audiox8 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000005>;
      			clock-mult = <0x00000002>;
      			clock-div = <0x00000001>;
      			clock-output-names = "pll_audiox8";
      			phandle = <0x000000bf>;
      		};
      		pll_audio {
      			#clock-cells = <0x00000000>;
      
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000005>;
      			clock-mult = <0x00000001>;
      			clock-div = <0x00000004>;
      			clock-output-names = "pll_audio";
      			phandle = <0x000000c0>;
      		};
      		pll_audiox2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000005>;
      			clock-mult = <0x00000001>;
      			clock-div = <0x00000002>;
      			clock-output-names = "pll_audiox2";
      			phandle = <0x000000c1>;
      		};
      		pll_video0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000008>;
      			clock-mult = <0x00000001>;
      			clock-div = <0x00000004>;
      			clock-output-names = "pll_video0";
      			phandle = <0x000000c2>;
      		};
      		pll_video0x2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000008>;
      			clock-mult = <0x00000001>;
      			clock-div = <0x00000002>;
      			clock-output-names = "pll_video0x2";
      			phandle = <0x000000c3>;
      		};
      		pll_video1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000009>;
      			clock-mult = <0x00000001>;
      			clock-div = <0x00000004>;
      			clock-output-names = "pll_video1";
      			phandle = <0x000000c4>;
      		};
      		pll_video1x2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000009>;
      			clock-mult = <0x00000001>;
      			clock-div = <0x00000002>;
      			clock-output-names = "pll_video1x2";
      			phandle = <0x000000c5>;
      		};
      		pll_video2x2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000002>;
      			clock-mult = <0x00000002>;
      			clock-div = <0x00000001>;
      			clock-output-names = "pll_video2x2";
      			phandle = <0x000000c6>;
      		};
      		pll_video2x4 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000002>;
      			clock-mult = <0x00000004>;
      			clock-div = <0x00000001>;
      			clock-output-names = "pll_video2x4";
      			phandle = <0x000000c7>;
      		};
      		pll_video3x2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000003>;
      			clock-mult = <0x00000002>;
      			clock-div = <0x00000001>;
      			clock-output-names = "pll_video3x2";
      			phandle = <0x000000c8>;
      		};
      		pll_video3x4 {
      			#clock-cells = <0x00000000>;
      
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000003>;
      			clock-mult = <0x00000004>;
      			clock-div = <0x00000001>;
      			clock-output-names = "pll_video3x4";
      			phandle = <0x000000c9>;
      		};
      		hoscd2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x0000000a>;
      			clock-mult = <0x00000001>;
      			clock-div = <0x00000002>;
      			clock-output-names = "hoscd2";
      			phandle = <0x000000ca>;
      		};
      		osc48md4 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x0000000b>;
      			clock-mult = <0x00000001>;
      			clock-div = <0x00000004>;
      			clock-output-names = "osc48md4";
      			phandle = <0x000000cb>;
      		};
      		pll_periph0d6 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,fixed-factor-clock";
      			clocks = <0x00000006>;
      			clock-mult = <0x00000001>;
      			clock-div = <0x00000006>;
      			clock-output-names = "pll_periph0d6";
      			phandle = <0x000000cc>;
      		};
      		cpu {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,cpu-clock";
      			clock-output-names = "cpu";
      			phandle = <0x000000cd>;
      		};
      		axi {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "axi";
      			phandle = <0x000000ce>;
      		};
      		cpuapb {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "cpuapb";
      			phandle = <0x000000cf>;
      		};
      		psi {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "psi";
      			phandle = <0x000000d0>;
      		};
      		ahb1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "ahb1";
      			phandle = <0x000000d1>;
      		};
      		ahb2 {
      
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "ahb2";
      			phandle = <0x000000d2>;
      		};
      		ahb3 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "ahb3";
      			phandle = <0x000000d3>;
      		};
      		apb1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "apb1";
      			phandle = <0x000000d4>;
      		};
      		apb2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "apb2";
      			phandle = <0x000000d5>;
      		};
      		de0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			assigned-clock-parents = <0x0000000c>;
      			assigned-clock-rates = <0x11e1a300>;
      			assigned-clocks = <0x0000000d>;
      			clock-output-names = "de0";
      			phandle = <0x0000000d>;
      		};
      		de1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			assigned-clock-parents = <0x0000000c>;
      			assigned-clock-rates = <0x11e1a300>;
      			assigned-clocks = <0x0000000e>;
      			clock-output-names = "de1";
      			phandle = <0x0000000e>;
      		};
      		g2d {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "g2d";
      			assigned-clock-parents = <0x0000000c>;
      			assigned-clock-rates = <0x11e1a300>;
      			assigned-clocks = <0x0000000f>;
      			phandle = <0x0000000f>;
      		};
      		ee {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			assigned-clock-parents = <0x0000000c>;
      			assigned-clock-rates = <0x11e1a300>;
      			assigned-clocks = <0x00000010>;
      			clock-output-names = "ee";
      			phandle = <0x00000010>;
      		};
      		panel {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			assigned-clock-parents = <0x00000002>;
      			assigned-clock-rates = <0x01c9c380>;
      			assigned-clocks = <0x00000011>;
      			clock-output-names = "panel";
      			phandle = <0x00000011>;
      		};
      		gpu {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "gpu";
      			phandle = <0x000000d6>;
      		};
      		ce {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "ce";
      			phandle = <0x000000d7>;
      		};
      		ve {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "ve";
      			phandle = <0x000000d8>;
      		};
      		dma {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      
      			clock-output-names = "dma";
      			phandle = <0x000000d9>;
      		};
      		msgbox {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "msgbox";
      			phandle = <0x000000da>;
      		};
      		hwspinlock_rst {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "hwspinlock_rst";
      			phandle = <0x000000db>;
      		};
      		hwspinlock_bus {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "hwspinlock_bus";
      			phandle = <0x000000dc>;
      		};
      		hstimer {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "hstimer";
      			phandle = <0x000000dd>;
      		};
      		avs {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "avs";
      			phandle = <0x000000de>;
      		};
      		dbgsys {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "dbgsys";
      			phandle = <0x000000df>;
      		};
      		pwm {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "pwm";
      			phandle = <0x000000e0>;
      		};
      		iommu {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "iommu";
      			phandle = <0x000000e1>;
      		};
      		nand0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "nand0";
      			phandle = <0x000000e2>;
      		};
      		nand1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "nand1";
      			phandle = <0x000000e3>;
      		};
      		sdmmc0_mod {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "sdmmc0_mod";
      			phandle = <0x000000e4>;
      		};
      		sdmmc0_bus {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "sdmmc0_bus";
      			phandle = <0x000000e5>;
      		};
      		sdmmc0_rst {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "sdmmc0_rst";
      			phandle = <0x000000e6>;
      		};
      		sdmmc1_mod {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "sdmmc1_mod";
      			phandle = <0x000000e7>;
      		};
      		sdmmc1_bus {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "sdmmc1_bus";
      			phandle = <0x000000e8>;
      		};
      		sdmmc1_rst {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "sdmmc1_rst";
      			phandle = <0x000000e9>;
      		};
      		sdmmc2_mod {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "sdmmc2_mod";
      			phandle = <0x000000ea>;
      		};
      		sdmmc2_bus {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "sdmmc2_bus";
      			phandle = <0x000000eb>;
      		};
      		sdmmc2_rst {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "sdmmc2_rst";
      			phandle = <0x000000ec>;
      		};
      		uart0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "uart0";
      			phandle = <0x000000ed>;
      		};
      		uart1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "uart1";
      			phandle = <0x000000ee>;
      		};
      		uart2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "uart2";
      			phandle = <0x000000ef>;
      		};
      		uart3 {
      			#clock-cells = <0x00000000>;
      
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "uart3";
      			phandle = <0x000000f0>;
      		};
      		uart4 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "uart4";
      			phandle = <0x000000f1>;
      		};
      		uart5 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "uart5";
      			phandle = <0x000000f2>;
      		};
      		uart6 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "uart6";
      			phandle = <0x000000f3>;
      		};
      		scr0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "scr0";
      			phandle = <0x000000f4>;
      		};
      		gmac0_25m {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "gmac0_25m";
      			phandle = <0x000000f5>;
      		};
      		gmac1_25m {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "gmac1_25m";
      			phandle = <0x000000f6>;
      		};
      		gmac0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "gmac0";
      			phandle = <0x000000f7>;
      		};
      		gmac1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "gmac1";
      			phandle = <0x000000f8>;
      		};
      		gpadc {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "gpadc";
      			phandle = <0x000000f9>;
      		};
      		irtx {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "irtx";
      			phandle = <0x000000fa>;
      		};
      		ths {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "ths";
      			phandle = <0x000000fb>;
      		};
      		i2s0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "i2s0";
      			phandle = <0x000000fc>;
      		};
      		i2s1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "i2s1";
      			phandle = <0x000000fd>;
      		};
      		i2s2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "i2s2";
      			phandle = <0x000000fe>;
      		};
      		i2s3 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "i2s3";
      			phandle = <0x000000ff>;
      		};
      		spdif {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "spdif";
      			phandle = <0x00000100>;
      		};
      		dmic {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "dmic";
      			phandle = <0x00000101>;
      		};
      		codec_dac_1x {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "codec_dac_1x";
      			phandle = <0x00000102>;
      
      		};
      		codec_adc_1x {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "codec_adc_1x";
      			phandle = <0x00000103>;
      		};
      		codec_4x {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "codec_4x";
      			phandle = <0x00000104>;
      		};
      		usbphy0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "usbphy0";
      			phandle = <0x00000105>;
      		};
      		usbphy1 {
      
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "usbphy1";
      			phandle = <0x00000106>;
      		};
      		usbohci0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "usbohci0";
      			phandle = <0x00000107>;
      		};
      		usbohci0_12m {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "usbohci0_12m";
      			phandle = <0x00000108>;
      		};
      		usbohci1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "usbohci1";
      			phandle = <0x00000109>;
      		};
      		usbohci1_12m {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "usbohci1_12m";
      			phandle = <0x0000010a>;
      		};
      		usbehci0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "usbehci0";
      			phandle = <0x0000010b>;
      		};
      		usbehci1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "usbehci1";
      			phandle = <0x0000010c>;
      		};
      		usbotg {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "usbotg";
      			phandle = <0x0000010d>;
      		};
      		display_top {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "display_top";
      			phandle = <0x00000092>;
      		};
      		dpss_top0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "dpss_top0";
      			phandle = <0x00000093>;
      		};
      
      		dpss_top1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "dpss_top1";
      			phandle = <0x00000094>;
      		};
      		tcon_lcd0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "tcon_lcd0";
      			assigned-clocks = <0x00000012>;
      			assigned-clock-parents = <0x00000008>;
      			phandle = <0x00000012>;
      		};
      		tcon_lcd1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "tcon_lcd1";
      			assigned-clocks = <0x00000013>;
      			assigned-clock-parents = <0x00000009>;
      			phandle = <0x00000013>;
      		};
      		lvds {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "lvds";
      			phandle = <0x00000095>;
      		};
      		lvds1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "lvds1";
      			phandle = <0x00000096>;
      		};
      		mipi_host {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "mipi_host";
      			assigned-clocks = <0x00000014>;
      			assigned-clock-parents = <0x00000006>;
      			assigned-clock-rates = <0x08f0d180>;
      			phandle = <0x00000014>;
      		};
      		csi_top {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "csi_top";
      			phandle = <0x0000010e>;
      		};
      		csi_isp {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "csi_isp";
      			phandle = <0x0000010f>;
      		};
      		csi_master0 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "csi_master0";
      			phandle = <0x00000110>;
      		};
      		csi_master1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "csi_master1";
      			phandle = <0x00000111>;
      		};
      		pio {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "pio";
      			phandle = <0x00000112>;
      		};
      		ledc {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "ledc";
      			phandle = <0x00000113>;
      		};
      		cpurcir {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "cpurcir";
      			phandle = <0x00000114>;
      		};
      		losc_out {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "losc_out";
      			phandle = <0x00000115>;
      		};
      		cpurcpus_pll {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "cpurcpus_pll";
      			phandle = <0x00000116>;
      		};
      		cpurcpus {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "cpurcpus";
      			phandle = <0x00000117>;
      		};
      		cpurahbs {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "cpurahbs";
      			phandle = <0x00000118>;
      		};
      		cpurapbs1 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "cpurapbs1";
      			phandle = <0x00000119>;
      		};
      		cpurapbs2_pll {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "cpurapbs2_pll";
      			phandle = <0x0000011a>;
      		};
      		cpurapbs2 {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "cpurapbs2";
      
      			phandle = <0x0000011b>;
      		};
      		ppu {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "ppu";
      			phandle = <0x0000011c>;
      
      		};
      		cpurpio {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "cpurpio";
      			phandle = <0x0000011d>;
      		};
      		dcxo_out {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "dcxo_out";
      			phandle = <0x0000011e>;
      		};
      		suart {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-cpus-clock";
      			clock-output-names = "suart";
      			phandle = <0x0000011f>;
      		};
      		lradc {
      			#clock-cells = <0x00000000>;
      			compatible = "allwinner,periph-clock";
      			clock-output-names = "lradc";
      			phandle = <0x00000120>;
      		};
      	};
      	aliases {
      		serial0 = "/soc@2900000/uart@5000000";
      		serial1 = "/soc@2900000/uart@5000400";
      		serial2 = "/soc@2900000/uart@5000800";
      		serial3 = "/soc@2900000/uart@5000c00";
      		serial4 = "/soc@2900000/uart@5001000";
      		serial5 = "/soc@2900000/uart@5001400";
      		serial6 = "/soc@2900000/uart@5001800";
      		serial7 = "/soc@2900000/uart@7080000";
      		disp = "/soc@2900000/uboot_disp@06100000";
      		lcd0 = "/soc@2900000/lcd0@1c0c000";
      		lcd1 = "/soc@2900000/lcd1@1";
      		eink = "/soc@2900000/uboot_eink@6400000";
      		mmc0 = "/soc@2900000/sdmmc@4020000";
      		mmc2 = "/soc@2900000/sdmmc@4022000";
      		nand0 = "/soc@2900000/nand0@04011000";
      		twi0 = "/soc@2900000/twi@5002000";
      		twi1 = "/soc@2900000/twi@5002400";
      		twi2 = "/soc@2900000/twi@5002800";
      		twi3 = "/soc@2900000/twi@5002c00";
      		twi4 = "/soc@2900000/twi@5003000";
      		twi5 = "/soc@2900000/twi@5003400";
      		twi6 = "/soc@2900000/s_twi@7081400";
      		twi7 = "/soc@2900000/s_twi@7081800";
      		spi0 = "/soc@2900000/spi@5010000";
      		spi1 = "/soc@2900000/spi@5011000";
      		spi2 = "/soc@2900000/spi@5012000";
      		ledc = "/soc@2900000/ledc@0x5018000";
      		pwm = "/soc@2900000/pwm@300a000";
      		pwm0 = "/soc@2900000/pwm0@300a010";
      		pwm1 = "/soc@2900000/pwm1@300a011";
      		pwm2 = "/soc@2900000/pwm2@300a012";
      		pwm3 = "/soc@2900000/pwm3@300a013";
      		pwm4 = "/soc@2900000/pwm4@300a014";
      		pwm5 = "/soc@2900000/pwm5@300a015";
      		pwm6 = "/soc@2900000/pwm6@300a016";
      		pwm7 = "/soc@2900000/pwm7@300a017";
      		pwm8 = "/soc@2900000/pwm8@300a018";
      		pwm9 = "/soc@2900000/pwm9@300a019";
      		global-timer0 = "/soc@2900000/timer@3009000";
      		pmu0 = "/soc@2900000/s_twi@7081400/pmu@34";
      		standby-param = "/soc@2900000/standby_param@7000400";
      		ctp = "/soc@2900000/twi@5002000/ctp@0";
      	};
      	reserved-memory {
      
      		#address-cells = <0x00000002>;
      		#size-cells = <0x00000002>;
      		ranges;
      		bl31 {
      			reg = <0x00000000 0x48000000 0x00000000 0x01000000>;
      		};
      	};
      	chosen {
      		bootargs = "earlyprintk=sunxi-uart,0x05000000 loglevel=8 initcall_debug=0 console=ttyS0 init=/init";
      		linux,initrd-start = <0x00000000 0x00000000>;
      		linux,initrd-end = <0x00000000 0x00000000>;
      	};
      
      	firmware {
      		android {
      			compatible = "android,firmware";
      			boot_devices = "soc@2900000/4020000.sdmmc,soc@2900000/4022000.sdmmc,soc@2900000";
      			vbmeta {
      				compatible = "android,vbmeta";
      				parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot";
      			};
      		};
      		optee {
      			compatible = "linaro,optee-tz";
      			method = "smc";
      		};
      	};
      	cpus {
      		#address-cells = <0x00000002>;
      		#size-cells = <0x00000000>;
      		cpu@0 {
      			device_type = "cpu";
      			compatible = "arm,cortex-a53", "arm,armv8";
      			reg = <0x00000000 0x00000000>;
      			enable-method = "psci";
      			clocks = <0x00000015 0x00000018>;
      			clock-latency = <0x001e8480>;
      			clock-frequency = <0x4ead9a00>;
      			dynamic-power-coefficient = <0x000000be>;
      			operating-points-v2 = <0x00000016>;
      			cpu-idle-states = <0x00000017 0x00000018>;
      			#cooling-cells = <0x00000002>;
      			cpu-supply = <0x00000019>;
      			phandle = <0x0000001f>;
      		};
      		cpu@1 {
      			device_type = "cpu";
      			compatible = "arm,cortex-a53", "arm,armv8";
      			reg = <0x00000000 0x00000001>;
      			enable-method = "psci";
      			clocks = <0x00000015 0x00000018>;
      			clock-frequency = <0x4ead9a00>;
      			operating-points-v2 = <0x00000016>;
      			cpu-idle-states = <0x00000017 0x00000018>;
      			#cooling-cells = <0x00000002>;
      			phandle = <0x00000021>;
      		};
      		cpu@2 {
      			device_type = "cpu";
      			compatible = "arm,cortex-a53", "arm,armv8";
      			reg = <0x00000000 0x00000002>;
      			enable-method = "psci";
      			clocks = <0x00000015 0x00000018>;
      			clock-frequency = <0x4ead9a00>;
      			operating-points-v2 = <0x00000016>;
      			cpu-idle-states = <0x00000017 0x00000018>;
      			#cooling-cells = <0x00000002>;
      			phandle = <0x00000022>;
      		};
      		cpu@3 {
      			device_type = "cpu";
      			compatible = "arm,cortex-a53", "arm,armv8";
      			reg = <0x00000000 0x00000003>;
      			enable-method = "psci";
      			clocks = <0x00000015 0x00000018>;
      			clock-frequency = <0x4ead9a00>;
      			operating-points-v2 = <0x00000016>;
      			cpu-idle-states = <0x00000017 0x00000018>;
      			#cooling-cells = <0x00000002>;
      			phandle = <0x00000023>;
      		};
      		idle-states {
      			entry-method = "arm,psci";
      			cpu-sleep-0 {
      				compatible = "arm,idle-state";
      				arm,psci-suspend-param = <0x00010000>;
      				entry-latency-us = <0x0000002e>;
      				exit-latency-us = <0x0000003b>;
      				min-residency-us = <0x00000df2>;
      				local-timer-stop;
      				phandle = <0x00000017>;
      			};
      			cluster-sleep-0 {
      				compatible = "arm,idle-state";
      				arm,psci-suspend-param = <0x01010000>;
      				entry-latency-us = <0x0000002f>;
      				exit-latency-us = <0x0000004a>;
      				min-residency-us = <0x00001388>;
      				local-timer-stop;
      				phandle = <0x00000018>;
      			};
      
      		};
      	};
      	cpu-opp-table {
      		compatible = "allwinner,sun50i-operating-points";
      		nvmem-cells = <0x0000001a 0x0000001b 0x0000001c>;
      		nvmem-cell-names = "speed", "bin", "bin_ext";
      		opp-shared;
      		phandle = <0x00000016>;
      		opp@408000000 {
      			opp-hz = <0x00000000 0x18519600>;
      			clock-latency-ns = <0x0003b9b0>;
      			opp-microvolt-a0 = <0x000dbba0>;
      			opp-microvolt-a1 = <0x000dbba0>;
      			opp-microvolt-a2 = <0x000dbba0>;
      			opp-microvolt-a3 = <0x000e57e0>;
      			opp-microvolt-a4 = <0x000e57e0>;
      			opp-microvolt-a5 = <0x000e09c0>;
      			opp-microvolt-a6 = <0x000e09c0>;
      			opp-microvolt-b0 = <0x000dbba0>;
      			opp-microvolt-b1 = <0x000dbba0>;
      			opp-microvolt-b2 = <0x000e57e0>;
      			opp-microvolt-b3 = <0x000e09c0>;
      			opp-supported-hw = <0x00000007>;
      		};
      		opp@600000000 {
      			opp-hz = <0x00000000 0x23c34600>;
      			clock-latency-ns = <0x0003b9b0>;
      			opp-microvolt-a0 = <0x000dbba0>;
      			opp-microvolt-a1 = <0x000dbba0>;
      			opp-microvolt-a2 = <0x000dbba0>;
      			opp-microvolt-a3 = <0x000e57e0>;
      			opp-microvolt-a4 = <0x000e57e0>;
      			opp-microvolt-a5 = <0x000e09c0>;
      			opp-microvolt-a6 = <0x000e09c0>;
      			opp-microvolt-b0 = <0x000dbba0>;
      			opp-microvolt-b1 = <0x000dbba0>;
      			opp-microvolt-b2 = <0x000e57e0>;
      			opp-microvolt-b3 = <0x000e09c0>;
      			opp-supported-hw = <0x00000007>;
      		};
      		opp@816000000 {
      			opp-hz = <0x00000000 0x30a32c00>;
      			clock-latency-ns = <0x0003b9b0>;
      			opp-microvolt-a0 = <0x000e57e0>;
      			opp-microvolt-a1 = <0x000dbba0>;
      			opp-microvolt-a2 = <0x000dbba0>;
      			opp-microvolt-a3 = <0x000e57e0>;
      			opp-microvolt-a4 = <0x000e57e0>;
      			opp-microvolt-a5 = <0x000e09c0>;
      			opp-microvolt-a6 = <0x000e09c0>;
      			opp-microvolt-b0 = <0x000dbba0>;
      			opp-microvolt-b1 = <0x000dbba0>;
      			opp-microvolt-b2 = <0x000e57e0>;
      			opp-microvolt-b3 = <0x000e09c0>;
      			opp-supported-hw = <0x00000007>;
      		};
      		opp@1008000000 {
      			opp-hz = <0x00000000 0x3c14dc00>;
      			clock-latency-ns = <0x0003b9b0>;
      			opp-microvolt-a0 = <0x000f9060>;
      			opp-microvolt-a1 = <0x000ef420>;
      			opp-microvolt-a2 = <0x000e7ef0>;
      			opp-microvolt-a3 = <0x000f9060>;
      			opp-microvolt-a4 = <0x000ea600>;
      			opp-microvolt-a5 = <0x000e57e0>;
      			opp-microvolt-a6 = <0x000e57e0>;
      			opp-microvolt-b0 = <0x000ef420>;
      			opp-microvolt-b1 = <0x000e7ef0>;
      			opp-microvolt-b2 = <0x000ea600>;
      			opp-microvolt-b3 = <0x000e57e0>;
      			opp-supported-hw = <0x00000007>;
      		};
      		opp@1200000000 {
      			opp-hz = <0x00000000 0x47868c00>;
      			clock-latency-ns = <0x0003b9b0>;
      			opp-microvolt-a0 = <0x0010c8e0>;
      			opp-microvolt-a1 = <0x000f9060>;
      			opp-microvolt-a2 = <0x000f4240>;
      			opp-microvolt-a3 = <0x0010c8e0>;
      			opp-microvolt-a4 = <0x000ef420>;
      			opp-microvolt-a5 = <0x000ea600>;
      			opp-microvolt-a6 = <0x000ea600>;
      			opp-microvolt-b0 = <0x000f9060>;
      			opp-microvolt-b1 = <0x000f4240>;
      			opp-microvolt-b2 = <0x000ef420>;
      			opp-microvolt-b3 = <0x000ea600>;
      			opp-supported-hw = <0x00000007>;
      		};
      		opp@1320000000 {
      			opp-hz = <0x00000000 0x4ead9a00>;
      			clock-latency-ns = <0x0003b9b0>;
      			opp-microvolt-a0 = <0x0011b340>;
      			opp-microvolt-a1 = <0x00102ca0>;
      			opp-microvolt-a2 = <0x000fb770>;
      			opp-microvolt-a3 = <0x0011b340>;
      			opp-microvolt-a4 = <0x000f9060>;
      			opp-microvolt-a5 = <0x000f4240>;
      			opp-microvolt-a6 = <0x000f4240>;
      			opp-microvolt-b0 = <0x00102ca0>;
      			opp-microvolt-b1 = <0x000fb770>;
      			opp-microvolt-b2 = <0x000f9060>;
      			opp-microvolt-b3 = <0x000f4240>;
      			opp-supported-hw = <0x00000007>;
      		};
      		opp@1416000000 {
      			opp-hz = <0x00000000 0x54667200>;
      			clock-latency-ns = <0x0003b9b0>;
      			opp-microvolt-b0 = <0x0010c8e0>;
      			opp-microvolt-b1 = <0x001053b0>;
      			opp-microvolt-b2 = <0x00102ca0>;
      			opp-microvolt-b3 = <0x000fde80>;
      			opp-supported-hw = <0x00000006>;
      		};
      		opp@1464000000 {
      			opp-hz = <0x00000000 0x5742de00>;
      			clock-latency-ns = <0x0003b9b0>;
      			opp-microvolt-a0 = <0x00120160>;
      			opp-microvolt-a1 = <0x00120160>;
      			opp-microvolt-a2 = <0x00113e10>;
      			opp-microvolt-a3 = <0x00120160>;
      			opp-microvolt-a4 = <0x0010c8e0>;
      			opp-microvolt-a5 = <0x00107ac0>;
      			opp-microvolt-a6 = <0x00107ac0>;
      			opp-supported-hw = <0x00000001>;
      		};
      		opp@1512000000 {
      			opp-hz = <0x00000000 0x5a1f4a00>;
      			clock-latency-ns = <0x0003b9b0>;
      			opp-microvolt-b0 = <0x00120160>;
      			opp-microvolt-b1 = <0x00113e10 0x00113e10 0x00116520>;
      			opp-microvolt-b2 = <0x0010c8e0>;
      			opp-microvolt-b3 = <0x00107ac0>;
      			opp-supported-hw = <0x00000006>;
      		};
      		opp@1608000000 {
      			opp-hz = <0x00000000 0x5fd82200>;
      			clock-latency-ns = <0x0003b9b0>;
      			opp-microvolt-b0 = <0x00120160>;
      			opp-microvolt-b1 = <0x00113e10 0x00113e10 0x00116520>;
      			opp-supported-hw = <0x00000000>;
      		};
      	};
      	dcxo24M-clk {
      		#clock-cells = <0x00000000>;
      		compatible = "fixed-clock";
      		clock-frequency = <0x016e3600>;
      		clock-output-names = "dcxo24M";
      		phandle = <0x00000028>;
      	};
      	thermal-zones {
      		cpu_thermal_zone {
      			polling-delay-passive = <0x000001f4>;
      			polling-delay = <0x000003e8>;
      			thermal-sensors = <0x0000001d 0x00000000>;
      			sustainable-power = <0x000004b0>;
      			trips {
      				phandle = <0x00000121>;
      				trip-point@0 {
      					temperature = <0x00011170>;
      					type = "passive";
      					hysteresis = <0x00000000>;
      					phandle = <0x00000122>;
      				};
      				trip-point@1 {
      					temperature = <0x00015f90>;
      					type = "passive";
      					hysteresis = <0x00000000>;
      					phandle = <0x0000001e>;
      				};
      				cpu_crit@0 {
      					temperature = <0x0001adb0>;
      					type = "critical";
      					hysteresis = <0x00000000>;
      					phandle = <0x00000123>;
      				};
      			};
      			cooling-maps {
      				map0 {
      					trip = <0x0000001e>;
      					cooling-device = <0x0000001f 0xffffffff 0xffffffff>;
      					contribution = <0x00000400>;
      				};
      			};
      		};
      		gpu_thermal_zone {
      			polling-delay-passive = <0x000001f4>;
      			polling-delay = <0x000003e8>;
      			thermal-sensors = <0x0000001d 0x00000001>;
      			sustainable-power = <0x0000044c>;
      		};
      		ddr_thermal_zone {
      			polling-delay-passive = <0x00000000>;
      			polling-delay = <0x00000000>;
      			thermal-sensors = <0x0000001d 0x00000002>;
      		};
      	};
      	psci {
      		compatible = "arm,psci-1.0";
      		method = "smc";
      	};
      	memory@40000000 {
      		device_type = "memory";
      		reg = <0x00000000 0x40000000 0x00000000 0x20000000>;
      	};
      	interrupt-controller@3020000 {
      
      		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
      		#interrupt-cells = <0x00000003>;
      		#address-cells = <0x00000000>;
      		device_type = "gic";
      		interrupt-controller;
      		reg = <0x00000000 0x03021000 0x00000000 0x00001000 0x00000000 0x03022000 0x00000000 0x00002000 0x00000000 0x03024000 0x00000000 0x00002000 0x00000000 0x03026000 0x00000000 0x00002000>;
      		interrupts = <0x00000001 0x00000009 0x00000f04>;
      		interrupt-parent = <0x00000020>;
      		phandle = <0x00000020>;
      	};
      	interrupt-controller@0 {
      		compatible = "allwinner,sunxi-wakeupgen";
      		interrupt-controller;
      		#interrupt-cells = <0x00000003>;
      		interrupt-parent = <0x00000020>;
      		phandle = <0x00000001>;
      	};
      	timer_arch {
      		compatible = "arm,armv8-timer";
      		interrupts = <0x00000001 0x0000000d 0x00000f08 0x00000001 0x0000000e 0x00000f08 0x00000001 0x0000000b 0x00000f08 0x00000001 0x0000000a 0x00000f08>;
      		clock-frequency = <0x016e3600>;
      
      		interrupt-parent = <0x00000020>;
      		arm,no-tick-in-suspend;
      	};
      	pmu {
      		compatible = "arm,armv8-pmuv3";
      		interrupts = <0x00000000 0x0000008c 0x00000004 0x00000000 0x0000008d 0x00000004 0x00000000 0x0000008e 0x00000004 0x00000000 0x0000008f 0x00000004>;
      		interrupt-affinity = <0x0000001f 0x00000021 0x00000022 0x00000023>;
      	};
      	gpu-power-domain@7001000 {
      		compatible = "allwinner,gpu-pd", "syscon";
      		reg = <0x00000000 0x07001000 0x00000000 0x00000040>;
      		interrupts = <0x00000000 0x00000077 0x00000004>;
      		interrupt-names = "ppu-irq";
      		clocks = <0x00000024 0x00000008>;
      		clock-names = "ppu";
      		resets = <0x00000024 0x00000002>;
      		reset-names = "ppu_rst";
      		#power-domain-cells = <0x00000000>;
      		phandle = <0x000000b2>;
      	};
      	intc-nmi@7010320 {
      		compatible = "allwinner,sun8i-nmi";
      		interrupt-parent = <0x00000020>;
      		#interrupt-cells = <0x00000002>;
      		#address-cells = <0x00000000>;
      		interrupt-controller;
      		reg = <0x00000000 0x07010320 0x00000000 0x0000000c>;
      		interrupts = <0x00000000 0x00000067 0x00000004>;
      		phandle = <0x0000005e>;
      	};
      	dram {
      		compatible = "allwinner,dram";
      		clocks = <0x00000015 0x00000002>;
      		clock-names = "pll_ddr";
      		dram_clk = <0x000002a0>;
      		dram_type = <0x00000008>;
      
      		dram_zq = <0x07070707>;
      		dram_odt_en = <0x0d0d0d0d>;
      		dram_para1 = <0x00000e0e>;
      		dram_para2 = <0x0d0a050c>;
      		dram_mr0 = <0x000030fa>;
      		dram_mr1 = <0x08001000>;
      		dram_mr2 = <0x00000000>;
      		dram_mr3 = <0x00000034>;
      		dram_tpr0 = <0x0000001b>;
      		dram_tpr1 = <0x00000033>;
      		dram_tpr2 = <0x00000003>;
      		dram_tpr3 = <0x00000000>;
      		dram_tpr4 = <0x00000000>;
      		dram_tpr5 = <0x00000004>;
      		dram_tpr6 = <0x00000072>;
      		dram_tpr7 = <0x00000000>;
      		dram_tpr8 = <0x00000007>;
      		dram_tpr9 = <0x00000000>;
      		dram_tpr10 = <0x00000000>;
      		dram_tpr11 = <0x00000026>;
      		dram_tpr12 = <0x06060606>;
      		dram_tpr13 = <0x04040404>;
      		phandle = <0x00000124>;
      	};
      	clk_ddr {
      		compatible = "allwinner,clock_ddr";
      		reg = <0x00000000 0x03001000 0x00000000 0x00001000 0x00000000 0x04810000 0x00000000 0x00002000>;
      		clocks = <0x00000015 0x00000002>;
      		clock-names = "pll_ddr";
      		#clock-cells = <0x00000000>;
      		phandle = <0x00000025>;
      	};
      	nsi-pmu@3100000 {
      		compatible = "allwinner,sunxi-dfi", "syscon";
      		reg = <0x00000000 0x03100000 0x00000000 0x00010000>;
      		clocks = <0x00000025>;
      		clock-names = "dram";
      		phandle = <0x00000026>;
      	};
      	opp_table {
      		compatible = "operating-points-v2";
      		phandle = <0x00000027>;
      		opp@336000000 {
      			opp-hz = <0x00000000 0x1406f400>;
      		};
      		opp@448000000 {
      			opp-hz = <0x00000000 0x1ab3f000>;
      		};
      		opp@537600000 {
      			opp-hz = <0x00000000 0x200b2000>;
      		};
      		opp@672000000 {
      			opp-hz = <0x00000000 0x280de800>;
      		};
      	};
      	sunxi-dmcfreq {
      		compatible = "allwinner,sunxi-dmc";
      		devfreq-events = <0x00000026>;
      		clocks = <0x00000025>;
      		clock-names = "dram";
      		operating-points-v2 = <0x00000027>;
      		upthreshold = <0x00000032>;
      		downdifferential = <0x00000014>;
      	};
      	uboot {
      		phandle = <0x00000125>;
      	};
      	iommu@30f0000 {
      		compatible = "allwinner,sunxi-iommu";
      		reg = <0x00000000 0x030f0000 0x00000000 0x00001000>;
      		interrupts = <0x00000000 0x00000042 0x00000004>;
      		interrupt-names = "iommu-irq";
      		clocks = <0x00000015 0x00000037>;
      		clock-names = "iommu";
      		#iommu-cells = <0x00000002>;
      		phandle = <0x00000081>;
      	};
      	dump_reg@20000 {
      		compatible = "allwinner,sunxi-dump-reg";
      		reg = <0x00000000 0x00020000 0x00000000 0x00000004>;
      		phandle = <0x00000126>;
      	};
      	pio-18 {
      		compatible = "regulator-fixed";
      		regulator-name = "pio-18";
      		regulator-min-microvolt = <0x001b7740>;
      		regulator-max-microvolt = <0x001b7740>;
      		phandle = <0x000000b0>;
      	};
      	pio-28 {
      		compatible = "regulator-fixed";
      		regulator-name = "pio-28";
      		regulator-min-microvolt = <0x002ab980>;
      		regulator-max-microvolt = <0x002ab980>;
      		phandle = <0x00000127>;
      	};
      	pio-33 {
      		compatible = "regulator-fixed";
      		regulator-name = "pio-33";
      		regulator-min-microvolt = <0x00325aa0>;
      		regulator-max-microvolt = <0x00325aa0>;
      		phandle = <0x000000b1>;
      	};
      	soc@2900000 {
      		compatible = "simple-bus";
      		#address-cells = <0x00000002>;
      		#size-cells = <0x00000002>;
      		ranges;
      		device_type = "soc";
      		phandle = <0x00000128>;
      		sram_ctrl@3000000 {
      			compatible = "allwinner,sram_ctrl";
      			reg = <0x00000000 0x03000000 0x00000000 0x0000016c>;
      			phandle = <0x00000129>;
      			soc_ver {
      				offset = <0x00000024>;
      				mask = <0x00000007>;
      				shift = <0x00000000>;
      				ver_a = <0x18550000>;
      				ver_b = <0x18550001>;
      
      			};
      			soc_id {
      				offset = <0x00000200>;
      				mask = <0x00000001>;
      				shift = <0x00000016>;
      			};
      			soc_bin {
      				offset = <0x00000000>;
      				mask = <0x000003ff>;
      				shift = <0x00000000>;
      			};
      		};
      		clock@3001000 {
      			compatible = "allwinner,sun50iw10-ccu";
      			reg = <0x00000000 0x03001000 0x00000000 0x00001000>;
      			clocks = <0x00000028 0x00000029 0x00000002 0x00000029 0x00000001>;
      			clock-names = "hosc", "losc", "iosc";
      			#clock-cells = <0x00000001>;
      			#reset-cells = <0x00000001>;
      			phandle = <0x00000015>;
      		};
      		clock@7010000 {
      			compatible = "allwinner,sun50iw10-r-ccu";
      			reg = <0x00000000 0x07010000 0x00000000 0x00000240>;
      			clocks = <0x00000028 0x00000029 0x00000002 0x00000029 0x00000001 0x00000015 0x00000003>;
      			clock-names = "hosc", "losc", "iosc", "pll-periph";
      			#clock-cells = <0x00000001>;
      			#reset-cells = <0x00000001>;
      			phandle = <0x00000024>;
      		};
      		dma-controller@3002000 {
      			compatible = "allwinner,sun50iw10-dma";
      			reg = <0x00000000 0x03002000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x0000002d 0x00000004>;
      			clocks = <0x00000015 0x0000002f 0x00000015 0x00000038>;
      			clock-names = "bus", "mbus";
      			dma-channels = <0x00000008>;
      			dma-requests = <0x00000034>;
      			resets = <0x00000015 0x00000008>;
      			#dma-cells = <0x00000001>;
      			phandle = <0x00000055>;
      		};
      		rtc@7000000 {
      			compatible = "allwinner,sun50iw10p1-rtc";
      			device_type = "rtc";
      			wakeup-source;
      			reg = <0x00000000 0x07000000 0x00000000 0x00000200>;
      			interrupts = <0x00000000 0x0000006c 0x00000004>;
      			clocks = <0x00000024 0x0000000e 0x00000029 0x00000004>;
      			clock-names = "r-ahb-rtc", "rtc-1k";
      			resets = <0x00000024 0x00000007>;
      			gpr_offset = <0x00000100>;
      			gpr_len = <0x00000008>;
      			gpr_cur_pos = <0x00000006>;
      			phandle = <0x0000012a>;
      		};
      		rtc_ccu@7000000 {
      			compatible = "allwinner,sun50iw10p1-rtc-ccu";
      			device_type = "rtc-ccu";
      			reg = <0x00000000 0x07000000 0x00000000 0x00000200>;
      			#clock-cells = <0x00000001>;
      			clock-output-names = "dcxo24M-out", "iosc", "osc32k", "osc32k-out", "rtc-1k";
      			phandle = <0x00000029>;
      		};
      		nsi-controller@3100000 {
      			compatible = "allwinner,sun50i-nsi";
      			interrupts = <0x00000000 0x0000003f 0x00000004>;
      			reg = <0x00000000 0x03100000 0x00000000 0x00010000>;
      			clocks = <0x00000015 0x00000004 0x00000015 0x0000001f 0x00000015 0x00000002>;
      			clock-names = "pll", "bus", "sdram";
      			resets = <0x00000015 0x00000000>;
      			clock-frequency = <0x17d78400>;
      			#nsi-cells = <0x00000001>;
      			phandle = <0x0000012b>;
      			cpu {
      				mode = <0x00000000>;
      				pri = <0x00000000>;
      				select = <0x00000000>;
      			};
      			gpu {
      				mode = <0x00000000>;
      				pri = <0x00000003>;
      				select = <0x00000001>;
      			};
      			sd1 {
      				mode = <0x00000001>;
      				pri = <0x00000002>;
      				select = <0x00000000>;
      			};
      			mstg {
      				mode = <0x00000000>;
      				pri = <0x00000001>;
      				select = <0x00000000>;
      			};
      			ce {
      				mode = <0x00000001>;
      				pri = <0x00000000>;
      				select = <0x00000001>;
      			};
      		};
      		sid@3006000 {
      			compatible = "allwinner,sun50iw10p1-sid", "allwinner,sunxi-sid";
      			reg = <0x00000000 0x03006000 0x00000000 0x00001000>;
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000001>;
      			speed@00 {
      				reg = <0x00000000 0x00000002>;
      				phandle = <0x0000001a>;
      			};
      			calib@14 {
      				reg = <0x00000014 0x00000008>;
      				phandle = <0x0000002a>;
      			};
      			calib@1c {
      				reg = <0x0000001c 0x00000002>;
      				phandle = <0x0000001b>;
      			};
      			calib@28 {
      				reg = <0x00000028 0x00000004>;
      				phandle = <0x0000001c>;
      			};
      			secure_status {
      				reg = <0x00000000 0x00000000>;
      				offset = <0x000000a0>;
      				size = <0x00000004>;
      			};
      			chipid {
      				reg = <0x00000000 0x00000000>;
      				offset = <0x00000200>;
      				size = <0x00000010>;
      			};
      			rotpk {
      				reg = <0x00000000 0x00000000>;
      				offset = <0x00000270>;
      				size = <0x00000020>;
      			};
      		};
      		ce@1904000 {
      			compatible = "allwinner,sunxi-ce";
      			device_name = "ce";
      			reg = <0x00000000 0x01904000 0x00000000 0x000000a0 0x00000000 0x01904800 0x00000000 0x000000a0>;
      			interrupts = <0x00000000 0x0000005c 0x00000001 0x00000000 0x0000005d 0x00000001>;
      			clock-frequency = <0x17d78400>;
      			clocks = <0x00000015 0x0000002c 0x00000015 0x0000002b 0x00000015 0x0000003a 0x00000015 0x00000004>;
      			clock-names = "bus_ce", "ce_clk", "mbus_ce", "pll_periph0_2x";
      			resets = <0x00000015 0x00000006>;
      			phandle = <0x0000012c>;
      		};
      		ths@5070400 {
      			compatible = "allwinner,sun50iw10p1-ths";
      			reg = <0x00000000 0x05070400 0x00000000 0x00000400>;
      			clocks = <0x00000015 0x00000067>;
      			clock-names = "bus";
      			resets = <0x00000015 0x0000002a>;
      			nvmem-cells = <0x0000002a>;
      			nvmem-cell-names = "calibration";
      			#thermal-sensor-cells = <0x00000001>;
      			phandle = <0x0000001d>;
      		};
      		timer@3009000 {
      			compatible = "allwinner,sun4i-a10-timer";
      			device_type = "soc_timer";
      			reg = <0x00000000 0x03009000 0x00000000 0x000000a0>;
      			interrupt-parent = <0x00000020>;
      			interrupts = <0x00000000 0x00000033 0x00000004>;
      			clocks = <0x00000028>;
      			phandle = <0x0000012d>;
      		};
      		uart@5000000 {
      			compatible = "allwinner,sun50i-uart";
      			device_type = "uart0";
      			reg = <0x00000000 0x05000000 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000000 0x00000004>;
      			sunxi,uart-fifosize = <0x00000040>;
      			clocks = <0x00000015 0x0000004b>;
      			clock-names = "uart0";
      			resets = <0x00000015 0x00000015>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000002b>;
      			pinctrl-1 = <0x0000002c>;
      			uart0_port = <0x00000000>;
      			uart0_type = <0x00000002>;
      			uart-supply = <0x0000002d>;
      			phandle = <0x0000012e>;
      		};
      		uart@5000400 {
      			compatible = "allwinner,sun50i-uart";
      			device_type = "uart1";
      			reg = <0x00000000 0x05000400 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000001 0x00000004>;
      			sunxi,uart-fifosize = <0x00000040>;
      			clocks = <0x00000015 0x0000004c>;
      			clock-names = "uart1";
      			resets = <0x00000015 0x00000016>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000002e>;
      			pinctrl-1 = <0x0000002f>;
      			uart1_port = <0x00000001>;
      			uart1_type = <0x00000004>;
      			status = "okay";
      			phandle = <0x0000012f>;
      		};
      		uart@5000800 {
      			compatible = "allwinner,sun50i-uart";
      			device_type = "uart2";
      			reg = <0x00000000 0x05000800 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000002 0x00000004>;
      			sunxi,uart-fifosize = <0x00000040>;
      			clocks = <0x00000015 0x0000004d>;
      			clock-names = "uart2";
      			resets = <0x00000015 0x00000017>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000030>;
      			pinctrl-1 = <0x00000031>;
      			uart2_port = <0x00000002>;
      			uart2_type = <0x00000004>;
      			status = "disabled";
      			phandle = <0x00000130>;
      		};
      		uart@5000c00 {
      			compatible = "allwinner,sun50i-uart";
      			device_type = "uart3";
      			reg = <0x00000000 0x05000c00 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000003 0x00000004>;
      			sunxi,uart-fifosize = <0x00000040>;
      			clocks = <0x00000015 0x0000004e>;
      			clock-names = "uart3";
      			resets = <0x00000015 0x00000018>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000032>;
      			pinctrl-1 = <0x00000033>;
      			uart3_port = <0x00000003>;
      			uart3_type = <0x00000004>;
      			status = "disabled";
      			phandle = <0x00000131>;
      		};
      		uart@5001000 {
      			compatible = "allwinner,sun50i-uart";
      			device_type = "uart4";
      			reg = <0x00000000 0x05001000 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000004 0x00000004>;
      			clocks = <0x00000015 0x0000004f>;
      			clock-names = "uart4";
      			resets = <0x00000015 0x00000019>;
      			sunxi,uart-fifosize = <0x00000040>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000034>;
      			pinctrl-1 = <0x00000035>;
      			uart4_port = <0x00000004>;
      			uart4_type = <0x00000004>;
      			status = "disabled";
      			phandle = <0x00000132>;
      		};
      		uart@5001400 {
      			compatible = "allwinner,sun50i-uart";
      			device_type = "uart5";
      			reg = <0x00000000 0x05001400 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000005 0x00000004>;
      			sunxi,uart-fifosize = <0x00000040>;
      			clocks = <0x00000015 0x00000050>;
      			clock-names = "uart5";
      			resets = <0x00000015 0x0000001a>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000036>;
      			pinctrl-1 = <0x00000037>;
      			uart5_port = <0x00000005>;
      			uart5_type = <0x00000004>;
      			status = "disabled";
      			phandle = <0x00000133>;
      		};
      		uart@5001800 {
      			compatible = "allwinner,sun50i-uart";
      			device_type = "uart6";
      			reg = <0x00000000 0x05001800 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000006 0x00000004>;
      			sunxi,uart-fifosize = <0x00000040>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000038>;
      			pinctrl-1 = <0x00000039>;
      			uart6_port = <0x00000006>;
      			uart6_type = <0x00000004>;
      			status = "disabled";
      			phandle = <0x00000134>;
      		};
      		uart@7080000 {
      			compatible = "allwinner,sun50i-uart";
      			device_type = "uart7";
      			reg = <0x00000000 0x07080000 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000070 0x00000004>;
      			sunxi,uart-fifosize = <0x00000040>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000003a>;
      			pinctrl-1 = <0x0000003b>;
      			uart7_port = <0x00000007>;
      			uart7_type = <0x00000002>;
      			status = "disabled";
      			phandle = <0x00000135>;
      		};
      		sdmmc@4022000 {
      			compatible = "allwinner,sunxi-mmc-v4p6x";
      			device_type = "sdc2";
      			reg = <0x00000000 0x04022000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x00000029 0x00000004>;
      			clocks = <0x00000028 0x00000015 0x00000006 0x00000015 0x00000045 0x00000015 0x00000049>;
      			clock-names = "osc24m", "pll_periph", "mmc", "ahb";
      			resets = <0x00000015 0x00000013>;
      			reset-names = "rst";
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000003c 0x0000003d>;
      			pinctrl-1 = <0x0000003e>;
      			bus-width = <0x00000008>;
      			req-page-count = <0x00000002>;
      			cap-mmc-highspeed;
      			cap-cmd23;
      			mmc-cache-ctrl;
      			non-removable;
      			max-frequency = <0x05f5e100>;
      			cap-erase;
      			mmc-high-capacity-erase-size;
      			no-sdio;
      			no-sd;
      			sdc_tm4_sm0_freq0 = <0x00000000>;
      			sdc_tm4_sm0_freq1 = <0x00000000>;
      			sdc_tm4_sm1_freq0 = <0x00000000>;
      			sdc_tm4_sm1_freq1 = <0x00000000>;
      			sdc_tm4_sm2_freq0 = <0x00000000>;
      			sdc_tm4_sm2_freq1 = <0x00000000>;
      			sdc_tm4_sm3_freq0 = <0x05000000>;
      			sdc_tm4_sm3_freq1 = <0x00000005>;
      			sdc_tm4_sm4_freq0 = <0x00050000>;
      			sdc_tm4_sm4_freq1 = <0x00000004>;
      			sdc_tm4_sm4_freq0_cmd = <0x00000000>;
      			sdc_tm4_sm4_freq1_cmd = <0x00000000>;
      			mmc-ddr-1_8v;
      			mmc-hs200-1_8v;
      			mmc-hs400-1_8v;
      			ctl-spec-caps = <0x00000308>;
      			sunxi-power-save-mode;
      			sunxi-dis-signal-vol-sw;
      			mmc-bootpart-noacc;
      			vmmc-supply = <0x0000002d>;
      			vqmmc-supply = <0x0000003f>;
      			status = "disabled";
      			phandle = <0x00000136>;
      		};
      		sdmmc@4020000 {
      			compatible = "allwinner,sunxi-mmc-v5p3x";
      			device_type = "sdc0";
      			reg = <0x00000000 0x04020000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x00000027 0x00000004>;
      			clocks = <0x00000028 0x00000015 0x00000006 0x00000015 0x00000043 0x00000015 0x00000047>;
      			clock-names = "osc24m", "pll_periph", "mmc", "ahb";
      			resets = <0x00000015 0x00000011>;
      			reset-names = "rst";
      			pinctrl-names = "default", "mmc_1v8", "sleep", "uart_jtag";
      			pinctrl-0 = <0x00000040>;
      			pinctrl-1 = <0x00000041>;
      			pinctrl-2 = <0x00000042>;
      			pinctrl-3 = <0x00000043 0x00000044>;
      			max-frequency = <0x08f0d180>;
      			bus-width = <0x00000004>;
      			req-page-count = <0x00000002>;
      			cap-sd-highspeed;
      			cap-wait-while-busy;
      			no-sdio;
      			no-mmc;
      			cd-gpios = <0x00000045 0x00000005 0x00000006 0x00000011>;
      			cd-used-24M;
      			sd-uhs-sdr50;
      			sd-uhs-ddr50;
      			sd-uhs-sdr104;
      			sunxi-power-save-mode;
      			ctl-spec-caps = <0x00000008>;
      			vmmc-supply = <0x0000002d>;
      			vqmmc33sw-supply = <0x0000002d>;
      			vdmmc33sw-supply = <0x0000002d>;
      			vqmmc18sw-supply = <0x0000003f>;
      			vdmmc18sw-supply = <0x0000003f>;
      			status = "okay";
      			phandle = <0x00000137>;
      		};
      		sdmmc@4021000 {
      			compatible = "allwinner,sunxi-mmc-v5p3x";
      			device_type = "sdc1";
      			reg = <0x00000000 0x04021000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x00000028 0x00000004>;
      			clocks = <0x00000028 0x00000015 0x00000006 0x00000015 0x00000044 0x00000015 0x00000048>;
      			clock-names = "osc24m", "pll_periph", "mmc", "ahb";
      			resets = <0x00000015 0x00000012>;
      			reset-names = "rst";
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000046>;
      			pinctrl-1 = <0x00000047>;
      			max-frequency = <0x08f0d180>;
      			bus-width = <0x00000004>;
      			cap-sd-highspeed;
      			no-mmc;
      			keep-power-in-suspend;
      			sunxi-dly-52M-ddr4 = <0x00000001 0x00000000 0x00000000 0x00000000 0x00000002>;
      			sunxi-dly-104M = <0x00000001 0x00000001 0x00000000 0x00000000 0x00000001>;
      
      			sunxi-dly-208M = <0x00000001 0x00000000 0x00000000 0x00000000 0x00000001>;
      			status = "okay";
      			no-sd;
      			sd-uhs-sdr25;
      			sd-uhs-sdr50;
      			sd-uhs-ddr50;
      			sd-uhs-sdr104;
      			cap-sdio-irq;
      			ignore-pm-notify;
      			ctl-spec-caps = <0x00000008>;
      			phandle = <0x00000138>;
      		};
      		sdmmc@4023000 {
      			compatible = "allwinner,sunxi-mmc-v5p3x";
      			device_type = "sdc3";
      			reg = <0x00000000 0x04023000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x0000002a 0x00000004>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000048>;
      			pinctrl-1 = <0x00000049>;
      			max-frequency = <0x02faf080>;
      			bus-width = <0x00000004>;
      			cap-sd-highspeed;
      			no-sdio;
      
      			no-mmc;
      			status = "disabled";
      			phandle = <0x00000139>;
      		};
      		nand0@04011000 {
      			compatible = "allwinner,sun50iw10-nand";
      			device_type = "nand0";
      			reg = <0x00000000 0x04011000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x00000026 0x00000004>;
      			clocks = <0x00000015 0x00000006 0x00000015 0x00000040 0x00000015 0x00000041 0x00000015 0x00000042 0x00000015 0x0000003b>;
      			clock-names = "pll_periph", "mclk", "ecc", "bus", "mbus";
      			resets = <0x00000015 0x00000010>;
      			reset-names = "rst";
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000004a 0x0000004b>;
      			pinctrl-1 = <0x0000004c>;
      			nand0_regulator1 = "none";
      			nand0_regulator2 = "none";
      			nand0_cache_level = <0x55aaaa55>;
      			nand0_flush_cache_num = <0x55aaaa55>;
      			nand0_capacity_level = <0x55aaaa55>;
      			nand0_id_number_ctl = <0x55aaaa55>;
      			nand0_print_level = <0x55aaaa55>;
      			nand0_p0 = <0x55aaaa55>;
      			nand0_p1 = <0x55aaaa55>;
      			nand0_p2 = <0x55aaaa55>;
      			nand0_p3 = <0x55aaaa55>;
      			chip_code = "sun50iw10";
      			status = "disabled";
      			phandle = <0x0000013a>;
      		};
      		twi@5002000 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-twi";
      			device_type = "twi0";
      			reg = <0x00000000 0x05002000 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000007 0x00000004>;
      			clocks = <0x00000015 0x00000052>;
      			resets = <0x00000015 0x0000001c>;
      			clock-names = "bus";
      			clock-frequency = <0x00061a80>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000004d>;
      			pinctrl-1 = <0x0000004e>;
      			status = "okay";
      			twi-supply = <0x0000002d>;
      			phandle = <0x0000013b>;
      			ctp@0 {
      				ctp_fw_idx = "2";
      				compatible = "allwinner,gslX680";
      				reg = <0x00000040>;
      				device_type = "ctp";
      				status = "okay";
      				ctp_name = "gslX680_3676_1280x800";
      				ctp_twi_id = <0x00000000>;
      				ctp_twi_addr = <0x00000040>;
      				ctp_screen_max_x = <0x00000320>;
      				ctp_screen_max_y = <0x00000500>;
      				ctp_revert_x_flag = <0x00000000>;
      				ctp_revert_y_flag = <0x00000000>;
      				ctp_exchange_x_y_flag = <0x00000001>;
      				ctp_int_port = <0x00000045 0x00000007 0x00000009 0x00000001>;
      				ctp_wakeup = <0x00000045 0x00000007 0x0000000a 0x00000001>;
      				ctp-supply = <0x0000004f>;
      				ctp_power_ldo_vol = <0x00000ce4>;
      				phandle = <0x0000013c>;
      			};
      		};
      		twi@5002400 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-twi";
      			device_type = "twi1";
      			reg = <0x00000000 0x05002400 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000008 0x00000004>;
      			clocks = <0x00000015 0x00000053>;
      			resets = <0x00000015 0x0000001d>;
      			clock-names = "bus";
      			clock-frequency = <0x00030d40>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000050>;
      			pinctrl-1 = <0x00000051>;
      			status = "okay";
      			phandle = <0x0000013d>;
      			gsensor {
      				compatible = "allwinner,mir3da";
      				reg = <0x00000027>;
      				device_type = "gsensor";
      				status = "okay";
      				gsensor_twi_id = <0x00000001>;
      				gsensor_twi_addr = <0x00000027>;
      				gsensor_int1 = <0x00000045 0x00000007 0x0000000b 0x00000001>;
      				gsensor-supply = <0x0000002d>;
      				gsensor_vcc_io_val = <0x00000ce4>;
      			};
      			lightsensor {
      				compatible = "allwinner,stk3x1x";
      				reg = <0x00000048>;
      				device_type = "lightsensor";
      				status = "okay";
      				ls_twi_id = <0x00000001>;
      				ls_twi_addr = <0x00000048>;
      				ls_int = <0x00000045 0x00000007 0x00000004 0x00000001>;
      				lightsensor-supply = <0x0000002d>;
      			};
      		};
      		twi@5002800 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-twi";
      			device_type = "twi2";
      			reg = <0x00000000 0x05002800 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000009 0x00000004>;
      			clocks = <0x00000015 0x00000054>;
      			resets = <0x00000015 0x0000001e>;
      			clock-names = "bus";
      			clock-frequency = <0x00030d40>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000052>;
      			pinctrl-1 = <0x00000053>;
      			status = "okay";
      			twi-supply = <0x00000054>;
      			twi_vol = <0x001b7740>;
      			dmas = <0x00000055 0x0000002d 0x00000055 0x0000002d>;
      			dma-names = "tx", "rx";
      			twi_drv_used = <0x00000001>;
      			phandle = <0x0000013e>;
      		};
      		twi@5002c00 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-twi";
      			device_type = "twi3";
      			reg = <0x00000000 0x05002c00 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x0000000a 0x00000004>;
      			clocks = <0x00000015 0x00000055>;
      			resets = <0x00000015 0x0000001f>;
      			clock-names = "bus";
      			clock-frequency = <0x00030d40>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000056>;
      			pinctrl-1 = <0x00000057>;
      			status = "okay";
      			twi-supply = <0x00000054>;
      			twi_vol = <0x001b7740>;
      			dmas = <0x00000055 0x0000002e 0x00000055 0x0000002e>;
      			dma-names = "tx", "rx";
      
      			twi_drv_used = <0x00000001>;
      			phandle = <0x0000013f>;
      		};
      		twi@5003000 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-twi";
      			device_type = "twi4";
      			reg = <0x00000000 0x05003000 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x0000000b 0x00000004>;
      			clocks = <0x00000015 0x00000056>;
      			resets = <0x00000015 0x00000020>;
      			clock-names = "bus";
      			clock-frequency = <0x000186a0>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000058>;
      			pinctrl-1 = <0x00000059>;
      			status = "disabled";
      			phandle = <0x00000140>;
      		};
      		twi@5003400 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-twi";
      			device_type = "twi5";
      			reg = <0x00000000 0x05003400 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x0000000c 0x00000004>;
      			clocks = <0x00000015 0x00000057>;
      			resets = <0x00000015 0x00000021>;
      			clock-names = "bus";
      			clock-frequency = <0x000186a0>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000005a>;
      			pinctrl-1 = <0x0000005b>;
      			status = "disabled";
      			phandle = <0x00000141>;
      		};
      		s_twi@7081400 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-twi";
      			reg = <0x00000000 0x07081400 0x00000000 0x00000200>;
      			interrupts = <0x00000000 0x00000071 0x00000004>;
      			clocks = <0x00000024 0x0000000a>;
      			resets = <0x00000024 0x00000004>;
      			clock-names = "bus";
      			clock-frequency = <0x00030d40>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000005c>;
      			status = "okay";
      			pinctrl-1 = <0x0000005d>;
      			no_suspend = <0x00000001>;
      			twi_drv_used = <0x00000001>;
      			phandle = <0x00000142>;
      			pmu@34 {
      				compatible = "x-powers,axp2202";
      				reg = <0x00000034>;
      				status = "okay";
      				interrupts = <0x00000000 0x00000008>;
      				interrupt-parent = <0x0000005e>;
      				x-powers,drive-vbus-en;
      				pmu_reset = <0x00000000>;
      				pmu_irq_wakeup = <0x00000001>;
      				pmu_hot_shutdown = <0x00000001>;
      				wakeup-source;
      				phandle = <0x00000143>;
      				usb_power_supply {
      					compatible = "x-powers,axp2202-usb-power-supply";
      					status = "okay";
      					pmu_usbpc_vol = <0x00001194>;
      					pmu_usbpc_cur = <0x000001f4>;
      					pmu_usbad_vol = <0x00001194>;
      					pmu_usbad_cur = <0x000009c4>;
      					pmu_usb_typec_used = <0x00000001>;
      					wakeup_usb_in;
      					wakeup_usb_out;
      					phandle = <0x00000090>;
      				};
      				gpio_power_supply {
      					compatible = "x-powers,gpio-supply";
      					status = "disabled";
      					pmu_acin_det_gpio = <0x00000045 0x00000001 0x00000004 0x00000001>;
      					pmu_acin_usbid_drv = <0x00000045 0x00000001 0x00000006 0x00000001>;
      					wakeup_gpio;
      					phandle = <0x00000144>;
      				};
      				bat-power-supply {
      					compatible = "x-powers,axp2202-bat-power-supply";
      					param = <0x0000005f>;
      					status = "okay";
      					pmu_chg_ic_temp = <0x00000000>;
      					pmu_battery_rdc = <0x00000069>;
      					pmu_battery_cap = <0x00001360>;
      					pmu_runtime_chgcur = <0x000005dc>;
      					pmu_suspend_chgcur = <0x000007bc>;
      					pmu_shutdown_chgcur = <0x000005dc>;
      					pmu_init_chgvol = <0x000010fe>;
      					pmu_battery_warning_level1 = <0x0000000f>;
      					pmu_battery_warning_level2 = <0x00000000>;
      					pmu_chgled_func = <0x00000000>;
      					pmu_chgled_type = <0x00000000>;
      					ocv_coulumb_100 = <0x00000001>;
      					pmu_bat_para1 = <0x00000000>;
      					pmu_bat_para2 = <0x00000000>;
      					pmu_bat_para3 = <0x00000000>;
      					pmu_bat_para4 = <0x00000000>;
      					pmu_bat_para5 = <0x00000000>;
      					pmu_bat_para6 = <0x00000000>;
      					pmu_bat_para7 = <0x00000002>;
      					pmu_bat_para8 = <0x00000003>;
      					pmu_bat_para9 = <0x00000004>;
      					pmu_bat_para10 = <0x00000006>;
      					pmu_bat_para11 = <0x00000009>;
      					pmu_bat_para12 = <0x0000000e>;
      					pmu_bat_para13 = <0x0000001a>;
      					pmu_bat_para14 = <0x00000026>;
      					pmu_bat_para15 = <0x00000031>;
      					pmu_bat_para16 = <0x00000034>;
      					pmu_bat_para17 = <0x00000038>;
      					pmu_bat_para18 = <0x0000003c>;
      					pmu_bat_para19 = <0x00000040>;
      					pmu_bat_para20 = <0x00000046>;
      					pmu_bat_para21 = <0x0000004d>;
      					pmu_bat_para22 = <0x00000053>;
      					pmu_bat_para23 = <0x00000057>;
      					pmu_bat_para24 = <0x0000005a>;
      					pmu_bat_para25 = <0x0000005f>;
      					pmu_bat_para26 = <0x00000063>;
      					pmu_bat_para27 = <0x00000063>;
      					pmu_bat_para28 = <0x00000064>;
      					pmu_bat_para29 = <0x00000064>;
      					pmu_bat_para30 = <0x00000064>;
      					pmu_bat_para31 = <0x00000064>;
      					pmu_bat_para32 = <0x00000064>;
      					pmu_bat_temp_enable = <0x00000000>;
      					pmu_bat_charge_ltf = <0x00000451>;
      					pmu_bat_charge_htf = <0x00000079>;
      					pmu_bat_shutdown_ltf = <0x00000565>;
      					pmu_bat_shutdown_htf = <0x00000059>;
      					pmu_bat_temp_para1 = <0x00000afe>;
      					pmu_bat_temp_para2 = <0x0000089a>;
      					pmu_bat_temp_para3 = <0x000006c9>;
      					pmu_bat_temp_para4 = <0x00000565>;
      					pmu_bat_temp_para5 = <0x00000451>;
      					pmu_bat_temp_para6 = <0x0000037a>;
      					pmu_bat_temp_para7 = <0x000002d2>;
      					pmu_bat_temp_para8 = <0x000001e4>;
      					pmu_bat_temp_para9 = <0x0000014c>;
      					pmu_bat_temp_para10 = <0x000000e9>;
      					pmu_bat_temp_para11 = <0x000000c4>;
      					pmu_bat_temp_para12 = <0x000000a6>;
      					pmu_bat_temp_para13 = <0x0000008d>;
      					pmu_bat_temp_para14 = <0x00000079>;
      					pmu_bat_temp_para15 = <0x00000059>;
      					pmu_bat_temp_para16 = <0x00000042>;
      					wakeup_bat_out;
      					phandle = <0x00000145>;
      				};
      				powerkey@0 {
      					status = "okay";
      					compatible = "x-powers,axp2101-pek";
      					pmu_powkey_off_time = <0x00001770>;
      					pmu_powkey_off_func = <0x00000000>;
      					pmu_powkey_off_en = <0x00000001>;
      					pmu_powkey_long_time = <0x000005dc>;
      					pmu_powkey_on_time = <0x00000200>;
      					wakeup_rising;
      					wakeup_falling;
      					phandle = <0x00000146>;
      				};
      				regulators@0 {
      					phandle = <0x00000147>;
      					dcdc1 {
      						regulator-name = "axp2202-dcdc1";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x00177fa0>;
      						regulator-ramp-delay = <0x000000fa>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						regulator-boot-on;
      						regulator-always-on;
      						phandle = <0x00000019>;
      					};
      					dcdc2 {
      						regulator-name = "axp2202-dcdc2";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x0033e140>;
      						regulator-ramp-delay = <0x000000fa>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						regulator-boot-on;
      						regulator-always-on;
      						phandle = <0x00000060>;
      					};
      					dcdc3 {
      						regulator-name = "axp2202-dcdc3";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x001c1380>;
      						regulator-ramp-delay = <0x000000fa>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						regulator-always-on;
      						phandle = <0x00000061>;
      					};
      					dcdc4 {
      						regulator-name = "axp2202-dcdc4";
      						regulator-min-microvolt = <0x000f4240>;
      						regulator-max-microvolt = <0x00387520>;
      						regulator-ramp-delay = <0x000000fa>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						phandle = <0x00000062>;
      					};
      					rtcldo {
      						regulator-name = "axp2202-rtcldo";
      						regulator-min-microvolt = <0x001b7740>;
      						regulator-max-microvolt = <0x001b7740>;
      						regulator-boot-on;
      						regulator-always-on;
      						phandle = <0x00000063>;
      					};
      					aldo1 {
      						regulator-name = "axp2202-aldo1";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						phandle = <0x00000064>;
      					};
      					aldo2 {
      						regulator-name = "axp2202-aldo2";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						phandle = <0x00000054>;
      					};
      					aldo3 {
      						regulator-name = "axp2202-aldo3";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						regulator-always-on;
      						regulator-boot-on;
      						phandle = <0x00000065>;
      					};
      					aldo4 {
      						regulator-name = "axp2202-aldo4";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						regulator-always-on;
      						regulator-boot-on;
      						phandle = <0x00000066>;
      					};
      					bldo1 {
      						regulator-name = "axp2202-bldo1";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						phandle = <0x00000067>;
      					};
      					bldo2 {
      						regulator-name = "axp2202-bldo2";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						regulator-boot-on;
      						regulator-always-on;
      						phandle = <0x00000068>;
      					};
      					bldo3 {
      						regulator-name = "axp2202-bldo3";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						phandle = <0x00000069>;
      					};
      					bldo4 {
      						regulator-name = "axp2202-bldo4";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						phandle = <0x0000006a>;
      					};
      					cldo1 {
      						regulator-name = "axp2202-cldo1";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						phandle = <0x0000003f>;
      					};
      					cldo2 {
      						regulator-name = "axp2202-cldo2";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						phandle = <0x0000004f>;
      					};
      					cldo3 {
      						regulator-name = "axp2202-cldo3";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-ramp-delay = <0x000009c4>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						regulator-boot-on;
      						phandle = <0x0000002d>;
      					};
      					cldo4 {
      						regulator-name = "axp2202-cldo4";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x003567e0>;
      						regulator-enable-ramp-delay = <0x000003e8>;
      						phandle = <0x0000006b>;
      					};
      					cpusldo {
      						regulator-name = "axp2202-cpusldo";
      						regulator-min-microvolt = <0x0007a120>;
      						regulator-max-microvolt = <0x00155cc0>;
      						regulator-boot-on;
      						regulator-always-on;
      						phandle = <0x0000006c>;
      					};
      					drivevbus {
      						regulator-name = "axp2202-drivevbus";
      						regulator-enable-ramp-delay = <0x000003e8>;
      						phandle = <0x0000006d>;
      					};
      				};
      				virtual-dcdc1 {
      					compatible = "xpower-vregulator,dcdc1";
      					dcdc1-supply = <0x00000019>;
      				};
      				virtual-dcdc2 {
      					compatible = "xpower-vregulator,dcdc2";
      					dcdc2-supply = <0x00000060>;
      				};
      				virtual-dcdc3 {
      					compatible = "xpower-vregulator,dcdc3";
      					dcdc3-supply = <0x00000061>;
      				};
      				virtual-dcdc4 {
      					compatible = "xpower-vregulator,dcdc4";
      					dcdc4-supply = <0x00000062>;
      				};
      				virtual-rtcldo {
      					compatible = "xpower-vregulator,rtcldo";
      					rtcldo-supply = <0x00000063>;
      				};
      				virtual-aldo1 {
      					compatible = "xpower-vregulator,aldo1";
      					aldo1-supply = <0x00000064>;
      				};
      				virtual-aldo2 {
      					compatible = "xpower-vregulator,aldo2";
      					aldo2-supply = <0x00000054>;
      				};
      				virtual-aldo3 {
      					compatible = "xpower-vregulator,aldo3";
      					aldo3-supply = <0x00000065>;
      
      				};
      				virtual-aldo4 {
      					compatible = "xpower-vregulator,aldo4";
      					aldo4-supply = <0x00000066>;
      				};
      				virtual-bldo1 {
      					compatible = "xpower-vregulator,bldo1";
      					bldo1-supply = <0x00000067>;
      				};
      				virtual-bldo2 {
      					compatible = "xpower-vregulator,bldo2";
      					bldo2-supply = <0x00000068>;
      				};
      				virtual-bldo3 {
      					compatible = "xpower-vregulator,bldo3";
      					bldo3-supply = <0x00000069>;
      				};
      				virtual-bldo4 {
      					compatible = "xpower-vregulator,bldo4";
      					bldo4-supply = <0x0000006a>;
      				};
      				virtual-cldo1 {
      					compatible = "xpower-vregulator,cldo1";
      					cldo1-supply = <0x0000003f>;
      				};
      				virtual-cldo2 {
      					compatible = "xpower-vregulator,cldo2";
      					cldo2-supply = <0x0000004f>;
      				};
      				virtual-cldo3 {
      					compatible = "xpower-vregulator,cldo3";
      					cldo3-supply = <0x0000002d>;
      				};
      				virtual-cldo4 {
      					compatible = "xpower-vregulator,cldo4";
      					cldo4-supply = <0x0000006b>;
      				};
      				virtual-cpusldo {
      					compatible = "xpower-vregulator,cpusldo";
      					cpusldo-supply = <0x0000006c>;
      				};
      				virtual-drivevbus {
      					compatible = "xpower-vregulator,drivevbus";
      					drivevbus-supply = <0x0000006d>;
      				};
      				axp_gpio@0 {
      					gpio-controller;
      					#size-cells = <0x00000000>;
      					#gpio-cells = <0x00000006>;
      					status = "okay";
      					phandle = <0x00000148>;
      				};
      			};
      		};
      		s_twi@7081800 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-twi";
      			reg = <0x00000000 0x07081800 0x00000000 0x00000200>;
      			interrupts = <0x00000000 0x00000072 0x00000004>;
      			clocks = <0x00000024 0x0000000b>;
      			resets = <0x00000024 0x00000005>;
      			clock-names = "bus";
      			clock-frequency = <0x00030d40>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000006e>;
      			status = "disabled";
      			phandle = <0x00000149>;
      		};
      		pwm@300a000 {
      			#pwm-cells = <0x00000003>;
      			compatible = "allwinner,sunxi-pwm";
      			reg = <0x00000000 0x0300a000 0x00000000 0x000003ff>;
      			clocks = <0x00000015 0x00000036>;
      			resets = <0x00000015 0x0000000e>;
      			pwm-number = <0x0000000a>;
      			pwm-base = <0x00000000>;
      			sunxi-pwms = <0x0000006f 0x00000070 0x00000071 0x00000072 0x00000073 0x00000074 0x00000075 0x00000076 0x00000077 0x00000078>;
      			phandle = <0x0000014a>;
      		};
      		pwm0@300a010 {
      			compatible = "allwinner,sunxi-pwm0";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x0300a010 0x00000000 0x00000004>;
      			reg_base = <0x0300a000>;
      			pinctrl-0 = <0x00000079>;
      			pinctrl-1 = <0x0000007a>;
      			phandle = <0x0000006f>;
      		};
      		pwm1@300a011 {
      			compatible = "allwinner,sunxi-pwm1";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x0300a011 0x00000000 0x00000004>;
      			reg_base = <0x0300a000>;
      			pinctrl-0 = <0x0000007b>;
      			pinctrl-1 = <0x0000007c>;
      			phandle = <0x00000070>;
      		};
      		pwm2@300a012 {
      			compatible = "allwinner,sunxi-pwm2";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x0300a012 0x00000000 0x00000004>;
      			reg_base = <0x0300a000>;
      			phandle = <0x00000071>;
      		};
      		pwm3@300a013 {
      			compatible = "allwinner,sunxi-pwm3";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x0300a013 0x00000000 0x00000004>;
      			reg_base = <0x0300a000>;
      			phandle = <0x00000072>;
      		};
      		pwm4@300a014 {
      			compatible = "allwinner,sunxi-pwm4";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x0300a014 0x00000000 0x00000004>;
      			reg_base = <0x0300a000>;
      			phandle = <0x00000073>;
      		};
      		pwm5@300a015 {
      			compatible = "allwinner,sunxi-pwm5";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x0300a015 0x00000000 0x00000004>;
      			reg_base = <0x0300a000>;
      			phandle = <0x00000074>;
      		};
      		pwm6@300a016 {
      			compatible = "allwinner,sunxi-pwm6";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x0300a016 0x00000000 0x00000004>;
      			reg_base = <0x0300a000>;
      			phandle = <0x00000075>;
      		};
      		pwm7@300a017 {
      			compatible = "allwinner,sunxi-pwm7";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x0300a017 0x00000000 0x00000004>;
      			reg_base = <0x0300a000>;
      			phandle = <0x00000076>;
      		};
      		pwm8@300a018 {
      			compatible = "allwinner,sunxi-pwm8";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x0300a018 0x00000000 0x00000004>;
      			reg_base = <0x0300a000>;
      			phandle = <0x00000077>;
      		};
      		pwm9@300a019 {
      			compatible = "allwinner,sunxi-pwm9";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x0300a019 0x00000000 0x00000004>;
      			reg_base = <0x0300a000>;
      			phandle = <0x00000078>;
      		};
      		vind@2000800 {
      			compatible = "allwinner,sunxi-vin-media", "simple-bus";
      			#address-cells = <0x00000002>;
      			#size-cells = <0x00000002>;
      			ranges;
      			device_id = <0x00000000>;
      			csi_top = <0x1406f400>;
      			csi_isp = <0x11e1a300>;
      			reg = <0x00000000 0x02000800 0x00000000 0x00000200 0x00000000 0x02000000 0x00000000 0x00000800 0x00000000 0x0200a000 0x00000000 0x00000100>;
      			clocks = * 0xbbe865ec [0x00000060];
      			clock-names = "csi_top", "csi_top_src", "csi_mclk0", "csi_mclk0_24m", "csi_mclk0_pll", "csi_mclk1", "csi_mclk1_24m", "csi_mclk1_pll", "csi_isp", "csi_isp_src", "csi_bus", "csi_mbus", "csi_isp_mbus";
      			resets = <0x00000015 0x00000042 0x00000015 0x00000043>;
      			reset-names = "csi_ret", "isp_ret";
      			pinctrl-names = "mclk0-default", "mclk0-sleep", "mclk1-default", "mclk1-sleep";
      			pinctrl-0 = <0x0000007d>;
      			pinctrl-1 = <0x0000007e>;
      			pinctrl-2 = <0x0000007f>;
      			pinctrl-3 = <0x00000080>;
      			status = "okay";
      			phandle = <0x0000014b>;
      			csi@2001000 {
      				compatible = "allwinner,sunxi-csi";
      				reg = <0x00000000 0x02001000 0x00000000 0x00001000>;
      				interrupts = <0x00000000 0x0000004b 0x00000004>;
      				device_id = <0x00000000>;
      				iommus = <0x00000081 0x00000003 0x00000001>;
      				phandle = <0x0000014c>;
      			};
      			csi@2002000 {
      				compatible = "allwinner,sunxi-csi";
      				reg = <0x00000000 0x02002000 0x00000000 0x00001000>;
      				interrupts = <0x00000000 0x0000004c 0x00000004>;
      				device_id = <0x00000001>;
      				iommus = <0x00000081 0x00000003 0x00000001>;
      				phandle = <0x0000014d>;
      			};
      			mipi@200a100 {
      				compatible = "allwinner,sunxi-mipi";
      				reg = <0x00000000 0x0200a100 0x00000000 0x00000100 0x00000000 0x0200b000 0x00000000 0x00000400>;
      				interrupts = <0x00000000 0x00000050 0x00000004>;
      				device_id = <0x00000000>;
      				phandle = <0x0000014e>;
      			};
      			mipi@200a200 {
      				compatible = "allwinner,sunxi-mipi";
      				reg = <0x00000000 0x0200a200 0x00000000 0x00000100 0x00000000 0x0200b400 0x00000000 0x00000400>;
      				device_id = <0x00000001>;
      				phandle = <0x0000014f>;
      			};
      			tdm@2108000 {
      				compatible = "allwinner,sunxi-tdm";
      				reg = <0x00000000 0x02108000 0x00000000 0x00000180>;
      				interrupts = <0x00000000 0x0000004f 0x00000004>;
      				device_id = <0x00000000>;
      				iommus = <0x00000081 0x00000004 0x00000001>;
      				phandle = <0x00000150>;
      			};
      			isp@2100000 {
      				compatible = "allwinner,sunxi-isp";
      				reg = <0x00000000 0x02100000 0x00000000 0x00002000>;
      				interrupts = <0x00000000 0x0000004d 0x00000004>;
      				device_id = <0x00000000>;
      				iommus = <0x00000081 0x00000004 0x00000001>;
      				phandle = <0x00000151>;
      			};
      			isp@2102000 {
      				compatible = "allwinner,sunxi-isp";
      				reg = <0x00000000 0x02102000 0x00000000 0x00002000>;
      				interrupts = <0x00000000 0x0000004e 0x00000004>;
      				device_id = <0x00000001>;
      				iommus = <0x00000081 0x00000004 0x00000001>;
      				phandle = <0x00000152>;
      			};
      			scaler@2110000 {
      				compatible = "allwinner,sunxi-scaler";
      				reg = <0x00000000 0x02110000 0x00000000 0x00000400>;
      				device_id = <0x00000000>;
      				iommus = <0x00000081 0x00000003 0x00000001>;
      				phandle = <0x00000153>;
      			};
      			scaler@2110400 {
      				compatible = "allwinner,sunxi-scaler";
      				reg = <0x00000000 0x02110400 0x00000000 0x00000400>;
      				device_id = <0x00000001>;
      				iommus = <0x00000081 0x00000003 0x00000001>;
      				phandle = <0x00000154>;
      			};
      			scaler@2110800 {
      				compatible = "allwinner,sunxi-scaler";
      				reg = <0x00000000 0x02110800 0x00000000 0x00000400>;
      				device_id = <0x00000002>;
      				iommus = <0x00000081 0x00000003 0x00000001>;
      				phandle = <0x00000155>;
      			};
      			scaler@2110c00 {
      				compatible = "allwinner,sunxi-scaler";
      				reg = <0x00000000 0x02110c00 0x00000000 0x00000400>;
      				device_id = <0x00000003>;
      				iommus = <0x00000081 0x00000003 0x00000001>;
      				phandle = <0x00000156>;
      			};
      			actuator@2108180 {
      				compatible = "allwinner,sunxi-actuator";
      				device_type = "actuator0";
      				reg = <0x00000000 0x02108180 0x00000000 0x00000010>;
      				actuator0_name = "dw9714_act";
      				actuator0_slave = <0x00000018>;
      				actuator0_af_pwdn;
      				actuator0_afvdd = "afvcc-csi";
      				actuator0_afvdd_vol = <0x002ab980>;
      				status = "disabled";
      				phandle = <0x00000084>;
      			};
      			flash@2108190 {
      				device_type = "flash0";
      				compatible = "allwinner,sunxi-flash";
      				reg = <0x00000000 0x02108190 0x00000000 0x00000010>;
      				flash0_type = <0x00000002>;
      				flash0_en = <0x00000082 0x00000000 0x0000000b 0x00000001>;
      				flash0_mode;
      				flash0_flvdd = "";
      				flash0_flvdd_vol;
      				device_id = <0x00000000>;
      				status = "disabled";
      				phandle = <0x00000083>;
      			};
      			sensor@200b800 {
      				reg = <0x00000000 0x0200b800 0x00000000 0x00000010>;
      				device_type = "sensor0";
      				compatible = "allwinner,sunxi-sensor";
      				sensor0_mname = "gc02m2_mipi";
      				sensor0_twi_cci_id = <0x00000002>;
      				sensor0_twi_addr = <0x0000006e>;
      				sensor0_mclk_id = <0x00000000>;
      				sensor0_pos = "rear";
      				sensor0_isp_used = <0x00000001>;
      				sensor0_fmt = <0x00000001>;
      				sensor0_stby_mode = <0x00000000>;
      				sensor0_vflip = <0x00000001>;
      				sensor0_hflip = <0x00000001>;
      				sensor0_iovdd-supply = <0x00000054>;
      				sensor0_iovdd_vol = <0x002ab980>;
      				sensor0_avdd-supply = <0x00000064>;
      				sensor0_avdd_vol = <0x002ab980>;
      				sensor0_dvdd-supply = <0x0000006a>;
      				sensor0_dvdd_vol = <0x00124f80>;
      				sensor0_power_en = <0x00000045 0x00000004 0x00000006 0x00000001>;
      				sensor0_reset = <0x00000045 0x00000004 0x00000009 0x00000001>;
      				sensor0_pwdn = <0x00000045 0x00000004 0x00000008 0x00000001>;
      				sensor0_sm_vs;
      				flash_handle = <0x00000083>;
      				act_handle = <0x00000084>;
      				device_id = <0x00000000>;
      				sensor0_cameravdd-supply = <0x00000054>;
      				sensor0_cameravdd_vol = <0x002ab980>;
      				status = "okay";
      				phandle = <0x00000157>;
      			};
      			sensor@200b810 {
      				reg = <0x00000000 0x0200b810 0x00000000 0x00000010>;
      				device_type = "sensor1";
      				compatible = "allwinner,sunxi-sensor";
      				sensor1_mname = "gc030a_mipi";
      				sensor1_twi_cci_id = <0x00000002>;
      				sensor1_twi_addr = <0x00000042>;
      				sensor1_mclk_id = <0x00000000>;
      				sensor1_pos = "front";
      				sensor1_isp_used = <0x00000001>;
      				sensor1_fmt = <0x00000001>;
      				sensor1_stby_mode = <0x00000000>;
      				sensor1_vflip = <0x00000000>;
      				sensor1_hflip = <0x00000000>;
      				sensor1_iovdd-supply = <0x00000054>;
      				sensor1_iovdd_vol = <0x002ab980>;
      				sensor1_avdd-supply = <0x00000064>;
      				sensor1_avdd_vol = <0x002ab980>;
      				sensor1_dvdd-supply = <0x0000006a>;
      				sensor1_dvdd_vol = <0x00124f80>;
      				sensor1_power_en;
      				sensor1_reset = <0x00000045 0x00000004 0x00000007 0x00000001>;
      				sensor1_pwdn = <0x00000045 0x00000004 0x00000006 0x00000001>;
      				sensor1_sm_vs;
      				flash_handle;
      				act_handle;
      				device_id = <0x00000001>;
      				status = "okay";
      				phandle = <0x00000158>;
      			};
      			vinc@2009000 {
      				compatible = "allwinner,sunxi-vin-core";
      				device_type = "vinc0";
      				reg = <0x00000000 0x02009000 0x00000000 0x00000200>;
      				interrupts = <0x00000000 0x00000047 0x00000004>;
      				vinc0_csi_sel = <0x00000000>;
      				vinc0_mipi_sel = <0x00000000>;
      				vinc0_isp_sel = <0x00000000>;
      				vinc0_tdm_rx_sel = <0x000000ff>;
      				vinc0_rear_sensor_sel = <0x00000000>;
      				vinc0_front_sensor_sel = <0x00000001>;
      				vinc0_sensor_list = <0x00000000>;
      				device_id = <0x00000000>;
      				iommus = <0x00000081 0x00000003 0x00000001>;
      				vinc0_isp_tx_ch = <0x00000000>;
      				status = "okay";
      				phandle = <0x00000159>;
      			};
      			vinc@2009200 {
      				device_type = "vinc1";
      				compatible = "allwinner,sunxi-vin-core";
      				reg = <0x00000000 0x02009200 0x00000000 0x00000200>;
      				interrupts = <0x00000000 0x00000048 0x00000004>;
      				vinc1_csi_sel = <0x00000000>;
      				vinc1_mipi_sel = <0x00000000>;
      				vinc1_isp_sel = <0x00000000>;
      				vinc1_tdm_rx_sel = <0x000000ff>;
      				vinc1_rear_sensor_sel = <0x00000000>;
      				vinc1_front_sensor_sel = <0x00000001>;
      				vinc1_sensor_list = <0x00000000>;
      				device_id = <0x00000001>;
      				iommus = <0x00000081 0x00000003 0x00000001>;
      				vinc1_isp_tx_ch = <0x00000000>;
      				status = "okay";
      				phandle = <0x0000015a>;
      			};
      			vinc@2009400 {
      				device_type = "vinc2";
      				compatible = "allwinner,sunxi-vin-core";
      				reg = <0x00000000 0x02009400 0x00000000 0x00000200>;
      				interrupts = <0x00000000 0x00000049 0x00000004>;
      				vinc2_csi_sel = <0x00000001>;
      				vinc2_mipi_sel = <0x00000001>;
      				vinc2_isp_sel = <0x00000000>;
      				vinc2_tdm_rx_sel = <0x000000ff>;
      				vinc2_rear_sensor_sel = <0x00000000>;
      				vinc2_front_sensor_sel = <0x00000001>;
      				vinc2_sensor_list = <0x00000000>;
      				device_id = <0x00000002>;
      				iommus = <0x00000081 0x00000003 0x00000001>;
      				vinc2_isp_tx_ch = <0x00000000>;
      				status = "okay";
      				phandle = <0x0000015b>;
      			};
      			vinc@2009600 {
      				device_type = "vinc3";
      				compatible = "allwinner,sunxi-vin-core";
      				reg = <0x00000000 0x02009600 0x00000000 0x00000200>;
      				interrupts = <0x00000000 0x0000004a 0x00000004>;
      				vinc3_csi_sel = <0x00000001>;
      				vinc3_mipi_sel = <0x00000001>;
      				vinc3_isp_sel = <0x00000000>;
      				vinc3_tdm_rx_sel = <0x000000ff>;
      				vinc3_rear_sensor_sel = <0x00000000>;
      				vinc3_front_sensor_sel = <0x00000001>;
      				vinc3_sensor_list = <0x00000000>;
      				device_id = <0x00000003>;
      				iommus = <0x00000081 0x00000003 0x00000001>;
      				vinc3_isp_tx_ch = <0x00000000>;
      				status = "okay";
      				phandle = <0x0000015c>;
      			};
      		};
      		keyboard@5070800 {
      			compatible = "allwinner,keyboard_1350mv";
      			reg = <0x00000000 0x05070800 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x00000016 0x00000001>;
      			clocks = <0x00000015 0x00000081>;
      			resets = <0x00000015 0x00000039>;
      			key_cnt = <0x00000003>;
      			key0 = <0x000001db 0x00007372>;
      			key1 = <0x00000286 0x00000073>;
      			key2 = <0x00000384 0x00000072>;
      			key3 = <0x000002ee 0x0000001c>;
      			key4 = <0x00000370 0x00000066>;
      			status = "okay";
      			phandle = <0x0000015d>;
      		};
      		spi@5010000 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-spi";
      			device_type = "spi0";
      			reg = <0x00000000 0x05010000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x0000000d 0x00000004>;
      			clocks = <0x00000015 0x00000003 0x00000015 0x00000058 0x00000015 0x0000005b>;
      			clock-names = "pll", "mod", "bus";
      			resets = <0x00000015 0x00000022>;
      			clock-frequency = <0x05f5e100>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000085 0x00000086>;
      			pinctrl-1 = <0x00000087>;
      			spi0_cs_number = <0x00000001>;
      			spi0_cs_bitmap = <0x00000001>;
      			dmas = <0x00000055 0x00000016 0x00000055 0x00000016>;
      			dma-names = "tx", "rx";
      			status = "disabled";
      			spi_slave_mode = <0x00000000>;
      			phandle = <0x0000015e>;
      		};
      		spi@5011000 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-spi";
      			device_type = "spi1";
      			reg = <0x00000000 0x05011000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x0000000e 0x00000004>;
      			clocks = <0x00000015 0x00000003 0x00000015 0x00000059 0x00000015 0x0000005c>;
      			clock-names = "pll", "mod", "bus";
      			resets = <0x00000015 0x00000023>;
      			clock-frequency = <0x05f5e100>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x00000088 0x00000089>;
      			pinctrl-1 = <0x0000008a>;
      			spi1_cs_number = <0x00000001>;
      			spi1_cs_bitmap = <0x00000001>;
      			dmas = <0x00000055 0x00000017 0x00000055 0x00000017>;
      			dma-names = "tx", "rx";
      			status = "disabled";
      			spi_slave_mode = <0x00000000>;
      			phandle = <0x0000015f>;
      		};
      		spi@5012000 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sun50i-spi";
      			device_type = "spi2";
      			reg = <0x00000000 0x05012000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x0000000f 0x00000004>;
      			clocks = <0x00000015 0x00000003 0x00000015 0x0000005a 0x00000015 0x0000005d>;
      			clock-names = "pll", "mod", "bus";
      			resets = <0x00000015 0x00000024>;
      			clock-frequency = <0x05f5e100>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000008b 0x0000008c>;
      			pinctrl-1 = <0x0000008d>;
      			spi2_cs_number = <0x00000001>;
      			spi2_cs_bitmap = <0x00000001>;
      			dmas = <0x00000055 0x00000018 0x00000055 0x00000018>;
      			dma-names = "tx", "rx";
      			status = "disabled";
      			spi_slave_mode = <0x00000000>;
      			phandle = <0x00000160>;
      		};
      		ledc@0x5018000 {
      			#address-cells = <0x00000001>;
      			#size-cells = <0x00000000>;
      			compatible = "allwinner,sunxi-leds";
      			reg = <0x00000000 0x05018000 0x00000000 0x00000100>;
      			interrupts = <0x00000000 0x00000023 0x00000004>;
      			interrupt-names = "ledcirq";
      			clocks = <0x00000015 0x0000008a 0x00000015 0x0000008b>;
      			clock-names = "clk_ledc", "clk_cpuapb";
      			pinctrl-0 = <0x0000008e>;
      			pinctrl-1 = <0x0000008f>;
      			pinctrl-names = "default", "sleep";
      			dmas = <0x00000055 0x00000000 0x00000055 0x0000000b>;
      			dma-names = "rx", "tx";
      			resets = <0x00000015 0x00000041>;
      			reset-names = "ledc_reset";
      			status = "disable";
      			phandle = <0x00000161>;
      		};
      		usbc0@10 {
      			device_type = "usbc0";
      			compatible = "allwinner,sunxi-otg-manager";
      			reg = <0x00000000 0x00000010 0x00000000 0x00001000>;
      			usb_port_type = <0x00000002>;
      			usb_detect_type = <0x00000002>;
      			usb_id_gpio = <0x00000045 0x00000007 0x00000008 0x00000000>;
      			usb_det_vbus_gpio = "axp_ctrl";
      			usb_wakeup_suspend = <0x00000000>;
      			usb_serial_unique = <0x00000000>;
      			usb_serial_number = "20080411";
      			rndis_wceis = <0x00000001>;
      			usb_detect_mode = <0x00000000>;
      			enable-active-high;
      			det_vbus_supply = <0x00000090>;
      			usbc-supply = <0x0000002d>;
      			status = "okay";
      			phandle = <0x00000162>;
      		};
      		udc-controller@5100000 {
      			compatible = "allwinner,sunxi-udc";
      			reg = <0x00000000 0x05100000 0x00000000 0x00001000 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05200000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x00000020 0x00000004>;
      			clocks = <0x00000015 0x00000080 0x00000015 0x00000079>;
      			clock-names = "bus_otg", "phy";
      			resets = <0x00000015 0x00000038 0x00000015 0x00000032>;
      			reset-names = "otg", "phy";
      			det_vbus_supply = <0x00000090>;
      			udc-supply = <0x0000002d>;
      			phandle = <0x00000163>;
      		};
      		ehci0-controller@5101000 {
      			compatible = "allwinner,sunxi-ehci0";
      			reg = * 0xbbe88504 [0x00000060];
      			interrupts = <0x00000000 0x0000001e 0x00000004>;
      			clocks = <0x00000015 0x0000007e 0x00000015 0x00000079>;
      			clock-names = "bus_hci", "phy";
      			resets = <0x00000015 0x00000036 0x00000015 0x00000032>;
      			reset-names = "hci", "phy";
      			hci_ctrl_no = <0x00000000>;
      			drvvbus-supply = <0x0000006d>;
      			hci-supply = <0x0000002d>;
      			phandle = <0x00000164>;
      		};
      		ohci0-controller@5101400 {
      			compatible = "allwinner,sunxi-ohci0";
      			reg = * 0xbbe88674 [0x00000060];
      			interrupts = <0x00000000 0x0000001f 0x00000004>;
      			clocks = <0x00000015 0x0000007c 0x00000015 0x00000078 0x00000015 0x00000079>;
      			clock-names = "bus_hci", "ohci", "phy";
      			resets = <0x00000015 0x00000034 0x00000015 0x00000032>;
      			reset-names = "hci", "phy";
      			hci_ctrl_no = <0x00000000>;
      			drvvbus-supply = <0x0000006d>;
      			hci-supply = <0x0000002d>;
      			phandle = <0x00000165>;
      		};
      		usbc1@11 {
      			device_type = "usbc1";
      			reg = <0x00000000 0x00000011 0x00000000 0x00001000>;
      			usb_wakeup_suspend = <0x00000000>;
      			usb_regulator_io = "nocare";
      			status = "disable";
      			phandle = <0x00000166>;
      		};
      		ehci1-controller@5200000 {
      			compatible = "allwinner,sunxi-ehci1";
      			reg = <0x00000000 0x05200000 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000 0x00000000 0x07010250 0x00000000 0x00000010>;
      			interrupts = <0x00000000 0x00000021 0x00000004>;
      			clocks = <0x00000015 0x0000007f 0x00000015 0x0000007b>;
      			clock-names = "bus_hci", "phy";
      			resets = <0x00000015 0x00000037 0x00000015 0x00000033>;
      			reset-names = "hci", "phy";
      			hci_ctrl_no = <0x00000001>;
      			drvvbus-supply = <0x00000091>;
      			phandle = <0x00000167>;
      		};
      		ohci1-controller@5200400 {
      			compatible = "allwinner,sunxi-ohci1";
      			reg = <0x00000000 0x05200400 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000 0x00000000 0x07010250 0x00000000 0x00000010>;
      			interrupts = <0x00000000 0x00000022 0x00000004>;
      			clocks = <0x00000015 0x0000007d 0x00000015 0x0000007a 0x00000015 0x0000007b>;
      			clock-names = "bus_hci", "ohci", "phy";
      			resets = <0x00000015 0x00000035 0x00000015 0x00000033>;
      			reset-names = "hci", "phy";
      			hci_ctrl_no = <0x00000001>;
      			drvvbus-supply = <0x00000091>;
      			phandle = <0x00000168>;
      		};
      		disp1@1 {
      			compatible = "allwinner,sunxi-disp";
      			iommus = <0x00000081 0x00000001 0x00000000>;
      			phandle = <0x00000169>;
      		};
      		disp@6000000 {
      			boot_fb0 = "bbf299c0,320,500,20,c80,0,0,320,500";
      			compatible = "allwinner,sunxi-disp";
      			reg = * 0xbbe88b90 [0x00000070];
      			interrupts = <0x00000000 0x00000045 0x00000004 0x00000000 0x00000046 0x00000004 0x00000000 0x00000044 0x00000004>;
      			clocks = * 0xbbe88c3c [0x00000068];
      			clock-names = "clk_de0", "clk_de1", "clk_bus_de0", "clk_bus_de1", "clk_bus_dpss_top0", "clk_bus_dpss_top1", "clk_mipi_dsi0", "clk_bus_mipi_dsi0", "clk_tcon0", "clk_tcon1", "clk_bus_tcon0", "clk_bus_tcon1", "clk_pll_com";
      			resets = * 0xbbe88d64 [0x00000048];
      			reset-names = "rst_bus_de0", "rst_bus_de1", "rst_bus_dpss_top0", "rst_bus_dpss_top1", "rst_bus_mipi_dsi0", "rst_bus_tcon0", "rst_bus_tcon1", "rst_bus_lvds0", "rst_bus_lvds1";
      			assigned-clocks = <0x00000015 0x00000020 0x00000015 0x00000021 0x00000015 0x00000084 0x00000015 0x00000086 0x00000015 0x00000087>;
      			assigned-clock-parents = <0x00000015 0x00000004 0x00000015 0x00000004 0x00000015 0x00000003 0x00000015 0x0000000a 0x00000015 0x0000000d>;
      			assigned-clock-rates = <0x11e1a300 0x11e1a300 0x00000000 0x00000000 0x00000000>;
      			boot_disp = <0x00000104>;
      			boot_disp1 = <0x01040000>;
      			boot_disp2 = <0x00000004>;
      			fb_base = <0x00000000>;
      			iommus = <0x00000081 0x00000000 0x00000000>;
      			disp_init_enable = <0x00000001>;
      			disp_mode = <0x00000000>;
      			screen0_output_type = <0x00000001>;
      			screen0_output_mode = <0x00000004>;
      			screen1_output_type = <0x00000001>;
      			screen1_output_mode = <0x00000004>;
      			screen1_output_format = <0x00000000>;
      			screen1_output_bits = <0x00000000>;
      			screen1_output_eotf = <0x00000004>;
      			screen1_output_cs = <0x00000101>;
      			screen1_output_dvi_hdmi = <0x00000002>;
      			screen1_output_range = <0x00000002>;
      			screen1_output_scan = <0x00000000>;
      			screen1_output_aspect_ratio = <0x00000008>;
      			dev0_output_type = <0x00000001>;
      			dev0_output_mode = <0x00000004>;
      			dev0_screen_id = <0x00000000>;
      			dev0_do_hpd = <0x00000000>;
      			dev1_output_type = <0x00000004>;
      			dev1_output_mode = <0x0000000a>;
      			dev1_screen_id = <0x00000001>;
      			dev1_do_hpd = <0x00000001>;
      			def_output_dev = <0x00000000>;
      			hdmi_mode_check = <0x00000001>;
      			fb0_format = <0x00000000>;
      			fb0_width = <0x00000320>;
      			fb0_height = <0x00000500>;
      			fb1_format = <0x00000000>;
      			fb1_width = <0x00000000>;
      			fb1_height = <0x00000000>;
      			chn_cfg_mode = <0x00000001>;
      			disp_para_zone = <0x00000001>;
      			dc1sw-supply = <0x0000006b>;
      			dcdc1-supply = <0x0000002d>;
      			phandle = <0x0000016a>;
      		};
      		uboot_disp@06100000 {
      			compatible = "allwinner,sunxi-disp";
      			reg = * 0xbbe8919c [0x00000070];
      			interrupts = <0x00000000 0x00000045 0x00000004 0x00000000 0x00000046 0x00000004 0x00000000 0x00000044 0x00000004>;
      			clocks = <0x0000000d 0x0000000e 0x00000092 0x00000093 0x00000094 0x00000012 0x00000013 0x00000095 0x00000096 0x00000014>;
      			boot_disp = <0x00000000>;
      			boot_disp1 = <0x00000000>;
      			boot_disp2 = <0x00000000>;
      			fb_base = <0x00000000>;
      			iommus = <0x00000081 0x00000000 0x00000000>;
      			phandle = <0x0000016b>;
      		};
      		lcd0_1@1c0c000 {
      			lcd_used = <0x00000001>;
      			lcd_driver_name = "C69500_01";
      			lcd_backlight = <0x00000032>;
      			lcd_if = <0x00000004>;
      			lcd_x = <0x00000320>;
      			lcd_y = <0x00000500>;
      			lcd_width = <0x0000006c>;
      			lcd_height = <0x000000ac>;
      			lcd_dclk_freq = <0x00000044>;
      			lcd_pwm_used = <0x00000001>;
      			lcd_pwm_ch = <0x00000000>;
      			lcd_pwm_freq = <0x0000c350>;
      			lcd_pwm_pol = <0x00000001>;
      			lcd_pwm_max_limit = <0x000000ff>;
      			lcd_hbp = <0x00000032>;
      			lcd_ht = <0x0000036b>;
      			lcd_hspw = <0x00000019>;
      			lcd_vbp = <0x0000000c>;
      			lcd_vt = <0x00000518>;
      			lcd_vspw = <0x00000002>;
      			lcd_frm = <0x00000000>;
      			lcd_gamma_en = <0x00000000>;
      			lcd_bright_curve_en = <0x00000000>;
      			lcd_cmap_en = <0x00000000>;
      			deu_mode = <0x00000000>;
      			lcdgamma4iep = <0x00000016>;
      			smart_color = <0x0000005a>;
      			lcd_dsi_if = <0x00000000>;
      			lcd_dsi_lane = <0x00000004>;
      			lcd_dsi_format = <0x00000000>;
      			lcd_dsi_te = <0x00000000>;
      			lcd_dsi_eotp = <0x00000000>;
      			lcd_pin_power = "dcdc1";
      			lcd_pin_power1 = "eldo3";
      			lcd_power = "dc1sw";
      			lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>;
      			lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>;
      			pinctrl-0 = <0x00000097>;
      			pinctrl-1 = <0x00000098>;
      			phandle = <0x0000016c>;
      		};
      		lcd0_2@1c0c000 {
      			lcd_used = <0x00000001>;
      			lcd_driver_name = "K080_IM2AYC805_R_800x1280";
      			lcd_backlight = <0x00000032>;
      			lcd_if = <0x00000004>;
      			lcd_x = <0x00000320>;
      			lcd_y = <0x00000500>;
      			lcd_width = <0x0000006c>;
      			lcd_height = <0x000000ac>;
      			lcd_dclk_freq = <0x00000044>;
      			lcd_pwm_used = <0x00000001>;
      			lcd_pwm_ch = <0x00000000>;
      			lcd_pwm_freq = <0x0000c350>;
      			lcd_pwm_pol = <0x00000001>;
      			lcd_pwm_max_limit = <0x000000ff>;
      			lcd_hbp = <0x00000024>;
      			lcd_ht = <0x00000356>;
      			lcd_hspw = <0x00000012>;
      			lcd_vbp = <0x0000000c>;
      			lcd_vt = <0x00000528>;
      			lcd_vspw = <0x00000004>;
      			lcd_frm = <0x00000000>;
      			lcd_gamma_en = <0x00000000>;
      			lcd_bright_curve_en = <0x00000000>;
      			lcd_cmap_en = <0x00000000>;
      			deu_mode = <0x00000000>;
      			lcdgamma4iep = <0x00000016>;
      			smart_color = <0x0000005a>;
      			lcd_dsi_if = <0x00000000>;
      			lcd_dsi_lane = <0x00000004>;
      			lcd_dsi_format = <0x00000000>;
      			lcd_dsi_te = <0x00000000>;
      			lcd_dsi_eotp = <0x00000000>;
      			lcd_pin_power = "dcdc1";
      			lcd_pin_power1 = "eldo3";
      			lcd_power = "dc1sw";
      			lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>;
      			lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>;
      			pinctrl-0 = <0x00000097>;
      			pinctrl-1 = <0x00000098>;
      			phandle = <0x0000016d>;
      		};
      		lcd0_3@1c0c000 {
      			lcd_used = <0x00000001>;
      			lcd_driver_name = "K101_IM2BYL02_L_800X1280";
      			lcd_backlight = <0x00000032>;
      			lcd_if = <0x00000004>;
      			lcd_x = <0x00000320>;
      			lcd_y = <0x00000500>;
      			lcd_width = <0x0000006c>;
      			lcd_height = <0x000000ac>;
      			lcd_dclk_freq = <0x00000048>;
      			lcd_pwm_used = <0x00000001>;
      			lcd_pwm_ch = <0x00000000>;
      			lcd_pwm_freq = <0x0000c350>;
      			lcd_pwm_pol = <0x00000001>;
      			lcd_pwm_max_limit = <0x000000ff>;
      			lcd_hbp = <0x00000050>;
      			lcd_ht = <0x00000384>;
      			lcd_hspw = <0x0000000e>;
      			lcd_vbp = <0x0000001c>;
      			lcd_vt = <0x00000572>;
      			lcd_vspw = <0x00000008>;
      			lcd_frm = <0x00000000>;
      			lcd_gamma_en = <0x00000000>;
      			lcd_bright_curve_en = <0x00000000>;
      			lcd_cmap_en = <0x00000000>;
      			deu_mode = <0x00000000>;
      			lcdgamma4iep = <0x00000016>;
      			smart_color = <0x0000005a>;
      			lcd_dsi_if = <0x00000000>;
      			lcd_dsi_lane = <0x00000004>;
      			lcd_dsi_format = <0x00000000>;
      			lcd_dsi_te = <0x00000000>;
      			lcd_dsi_eotp = <0x00000000>;
      			lcd_pin_power = "dcdc1";
      			lcd_pin_power1 = "eldo3";
      			lcd_power = "dc1sw";
      			lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>;
      			lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>;
      			pinctrl-0 = <0x00000097>;
      			pinctrl-1 = <0x00000098>;
      			phandle = <0x0000016e>;
      		};
      		lcd0@1c0c000 {
      			compatible = "allwinner,sunxi-lcd0";
      			reg = <0x00000000 0x01c0c000 0x00000000 0x00000000>;
      			pinctrl-names = "active", "sleep";
      			lcd_used = <0x00000001>;
      			lcd_driver_name = "K080_IM2AYC805_R_800x1280";
      			lcd_backlight = <0x00000032>;
      			lcd_if = <0x00000004>;
      			lcd_x = <0x00000320>;
      			lcd_y = <0x00000500>;
      			lcd_width = <0x0000006c>;
      			lcd_height = <0x000000ac>;
      			lcd_dclk_freq = <0x00000044>;
      			lcd_pwm_used = <0x00000001>;
      			lcd_pwm_ch = <0x00000000>;
      			lcd_pwm_freq = <0x0000c350>;
      			lcd_pwm_pol = <0x00000001>;
      			lcd_pwm_max_limit = <0x000000ff>;
      			lcd_hbp = <0x00000024>;
      			lcd_ht = <0x00000356>;
      			lcd_hspw = <0x00000012>;
      			lcd_vbp = <0x0000000c>;
      			lcd_vt = <0x00000528>;
      			lcd_vspw = <0x00000004>;
      			lcd_frm = <0x00000000>;
      			lcd_gamma_en = <0x00000000>;
      			lcd_bright_curve_en = <0x00000000>;
      			lcd_cmap_en = <0x00000000>;
      			deu_mode = <0x00000000>;
      			lcdgamma4iep = <0x00000016>;
      			smart_color = <0x0000005a>;
      			lcd_dsi_if = <0x00000000>;
      			lcd_dsi_lane = <0x00000004>;
      			lcd_dsi_format = <0x00000000>;
      			lcd_dsi_te = <0x00000000>;
      			lcd_dsi_eotp = <0x00000000>;
      			lcd_pin_power = "dcdc1";
      			lcd_pin_power1 = "eldo3";
      			lcd_power = "dc1sw";
      			lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>;
      			lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>;
      			pinctrl-0 = <0x00000097>;
      			pinctrl-1 = <0x00000098>;
      			phandle = <0x0000016d>;
      		};
      		lcd1@1 {
      			compatible = "allwinner,sunxi-lcd1";
      			reg = <0x00000000 0x01c0c000 0x00000000 0x00000000>;
      			pinctrl-names = "active", "sleep";
      			phandle = <0x00000170>;
      		};
      		eink@6400000 {
      			compatible = "allwinner,sunxi-eink";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x06400000 0x00000000 0x0001ffff 0x00000000 0x06000000 0x00000000 0x003fffff>;
      			interrupts = <0x00000000 0x0000005a 0x00000004 0x00000000 0x00000058 0x00000004>;
      			clocks = <0x00000015 0x00000020 0x00000015 0x00000022 0x00000015 0x00000025 0x00000015 0x00000024 0x00000015 0x00000028>;
      			clock-names = "de0", "bus_de0", "bus_eink", "eink", "eink_panel";
      			resets = <0x00000015 0x00000001 0x00000015 0x00000003>;
      			reset-names = "rst_bus_de0", "rst_bus_eink";
      			iommus = <0x00000081 0x00000006 0x00000001>;
      			phandle = <0x00000171>;
      		};
      		uboot_eink@6400000 {
      			compatible = "allwinner,sunxi-eink";
      			pinctrl-names = "active", "sleep";
      			reg = <0x00000000 0x06400000 0x00000000 0x0001ffff 0x00000000 0x06000000 0x00000000 0x003fffff>;
      			interrupts = <0x00000000 0x0000005a 0x00000004 0x00000000 0x00000058 0x00000004>;
      			clocks = <0x0000000d 0x00000010 0x00000011>;
      			iommus = <0x00000081 0x00000006 0x00000001>;
      			phandle = <0x00000172>;
      		};
      		ve@1c0e000 {
      			compatible = "allwinner,sunxi-cedar-ve";
      			reg = <0x00000000 0x01c0e000 0x00000000 0x00001000 0x00000000 0x03000000 0x00000000 0x00000010 0x00000000 0x03001000 0x00000000 0x00001000>;
      			interrupts = <0x00000000 0x0000005e 0x00000004>;
      			clocks = <0x00000015 0x0000002e 0x00000015 0x0000002d 0x00000015 0x00000039>;
      			clock-names = "bus_ve", "ve", "mbus_ve";
      			resets = <0x00000015 0x00000007>;
      			iommus = <0x00000081 0x00000002 0x00000001>;
      			phandle = <0x00000173>;
      		};
      		g2d@6480000 {
      			compatible = "allwinner,sunxi-g2d";
      			reg = <0x00000000 0x06480000 0x00000000 0x0003ffff>;
      			interrupts = <0x00000000 0x0000005b 0x00000004>;
      			clocks = <0x00000015 0x00000027 0x00000015 0x00000026 0x00000015 0x0000003e>;
      			clock-names = "bus", "g2d", "mbus_g2d";
      			resets = <0x00000015 0x00000004>;
      			iommus = <0x00000081 0x00000005 0x00000001>;
      			assigned-clocks = <0x00000015 0x00000026>;
      			assigned-clock-rates = <0x11e1a300>;
      			phandle = <0x00000174>;
      		};
      		pinctrl_test@0 {
      			reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
      			compatible = "allwinner,sunxi-pinctrl-test";
      			device_type = "pinctrl-test";
      			pinctrl-0 = <0x00000099>;
      			pinctrl-1 = <0x0000009a>;
      			pinctrl-names = "default", "sleep";
      			test-gpios = <0x00000045 0x00000001 0x00000002 0x00000001>;
      			suspend-gpios = <0x00000082 0x00000000 0x00000004 0x00000001>;
      			wakeup-source;
      			interrupt-parent = <0x00000045>;
      			interrupts = <0x00000001 0x00000003 0x00000004>;
      			phandle = <0x00000175>;
      		};
      		codec@5096000 {
      			#sound-dai-cells = <0x00000000>;
      			compatible = "allwinner,sunxi-internal-codec";
      			reg = <0x00000000 0x05096000 0x00000000 0x0000032c>;
      			clocks = <0x00000015 0x00000017 0x00000015 0x00000074 0x00000015 0x00000075 0x00000015 0x00000015 0x00000015 0x00000016 0x00000015 0x00000077>;
      			clock-names = "pll_audio", "codec_dac", "codec_adc", "pll_com", "pll_com_audio", "codec_bus";
      			resets = <0x00000015 0x00000031>;
      			playback_cma = <0x00000080>;
      			capture_cma = <0x00000100>;
      			device_type = "codec";
      			mic1gain = <0x0000001f>;
      			mic2gain = <0x0000001f>;
      			adcdrc_cfg = <0x00000002>;
      			adchpf_cfg = <0x00000001>;
      			dacdrc_cfg = <0x00000002>;
      			dachpf_cfg = <0x00000000>;
      			digital_vol = <0x00000000>;
      			dac_digital_vol = <0x00019c9c>;
      			lineout_vol = <0x0000001a>;
      			headphonegain = <0x00000000>;
      			pa_level = <0x00000001>;
      			pa_msleep_time = <0x00000078>;
      			gpio-spk = <0x00000045 0x00000007 0x00000006 0x00000000>;
      			avcc-supply = <0x00000066>;
      			cpvin-supply = <0x0000003f>;
      			status = "okay";
      			phandle = <0x0000009b>;
      		};
      		dummy_cpudai@509632c {
      			compatible = "allwinner,sunxi-dummy-cpudai";
      			reg = <0x00000000 0x0509632c 0x00000000 0x00000004>;
      			tx_fifo_size = <0x00000080>;
      			rx_fifo_size = <0x00000100>;
      			dac_txdata = <0x05096020>;
      			adc_txdata = <0x05096040>;
      			playback_cma = <0x00000080>;
      			capture_cma = <0x00000100>;
      			device_type = "cpudai";
      			dmas = <0x00000055 0x00000007 0x00000055 0x00000007>;
      			dma-names = "tx", "rx";
      			phandle = <0x0000009c>;
      		};
      		sound@5096330 {
      			compatible = "allwinner,sunxi-codec-machine";
      			reg = <0x00000000 0x05096330 0x00000000 0x00000004>;
      			interrupts = <0x00000000 0x00000019 0x00000004>;
      			hp_detect_case = <0x00000000>;
      			sunxi,audio-codec = <0x0000009b>;
      			sunxi,cpudai-controller = <0x0000009c>;
      			device_type = "sndcodec";
      			status = "okay";
      			phandle = <0x00000176>;
      		};
      		spdif@5094000 {
      			#sound-dai-cells = <0x00000000>;
      			compatible = "allwinner,sunxi-spdif";
      			reg = <0x00000000 0x05094000 0x00000000 0x00000040>;
      			clocks = <0x00000015 0x00000017 0x00000015 0x00000070 0x00000015 0x00000071>;
      			clock-names = "pll_audio", "spdif", "spdif_bus";
      			resets = <0x00000015 0x0000002f>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x0000009d>;
      			pinctrl-1 = <0x0000009e>;
      			clk_parent = <0x00000001>;
      			playback_cma = <0x00000080>;
      			capture_cma = <0x00000080>;
      			device_type = "spdif";
      			dmas = <0x00000055 0x00000002 0x00000055 0x00000002>;
      			dma-names = "tx", "rx";
      			status = "disabled";
      			phandle = <0x0000009f>;
      		};
      		soundspdif@5094040 {
      			reg = <0x00000000 0x05094040 0x00000000 0x00000004>;
      			compatible = "sunxi,simple-audio-card";
      			simple-audio-card,name = "sndspdif";
      			phandle = <0x00000177>;
      			simple-audio-card,cpu {
      				sound-dai = <0x0000009f>;
      			};
      			simple-audio-card,codec {
      			};
      		};
      		dmic@5095000 {
      			#sound-dai-cells = <0x00000000>;
      			compatible = "allwinner,sunxi-dmic";
      			reg = <0x00000000 0x05095000 0x00000000 0x00000050>;
      			clocks = <0x00000015 0x00000017 0x00000015 0x00000072 0x00000015 0x00000073>;
      			clock-names = "pll_audio", "dmic", "dmic_bus";
      			resets = <0x00000015 0x00000030>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x000000a0>;
      			pinctrl-1 = <0x000000a1>;
      			clk_parent = <0x00000001>;
      			capture_cma = <0x00000080>;
      			data_vol = <0x000000b0>;
      			dmic_rxsync_en = <0x00000000>;
      			rx_chmap = <0x76543210>;
      			device_type = "dmic";
      			dmas = <0x00000055 0x00000008>;
      			dma-names = "rx";
      			status = "disabled";
      
      			phandle = <0x000000a2>;
      		};
      		sound@5095050 {
      			#sound-dai-cells = <0x00000000>;
      			compatible = "dmic-codec";
      			reg = <0x00000000 0x05095050 0x00000000 0x00000004>;
      			num-channels = <0x00000006>;
      			status = "disabled";
      			phandle = <0x000000a3>;
      		};
      		sounddmic@5095060 {
      			reg = <0x00000000 0x05095060 0x00000000 0x00000004>;
      			compatible = "sunxi,simple-audio-card";
      			simple-audio-card,name = "snddmic";
      			phandle = <0x00000178>;
      			simple-audio-card,cpu {
      				sound-dai = <0x000000a2>;
      			};
      			simple-audio-card,codec {
      				sound-dai = <0x000000a3>;
      			};
      		};
      		daudio@5090000 {
      			#sound-dai-cells = <0x00000000>;
      			compatible = "allwinner,sunxi-daudio";
      			reg = <0x00000000 0x05090000 0x00000000 0x0000007c>;
      			clocks = <0x00000015 0x00000017 0x00000015 0x00000068 0x00000015 0x0000006c>;
      			clock-names = "pll_audio", "i2s0", "i2s0_bus";
      			resets = <0x00000015 0x0000002b>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x000000a4>;
      			pinctrl-1 = <0x000000a5>;
      			pinctrl_used = <0x00000001>;
      			sign_extend = <0x00000000>;
      			tx_data_mode = <0x00000000>;
      			rx_data_mode = <0x00000000>;
      			msb_lsb_first = <0x00000000>;
      			daudio_rxsync_en = <0x00000000>;
      			pcm_lrck_period = <0x00000080>;
      			slot_width_select = <0x00000020>;
      			frametype = <0x00000000>;
      			tdm_config = <0x00000001>;
      			tdm_num = <0x00000000>;
      			mclk_div = <0x00000000>;
      			clk_parent = <0x00000001>;
      			capture_cma = <0x00000080>;
      			playback_cma = <0x00000080>;
      			tx_num = <0x00000004>;
      			tx_chmap1 = <0x76543210>;
      			tx_chmap0 = <0xfedcba98>;
      			rx_num = <0x00000004>;
      			rx_chmap3 = <0x03020100>;
      			rx_chmap2 = <0x07060504>;
      			rx_chmap1 = <0x0b0a0908>;
      			rx_chmap0 = <0x0f0e0d0c>;
      			device_type = "daudio0";
      			dmas = <0x00000055 0x00000003 0x00000055 0x00000003>;
      			dma-names = "tx", "rx";
      			status = "disabled";
      			phandle = <0x000000a6>;
      		};
      		sounddaudio0@509007c {
      			reg = <0x00000000 0x0509007c 0x00000000 0x00000004>;
      			compatible = "sunxi,simple-audio-card";
      			simple-audio-card,name = "snddaudio0";
      			simple-audio-card,format = "i2s";
      			status = "disabled";
      			phandle = <0x00000179>;
      			simple-audio-card,cpu {
      				sound-dai = <0x000000a6>;
      			};
      			simple-audio-card,codec {
      				phandle = <0x0000017a>;
      			};
      		};
      		daudio@5091000 {
      			#sound-dai-cells = <0x00000000>;
      			compatible = "allwinner,sunxi-daudio";
      			reg = <0x00000000 0x05091000 0x00000000 0x0000007c>;
      			clocks = <0x00000015 0x00000017 0x00000015 0x00000069 0x00000015 0x0000006d>;
      			clock-names = "pll_audio", "i2s1", "i2s1_bus";
      			resets = <0x00000015 0x0000002c>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x000000a7>;
      			pinctrl-1 = <0x000000a8>;
      			pinctrl_used = <0x00000001>;
      			sign_extend = <0x00000000>;
      			tx_data_mode = <0x00000000>;
      			rx_data_mode = <0x00000000>;
      			msb_lsb_first = <0x00000000>;
      			daudio_rxsync_en = <0x00000000>;
      			pcm_lrck_period = <0x00000080>;
      			slot_width_select = <0x00000020>;
      			frametype = <0x00000000>;
      			tdm_config = <0x00000001>;
      			tdm_num = <0x00000001>;
      			mclk_div = <0x00000000>;
      			clk_parent = <0x00000001>;
      			capture_cma = <0x00000080>;
      			playback_cma = <0x00000080>;
      			tx_num = <0x00000004>;
      			tx_chmap1 = <0x76543210>;
      			tx_chmap0 = <0xfedcba98>;
      			rx_num = <0x00000004>;
      			rx_chmap3 = <0x03020100>;
      			rx_chmap2 = <0x07060504>;
      			rx_chmap1 = <0x0b0a0908>;
      			rx_chmap0 = <0x0f0e0d0c>;
      			device_type = "daudio1";
      			dmas = <0x00000055 0x00000004 0x00000055 0x00000004>;
      			dma-names = "tx", "rx";
      			status = "disabled";
      			phandle = <0x000000a9>;
      		};
      		sounddaudio1@509107c {
      			reg = <0x00000000 0x0509107c 0x00000000 0x00000004>;
      			compatible = "sunxi,simple-audio-card";
      			simple-audio-card,name = "snddaudio1";
      			simple-audio-card,format = "i2s";
      			status = "disabled";
      			phandle = <0x0000017b>;
      			simple-audio-card,cpu {
      				sound-dai = <0x000000a9>;
      			};
      			simple-audio-card,codec {
      				phandle = <0x0000017c>;
      			};
      		};
      		daudio@5092000 {
      			#sound-dai-cells = <0x00000000>;
      			compatible = "allwinner,sunxi-daudio";
      			reg = <0x00000000 0x05092000 0x00000000 0x0000007c>;
      			clocks = <0x00000015 0x00000017 0x00000015 0x0000006a 0x00000015 0x0000006e>;
      			clock-names = "pll_audio", "i2s2", "i2s2_bus";
      			resets = <0x00000015 0x0000002d>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x000000aa>;
      			pinctrl-1 = <0x000000ab>;
      			pinctrl_used = <0x00000001>;
      			sign_extend = <0x00000000>;
      			tx_data_mode = <0x00000000>;
      			rx_data_mode = <0x00000000>;
      			msb_lsb_first = <0x00000000>;
      			daudio_rxsync_en = <0x00000000>;
      			pcm_lrck_period = <0x00000080>;
      			slot_width_select = <0x00000020>;
      			frametype = <0x00000000>;
      			tdm_config = <0x00000001>;
      			tdm_num = <0x00000002>;
      			mclk_div = <0x00000000>;
      			clk_parent = <0x00000001>;
      			capture_cma = <0x00000080>;
      			playback_cma = <0x00000080>;
      			tx_num = <0x00000004>;
      			tx_chmap1 = <0x76543210>;
      			tx_chmap0 = <0xfedcba98>;
      			rx_num = <0x00000004>;
      			rx_chmap3 = <0x03020100>;
      			rx_chmap2 = <0x07060504>;
      			rx_chmap1 = <0x0b0a0908>;
      			rx_chmap0 = <0x0f0e0d0c>;
      			device_type = "daudio2";
      			dmas = <0x00000055 0x00000005 0x00000055 0x00000005>;
      			dma-names = "tx", "rx";
      			status = "disabled";
      			phandle = <0x000000ac>;
      		};
      		sounddaudio2@509207c {
      			reg = <0x00000000 0x0509207c 0x00000000 0x00000004>;
      			compatible = "sunxi,simple-audio-card";
      			simple-audio-card,name = "snddaudio2";
      			simple-audio-card,format = "i2s";
      			status = "disabled";
      			phandle = <0x0000017d>;
      			simple-audio-card,cpu {
      				sound-dai = <0x000000ac>;
      			};
      			simple-audio-card,codec {
      				phandle = <0x0000017e>;
      			};
      		};
      		daudio@5093000 {
      			#sound-dai-cells = <0x00000000>;
      			compatible = "allwinner,sunxi-daudio";
      			reg = <0x00000000 0x05093000 0x00000000 0x0000007c>;
      			clocks = <0x00000015 0x00000017 0x00000015 0x0000006b 0x00000015 0x0000006f>;
      			clock-names = "pll_audio", "i2s3", "i2s3_bus";
      			resets = <0x00000015 0x0000002e>;
      			pinctrl-names = "default", "sleep";
      			pinctrl-0 = <0x000000ad>;
      			pinctrl-1 = <0x000000ae>;
      			pinctrl_used = <0x00000001>;
      			sign_extend = <0x00000000>;
      			tx_data_mode = <0x00000000>;
      			rx_data_mode = <0x00000000>;
      			msb_lsb_first = <0x00000000>;
      			daudio_rxsync_en = <0x00000000>;
      			pcm_lrck_period = <0x00000080>;
      			slot_width_select = <0x00000020>;
      			frametype = <0x00000000>;
      			tdm_config = <0x00000001>;
      			tdm_num = <0x00000003>;
      			mclk_div = <0x00000000>;
      			clk_parent = <0x00000001>;
      			capture_cma = <0x00000080>;
      			playback_cma = <0x00000080>;
      			tx_num = <0x00000004>;
      			tx_chmap1 = <0x76543210>;
      			tx_chmap0 = <0xfedcba98>;
      			rx_num = <0x00000004>;
      			rx_chmap3 = <0x03020100>;
      			rx_chmap2 = <0x07060504>;
      			rx_chmap1 = <0x0b0a0908>;
      			rx_chmap0 = <0x0f0e0d0c>;
      			device_type = "daudio3";
      			dmas = <0x00000055 0x00000006 0x00000055 0x00000006>;
      			dma-names = "tx", "rx";
      			status = "disabled";
      			phandle = <0x000000af>;
      		};
      		sounddaudio3@509307c {
      			reg = <0x00000000 0x0509307c 0x00000000 0x00000004>;
      			compatible = "sunxi,simple-audio-card";
      			simple-audio-card,name = "snddaudio3";
      			simple-audio-card,format = "i2s";
      			status = "disabled";
      			phandle = <0x0000017f>;
      			simple-audio-card,cpu {
      				sound-dai = <0x000000af>;
      			};
      			simple-audio-card,codec {
      				phandle = <0x00000180>;
      			};
      		};
      		pinctrl@7022000 {
      			compatible = "allwinner,sun50iw10p1-r-pinctrl";
      			reg = <0x00000000 0x07022000 0x00000000 0x00000400>;
      			interrupts = <0x00000000 0x0000006f 0x00000004>;
      			clocks = <0x00000024 0x00000002 0x00000028 0x00000029 0x00000002>;
      			clock-names = "apb", "hosc", "losc";
      			device_type = "r_pio";
      			gpio-controller;
      			interrupt-controller;
      			#interrupt-cells = <0x00000003>;
      			#size-cells = <0x00000000>;
      			#gpio-cells = <0x00000003>;
      			phandle = <0x00000082>;
      			s_rsb0@0 {
      				pins = "PL0", "PL1";
      				function = "s_rsb0";
      				drive-strength = <0x00000014>;
      				bias-pull-up;
      				phandle = <0x00000181>;
      			};
      			s_uart0@0 {
      				pins = "PL2", "PL3";
      				function = "s_uart0";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x0000003a>;
      			};
      			s_uart0@1 {
      				pins = "PL2", "PL3";
      				function = "gpio_in";
      				phandle = <0x0000003b>;
      			};
      			s_twi0@0 {
      				pins = "PL0", "PL1";
      				function = "s_twi0";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x0000005c>;
      			};
      			s_twi0@1 {
      				pins = "PL0", "PL1";
      				function = "gpio_in";
      				phandle = <0x0000005d>;
      			};
      			s_twi1@0 {
      				pins = "PL8", "PL9";
      				function = "s_twi1";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x0000006e>;
      			};
      			s_twi1@1 {
      				pins = "PL8", "PL9";
      				function = "gpio_in";
      				phandle = <0x00000182>;
      			};
      			s_cir0@0 {
      				pins = "PL11";
      				function = "s_cir0";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000183>;
      			};
      		};
      		pinctrl@300b000 {
      			compatible = "allwinner,sun50iw10p1-pinctrl";
      			reg = <0x00000000 0x0300b000 0x00000000 0x00000400>;
      			interrupts = * 0xbbe8c2c8 [0x0000006c];
      			device_type = "pio";
      			clocks = <0x00000015 0x0000001d 0x00000029 0x00000002 0x00000028>;
      			clock-names = "apb", "losc", "hosc";
      			gpio-controller;
      			interrupt-controller;
      			#interrupt-cells = <0x00000003>;
      			#size-cells = <0x00000000>;
      			#gpio-cells = <0x00000003>;
      			vcc-pf-supply = <0x000000b0>;
      			vcc-pfo-supply = <0x000000b1>;
      			input-debounce = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000001 0x00000000 0x00000000 0x00000000 0x00000000>;
      			vcc-pe-supply = <0x000000b0>;
      			phandle = <0x00000045>;
      			test_pins@0 {
      				pins = "PB0", "PB1";
      				function = "test";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000099>;
      			};
      			test_pins@1 {
      				pins = "PB0", "PB1";
      				function = "gpio_in";
      				phandle = <0x0000009a>;
      			};
      			uart0@0 {
      				pins = [00 00];
      				function = "uart0";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x0000002b>;
      			};
      			uart0@1 {
      				pins = [00 00];
      				function = "gpio_in";
      				drive-strength = <0x0000000a>;
      				phandle = <0x0000002c>;
      			};
      			uart1@0 {
      				pins = "PG6", "PG7", "PG8", "PG9";
      				function = "uart1";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x0000002e>;
      			};
      			uart1@1 {
      				pins = "PG6", "PG7", "PG8", "PG9";
      				function = "gpio_in";
      				phandle = <0x0000002f>;
      			};
      			uart2@0 {
      				pins = "PB0", "PB1", "PB2", "PB3";
      				function = "uart2";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000030>;
      			};
      			uart2@1 {
      				pins = "PB0", "PB1", "PB2", "PB3";
      				function = "gpio_in";
      				phandle = <0x00000031>;
      			};
      			uart3@0 {
      				pins = "PH4", "PH5", "PH6", "PH7";
      				function = "uart3";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000032>;
      			};
      			uart3@1 {
      				pins = "PH4", "PH5", "PH6", "PH7";
      				function = "gpio_in";
      				phandle = <0x00000033>;
      			};
      			uart4@0 {
      				pins = "PD18", "PD19", "PD20", "PD21";
      				function = "uart4";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000034>;
      			};
      			uart4@1 {
      				pins = "PD18", "PD19", "PD20", "PD21";
      				function = "gpio_in";
      				phandle = <0x00000035>;
      			};
      			uart5@0 {
      				pins = "PI2", "PI3", "PI4", "PI5";
      				function = "uart5";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000036>;
      			};
      			uart5@1 {
      				pins = "PI2", "PI3", "PI4", "PI5";
      				function = "gpio_in";
      				phandle = <0x00000037>;
      			};
      			uart6@0 {
      				pins = "PI6", "PI7", "PI13", "PI14";
      				function = "uart6";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000038>;
      			};
      			uart6@1 {
      				pins = "PI6", "PI7", "PI13", "PI14";
      				function = "gpio_in";
      				phandle = <0x00000039>;
      			};
      			ir0@0 {
      				pins = "PH3";
      				function = "ir0";
      				drive-strength = <0x0000000a>;
      				phandle = <0x00000184>;
      			};
      			ir0@1 {
      				pins = "PH3";
      				function = "gpio_in";
      				phandle = <0x00000185>;
      			};
      			twi0@0 {
      				pins = "PH0", "PH1";
      				function = "twi0";
      				drive-strength = <0x0000000a>;
      				phandle = <0x0000004d>;
      			};
      			twi0@1 {
      				pins = "PH0", "PH1";
      				function = "gpio_in";
      				phandle = <0x0000004e>;
      			};
      			twi1@0 {
      				pins = "PH2", "PH3";
      				function = "twi1";
      				drive-strength = <0x0000000a>;
      				phandle = <0x00000050>;
      			};
      			twi1@1 {
      				pins = "PH2", "PH3";
      				function = "gpio_in";
      				phandle = <0x00000051>;
      			};
      			twi2@0 {
      				pins = "PE1", "PE2";
      				function = "twi2";
      				drive-strength = <0x00000014>;
      				phandle = <0x00000052>;
      			};
      			twi2@1 {
      				pins = "PE1", "PE2";
      				function = "gpio_in";
      				phandle = <0x00000053>;
      			};
      			twi3@0 {
      				pins = "PE3", "PE4";
      				function = "twi3";
      				drive-strength = <0x0000000a>;
      				phandle = <0x00000056>;
      			};
      			twi3@1 {
      				pins = "PE3", "PE4";
      				function = "gpio_in";
      				phandle = <0x00000057>;
      			};
      			twi4@0 {
      				pins = "PI0", "PI1";
      				function = "twi4";
      				drive-strength = <0x0000000a>;
      				phandle = <0x00000058>;
      			};
      			twi4@1 {
      				pins = "PI0", "PI1";
      				function = "gpio_in";
      				phandle = <0x00000059>;
      			};
      			twi5@0 {
      				pins = "PI8", "PI9";
      				function = "twi5";
      				drive-strength = <0x0000000a>;
      				phandle = <0x0000005a>;
      			};
      			twi5@1 {
      				pins = "PI8", "PI9";
      				function = "gpio_in";
      				phandle = <0x0000005b>;
      			};
      			ts0@0 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11";
      				function = "ts0";
      				drive-strength = <0x0000000a>;
      				phandle = <0x00000186>;
      			};
      			ts0_sleep@0 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11";
      				function = "gpio_in";
      				phandle = <0x00000187>;
      			};
      			spi0@0 {
      				pins = "PC2", "PC4", "PC12", "PC15", "PC16";
      				function = "spi0";
      				drive-strength = <0x0000000a>;
      				phandle = <0x00000085>;
      			};
      			spi0@1 {
      				pins = "PC3", "PC7";
      				function = "spi0";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000086>;
      			};
      			spi0@2 {
      				pins = "PC2", "PC3", "PC4", "PC7", "PC12", "PC15", "PC16";
      				function = "gpio_in";
      				phandle = <0x00000087>;
      			};
      			spi1@0 {
      				pins = "PD11", "PD12", "PD13";
      				function = "spi1";
      				drive-strength = <0x0000000a>;
      				phandle = <0x00000088>;
      			};
      			spi1@1 {
      				pins = "PD10";
      				function = "spi1";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000089>;
      			};
      			spi1@2 {
      				pins = "PD10", "PD11", "PD12", "PD13";
      				function = "gpio_in";
      				phandle = <0x0000008a>;
      			};
      			spi2@0 {
      				pins = "PB1", "PB2", "PB3";
      				function = "spi2";
      				drive-strength = <0x0000000a>;
      				phandle = <0x0000008b>;
      			};
      			spi2@1 {
      				pins = "PB0";
      				function = "spi2";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x0000008c>;
      			};
      			spi2@2 {
      				pins = "PB0", "PB1", "PB2", "PB3";
      				function = "gpio_in";
      				phandle = <0x0000008d>;
      			};
      			sdc0@0 {
      				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
      				function = "sdc0";
      				drive-strength = <0x0000001e>;
      				bias-pull-up;
      				power-source = <0x00000ce4>;
      				allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
      				allwinner,function = "sdc0";
      				allwinner,muxsel = <0x00000002>;
      				allwinner,drive = <0x00000003>;
      				allwinner,pull = <0x00000001>;
      				phandle = <0x00000040>;
      			};
      			sdc0@1 {
      				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
      				function = "sdc0";
      				drive-strength = <0x0000001e>;
      				bias-pull-up;
      				power-source = <0x00000708>;
      				phandle = <0x00000041>;
      			};
      			sdc0@2 {
      				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
      				function = "gpio_in";
      				phandle = <0x00000042>;
      			};
      			sdc0@3 {
      				pins = "PF2", "PF4";
      				function = "uart0";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000043>;
      			};
      			sdc0@4 {
      				pins = "PF0", "PF1", "PF3", "PF5";
      				function = "jtag";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x00000044>;
      			};
      			sdc1@0 {
      				pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
      				function = "sdc1";
      				drive-strength = <0x00000028>;
      				bias-pull-up;
      				phandle = <0x00000046>;
      			};
      			sdc1@1 {
      				pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
      				function = "gpio_in";
      				phandle = <0x00000047>;
      			};
      			sdc2@0 {
      				pins = "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16";
      				function = "sdc2";
      				drive-strength = <0x0000001e>;
      				bias-pull-up;
      				allwinner,pins = "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16";
      				allwinner,function = "sdc2";
      				allwinner,muxsel = <0x00000003>;
      				allwinner,drive = <0x00000003>;
      				allwinner,pull = <0x00000001>;
      				phandle = <0x0000003c>;
      			};
      			sdc2@1 {
      				pins = "PC0", "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16";
      				function = "gpio_in";
      				phandle = <0x0000003e>;
      			};
      			sdc2@2 {
      				pins = "PC0";
      				function = "sdc2";
      				drive-strength = <0x0000001e>;
      				bias-pull-down;
      				allwinner,pins = "PC0";
      				allwinner,function = "sdc2";
      				allwinner,muxsel = <0x00000003>;
      				allwinner,drive = <0x00000003>;
      				allwinner,pull = <0x00000002>;
      				phandle = <0x0000003d>;
      			};
      			sdc3@0 {
      				pins = "PI14", "PI13", "PI12", "PI11", "PI10", "PI9";
      				function = "sdc3";
      				drive-strength = <0x00000014>;
      				bias-pull-up;
      				phandle = <0x00000048>;
      			};
      			sdc3@1 {
      				pins = "PI14", "PI13", "PI12", "PI11", "PI10", "PI9";
      				function = "gpio_in";
      				phandle = <0x00000049>;
      			};
      			daudio0@0 {
      				pins = "PB4", "PB5", "PB6", "PB7", "PB8";
      				function = "h_i2s0";
      				drive-strength = <0x0000000a>;
      				phandle = <0x000000a4>;
      			};
      			daudio0_sleep@0 {
      				pins = "PB4", "PB5", "PB6", "PB7", "PB8";
      				function = "gpio_in";
      				phandle = <0x000000a5>;
      			};
      			daudio1@0 {
      				pins = "PG9", "PG10", "PG11", "PG12", "PG13";
      				function = "h_i2s1";
      				drive-strength = <0x0000000a>;
      				phandle = <0x000000a7>;
      			};
      			daudio1_sleep@0 {
      				pins = "PG9", "PG10", "PG11", "PG12", "PG13";
      				function = "gpio_in";
      				phandle = <0x000000a8>;
      			};
      			daudio2@0 {
      				pins = "PE5", "PE6", "PE7", "PE8", "PE9";
      				function = "h_i2s2";
      				drive-strength = <0x0000000a>;
      				phandle = <0x000000aa>;
      			};
      			daudio2_sleep@0 {
      				pins = "PE5", "PE6", "PE7", "PE8", "PE9";
      				function = "gpio_in";
      				phandle = <0x000000ab>;
      			};
      			daudio3@0 {
      				pins = "PH13", "PH14", "PH15", "PH16", "PH17", "PH18", "PH19";
      				function = "h_i2s3";
      				drive-strength = <0x0000000a>;
      				phandle = <0x000000ad>;
      			};
      			daudio3_sleep@0 {
      				pins = "PH13", "PH14", "PH15", "PH16", "PH17", "PH18", "PH19";
      				function = "gpio_in";
      				phandle = <0x000000ae>;
      			};
      			spdif@0 {
      				pins = "PH6", "PH7";
      				function = "spdif";
      				drive-strength = <0x0000000a>;
      				phandle = <0x0000009d>;
      			};
      			spdif_sleep@0 {
      				pins = "PH6", "PH7";
      				function = "gpio_in";
      				phandle = <0x0000009e>;
      			};
      			dmic@0 {
      				pins = "PH8", "PH9", "PH10", "PH11", "PH12";
      				function = "dmic";
      				drive-strength = <0x0000000a>;
      				phandle = <0x000000a0>;
      			};
      			dmic_sleep@0 {
      				pins = "PH8", "PH9", "PH10", "PH11", "PH12";
      				function = "gpio_in";
      				phandle = <0x000000a1>;
      			};
      			csi_mclk0@0 {
      				pins = "PE0";
      				function = "csi_mclk0";
      				drive-strength = <0x00000014>;
      				phandle = <0x0000007d>;
      			};
      			csi_mclk0@1 {
      				pins = "PE0";
      				function = "gpio_in";
      				phandle = <0x0000007e>;
      			};
      			csi_mclk1@0 {
      				pins = "PE5";
      				function = "csi_mclk1";
      				drive-strength = <0x00000014>;
      				phandle = <0x0000007f>;
      			};
      			csi_mclk1@1 {
      				pins = "PE5";
      				function = "gpio_in";
      				phandle = <0x00000080>;
      			};
      			scr0@0 {
      				pins = "PG13", "PG14", "PG10", "PG11", "PG12";
      				function = "sim0";
      				bias-pull-up;
      				phandle = <0x00000188>;
      			};
      			scr0@1 {
      				pins = "PG8", "PG9";
      				function = "sim0";
      				bias-pull-up;
      				phandle = <0x00000189>;
      			};
      			scr0@2 {
      				pins = "PG8", "PG9", "PG10", "PG11", "PG12", "PG13", "PG14";
      
      				function = "gpio_in";
      				phandle = <0x0000018a>;
      			};
      			scr1@0 {
      				pins = "PH5", "PH6", "PH2", "PH3", "PH4";
      				function = "sim1";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x0000018b>;
      			};
      			scr1@1 {
      				pins = "PH0", "PH1";
      				function = "sim1";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x0000018c>;
      			};
      			scr1@2 {
      				pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6";
      				function = "gpio_in";
      				phandle = <0x0000018d>;
      			};
      			nand0@0 {
      				pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
      				function = "nand0";
      				drive-strength = <0x0000001e>;
      				phandle = <0x0000004a>;
      			};
      			nand0@1 {
      				pins = "PC4", "PC6", "PC3", "PC7";
      				function = "nand0";
      				drive-strength = <0x0000001e>;
      				bias-pull-up;
      				phandle = <0x0000004b>;
      			};
      			nand0@2 {
      				pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
      				function = "gpio_in";
      				phandle = <0x0000004c>;
      			};
      			ac200@2 {
      				pins = "PB0";
      				function = "ac200";
      				drive-strength = <0x0000000a>;
      				phandle = <0x0000018e>;
      			};
      			ac200@3 {
      				pins = "PB0";
      				function = "gpio_in";
      				phandle = <0x0000018f>;
      			};
      			gmac@0 {
      				pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10", "PH13", "PH14", "PH15", "PH16", "PH17", "PH18";
      				function = "gmac0";
      				drive-strength = <0x0000001e>;
      				phandle = <0x00000190>;
      			};
      			gmac@1 {
      				pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10", "PH13", "PH14", "PH15", "PH16", "PH17", "PH18";
      				function = "gpio_in";
      				phandle = <0x00000191>;
      			};
      			gmac1@0 {
      				pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15";
      				function = "gmac1";
      				drive-strength = <0x0000001e>;
      				phandle = <0x00000192>;
      			};
      			gmac1@1 {
      				pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15";
      				function = "gpio_in";
      				phandle = <0x00000193>;
      			};
      			ledc@0 {
      				pins = "PE5";
      				function = "ledc";
      				drive-strength = <0x0000000a>;
      				bias-pull-up;
      				phandle = <0x0000008e>;
      			};
      			ledc@1 {
      				pins = "PE5";
      				function = "gpio_in";
      				phandle = <0x0000008f>;
      			};
      			lvds0@0 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7";
      				function = "lvds0";
      				drive-strength = <0x0000001e>;
      				phandle = <0x00000194>;
      			};
      			lvds0@1 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7";
      				function = "gpio_in";
      				phandle = <0x00000195>;
      			};
      			lvds1@0 {
      				pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
      				function = "lvds1";
      				drive-strength = <0x0000001e>;
      				phandle = <0x00000196>;
      			};
      			lvds1@1 {
      				pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
      				function = "gpio_in";
      				phandle = <0x00000197>;
      			};
      			lvds2@0 {
      				pins = "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
      				function = "lvds2";
      				drive-strength = <0x0000001e>;
      				phandle = <0x00000198>;
      			};
      			lvds2@1 {
      				pins = "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
      				function = "gpio_in";
      				phandle = <0x00000199>;
      			};
      			lvds3@0 {
      				pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19";
      				function = "lvds3";
      				drive-strength = <0x0000001e>;
      				phandle = <0x0000019a>;
      			};
      			lvds3@1 {
      				pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19";
      				function = "gpio_in";
      				phandle = <0x0000019b>;
      			};
      			lcd1_lvds2link@0 {
      				pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
      				function = "lvds3";
      				drive-strength = <0x0000001e>;
      				phandle = <0x0000019c>;
      			};
      			lcd1_lvds2link@1 {
      				pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
      				function = "gpio_in";
      				phandle = <0x0000019d>;
      			};
      			lvds2link@0 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
      				function = "lvds2link";
      				drive-strength = <0x0000001e>;
      				phandle = <0x0000019e>;
      			};
      			lvds2link@1 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
      				function = "gpio_in";
      				phandle = <0x0000019f>;
      			};
      			rgb24@0 {
      				pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", "PJ25", "PJ26", "PJ27";
      				function = "lcd1";
      				drive-strength = <0x0000001e>;
      				phandle = <0x000001a0>;
      			};
      			rgb24@1 {
      				pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", "PJ25", "PJ26", "PJ27";
      				function = "gpio_in";
      				phandle = <0x000001a1>;
      			};
      			rgb18@0 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21";
      				function = "lcd0";
      				drive-strength = <0x0000001e>;
      				phandle = <0x000001a2>;
      			};
      			rgb18@1 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21";
      				function = "gpio_in";
      				phandle = <0x000001a3>;
      			};
      			eink@0 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21", "PD22";
      				function = "eink";
      				drive-strength = <0x0000001e>;
      				phandle = <0x000001a4>;
      			};
      			eink@1 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21", "PD22";
      				function = "gpio_in";
      				phandle = <0x000001a5>;
      			};
      			dsi4lane@0 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
      				function = "dsi0";
      				drive-strength = <0x0000001e>;
      				phandle = <0x00000097>;
      			};
      			dsi4lane@1 {
      				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
      				function = "gpio_in";
      				phandle = <0x00000098>;
      			};
      			pwm0_pin_a {
      				allwinner,pins = "PD23";
      				allwinner,function = "pwm0";
      				allwinner,muxsel = <0x00000002>;
      				allwinner,drive = <0x00000001>;
      				allwinner,pull = <0x00000000>;
      				phandle = <0x00000079>;
      			};
      			pwm0_pin_b {
      				allwinner,pins = "PD23";
      				allwinner,function = "gpio_in";
      				allwinner,muxsel = <0x00000000>;
      				allwinner,drive = <0x00000002>;
      				allwinner,pull = <0x00000000>;
      				phandle = <0x0000007a>;
      			};
      			pwm1_pin_a {
      				allwinner,pins = "PD22";
      				allwinner,function = "pwm1";
      				allwinner,muxsel = <0x00000002>;
      				allwinner,drive = <0x00000002>;
      				allwinner,pull = <0x00000000>;
      				phandle = <0x0000007b>;
      			};
      			pwm1_pin_b {
      				allwinner,pins = "PD22";
      				allwinner,function = "gpio_in";
      				allwinner,muxsel = <0x00000000>;
      				allwinner,drive = <0x00000002>;
      				allwinner,pull = <0x00000000>;
      				phandle = <0x0000007c>;
      			};
      		};
      		gpu@1800000 {
      			device_type = "gpu";
      			compatible = "img,gpu";
      			reg = <0x00000000 0x01800000 0x00000000 0x00080000>;
      			interrupts = <0x00000000 0x00000061 0x00000004>;
      			interrupt-names = "IRQGPU";
      			clocks = <0x00000015 0x00000007 0x00000015 0x00000029 0x00000015 0x0000002a>;
      			clock-names = "clk_parent", "clk_mali", "clk_bus";
      			resets = <0x00000015 0x00000005>;
      			power-domains = <0x000000b2>;
      			gpu_idle = <0x00000000>;
      			dvfs_status = <0x00000001>;
      			pll_rate = <0x0006f540>;
      			independent_power = <0x00000000>;
      			markid-points = <0x00000400 0x000001c8 0x00001400 0x000001f8 0x00001000 0x000001f8 0x00002000 0x000001f8 0x00000000 0x000001f8>;
      			operating-points = <0x0006f540 0x000e7ef0 0x00061698 0x000e7ef0 0x00037aa0 0x000e7ef0>;
      			phandle = <0x000001a6>;
      		};
      		rfkill {
      			compatible = "allwinner,sunxi-rfkill";
      			status = "okay";
      			chip_en;
      			power_en;
      			pinctrl-0;
      			pinctrl-names;
      			phandle = <0x000001a7>;
      			wlan {
      				compatible = "allwinner,sunxi-wlan";
      				clocks = <0x00000029 0x00000000 0x00000029 0x00000003>;
      				clock-names = "dcxo24M-out", "osc32k-out";
      				wlan_power = "axp2202-bldo1";
      				wlan_power_vol = <0x00325aa0>;
      				wlan_busnum = <0x00000001>;
      				wlan_regon = <0x00000082 0x00000000 0x00000005 0x00000000>;
      				wlan_hostwake = <0x00000082 0x00000000 0x00000006 0x00000000>;
      				wakeup-source;
      			};
      			bt {
      				compatible = "allwinner,sunxi-bt";
      				clocks = <0x00000029 0x00000000 0x00000029 0x00000003>;
      				clock-names = "dcxo24M-out", "osc32k-out";
      				bt_power = "axp2202-bldo1";
      				bt_power_vol = <0x00325aa0>;
      				bt_rst_n = <0x00000082 0x00000000 0x00000002 0x00000001>;
      			};
      		};
      		addr_mgt {
      			compatible = "allwinner,sunxi-addr_mgt";
      			status = "okay";
      			type_addr_wifi = <0x00000000>;
      			type_addr_bt = <0x00000000>;
      			type_addr_eth = <0x00000000>;
      			phandle = <0x000001a8>;
      		};
      		btlpm {
      			compatible = "allwinner,sunxi-btlpm";
      			status = "okay";
      			uart_index = <0x00000001>;
      			bt_wake = <0x00000082 0x00000000 0x00000004 0x00000000>;
      			bt_hostwake = <0x00000082 0x00000000 0x00000003 0x00000000>;
      			wakeup-source;
      			phandle = <0x000001a9>;
      		};
      		platform@45000004 {
      			reg = <0x00000000 0x45000004 0x00000000 0x00000000>;
      			eraseflag = <0x00000001>;
      			next_work = <0x00000003>;
      			debug_mode = <0x00000008>;
      		};
      		target@45000008 {
      			reg = <0x00000000 0x45000008 0x00000000 0x00000000>;
      			boot_clock = <0x000003f0>;
      			storage_type = <0xffffffff>;
      			burn_key = <0x00000001>;
      			dragonboard_test = <0x00000000>;
      		};
      		power_sply@4500000c {
      			reg = <0x00000000 0x4500000c 0x00000000 0x00000000>;
      			dcdc1_vol = <0x000f45ec>;
      			aldo1_vol = <0x000f4948>;
      			aldo2_vol = <0x000f4948>;
      			aldo4_vol = <0x000f4948>;
      			aldo3_vol = <0x000f4f24>;
      			bldo1_vol = <0x00000ce4>;
      			bldo2_vol = <0x000f4948>;
      			bldo4_vol = <0x000f4948>;
      			cldo1_vol = <0x000f4948>;
      			cldo3_vol = <0x000f4f24>;
      			cldo4_vol = <0x000f4f24>;
      			cpusldo_vol = <0x000f6568>;
      		};
      		charger0@45000010 {
      			reg = <0x00000000 0x45000010 0x00000000 0x00000000>;
      			pmu_safe_vol = <0x00000d48>;
      		};
      		card0_boot_para@2 {
      			reg = <0x00000000 0x00000002 0x00000000 0x00000000>;
      			device_type = "card0_boot_para";
      			card_ctrl = <0x00000000>;
      			card_high_speed = <0x00000001>;
      			card_line = <0x00000004>;
      			pinctrl-0 = <0x00000040>;
      		};
      		card2_boot_para@3 {
      			reg = <0x00000000 0x00000003 0x00000000 0x00000000>;
      			device_type = "card2_boot_para";
      			card_ctrl = <0x00000002>;
      			card_high_speed = <0x00000001>;
      			card_line = <0x00000008>;
      			pinctrl-0 = <0x0000003c 0x0000003d>;
      			sdc_ex_dly_used = <0x00000002>;
      			sdc_io_1v8 = <0x00000001>;
      			sdc_tm4_win_th = <0x00000008>;
      			sdc_tm4_hs200_max_freq = <0x00000096>;
      			sdc_tm4_hs400_max_freq = <0x00000064>;
      			sdc_type = "tm4";
      		};
      		gpio_bias@4 {
      			reg = <0x00000000 0x00000004 0x00000000 0x00000000>;
      			device_type = "gpio_bias";
      			pc_bias = <0x00000708>;
      		};
      		auto_print@54321 {
      			reg = <0x00000000 0x00054321 0x00000000 0x00000000>;
      			device_type = "auto_print";
      			status = "okay";
      		};
      		standby_param@7000400 {
      			reg = <0x00000000 0x07000400 0x00000000 0x00000000>;
      			vdd-cpu = <0x00000001>;
      			vdd-sys = <0x00000002>;
      			vcc-pll = <0x00000080>;
      			osc24m-on = <0x00000000>;
      			phandle = <0x000001aa>;
      		};
      		hall_para {
      			hall_name = "MH248";
      			status = "okay";
      			hall_int_port = <0x00000082 0x00000000 0x00000009 0x00000006 0x00000001 0xffffffff 0xffffffff>;
      		};
      	};
      	usb1-vbus {
      		compatible = "regulator-fixed";
      		regulator-name = "usb1-vbus";
      		regulator-min-microvolt = <0x004c4b40>;
      		regulator-max-microvolt = <0x004c4b40>;
      		regulator-enable-ramp-delay = <0x000003e8>;
      		gpio = <0x00000082 0x00000000 0x00000008 0x00000000>;
      		enable-active-high;
      		phandle = <0x00000091>;
      	};
      	axp2202-parameter {
      		select = "battery-model";
      		phandle = <0x0000005f>;
      		battery-model {
      			parameter = * 0xbbe8ff7c [0x00000080];
      		};
      	};
      	__symbols__ {
      		clk_losc = "/clocks/losc";
      		clk_iosc = "/clocks/iosc";
      		clk_hosc = "/clocks/hosc";
      		clk_osc48m = "/clocks/osc48m";
      		clk_hoscdiv32k = "/clocks/hoscdiv32k";
      		clk_pll_periph0div25m = "/clocks/pll_periph0div25m";
      		clk_pll_cpu = "/clocks/pll_cpu";
      		clk_pll_ddr = "/clocks/pll_ddr";
      		clk_pll_periph0 = "/clocks/pll_periph0";
      		clk_pll_periph1 = "/clocks/pll_periph1";
      		clk_pll_gpu = "/clocks/pll_gpu";
      		clk_pll_video0x4 = "/clocks/pll_video0x4";
      		clk_pll_video1x4 = "/clocks/pll_video1x4";
      		clk_pll_video2 = "/clocks/pll_video2";
      		clk_pll_video3 = "/clocks/pll_video3";
      		clk_pll_ve = "/clocks/pll_ve";
      		clk_pll_com = "/clocks/pll_com";
      		clk_pll_audiox4 = "/clocks/pll_audiox4";
      		clk_pll_periph0x2 = "/clocks/pll_periph0x2";
      		clk_pll_periph0x4 = "/clocks/pll_periph0x4";
      		clk_periph32k = "/clocks/periph32k";
      		clk_pll_periph1x2 = "/clocks/pll_periph1x2";
      		clk_pll_comdiv5 = "/clocks/pll_comdiv5";
      		clk_pll_audiox8 = "/clocks/pll_audiox8";
      		clk_pll_audio = "/clocks/pll_audio";
      		clk_pll_audiox2 = "/clocks/pll_audiox2";
      		clk_pll_video0 = "/clocks/pll_video0";
      		clk_pll_video0x2 = "/clocks/pll_video0x2";
      		clk_pll_video1 = "/clocks/pll_video1";
      		clk_pll_video1x2 = "/clocks/pll_video1x2";
      		clk_pll_video2x2 = "/clocks/pll_video2x2";
      		clk_pll_video2x4 = "/clocks/pll_video2x4";
      		clk_pll_video3x2 = "/clocks/pll_video3x2";
      		clk_pll_video3x4 = "/clocks/pll_video3x4";
      		clk_hoscd2 = "/clocks/hoscd2";
      		clk_osc48md4 = "/clocks/osc48md4";
      		clk_pll_periph0d6 = "/clocks/pll_periph0d6";
      		clk_cpu = "/clocks/cpu";
      		clk_axi = "/clocks/axi";
      		clk_cpuapb = "/clocks/cpuapb";
      		clk_psi = "/clocks/psi";
      		clk_ahb1 = "/clocks/ahb1";
      		clk_ahb2 = "/clocks/ahb2";
      		clk_ahb3 = "/clocks/ahb3";
      		clk_apb1 = "/clocks/apb1";
      		clk_apb2 = "/clocks/apb2";
      		clk_de0 = "/clocks/de0";
      		clk_de1 = "/clocks/de1";
      		clk_g2d = "/clocks/g2d";
      		clk_ee = "/clocks/ee";
      		clk_panel = "/clocks/panel";
      		clk_gpu = "/clocks/gpu";
      		clk_ce = "/clocks/ce";
      		clk_ve = "/clocks/ve";
      		clk_dma = "/clocks/dma";
      		clk_msgbox = "/clocks/msgbox";
      		clk_hwspinlock_rst = "/clocks/hwspinlock_rst";
      		clk_hwspinlock_bus = "/clocks/hwspinlock_bus";
      		clk_hstimer = "/clocks/hstimer";
      		clk_avs = "/clocks/avs";
      		clk_dbgsys = "/clocks/dbgsys";
      
      		clk_pwm = "/clocks/pwm";
      		clk_iommu = "/clocks/iommu";
      		clk_nand0 = "/clocks/nand0";
      		clk_nand1 = "/clocks/nand1";
      		clk_sdmmc0_mod = "/clocks/sdmmc0_mod";
      		clk_sdmmc0_bus = "/clocks/sdmmc0_bus";
      		clk_sdmmc0_rst = "/clocks/sdmmc0_rst";
      		clk_sdmmc1_mod = "/clocks/sdmmc1_mod";
      		clk_sdmmc1_bus = "/clocks/sdmmc1_bus";
      		clk_sdmmc1_rst = "/clocks/sdmmc1_rst";
      		clk_sdmmc2_mod = "/clocks/sdmmc2_mod";
      		clk_sdmmc2_bus = "/clocks/sdmmc2_bus";
      		clk_sdmmc2_rst = "/clocks/sdmmc2_rst";
      		clk_uart0 = "/clocks/uart0";
      		clk_uart1 = "/clocks/uart1";
      		clk_uart2 = "/clocks/uart2";
      		clk_uart3 = "/clocks/uart3";
      		clk_uart4 = "/clocks/uart4";
      		clk_uart5 = "/clocks/uart5";
      		clk_uart6 = "/clocks/uart6";
      		clk_scr0 = "/clocks/scr0";
      		clk_gmac0_25m = "/clocks/gmac0_25m";
      		clk_gmac1_25m = "/clocks/gmac1_25m";
      		clk_gmac0 = "/clocks/gmac0";
      		clk_gmac1 = "/clocks/gmac1";
      		clk_gpadc = "/clocks/gpadc";
      		clk_irtx = "/clocks/irtx";
      		clk_ths = "/clocks/ths";
      		clk_i2s0 = "/clocks/i2s0";
      		clk_i2s1 = "/clocks/i2s1";
      		clk_i2s2 = "/clocks/i2s2";
      		clk_i2s3 = "/clocks/i2s3";
      		clk_spdif = "/clocks/spdif";
      		clk_dmic = "/clocks/dmic";
      		clk_codec_dac_1x = "/clocks/codec_dac_1x";
      		clk_codec_adc_1x = "/clocks/codec_adc_1x";
      		clk_codec_4x = "/clocks/codec_4x";
      		clk_usbphy0 = "/clocks/usbphy0";
      		clk_usbphy1 = "/clocks/usbphy1";
      		clk_usbohci0 = "/clocks/usbohci0";
      		clk_usbohci0_12m = "/clocks/usbohci0_12m";
      		clk_usbohci1 = "/clocks/usbohci1";
      		clk_usbohci1_12m = "/clocks/usbohci1_12m";
      		clk_usbehci0 = "/clocks/usbehci0";
      		clk_usbehci1 = "/clocks/usbehci1";
      		clk_usbotg = "/clocks/usbotg";
      		clk_display_top = "/clocks/display_top";
      		clk_dpss_top0 = "/clocks/dpss_top0";
      		clk_dpss_top1 = "/clocks/dpss_top1";
      		clk_tcon_lcd0 = "/clocks/tcon_lcd0";
      		clk_tcon_lcd1 = "/clocks/tcon_lcd1";
      		clk_lvds = "/clocks/lvds";
      		clk_lvds1 = "/clocks/lvds1";
      		clk_mipi_host = "/clocks/mipi_host";
      		clk_csi_top = "/clocks/csi_top";
      		clk_csi_isp = "/clocks/csi_isp";
      		clk_csi_master0 = "/clocks/csi_master0";
      		clk_csi_master1 = "/clocks/csi_master1";
      		clk_pio = "/clocks/pio";
      		clk_ledc = "/clocks/ledc";
      		clk_cpurcir = "/clocks/cpurcir";
      		clk_losc_out = "/clocks/losc_out";
      		clk_cpurcpus_pll = "/clocks/cpurcpus_pll";
      		clk_cpurcpus = "/clocks/cpurcpus";
      		clk_cpurahbs = "/clocks/cpurahbs";
      		clk_cpurapbs1 = "/clocks/cpurapbs1";
      		clk_cpurapbs2_pll = "/clocks/cpurapbs2_pll";
      		clk_cpurapbs2 = "/clocks/cpurapbs2";
      		clk_ppu = "/clocks/ppu";
      		clk_cpurpio = "/clocks/cpurpio";
      		clk_dcxo_out = "/clocks/dcxo_out";
      		clk_suart = "/clocks/suart";
      		clk_lradc = "/clocks/lradc";
      		cpu0 = "/cpus/cpu@0";
      		cpu1 = "/cpus/cpu@1";
      		cpu2 = "/cpus/cpu@2";
      		cpu3 = "/cpus/cpu@3";
      		CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0";
      		CLUSTER_SLEEP_0 = "/cpus/idle-states/cluster-sleep-0";
      		cpu_opp_table = "/cpu-opp-table";
      		dcxo24M = "/dcxo24M-clk";
      		cpu_trips = "/thermal-zones/cpu_thermal_zone/trips";
      		cpu_threshold = "/thermal-zones/cpu_thermal_zone/trips/trip-point@0";
      		cpu_target = "/thermal-zones/cpu_thermal_zone/trips/trip-point@1";
      		cpu_crit = "/thermal-zones/cpu_thermal_zone/trips/cpu_crit@0";
      		gic = "/interrupt-controller@3020000";
      		wakeupgen = "/interrupt-controller@0";
      		pd_gpu = "/gpu-power-domain@7001000";
      		nmi_intc = "/intc-nmi@7010320";
      		dram = "/dram";
      		ddr_clk = "/clk_ddr";
      		dfi = "/nsi-pmu@3100000";
      		dram_opp_table = "/opp_table";
      		uboot = "/uboot";
      		mmu_aw = "/iommu@30f0000";
      		dump_reg = "/dump_reg@20000";
      		reg_pio1_8 = "/pio-18";
      		reg_pio2_8 = "/pio-28";
      		reg_pio3_3 = "/pio-33";
      		soc = "/soc@2900000";
      		sram_ctrl = "/soc@2900000/sram_ctrl@3000000";
      		ccu = "/soc@2900000/clock@3001000";
      		r_ccu = "/soc@2900000/clock@7010000";
      		dma = "/soc@2900000/dma-controller@3002000";
      		rtc = "/soc@2900000/rtc@7000000";
      		rtc_ccu = "/soc@2900000/rtc_ccu@7000000";
      		nsi0 = "/soc@2900000/nsi-controller@3100000";
      		speedbin_efuse = "/soc@2900000/sid@3006000/speed@00";
      		ths_calib = "/soc@2900000/sid@3006000/calib@14";
      		cpubin_efuse = "/soc@2900000/sid@3006000/calib@1c";
      		cpubin_extend = "/soc@2900000/sid@3006000/calib@28";
      		cryptoengine = "/soc@2900000/ce@1904000";
      		ths = "/soc@2900000/ths@5070400";
      		soc_timer0 = "/soc@2900000/timer@3009000";
      		uart0 = "/soc@2900000/uart@5000000";
      		uart1 = "/soc@2900000/uart@5000400";
      		uart2 = "/soc@2900000/uart@5000800";
      		uart3 = "/soc@2900000/uart@5000c00";
      		uart4 = "/soc@2900000/uart@5001000";
      		uart5 = "/soc@2900000/uart@5001400";
      		uart6 = "/soc@2900000/uart@5001800";
      		uart7 = "/soc@2900000/uart@7080000";
      		sdc2 = "/soc@2900000/sdmmc@4022000";
      		sdc0 = "/soc@2900000/sdmmc@4020000";
      		sdc1 = "/soc@2900000/sdmmc@4021000";
      		sdc3 = "/soc@2900000/sdmmc@4023000";
      		nand0 = "/soc@2900000/nand0@04011000";
      		twi0 = "/soc@2900000/twi@5002000";
      		ctp = "/soc@2900000/twi@5002000/ctp@0";
      		twi1 = "/soc@2900000/twi@5002400";
      		twi2 = "/soc@2900000/twi@5002800";
      		twi3 = "/soc@2900000/twi@5002c00";
      		twi4 = "/soc@2900000/twi@5003000";
      		twi5 = "/soc@2900000/twi@5003400";
      		twi6 = "/soc@2900000/s_twi@7081400";
      		pmu0 = "/soc@2900000/s_twi@7081400/pmu@34";
      		usb_power_supply = "/soc@2900000/s_twi@7081400/pmu@34/usb_power_supply";
      		gpio_power_supply = "/soc@2900000/s_twi@7081400/pmu@34/gpio_power_supply";
      		bat_power_supply = "/soc@2900000/s_twi@7081400/pmu@34/bat-power-supply";
      		powerkey0 = "/soc@2900000/s_twi@7081400/pmu@34/powerkey@0";
      		regulator0 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0";
      		reg_dcdc1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc1";
      		reg_dcdc2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc2";
      		reg_dcdc3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc3";
      		reg_dcdc4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc4";
      		reg_rtcldo = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/rtcldo";
      		reg_aldo1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo1";
      		reg_aldo2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo2";
      		reg_aldo3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo3";
      		reg_aldo4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo4";
      		reg_bldo1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo1";
      		reg_bldo2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo2";
      		reg_bldo3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo3";
      		reg_bldo4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo4";
      		reg_cldo1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo1";
      		reg_cldo2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo2";
      		reg_cldo3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo3";
      		reg_cldo4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo4";
      		reg_cpusldo = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cpusldo";
      		reg_drivevbus = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/drivevbus";
      		axp_gpio0 = "/soc@2900000/s_twi@7081400/pmu@34/axp_gpio@0";
      		twi7 = "/soc@2900000/s_twi@7081800";
      		pwm = "/soc@2900000/pwm@300a000";
      		pwm0 = "/soc@2900000/pwm0@300a010";
      		pwm1 = "/soc@2900000/pwm1@300a011";
      		pwm2 = "/soc@2900000/pwm2@300a012";
      		pwm3 = "/soc@2900000/pwm3@300a013";
      		pwm4 = "/soc@2900000/pwm4@300a014";
      		pwm5 = "/soc@2900000/pwm5@300a015";
      		pwm6 = "/soc@2900000/pwm6@300a016";
      		pwm7 = "/soc@2900000/pwm7@300a017";
      		pwm8 = "/soc@2900000/pwm8@300a018";
      		pwm9 = "/soc@2900000/pwm9@300a019";
      		vind0 = "/soc@2900000/vind@2000800";
      		csi0 = "/soc@2900000/vind@2000800/csi@2001000";
      		csi1 = "/soc@2900000/vind@2000800/csi@2002000";
      		mipi0 = "/soc@2900000/vind@2000800/mipi@200a100";
      		mipi1 = "/soc@2900000/vind@2000800/mipi@200a200";
      		tdm0 = "/soc@2900000/vind@2000800/tdm@2108000";
      		isp0 = "/soc@2900000/vind@2000800/isp@2100000";
      		isp1 = "/soc@2900000/vind@2000800/isp@2102000";
      		scaler0 = "/soc@2900000/vind@2000800/scaler@2110000";
      		scaler1 = "/soc@2900000/vind@2000800/scaler@2110400";
      		scaler2 = "/soc@2900000/vind@2000800/scaler@2110800";
      		scaler3 = "/soc@2900000/vind@2000800/scaler@2110c00";
      		actuator0 = "/soc@2900000/vind@2000800/actuator@2108180";
      		flash0 = "/soc@2900000/vind@2000800/flash@2108190";
      		sensor0 = "/soc@2900000/vind@2000800/sensor@200b800";
      		sensor1 = "/soc@2900000/vind@2000800/sensor@200b810";
      		vinc0 = "/soc@2900000/vind@2000800/vinc@2009000";
      		vinc1 = "/soc@2900000/vind@2000800/vinc@2009200";
      		vinc2 = "/soc@2900000/vind@2000800/vinc@2009400";
      		vinc3 = "/soc@2900000/vind@2000800/vinc@2009600";
      		keyboard = "/soc@2900000/keyboard@5070800";
      		spi0 = "/soc@2900000/spi@5010000";
      		spi1 = "/soc@2900000/spi@5011000";
      		spi2 = "/soc@2900000/spi@5012000";
      		ledc = "/soc@2900000/ledc@0x5018000";
      		usbc0 = "/soc@2900000/usbc0@10";
      		udc = "/soc@2900000/udc-controller@5100000";
      		ehci0 = "/soc@2900000/ehci0-controller@5101000";
      		ohci0 = "/soc@2900000/ohci0-controller@5101400";
      		usbc1 = "/soc@2900000/usbc1@11";
      		ehci1 = "/soc@2900000/ehci1-controller@5200000";
      		ohci1 = "/soc@2900000/ohci1-controller@5200400";
      		disp1 = "/soc@2900000/disp1@1";
      		disp = "/soc@2900000/disp@6000000";
      		uboot_disp = "/soc@2900000/uboot_disp@06100000";
      		lcd0_1 = "/soc@2900000/lcd0_1@1c0c000";
      		lcd0_2 = "/soc@2900000/lcd0_2@1c0c000";
      		lcd0_3 = "/soc@2900000/lcd0_3@1c0c000";
      		lcd0 = "/soc@2900000/lcd0@1c0c000";
      		lcd1 = "/soc@2900000/lcd1@1";
      		eink = "/soc@2900000/eink@6400000";
      		uboot_eink = "/soc@2900000/uboot_eink@6400000";
      		ve = "/soc@2900000/ve@1c0e000";
      		g2d = "/soc@2900000/g2d@6480000";
      		pinctrl_test = "/soc@2900000/pinctrl_test@0";
      		codec = "/soc@2900000/codec@5096000";
      		dummy_cpudai = "/soc@2900000/dummy_cpudai@509632c";
      		sndcodec = "/soc@2900000/sound@5096330";
      		spdif = "/soc@2900000/spdif@5094000";
      		soundspdif = "/soc@2900000/soundspdif@5094040";
      		dmic = "/soc@2900000/dmic@5095000";
      		dmic_codec = "/soc@2900000/sound@5095050";
      		sounddmic = "/soc@2900000/sounddmic@5095060";
      		daudio0 = "/soc@2900000/daudio@5090000";
      		sounddaudio0 = "/soc@2900000/sounddaudio0@509007c";
      		daudio0_master = "/soc@2900000/sounddaudio0@509007c/simple-audio-card,codec";
      		daudio1 = "/soc@2900000/daudio@5091000";
      		sounddaudio1 = "/soc@2900000/sounddaudio1@509107c";
      		daudio1_master = "/soc@2900000/sounddaudio1@509107c/simple-audio-card,codec";
      		daudio2 = "/soc@2900000/daudio@5092000";
      		sounddaudio2 = "/soc@2900000/sounddaudio2@509207c";
      		daudio2_master = "/soc@2900000/sounddaudio2@509207c/simple-audio-card,codec";
      		daudio3 = "/soc@2900000/daudio@5093000";
      		sounddaudio3 = "/soc@2900000/sounddaudio3@509307c";
      		daudio3_master = "/soc@2900000/sounddaudio3@509307c/simple-audio-card,codec";
      		r_pio = "/soc@2900000/pinctrl@7022000";
      		s_rsb0_pins_a = "/soc@2900000/pinctrl@7022000/s_rsb0@0";
      		s_uart0_pins_a = "/soc@2900000/pinctrl@7022000/s_uart0@0";
      		s_uart0_pins_b = "/soc@2900000/pinctrl@7022000/s_uart0@1";
      		s_twi0_pins_a = "/soc@2900000/pinctrl@7022000/s_twi0@0";
      		s_twi0_pins_b = "/soc@2900000/pinctrl@7022000/s_twi0@1";
      		s_twi1_pins_a = "/soc@2900000/pinctrl@7022000/s_twi1@0";
      		s_twi1_pins_b = "/soc@2900000/pinctrl@7022000/s_twi1@1";
      		s_cir0_pins_a = "/soc@2900000/pinctrl@7022000/s_cir0@0";
      		pio = "/soc@2900000/pinctrl@300b000";
      		test_pins_a = "/soc@2900000/pinctrl@300b000/test_pins@0";
      		test_pins_b = "/soc@2900000/pinctrl@300b000/test_pins@1";
      		uart0_pins_a = "/soc@2900000/pinctrl@300b000/uart0@0";
      		uart0_pins_b = "/soc@2900000/pinctrl@300b000/uart0@1";
      		uart1_pins_a = "/soc@2900000/pinctrl@300b000/uart1@0";
      		uart1_pins_b = "/soc@2900000/pinctrl@300b000/uart1@1";
      		uart2_pins_a = "/soc@2900000/pinctrl@300b000/uart2@0";
      		uart2_pins_b = "/soc@2900000/pinctrl@300b000/uart2@1";
      		uart3_pins_a = "/soc@2900000/pinctrl@300b000/uart3@0";
      		uart3_pins_b = "/soc@2900000/pinctrl@300b000/uart3@1";
      		uart4_pins_a = "/soc@2900000/pinctrl@300b000/uart4@0";
      		uart4_pins_b = "/soc@2900000/pinctrl@300b000/uart4@1";
      		uart5_pins_a = "/soc@2900000/pinctrl@300b000/uart5@0";
      		uart5_pins_b = "/soc@2900000/pinctrl@300b000/uart5@1";
      		uart6_pins_a = "/soc@2900000/pinctrl@300b000/uart6@0";
      		uart6_pins_b = "/soc@2900000/pinctrl@300b000/uart6@1";
      		ir0_pins_a = "/soc@2900000/pinctrl@300b000/ir0@0";
      		ir0_pins_b = "/soc@2900000/pinctrl@300b000/ir0@1";
      		twi0_pins_a = "/soc@2900000/pinctrl@300b000/twi0@0";
      		twi0_pins_b = "/soc@2900000/pinctrl@300b000/twi0@1";
      		twi1_pins_a = "/soc@2900000/pinctrl@300b000/twi1@0";
      		twi1_pins_b = "/soc@2900000/pinctrl@300b000/twi1@1";
      		twi2_pins_a = "/soc@2900000/pinctrl@300b000/twi2@0";
      		twi2_pins_b = "/soc@2900000/pinctrl@300b000/twi2@1";
      		twi3_pins_a = "/soc@2900000/pinctrl@300b000/twi3@0";
      		twi3_pins_b = "/soc@2900000/pinctrl@300b000/twi3@1";
      		twi4_pins_a = "/soc@2900000/pinctrl@300b000/twi4@0";
      		twi4_pins_b = "/soc@2900000/pinctrl@300b000/twi4@1";
      		twi5_pins_a = "/soc@2900000/pinctrl@300b000/twi5@0";
      		twi5_pins_b = "/soc@2900000/pinctrl@300b000/twi5@1";
      		ts0_pins_a = "/soc@2900000/pinctrl@300b000/ts0@0";
      		ts0_pins_b = "/soc@2900000/pinctrl@300b000/ts0_sleep@0";
      		spi0_pins_a = "/soc@2900000/pinctrl@300b000/spi0@0";
      		spi0_pins_b = "/soc@2900000/pinctrl@300b000/spi0@1";
      		spi0_pins_c = "/soc@2900000/pinctrl@300b000/spi0@2";
      		spi1_pins_a = "/soc@2900000/pinctrl@300b000/spi1@0";
      		spi1_pins_b = "/soc@2900000/pinctrl@300b000/spi1@1";
      		spi1_pins_c = "/soc@2900000/pinctrl@300b000/spi1@2";
      		spi2_pins_a = "/soc@2900000/pinctrl@300b000/spi2@0";
      		spi2_pins_b = "/soc@2900000/pinctrl@300b000/spi2@1";
      		spi2_pins_c = "/soc@2900000/pinctrl@300b000/spi2@2";
      		card0_pins_a = "/soc@2900000/pinctrl@300b000/sdc0@0";
      		sdc0_pins_a = "/soc@2900000/pinctrl@300b000/sdc0@0";
      		sdc0_pins_b = "/soc@2900000/pinctrl@300b000/sdc0@1";
      		sdc0_pins_c = "/soc@2900000/pinctrl@300b000/sdc0@2";
      		sdc0_pins_d = "/soc@2900000/pinctrl@300b000/sdc0@3";
      		sdc0_pins_e = "/soc@2900000/pinctrl@300b000/sdc0@4";
      		sdc1_pins_a = "/soc@2900000/pinctrl@300b000/sdc1@0";
      		sdc1_pins_b = "/soc@2900000/pinctrl@300b000/sdc1@1";
      		card2_pins_a = "/soc@2900000/pinctrl@300b000/sdc2@0";
      		sdc2_pins_a = "/soc@2900000/pinctrl@300b000/sdc2@0";
      		sdc2_pins_b = "/soc@2900000/pinctrl@300b000/sdc2@1";
      		card2_pins_c = "/soc@2900000/pinctrl@300b000/sdc2@2";
      		sdc2_pins_c = "/soc@2900000/pinctrl@300b000/sdc2@2";
      		sdc3_pins_a = "/soc@2900000/pinctrl@300b000/sdc3@0";
      		sdc3_pins_b = "/soc@2900000/pinctrl@300b000/sdc3@1";
      		daudio0_pins_a = "/soc@2900000/pinctrl@300b000/daudio0@0";
      		daudio0_pins_b = "/soc@2900000/pinctrl@300b000/daudio0_sleep@0";
      		daudio1_pins_a = "/soc@2900000/pinctrl@300b000/daudio1@0";
      		daudio1_pins_b = "/soc@2900000/pinctrl@300b000/daudio1_sleep@0";
      		daudio2_pins_a = "/soc@2900000/pinctrl@300b000/daudio2@0";
      		daudio2_pins_b = "/soc@2900000/pinctrl@300b000/daudio2_sleep@0";
      		daudio3_pins_a = "/soc@2900000/pinctrl@300b000/daudio3@0";
      		daudio3_pins_b = "/soc@2900000/pinctrl@300b000/daudio3_sleep@0";
      		spdif_pins_a = "/soc@2900000/pinctrl@300b000/spdif@0";
      		spdif_pins_b = "/soc@2900000/pinctrl@300b000/spdif_sleep@0";
      		dmic_pins_a = "/soc@2900000/pinctrl@300b000/dmic@0";
      		dmic_pins_b = "/soc@2900000/pinctrl@300b000/dmic_sleep@0";
      		csi_mclk0_pins_a = "/soc@2900000/pinctrl@300b000/csi_mclk0@0";
      		csi_mclk0_pins_b = "/soc@2900000/pinctrl@300b000/csi_mclk0@1";
      		csi_mclk1_pins_a = "/soc@2900000/pinctrl@300b000/csi_mclk1@0";
      		csi_mclk1_pins_b = "/soc@2900000/pinctrl@300b000/csi_mclk1@1";
      		scr0_pins_a = "/soc@2900000/pinctrl@300b000/scr0@0";
      		scr0_pins_b = "/soc@2900000/pinctrl@300b000/scr0@1";
      		scr0_pins_c = "/soc@2900000/pinctrl@300b000/scr0@2";
      		scr1_pins_a = "/soc@2900000/pinctrl@300b000/scr1@0";
      		scr1_pins_b = "/soc@2900000/pinctrl@300b000/scr1@1";
      		scr1_pins_c = "/soc@2900000/pinctrl@300b000/scr1@2";
      		nand0_pins_a = "/soc@2900000/pinctrl@300b000/nand0@0";
      		nand0_pins_b = "/soc@2900000/pinctrl@300b000/nand0@1";
      		nand0_pins_c = "/soc@2900000/pinctrl@300b000/nand0@2";
      		ccir_clk_pin_a = "/soc@2900000/pinctrl@300b000/ac200@2";
      		ccir_clk_pin_b = "/soc@2900000/pinctrl@300b000/ac200@3";
      		gmac_pins_a = "/soc@2900000/pinctrl@300b000/gmac@0";
      		gmac_pins_b = "/soc@2900000/pinctrl@300b000/gmac@1";
      		gmac1_pins_a = "/soc@2900000/pinctrl@300b000/gmac1@0";
      		gmac1_pins_b = "/soc@2900000/pinctrl@300b000/gmac1@1";
      		ledc_pins_a = "/soc@2900000/pinctrl@300b000/ledc@0";
      		ledc_pins_b = "/soc@2900000/pinctrl@300b000/ledc@1";
      		lvds0_pins_a = "/soc@2900000/pinctrl@300b000/lvds0@0";
      		lvds0_pins_b = "/soc@2900000/pinctrl@300b000/lvds0@1";
      		lvds1_pins_a = "/soc@2900000/pinctrl@300b000/lvds1@0";
      		lvds1_pins_b = "/soc@2900000/pinctrl@300b000/lvds1@1";
      		lvds2_pins_a = "/soc@2900000/pinctrl@300b000/lvds2@0";
      		lvds2_pins_b = "/soc@2900000/pinctrl@300b000/lvds2@1";
      		lvds3_pins_a = "/soc@2900000/pinctrl@300b000/lvds3@0";
      		lvds3_pins_b = "/soc@2900000/pinctrl@300b000/lvds3@1";
      		lcd1_lvds2link_pins_a = "/soc@2900000/pinctrl@300b000/lcd1_lvds2link@0";
      		lcd1_lvds2link_pins_b = "/soc@2900000/pinctrl@300b000/lcd1_lvds2link@1";
      		lvds2link_pins_a = "/soc@2900000/pinctrl@300b000/lvds2link@0";
      		lvds2link_pins_b = "/soc@2900000/pinctrl@300b000/lvds2link@1";
      		rgb24_pins_a = "/soc@2900000/pinctrl@300b000/rgb24@0";
      		rgb24_pins_b = "/soc@2900000/pinctrl@300b000/rgb24@1";
      		rgb18_pins_a = "/soc@2900000/pinctrl@300b000/rgb18@0";
      		rgb18_pins_b = "/soc@2900000/pinctrl@300b000/rgb18@1";
      		eink_pins_a = "/soc@2900000/pinctrl@300b000/eink@0";
      		eink_pins_b = "/soc@2900000/pinctrl@300b000/eink@1";
      		dsi4lane_pins_a = "/soc@2900000/pinctrl@300b000/dsi4lane@0";
      		dsi4lane_pins_b = "/soc@2900000/pinctrl@300b000/dsi4lane@1";
      		pwm0_pin_a = "/soc@2900000/pinctrl@300b000/pwm0_pin_a";
      		pwm0_pin_b = "/soc@2900000/pinctrl@300b000/pwm0_pin_b";
      		pwm1_pin_a = "/soc@2900000/pinctrl@300b000/pwm1_pin_a";
      		pwm1_pin_b = "/soc@2900000/pinctrl@300b000/pwm1_pin_b";
      		gpu = "/soc@2900000/gpu@1800000";
      		rfkill = "/soc@2900000/rfkill";
      		addr_mgt = "/soc@2900000/addr_mgt";
      		btlpm = "/soc@2900000/btlpm";
      		standby_param = "/soc@2900000/standby_param@7000400";
      		reg_usb1_vbus = "/usb1-vbus";
      		axp2202_parameter = "/axp2202-parameter";
      	};
      };
      
      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: D1s 使用 XR829 BT 配置 a2dp-source 出错

      1576ca1a-fcf5-4766-8035-ee3ec002e817-`{C_MP{XP6KS0M832712_{2.png

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 使用camerademo模块,编译缺少AWIspApi.h头文件

      @likehengall 勾选eyesee-mpp组件

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • YuzukiCK1N - 基于全志V3x的触屏小电脑【开源硬件】

      c3382b10-7c07-4ecd-ace0-3f02ccded19c-image.png

      YuzukiCK1N小电脑

      • 支持USB
      • 3.5音频输出
      • 板载百兆网络
      • eMMC储存
      • Wi-Fi
      • 128M内存,ARM A7
      • 4寸方屏,支持480480或720720分辨率
      • 电容触摸

      软件

      软件使用 Linux 5.4.180、U-Boot 2022.01
      SDK:https://github.com/YuzukiHD/Buildroot-YuzukiSBC
      SDK开发说明:https://yuzukihd.gloomyghost.com/Buildroot-YuzukiSBC/#/
      固件下载:https://github.com/YuzukiHD/Buildroot-YuzukiSBC/releases/

      硬件

      开源地址:https://oshwhub.com/GloomyGhost/yuzukick1n

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 芒果派 MQ Pro,MQ 的板级配置文件

      @feng_snail_aw 修好了(((

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: v851s tf卡启动失败

      @daizebin 是

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 请教下T113的Uboot是如何把fdt地址传给内核的?

      请参阅:

      tina-d1-h/lichee/brandy-2.0/u-boot-2018/board/sunxi/sunxi_replace_fdt.c
      
      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 芒果派 MQ Pro,MQ 的板级配置文件

      MQ D1s 增加RTL8189FTV WiFi驱动,Github已经更新

      b61a427a-825d-43fe-842b-d43162002da0-asdasd.png

      2b36e6bf-e74b-4d94-90d5-268f34061cfa-asdasdsa.jpg

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: Yuzukilizard V851s 相关资料,测试固件,调试日志

      人脸+串流

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: T113奇怪的屏幕刷新问题

      @efancier buildroot更新了,修复了i2c,de,uart等一堆问题,source envsetup.sh 更新然后重新make xxxx_defconfig就行了

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 求教D1+Tina能否直接将终端输出到屏幕进行操作呢?

      可以,详见:D1咋把控制台弄到hdmi上呢?
      https://bbs.aw-ol.com/topic/1320/share/4

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: Yuzukilizard V851s 相关资料,测试固件,调试日志

      渲染图

      d46fc29f-0d78-4efd-bcc4-cc455a7fc3c5-V851.4.jpg

      59dba370-85fb-4a06-8f3e-cc1814d86277-V851.2.jpg

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: V833 H264 CODEC

      @nimadibaj 以数据手册为准

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 【全国产配置】国产主控芯片D1-H+紫光国芯-UniIC内存跑起来了

      @molin2050 需要改内存物料,软件不用改

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: VIViewer 适用于V853模型的模型查看器

      模型显示:

      54ca60e1-1dbd-45e7-bbee-a33fa2a76907-d30a9b359c20c9fc6d5e46f2f8d7af9.png

      内存评估:
      1364b2a5-ab5b-441f-9b7d-0aff975eb04f-1b43e38b3ecff4ca4cc412badcbdecd.png

      输入数据:
      391a5a16-9d36-4179-a302-1ee048718cae-586cd920eb8feebea82f54a99f13f13.png

      输出数据:
      7072f29a-8edd-4bd7-96e9-b2c862533137-0d0644bb8313e243b0d3a9ed4053f4b.png

      操作:
      8c72152a-bc6f-4ad1-b1e3-0c058e953262-768c43f0af202fc7ffef3c2978538b8.png

      层:
      44612c2b-321b-48e9-94f0-4c78c20be41b-45bba74aeaa7e06df243fe3bd99be64.png

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【FAQ】全志V853芯片 适配双目GC2053的操作步骤

      @nimadibaj 【资料】V853&V851 软件开发指南
      https://bbs.aw-ol.com/topic/2266/share/1

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 芒果派mq-pro快速上手指北

      @akinya 用OpenixCard刷就好了

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: V851S上的ISP真的坏了吗?

      AWOL的开源版本Tina 5.0并不支持TigerISP,需要NDA版本,可以联系购买板子的客服获得相关支持

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 和萌新一起制作基于T113-S3的 Snail Pi(蜗牛PI)

      @ftwtwzy 6是MUX的Function6

      139cd4b9-8921-49ee-a9c1-7b0d9ecf674c-image.png

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源硬件、软件】基于 D1-H 的 YuzukiRuler Pro 小尺子第二弹
      • 移植了一个小屏幕
      • 又在屏幕上适配了LVGL
      • 又又把NES移植到了LVGL上
      • 又又又在NES上移植了超级玛丽
      • 又又又又又修改了屏幕模拟按键
        可以快乐地玩游戏啦
        fa478e70-0bbb-47b9-850d-3304c7e9330b-771C24FE75B3C393F7290ED173626211.png

      7da32eb0-eaf9-4882-be92-926b9fd7280c-2762B07481E7185BF45734CF8F55DCEF.png

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: V853 Syterkit DDR3 问题

      SyterKit目前暂不支持V853度的AC Remap,后续更新支持

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 深入开箱跑分全志A523平板电脑 台电P26T

      原神:全低画质 15~40 帧

      d96e0fc2-cb41-452b-813b-96057d0a07f6-Screenshot_20230712-132455.png

      1c43a525-345a-402b-b971-6bdb67e8ef82-Screenshot_20230712-132515.png

      Applications Graphics Acceleration Info:
      Uptime: 13155175 Realtime: 13155175
      
      ** Graphics info for pid 18983 [com.miHoYo.Yuanshen] **
      
      Stats since: 6718860763285ns
      Total frames rendered: 104
      Janky frames: 28 (26.92%)
      Janky frames (legacy): 23 (22.12%)
      50th percentile: 9ms
      90th percentile: 25ms
      95th percentile: 44ms
      99th percentile: 150ms
      Number Missed Vsync: 4
      Number High input latency: 22
      Number Slow UI thread: 5
      Number Slow bitmap uploads: 0
      Number Slow issue draw commands: 25
      Number Frame deadline missed: 28
      Number Frame deadline missed (legacy): 8
      HISTOGRAM: 5ms=11 6ms=15 7ms=19 8ms=6 9ms=6 10ms=4 11ms=10 12ms=2 13ms=1 14ms=1 15ms=0 16ms=1 17ms=1 18ms=0 19ms=0 20ms=0 21ms=1 22ms=4 23ms=6 24ms=5 25ms=2 26ms=1 27ms=2 28ms=0 29ms=0 30ms=0 31ms=0 32ms=0 34ms=0 36ms=0 38ms=0 40ms=0 42ms=0 44ms=1 46ms=0 48ms=1 53ms=1 57ms=0 61ms=0 65ms=1 69ms=0 73ms=0 77ms=0 81ms=0 85ms=0 89ms=0 93ms=0 97ms=0 101ms=0 105ms=0 109ms=0 113ms=0 117ms=0 121ms=0 125ms=0 129ms=0 133ms=0 150ms=2 200ms=0 250ms=0 300ms=0 350ms=0 400ms=0 450ms=0 500ms=0 550ms=0 600ms=0 650ms=0 700ms=0 750ms=0 800ms=0 850ms=0 900ms=0 950ms=0 1000ms=0 1050ms=0 1100ms=0 1150ms=0 1200ms=0 1250ms=0 1300ms=0 1350ms=0 1400ms=0 1450ms=0 1500ms=0 1550ms=0 1600ms=0 1650ms=0 1700ms=0 1750ms=0 1800ms=0 1850ms=0 1900ms=0 1950ms=0 2000ms=0 2050ms=0 2100ms=0 2150ms=0 2200ms=0 2250ms=0 2300ms=0 2350ms=0 2400ms=0 2450ms=0 2500ms=0 2550ms=0 2600ms=0 2650ms=0 2700ms=0 2750ms=0 2800ms=0 2850ms=0 2900ms=0 2950ms=0 3000ms=0 3050ms=0 3100ms=0 3150ms=0 3200ms=0 3250ms=0 3300ms=0 3350ms=0 3400ms=0 3450ms=0 3500ms=0 3550ms=0 3600ms=0 3650ms=0 3700ms=0 3750ms=0 3800ms=0 3850ms=0 3900ms=0 3950ms=0 4000ms=0 4050ms=0 4100ms=0 4150ms=0 4200ms=0 4250ms=0 4300ms=0 4350ms=0 4400ms=0 4450ms=0 4500ms=0 4550ms=0 4600ms=0 4650ms=0 4700ms=0 4750ms=0 4800ms=0 4850ms=0 4900ms=0 4950ms=0
      50th gpu percentile: 3ms
      90th gpu percentile: 8ms
      95th gpu percentile: 9ms
      99th gpu percentile: 10ms
      GPU HISTOGRAM: 1ms=4 2ms=35 3ms=31 4ms=7 5ms=4 6ms=2 7ms=6 8ms=6 9ms=5 10ms=3 11ms=1 12ms=0 13ms=0 14ms=0 15ms=0 16ms=0 17ms=0 18ms=0 19ms=0 20ms=0 21ms=0 22ms=0 23ms=0 24ms=0 25ms=0 4950ms=0
      
      Pipeline=Skia (OpenGL)
      CPU Caches:
        Glyph Cache: 69.44 KB (1 entry)
        Glyph Count: 26
      Total CPU memory usage:
        71103 bytes, 69.44 KB (0.00 bytes is purgeable)
      GPU Caches:
        Other:
          Other: 0.00 bytes (1 entry)
        Image:
          Texture: 127.59 KB (10 entries)
        Scratch:
          Buffer Object: 78.00 KB (2 entries)
          Texture: 2.00 MB (1 entry)
      Total GPU memory usage:
        2307680 bytes, 2.20 MB (127.59 KB is purgeable)
      
      Profile data in ms:
      
              com.miHoYo.Yuanshen/com.miHoYo.GetMobileInfo.MainActivity/android.view.ViewRootImpl@a46020a (visibility=0)
      View hierarchy:
      
        com.miHoYo.Yuanshen/com.miHoYo.GetMobileInfo.MainActivity/android.view.ViewRootImpl@a46020a
        7 views, 8.70 kB of render nodes
      
      
      Total ViewRootImpl   : 1
      Total attached Views : 7
      Total RenderNode     : 8.70 kB (used) / 8.70 kB (capacity)
      
      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 用buildroot自带的genimage把tina dragon的活干完,让dragon无活可干。

      @whycan DSP核用的,里面还能找到亮点呢
      4ad62780-c054-42c6-a293-783336457e2d-image.png

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: V853 Syterkit DDR3 问题

      @cwtech 目前fdt修改有bug,还没修复

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 一图看懂 MIPI LCD 的初始化序列

      abaf53b0-ba3b-4d0c-aa76-931a7b8d0e91-ac07aab78e5da1998ddb7890b666831.png

      屏厂一般会给这样的一个init code资料

      {DSICMD_CMD,0x01}, 
      {CMDDELAY_MS,120}, 
        
      {DSICMD_CMD,0x11},
      {CMDDELAY_MS,120}, 
               
      {DSICMD_CMD,0xFF}, 
      {DSICMD_DATA,0x77},  
      {DSICMD_DATA,0x01},  
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x11}, 
       
      {DSICMD_CMD,0xD1},
      {DSICMD_DATA,0x11}, 
      
      {DSICMD_CMD,0x55},
      {DSICMD_DATA,0xb0},  // 80 90 b0
      
                    
      {DSICMD_CMD,0xFF},
      {DSICMD_DATA,0x77},  
      {DSICMD_DATA,0x01},  
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x10},  
      
      
      {DSICMD_CMD,0xC0}, 
      {DSICMD_DATA,0x63},  
      {DSICMD_DATA,0x00},  
      
      {DSICMD_CMD,0xC1},  
      {DSICMD_DATA,0x09},
      {DSICMD_DATA,0x02},  
      
      {DSICMD_CMD,0xC2},   
      {DSICMD_DATA,0x37},  
      {DSICMD_DATA,0x08},
      
      
      {DSICMD_CMD,0xC7},//x-dir
      {DSICMD_DATA,0x04},  //  rotate 0 : 0x00     rotate 180 :0x04
      
      {DSICMD_CMD,0xCC},    
      {DSICMD_DATA,0x38},
      
      {DSICMD_CMD,0xB0},
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x11},  
      {DSICMD_DATA,0x19},  
      {DSICMD_DATA,0x0C},  
      {DSICMD_DATA,0x10},  
      {DSICMD_DATA,0x06},  
      {DSICMD_DATA,0x07},  
      {DSICMD_DATA,0x0A},  
      {DSICMD_DATA,0x09},  
      {DSICMD_DATA,0x22},  
      {DSICMD_DATA,0x04},  
      {DSICMD_DATA,0x10},  
      {DSICMD_DATA,0x0E},  
      {DSICMD_DATA,0x28},  
      {DSICMD_DATA,0x30},  
      {DSICMD_DATA,0x1C}, 
       
      {DSICMD_CMD,0xB1},
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x12},  
      {DSICMD_DATA,0x19},  
      {DSICMD_DATA,0x0D},  
      {DSICMD_DATA,0x10},  
      {DSICMD_DATA,0x04},  
      {DSICMD_DATA,0x06},  
      {DSICMD_DATA,0x07},  
      {DSICMD_DATA,0x08},  
      {DSICMD_DATA,0x23},  
      {DSICMD_DATA,0x04},  
      {DSICMD_DATA,0x12},  
      {DSICMD_DATA,0x11},  
      {DSICMD_DATA,0x28},  
      {DSICMD_DATA,0x30},  
      {DSICMD_DATA,0x1C},  
      
      
      {DSICMD_CMD,0xFF},
      {DSICMD_DATA,0x77},  
      {DSICMD_DATA,0x01},  
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x11},    // enable  bk fun of  command 2  BK1
      
      
      {DSICMD_CMD,0xB0},
      {DSICMD_DATA,0x4D},  
      
      {DSICMD_CMD,0xB1}, 
      {DSICMD_DATA,0x60}, //0x56  0x4a  0x5b
      
      
      {DSICMD_CMD,0xB2},  
      {DSICMD_DATA,0x07},  
      {DSICMD_CMD,0xB3},  
      {DSICMD_DATA,0x80},  
      {DSICMD_CMD,0xB5},  
      {DSICMD_DATA,0x47},  
      {DSICMD_CMD,0xB7},
      {DSICMD_DATA,0x8A},  
      {DSICMD_CMD,0xB8}, 
      {DSICMD_DATA,0x21},  
      {DSICMD_CMD,0xC1},
      {DSICMD_DATA,0x78},  
      
      {DSICMD_CMD,0xC2},  
      {DSICMD_DATA,0x78},  
      {DSICMD_CMD,0xD0},
      {DSICMD_DATA,0x88},  
      {CMDDELAY_MS,100}, 
      
      
      {DSICMD_CMD,0xE0}, 
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x02},
       
      {DSICMD_CMD,0xE1},
      {DSICMD_DATA,0x01},
      {DSICMD_DATA,0xA0},
      {DSICMD_DATA,0x03},
      {DSICMD_DATA,0xA0},  
      {DSICMD_DATA,0x02},
      {DSICMD_DATA,0xA0},
      {DSICMD_DATA,0x04},
      {DSICMD_DATA,0xA0},
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x44},
      {DSICMD_DATA,0x44},
        
      {DSICMD_CMD,0xE2}, 
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00}, 
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00}, 
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00},
        
      {DSICMD_CMD,0xE3},
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00}, 
      {DSICMD_DATA,0x33},
      {DSICMD_DATA,0x33},
       
      {DSICMD_CMD,0xE4},
      {DSICMD_DATA,0x44},
      {DSICMD_DATA,0x44},
       
      {DSICMD_CMD,0xE5},
      {DSICMD_DATA,0x01},
      {DSICMD_DATA,0x26},
      {DSICMD_DATA,0xA0},  
      {DSICMD_DATA,0xA0}, 
      {DSICMD_DATA,0x03},
      {DSICMD_DATA,0x28},
      {DSICMD_DATA,0xA0},
      {DSICMD_DATA,0xA0}, 
      {DSICMD_DATA,0x05},
      {DSICMD_DATA,0x2A}, 
      {DSICMD_DATA,0xA0}, 
      {DSICMD_DATA,0xA0}, 
      {DSICMD_DATA,0x07},
      {DSICMD_DATA,0x2C},
      {DSICMD_DATA,0xA0},
      {DSICMD_DATA,0xA0},
        
      {DSICMD_CMD,0xE6},
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x33},
      {DSICMD_DATA,0x33},
       
      {DSICMD_CMD,0xE7},
      {DSICMD_DATA,0x44},
      {DSICMD_DATA,0x44},
       
      {DSICMD_CMD,0xE8},
      {DSICMD_DATA,0x02}, 
      {DSICMD_DATA,0x26}, 
      {DSICMD_DATA,0xA0}, 
      {DSICMD_DATA,0xA0},
      {DSICMD_DATA,0x04},
      {DSICMD_DATA,0x28},
      {DSICMD_DATA,0xA0}, 
      {DSICMD_DATA,0xA0}, 
      {DSICMD_DATA,0x06},
      {DSICMD_DATA,0x2A}, 
      {DSICMD_DATA,0xA0}, 
      {DSICMD_DATA,0xA0}, 
      {DSICMD_DATA,0x08},
      {DSICMD_DATA,0x2C},
      {DSICMD_DATA,0xA0},
      {DSICMD_DATA,0xA0}, 
       
      {DSICMD_CMD,0xEB}, 
      {DSICMD_DATA,0x00},
      {DSICMD_DATA,0x01},
      {DSICMD_DATA,0xE4},
      {DSICMD_DATA,0xE4},
      {DSICMD_DATA,0x44},
      {DSICMD_DATA,0x00}, 
      {DSICMD_DATA,0x40},  
      
      {DSICMD_CMD,0xED},
      {DSICMD_DATA,0xFF},
      {DSICMD_DATA,0xF7},  
      {DSICMD_DATA,0x65},
      {DSICMD_DATA,0x4F}, 
      {DSICMD_DATA,0x0B},
      {DSICMD_DATA,0xA1},
      {DSICMD_DATA,0xCF},
      {DSICMD_DATA,0xFF},
      {DSICMD_DATA,0xFF},
      {DSICMD_DATA,0xFC},
      {DSICMD_DATA,0x1A},
      {DSICMD_DATA,0xB0},
      {DSICMD_DATA,0xF4},
      {DSICMD_DATA,0x56},
      {DSICMD_DATA,0x7F},
      {DSICMD_DATA,0xFF},
      
      
      {DSICMD_CMD,0xFF},  
      {DSICMD_DATA,0x77},  
      {DSICMD_DATA,0x01},  
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x00},  
      {DSICMD_DATA,0x00},
      
      {DSICMD_CMD,0x36},  // //U&D  Y-DIR
      {DSICMD_DATA,0x10},   //rotate 0: 0x00 : rotate 180 :0x10
      
      {DSICMD_CMD,0x3A},  
      {DSICMD_DATA,0x55},
      
      
      {DSICMD_CMD,0x29},
      

      对应的初始化序列

      	{0x01, 1, {0x00} },
      	{REGFLAG_DELAY, REGFLAG_DELAY, {120} },
      
      	{0x11, 1, {0x00} },
      	{REGFLAG_DELAY, REGFLAG_DELAY, {120} },
      
      	{0xff, 5, {0x77, 0x01, 0x00, 0x00, 0x11} },
      	{0xd1, 1, {0x11} },
      	{0x55, 1, {0xb0} },
      
      	{0xff, 5, {0x77, 0x01, 0x00, 0x00, 0x10} },
      	{0xc0, 2, {0x63, 0x00} }, // SCNL = (0x63 + 1) * 8 = 800
      	{0xc1, 2, {0x09, 0x02} }, // VFB=0x09  VBF=0x02
      	{0xc2, 2, {0x37, 0x08} }, // PCLK= 512 + (0x08 * 16) = 640
      
      	{0xc7, 1, {0x00} }, // x-dir  rotate 0 : 0x00     rotate 180 :0x04
      
      	{0xcc, 1, {0x38} },
      
      	{0xb0, 16, {0x00, 0x11, 0x19, 0x0c, 0x10, 0x06, 0x07, 0x0a, 0x09, 0x22,
      		   0x04, 0x10, 0x0e, 0x28, 0x30, 0x1c} },
      
      	{0xb1, 16, {0x00, 0x12, 0x19, 0x0d, 0x10, 0x04, 0x06, 0x07, 0x08, 0x23,
      		    0x04, 0x12, 0x11, 0x28, 0x30, 0x1c} },
      
      	{0xff, 5, {0x77, 0x01, 0x00, 0x00, 0x11} }, //  enable  bk fun of  command 2  BK1
      	{0xb0, 1, {0x4d} },
      	{0xb1, 1, {0x5b} }, // 0x56  0x4a  0x5b
      	{0xb2, 1, {0x07} },
      	{0xb3, 1, {0x80} },
      	{0xb5, 1, {0x47} },
      	{0xb7, 1, {0x8a} },
      	{0xb8, 1, {0x21} },
      	{0xc1, 1, {0x78} },
      	{0xc2, 1, {0x78} },
      	{0xd0, 1, {0x88} },
      	{REGFLAG_DELAY, REGFLAG_DELAY, {100} },
      
      	{0xe0, 3, {0x00, 0x00, 0x02} },
      	{0xe1, 11, {0x01, 0xa0, 0x03, 0xa0, 0x02, 0xa0, 0x04, 0xa0, 0x00, 0x44,
      		    0x44} },
      	{0xe2, 12, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
      		    0x00, 0x00} },
      	{0xe3, 4, {0x00, 0x00, 0x33, 0x33} },
      	{0xe4, 2, {0x44, 0x44} },
      	{0xe5, 16, {0x01, 0x26, 0xa0, 0xa0, 0x03, 0x28, 0xa0, 0xa0, 0x05, 0x2a,
      		    0xa0, 0xa0, 0x07, 0x2c, 0xa0, 0xa0} },
      	{0xe6, 4, {0x00, 0x00, 0x33, 0x33} },
      	{0xe7, 2, {0x44, 0x44} },
      	{0xe8, 16, {0x02, 0x26, 0xa0, 0xa0, 0x04, 0x28, 0xa0, 0xa0, 0x06, 0x2a,
      		    0xa0, 0xa0, 0x08, 0x2c, 0xa0, 0xa0} },
      	{0xeb, 7, {0x00, 0x01, 0xe4, 0xe4, 0x44, 0x00, 0x40} },
      	{0xed, 16, {0xff, 0xf7, 0x65, 0x4f, 0x0b, 0xa1, 0xcf, 0xff, 0xff, 0xfc,
      		    0x1a, 0xb0, 0xf4, 0x56, 0x7f, 0xff} },
      
      	{0xff, 5, {0x77, 0x01, 0x00, 0x00, 0x00} },
      	{0x36, 1, {0x00} }, // U&D  Y-DIR  rotate 0: 0x00 : rotate 180 :0x10
      	{0x3a, 1, {0x55} },
      	{0x29, 1, {0x00} },
      	{REGFLAG_END_OF_TABLE, REGFLAG_END_OF_TABLE, {} }
      
      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源开发板】D1s-Nezha开发板全全开源上架(内含购买链接和全部软硬件资料)

      V1.1版本
      abb9749e-4be4-4bc7-b048-a48486a969e9-image.png

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: TinyVision 制作的高清 1080P USB 摄像头

      @kanken6174 一样的,你可以直接替换我的rootfs运行

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 深入开箱跑分全志A523平板电脑 台电P26T

      硬件规格

      主控

      全志 A523M00X0000:
      7f9218b9-bf7c-4f8e-8f2d-a8bbadae2057-868E5FBF-A3E3-4983-91D6-69C8C6FB3260.JPG

      e3019826-8a9e-4e6d-904e-2faa9ab4bbea-image.png

      内存

      宏芯宇 HG4XD04G-C2JA 4GByte LPDDR4X
      d901a784-0d5c-4d64-9a04-f6375a11a4c8-0B8D4C80E1CCB2658D018ACE7BF14547.png

      eMMC

      佰维 BWCTARV11X64G
      9383a262-bc88-4e41-8c2f-281fc673862c-IMG_0135.JPG

      PMU组

      芯智汇 AXP323
      223559e8-d91d-4ea8-b96b-8fbaac526bd9-IMG_0137.JPG

      8e26bd1e-8166-48ad-ad69-9b32de2f8733-image.png

      芯智汇 AXP717C
      c23b931d-bbf4-45f4-9568-5276803c74c7-IMG_0138.JPG

      40551b44-4e41-475c-b6f4-cfb6bd4cf167-image.png

      触摸芯片

      思立微 GSL3676
      853fb57f-7944-4d19-9ebc-af6ba5d581d1-IMG_0136.JPG

      1581dd77-3105-4be6-b072-0664c9004cea-image.png

      跑分

      选用P26T平板(A523) 与 芒果派CyberPad(R818)跑分测试对比:

      A523是4核心1.8G + 4核心1.4G big.LITTLE架构,Geekbench只会显示1.4G,无视即可

      GeekBench4:

      系统参数:

      7ad6636b-4248-4c54-96ce-d00f983cabf0-image.png

      CPU 跑分测试:

      A523 单核心跑分 846,多核心 3265
      R818 单核心跑分 638,多核心 1714

      dffaa1e6-e2a7-44a5-9924-e813c17ba773-image.png

      详细链接:https://browser.geekbench.com/v4/cpu/compare/16815834?baseline=16815756

      GPU跑分测试

      A523 MaliG57 跑分 2836
      R818 GE8300 跑分 1254

      2d1e1915-2d59-4692-b43f-84902d058cb9-image.png

      详细链接:https://browser.geekbench.com/v4/compute/compare/5203221?baseline=5203219

      GeekBench5:

      系统参数:

      163c1b59-4b48-4191-b054-ca234c76f56e-image.png

      CPU 跑分测试

      A523:单核 170,多核 778
      R818:单核 113,多核 372

      aa87a126-5c67-4379-a851-16936d5f1ffb-image.png

      详细链接:https://browser.geekbench.com/v5/cpu/compare/21444054?baseline=21444058

      GeekBench6:

      由于GeekBench6不提供arm32版本,故此处对比跑分A523与RK3568

      系统参数:

      59135ff4-2c5b-4df0-a344-7432b5c40b1d-图片.png

      CPU 跑分测试

      A523:单核 230,多核 850
      RK3568:单核 208,多核 493

      488a7098-0b45-4c97-8f95-a682fcb9378e-图片.png

      详细链接:https://browser.geekbench.com/v6/cpu/compare/1893406?baseline=1852318

      GPU 跑分测试

      A523:Vulkan跑分 441
      RK3568:Vulkan跑分 435

      aaa7384b-d971-48c0-9a69-ff74237ddf64-图片.png

      详细链接:https://browser.geekbench.com/v6/compute/compare/663853?baseline=649654

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源开发板】D1s-Nezha开发板全全开源上架(内含购买链接和全部软硬件资料)

      8612445a-7a91-4e97-9fb5-1676d61b61a3-image.png

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【求助】V853安装node

      node 需要systemd,默认是busybox应该不行,可以移植一个ubuntu上去

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • XR829 的 LPCLK 信号要怎么提供

      看设计是必须使用这个32k的时钟
      cd7d17fe-a2cf-4ebd-be83-51f7151326bc-image.png

      6f00f376-5ae6-4c87-8f12-aeb9c5dace97-image.png

      但是我这个芯片好像大概是没有32k输出的((

      c9fe7c7a-4dd8-47d0-ba86-443ac30bb408-image.png

      可以直接并联到X32KOUT吗

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • D1-H 超频 1.68GHz 测试,提升 67% CoreMark 跑分,ncnn 增速 24%

      超频 1.68GHz,电压 1.25V/1.15V/1.15V/1.15V/1.15V

      845265ac-11f6-4664-98e8-db335067118e-image.png

      默频 1.008GHz,电压 1.10V/0.95V/0.95V/0.95V/0.95V

      65539b6e-2511-47c8-a768-94fc128d88b0-image.png

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: buildroot编译报错

      @dql2016 安装uboot-tools

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 一个补丁,让D1-H的SDK支持T113芯片

      @captain TF卡要自己配置overlayfs

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: Tina linux(T113-S3) 如何在lvgl中操作GPIO?

      https://v853.docs.aw-ol.com/soft/dev_gpio/

      可以参考

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【V853开发板试用】移植 V853 Debian GNU/Linux 系统(Ubuntu也适用)

      完成了基础 rootfs 配置,现在要进行软件包的配置了

      1)chroot 进入 rootfs

      LC_ALL=C LANGUAGE=C LANG=C chroot rootfs
      

      f2e804f8-7fde-44e6-8e14-965219c45529-image.png

      2)修改设备名,密码

      echo "v853-vision" > /etc/hostname    # 修改设备名
      
      passwd                                # 设置root用户密码
      

      ad0f68c9-1894-44d2-94e5-d596f5b4f300-image.png

      3)更新下 rootfs 内的 apt 源

      apt update
      

      7adf9640-010b-4ca4-a55e-14078f466f8e-image.png

      4)apt 安装下软件包

      这里准备了豪华大礼包(你也可以加入自己喜欢的包)

      apt-get -y install \
          libncurses5-dev libncursesw5-dev procps udev locales zip unzip cmake \
          build-essential python3 python3-dev python3-pip lxde lightdm xorg \
          xserver-xorg motion neofetch
      

      5ed7a4f5-f253-4d17-9ef3-e330e4a017dc-image.png

      5)配置一下fstab,挂载 rootfs 为可读写模式

      echo "PARTLABEL="rootfs" / ext4 noatime,lazytime,rw 0 0" > /etc/fstab
      

      679dc82a-42bb-4bee-9bd9-4c2152a3d65a-image.png

      6)配置开机驱动自动加载功能

      ln -fs /lib/systemd/system/rc-local.service /etc/systemd/system/rc-local.service   # 链接脚本
      
      vi /etc/rc.local
      

      然后在编辑器里输入这些配置

      #!/bin/bash
      
      mount -o remount, rw /
      
      insmod /lib/modules/4.9.191/videobuf2-core.ko
      insmod /lib/modules/4.9.191/videobuf2-memops.ko
      insmod /lib/modules/4.9.191/videobuf2-dma-contig.ko
      insmod /lib/modules/4.9.191/videobuf2-v4l2.ko
      insmod /lib/modules/4.9.191/vin_io.ko
      insmod /lib/modules/4.9.191/gc2053_mipi.ko
      insmod /lib/modules/4.9.191/vin_v4l2.ko
      
      insmod /lib/modules/4.9.191/xradio_mac.ko
      insmod /lib/modules/4.9.191/xradio_core.ko
      insmod /lib/modules/4.9.191/xradio_wlan.ko
      
      cat /sys/devices/platform/soc/usbc0/usb_host
      

      cd223609-1877-4622-927d-a6c6b89f2773-image.png

      7)把驱动包复制到 rootfs 里

      驱动包是从 tina linux 里扒下来的,路径 out\v853\vision\openwrt\build_dir\target\root-v853-vision\lib 只需要 firmware 和 module 文件夹

      下载驱动包:驱动包.zip

      首先退出 rootfs,Ctrl+D

      把解压好的驱动包复制进 rootfs 内

      cp -r firmware/ rootfs/lib/
      cp -r modules/ rootfs/lib/
      

      6ec4244d-5e82-4415-b4a4-26f96709aa1f-image.png

      至此,rootfs 就配置完成了,接下来是打包了

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: A133 android10 usb debug

      @kouten 看看debugfs开了吗

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 小麻雀直接驱动树莓派的DSI屏

      @daming123 brandy-2.0/u-boot-2018/configs/sun20iw1p1_defconfig 注释掉 #CONFIG_DISP2_SUNXI=y,使用kernel初始化屏幕测试

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: V85x E907 小核开发与使用

      @idiot 你可以在固件打印函数处print出来看一下路径对不对,magic错大概是因为找不到文件

      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 有块V3s板子烧录时候检测不到DDR,即使一直插着电,V3s也不发热,冷冰冰的,是不是V3s坏了呢?

      @mstempin 绑定PMU?

      发布在 其它全志芯片讨论区
      YuzukiTsuru
      柚木 鉉
    • 回复: 请教各位大佬,D1的start.s __start部分是参考哪里怎么实现的? 还有dram.c又是从那里得到的这些数据,最后的mksunxi 也是搞不懂依据在哪

      D1的start.s __start部分是参考哪里怎么实现的?

      首先是 eGON.BT0,这个Magic是BROM读取的,所以要在头部插入eGON.BT0

      还有dram.c又是从那里得到的这些数据

      这是使用mctl_hal.S和自己写的一个小裸机编译出的bin,mctl_hal.S全志的sdk里开源了,这个小裸机源码如下 6ee6e31c-72ef-47f5-b69f-0976197bb46a-d1-ddr.zip

      最后的mksunxi 也是搞不懂依据在哪

      这个是对齐后重新计算校验码的,然后填充在固定的位置让BROM读取,全志系列的老传统了,你看_start那里的checksum只是一个占位符0x12345678,mksunxi就是会对齐块设备然后计算校验填入然后修改长度

      https://github.com/YuzukiHD/TinyKasKit/blob/master/sunxiboot/src/bootpack.cpp

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: V853适配MIPI屏背光不亮

      @null037
      是不是开了动态背光但是没配置背光亮度?

      	lcd_bl_0_percent    = <0>;
      	lcd_bl_40_percent   = <23>;
      	lcd_bl_100_percent  = <100>;
      	lcd_backlight       = <150>;
      

      或者直接写死试试

      lcd_bl_en = <&pio PD 22 1 0 3 1>
      
      发布在 V Series
      YuzukiTsuru
      柚木 鉉
    • 编译下 D1s 的 Melis

      先拉源码:

      git clone https://github.com/Tina-Linux/d1s-melis.git
      

      然后下载工具链[https://github.com/Tina-Linux/d1s-melis/releases/tag/v1.0.0]丢到prebuilt文件夹里。

      source melis-env.sh
      lunch
      make -j655350
      pack
      

      就可以在out目录找到镜像文件了

      1912d7fd-7ed0-458c-83bc-1b4d3f2648d0-image.png

      刷机

      f17c40ea-568b-4d64-a729-f5e905d31c22-image.png

      然后就毫不意外的启动了

      c29d8a13-c0ef-403a-9e83-9ab89276a288-2.jpg

      be2274c4-dfe9-4846-a132-a6f5f42c8c2f-ww.png

      发布在 RTOS
      YuzukiTsuru
      柚木 鉉
    • 回复: t527硬件视频编码 ve vpu

      1d8b2d69-3993-4ce7-9019-7f02e696f0a0-image.png

      SDK 里有这两个安装包

      发布在 T Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 怎么在视频上显示UI?

      最近有时间,实现了下

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 关于D1的SPI通讯问题

      提供一份之前测试可用的驱动,不过现在也没测试过,可以试试看spi.zip

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: d1s system init 修改成procd-init tplayerdemo出问题

      @mhcsoft 如果要使用这个INIT,要进行一下其他配置。我一般就busybox了

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 我的D1s哪吒开发板到货啦

      来当分母了((((

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: pack 报错

      @cwj1986521 在 pack 报错 中说:

      /home/jay/linux/allwinner/Tina-Linux-20220815/Tina-Linux/lichee/linux-6.6/scripts/dtc/dtc:

      你的环境里有 Linux 6.6 的dtc,版本更新了导致不认识 -F 参数

      这个是自己魔改的tina吗

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源开发板】D1s-Nezha开发板全全开源上架(内含购买链接和全部软硬件资料)

      16b375f6-82eb-40fa-97eb-3f18fd31302b-2f56ebea21bdbc1fda35848fe863b4b.jpg

      试试驱动显像管,好像没输出

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源开发板】D1s-Nezha开发板全全开源上架(内含购买链接和全部软硬件资料)

      @gonboy 这个开发板的CSI接口全部存在其他复用关系,所以不能接摄像头

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源开发板】D1s-Nezha开发板全全开源上架(内含购买链接和全部软硬件资料)

      @rockenergytech 没有nand flash,是nor flash

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源开发板】D1s-Nezha开发板全全开源上架(内含购买链接和全部软硬件资料)

      @rockenergytech 默认是sd卡,如果有需要之后我上传一份nor的

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源开发板】D1s-Nezha开发板全全开源上架(内含购买链接和全部软硬件资料)

      @rockenergytech buildroot根本上不支持nand和nor,未来也没有计划支持

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源开发板】D1s-Nezha开发板全全开源上架(内含购买链接和全部软硬件资料)

      手贴测试版
      2a06a45a-4a5b-4d43-9013-b9305cc2eda3-sa.jpg

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源开发板】D1s-Nezha开发板全全开源上架(内含购买链接和全部软硬件资料)

      更新:

      • 删除了12V输入,更换为USB TypeC供电
      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【开源开发板】D1s-Nezha开发板全全开源上架(内含购买链接和全部软硬件资料)

      修改版渲染图

      ec04de7c-819b-4ee8-aee1-1354ff84563e-Nezha D1s.jpg

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 让T113-S3的TVIN吃上trecorder的本地预览套餐

      大佬太强了,看看D1s行不行

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: D1-h 如何从SD启动

      @kelsey 全志平台的固件只分为NOR固件和普通固件,NOR固件是高度裁剪压缩的,一般最大16MByte,只可以刷入SPI NOR储存器

      而普通固件是通用的,可以刷入

      • SPI NAND
      • eMMC
      • TF Card
      • SD Nand
      • MMC
      • SDMMC
      • EMCP
      • SLC RAW NAND
      • MLC RAW NAND
      • TLC RAW NAND
      • QLC RAW NAND

      具体可以刷入怎样的储存介质需要芯片与驱动支持。

      例如我给固件配置了MMC和SPI NAND的驱动,这个固件就可以刷入eMMC,MMC,TF Card,SD NAND, SPI NAND。因为eMMC,MMC,TF Card,SD NAND的驱动都是SDC的MMC驱动,所以共用我配置的eMMC驱动即可,而SPI NAND是SPI NAND的驱动,需要单独配置。

      所以SD卡切换到SPI NAND需要打开SPI NAND的驱动,SPI NAND切换到SD卡需要打开MMC的驱动,具体参考帖子:Tina Linux 存储介质切换:eMMC,SPI NAND,SPI NOR,SD Card,SD NAND https://bbs.aw-ol.com/topic/1701/share/1

      可以参考这个伪代码了解BROM的启动逻辑:

      d82e9c59-d595-4936-ad1c-232142e51873-D1-H&D1s启动流程.png

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: D1-H的HiFi4 DSP怎么能使用起来?

      HiFi4 DSP 需要向 Cadence 购买 XCC 编译器

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: D1 LicheeRV Dock 移植RTL8723DS驱动

      @tigger 对,是有2个

      可以当热点用,一个STATION模式一个AP模式,如果不想要两个可以修改Makefile加一行

      EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
      

      660f14e7-50d9-49bc-92d8-2fb038ea07bc-2.jpg

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: D1 LicheeRV Dock 移植RTL8723DS驱动

      @tigger 当然可以(

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: D1 LicheeRV Dock 移植RTL8723DS驱动

      测了一下速度
      1bd6a809-dc2f-4e90-9cba-963693af5797-w.png

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【已解决】D1s 调试 MIPI LCD 不亮

      驱动文件

      #include "d310t9362v1.h"
      
      static void lcd_power_on(u32 sel);
      static void lcd_power_off(u32 sel);
      static void lcd_bl_open(u32 sel);
      static void lcd_bl_close(u32 sel);
      
      static void lcd_panel_init(u32 sel);
      static void lcd_panel_exit(u32 sel);
      
      #define panel_reset(sel, val) sunxi_lcd_gpio_set_value(sel, 0, val)
      
      static void lcd_cfg_panel_info(panel_extend_para *info)
      {
      	u32 i = 0, j = 0;
      	u32 items;
      	u8 lcd_gamma_tbl[][2] = {
      	    {0, 0},     {15, 15},   {30, 30},   {45, 45},   {60, 60},
      	    {75, 75},   {90, 90},   {105, 105}, {120, 120}, {135, 135},
      	    {150, 150}, {165, 165}, {180, 180}, {195, 195}, {210, 210},
      	    {225, 225}, {240, 240}, {255, 255},
      	};
      
      	u32 lcd_cmap_tbl[2][3][4] = {
      	    {
      		{LCD_CMAP_G0, LCD_CMAP_B1, LCD_CMAP_G2, LCD_CMAP_B3},
      		{LCD_CMAP_B0, LCD_CMAP_R1, LCD_CMAP_B2, LCD_CMAP_R3},
      		{LCD_CMAP_R0, LCD_CMAP_G1, LCD_CMAP_R2, LCD_CMAP_G3},
      	    },
      	    {
      		{LCD_CMAP_B3, LCD_CMAP_G2, LCD_CMAP_B1, LCD_CMAP_G0},
      		{LCD_CMAP_R3, LCD_CMAP_B2, LCD_CMAP_R1, LCD_CMAP_B0},
      		{LCD_CMAP_G3, LCD_CMAP_R2, LCD_CMAP_G1, LCD_CMAP_R0},
      	    },
      	};
      
      	items = sizeof(lcd_gamma_tbl) / 2;
      	for (i = 0; i < items - 1; i++) {
      		u32 num = lcd_gamma_tbl[i + 1][0] - lcd_gamma_tbl[i][0];
      
      		for (j = 0; j < num; j++) {
      			u32 value = 0;
      
      			value =
      			    lcd_gamma_tbl[i][1] +
      			    ((lcd_gamma_tbl[i + 1][1] - lcd_gamma_tbl[i][1]) *
      			     j) /
      				num;
      			info->lcd_gamma_tbl[lcd_gamma_tbl[i][0] + j] =
      			    (value << 16) + (value << 8) + value;
      		}
      	}
      	info->lcd_gamma_tbl[255] = (lcd_gamma_tbl[items - 1][1] << 16) +
      				   (lcd_gamma_tbl[items - 1][1] << 8) +
      				   lcd_gamma_tbl[items - 1][1];
      
      	memcpy(info->lcd_cmap_tbl, lcd_cmap_tbl, sizeof(lcd_cmap_tbl));
      }
      
      static s32 lcd_open_flow(u32 sel)
      {
      	printk("=====================lcd_open_flow\n");
      	LCD_OPEN_FUNC(sel, lcd_power_on, 10);
      	LCD_OPEN_FUNC(sel, lcd_panel_init, 120);
      	LCD_OPEN_FUNC(sel, sunxi_lcd_tcon_enable, 120);
      	LCD_OPEN_FUNC(sel, lcd_bl_open, 0);
      	return 0;
      }
      
      static s32 lcd_close_flow(u32 sel)
      {
      	printk("=====================lcd_close_flow\n");
      	LCD_CLOSE_FUNC(sel, lcd_bl_close, 0);
      	LCD_CLOSE_FUNC(sel, lcd_panel_exit, 200);
      	LCD_CLOSE_FUNC(sel, sunxi_lcd_tcon_disable, 0);
      	LCD_CLOSE_FUNC(sel, lcd_power_off, 500);
      
      	return 0;
      }
      
      static void lcd_power_on(u32 sel)
      {
      	printk("=====================lcd_power_on\n");
      	sunxi_lcd_pin_cfg(sel, 1);
      	sunxi_lcd_power_enable(sel, 0);
      	// sunxi_lcd_power_enable(sel, 1);
      	sunxi_lcd_delay_ms(50);
      
      	/* reset lcd by gpio */
      	panel_reset(sel, 1);
      	sunxi_lcd_delay_ms(5);
      	panel_reset(sel, 0);
      	sunxi_lcd_delay_ms(10);
      	panel_reset(sel, 1);
      	sunxi_lcd_delay_ms(120);
      }
      
      static void lcd_power_off(u32 sel)
      {
      	printk("=====================lcd_power_off\n");
      	sunxi_lcd_pin_cfg(sel, 0);
      	sunxi_lcd_delay_ms(20);
      	panel_reset(sel, 0);
      	sunxi_lcd_delay_ms(5);
      	sunxi_lcd_power_disable(sel, 0);
      }
      
      static void lcd_bl_open(u32 sel)
      {
      	printk("=====================lcd_bl_open\n");
      	sunxi_lcd_pwm_enable(sel);
      	sunxi_lcd_backlight_enable(sel);
      }
      
      static void lcd_bl_close(u32 sel)
      {
      	printk("=====================lcd_bl_close\n");
      	sunxi_lcd_backlight_disable(sel);
      	sunxi_lcd_pwm_disable(sel);
      }
      
      #define REGFLAG_DELAY 0XFC
      #define REGFLAG_END_OF_TABLE 0xFD /* END OF REGISTERS MARKER */
      
      struct LCM_setting_table {
      	u8 cmd;
      	u32 count;
      	u8 para_list[32];
      };
      
      static struct LCM_setting_table lcm_initialization_setting[] = {
      	{0x01, 1, {0x00} },
      	{REGFLAG_DELAY, REGFLAG_DELAY, {120} },
      
      	{0x11, 1, {0x00} },
      	{REGFLAG_DELAY, REGFLAG_DELAY, {120} },
      
      	{0xff, 5, {0x77, 0x01, 0x00, 0x00, 0x11} },
      	{0xd1, 1, {0x11} },
      	{0x55, 1, {0xb0} },
      
      	{0xff, 5, {0x77, 0x01, 0x00, 0x00, 0x10} },
      	{0xc0, 2, {0x63, 0x00} }, // SCNL = (0x63 + 1) * 8 = 800
      	{0xc1, 2, {0x09, 0x02} }, // VFB=0x09  VBF=0x02
      	{0xc2, 2, {0x37, 0x08} }, // PCLK= 512 + (0x08 * 16) = 640
      
      	{0xc7, 1, {0x00} }, // x-dir  rotate 0 : 0x00     rotate 180 :0x04
      
      	{0xcc, 1, {0x38} },
      
      	{0xb0, 16, {0x00, 0x11, 0x19, 0x0c, 0x10, 0x06, 0x07, 0x0a, 0x09, 0x22,
      		   0x04, 0x10, 0x0e, 0x28, 0x30, 0x1c} },
      
      	{0xb1, 16, {0x00, 0x12, 0x19, 0x0d, 0x10, 0x04, 0x06, 0x07, 0x08, 0x23,
      		    0x04, 0x12, 0x11, 0x28, 0x30, 0x1c} },
      
      	{0xff, 5, {0x77, 0x01, 0x00, 0x00, 0x11} }, //  enable  bk fun of  command 2  BK1
      	{0xb0, 1, {0x4d} },
      	{0xb1, 1, {0x5b} }, // 0x56  0x4a  0x5b
      	{0xb2, 1, {0x07} },
      	{0xb3, 1, {0x80} },
      	{0xb5, 1, {0x47} },
      	{0xb7, 1, {0x8a} },
      	{0xb8, 1, {0x21} },
      	{0xc1, 1, {0x78} },
      	{0xc2, 1, {0x78} },
      	{0xd0, 1, {0x88} },
      	{REGFLAG_DELAY, REGFLAG_DELAY, {100} },
      
      	{0xe0, 3, {0x00, 0x00, 0x02} },
      	{0xe1, 11, {0x01, 0xa0, 0x03, 0xa0, 0x02, 0xa0, 0x04, 0xa0, 0x00, 0x44,
      		    0x44} },
      	{0xe2, 12, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
      		    0x00, 0x00} },
      	{0xe3, 4, {0x00, 0x00, 0x33, 0x33} },
      	{0xe4, 2, {0x44, 0x44} },
      	{0xe5, 16, {0x01, 0x26, 0xa0, 0xa0, 0x03, 0x28, 0xa0, 0xa0, 0x05, 0x2a,
      		    0xa0, 0xa0, 0x07, 0x2c, 0xa0, 0xa0} },
      	{0xe6, 4, {0x00, 0x00, 0x33, 0x33} },
      	{0xe7, 2, {0x44, 0x44} },
      	{0xe8, 16, {0x02, 0x26, 0xa0, 0xa0, 0x04, 0x28, 0xa0, 0xa0, 0x06, 0x2a,
      		    0xa0, 0xa0, 0x08, 0x2c, 0xa0, 0xa0} },
      	{0xeb, 7, {0x00, 0x01, 0xe4, 0xe4, 0x44, 0x00, 0x40} },
      	{0xed, 16, {0xff, 0xf7, 0x65, 0x4f, 0x0b, 0xa1, 0xcf, 0xff, 0xff, 0xfc,
      		    0x1a, 0xb0, 0xf4, 0x56, 0x7f, 0xff} },
      
      	{0xff, 5, {0x77, 0x01, 0x00, 0x00, 0x00} },
      	{0x36, 1, {0x00} }, // U&D  Y-DIR  rotate 0: 0x00 : rotate 180 :0x10
      	{0x3a, 1, {0x55} },
      	{0x29, 1, {0x00} },
      	{REGFLAG_END_OF_TABLE, REGFLAG_END_OF_TABLE, {} }
      };
      
      static void lcd_panel_init(u32 sel)
      {
      	u32 i = 0;
      	sunxi_lcd_dsi_clk_enable(sel);
      	sunxi_lcd_delay_ms(100);
      	for (i = 0;; i++) {
      		if (lcm_initialization_setting[i].count == REGFLAG_END_OF_TABLE)
      			break;
      		else if (lcm_initialization_setting[i].count == REGFLAG_DELAY) {
      			sunxi_lcd_delay_ms(lcm_initialization_setting[i].para_list[0]);
      		} else {
      			dsi_gen_wr(sel, lcm_initialization_setting[i].cmd,
      				   lcm_initialization_setting[i].para_list,
      				   lcm_initialization_setting[i].count);
      		}
      		/* break; */
      	}
      }
      
      static void lcd_panel_exit(u32 sel)
      {
      	sunxi_lcd_dsi_dcs_write_0para(sel, 0x10);
      	sunxi_lcd_delay_ms(80);
      	sunxi_lcd_dsi_dcs_write_0para(sel, 0x28);
      	sunxi_lcd_delay_ms(50);
      }
      
      /*sel: 0:lcd0; 1:lcd1*/
      static s32 lcd_user_defined_func(u32 sel, u32 para1, u32 para2, u32 para3)
      {
      	return 0;
      }
      
      __lcd_panel_t d310t9362v1_panel = {
      	/* panel driver name, must mach the name of
      	 * lcd_drv_name in sys_config.fex
      	 */
      	.name = "d310t9362v1",
      	.func = {
      		.cfg_panel_info = lcd_cfg_panel_info,
      		.cfg_open_flow = lcd_open_flow,
      		.cfg_close_flow = lcd_close_flow,
      		.lcd_user_defined_func = lcd_user_defined_func,
      	},
      };
      

      设备树文件

      &lcd0 {
      	lcd_used            = <1>;
      
      	lcd_driver_name     = "d310t9362v1";
      	lcd_if              = <4>;
      
      	lcd_x               = <480>;
      	lcd_y               = <800>;
      	lcd_width           = <40>;
      	lcd_height          = <67>;
      
      	lcd_dclk_freq       = <34>;
      	lcd_hbp             = <120>;
      	lcd_ht              = <624>;
      	lcd_hspw            = <48>;
      	lcd_vbp             = <28>;
      	lcd_vt              = <908>;
      	lcd_vspw            = <12>;
      
      	lcd_dsi_if          = <0>;
      	lcd_dsi_lane        = <2>;
      	lcd_lvds_if         = <0>;
      	lcd_lvds_colordepth = <0>;
      	lcd_lvds_mode       = <0>;
      	lcd_frm             = <0>;
      	lcd_hv_clk_phase    = <0>;
      	lcd_hv_sync_polarity= <0>;
      	lcd_io_phase        = <0x0000>;
      	lcd_gamma_en        = <0>;
      	lcd_bright_curve_en = <0>;
      	lcd_cmap_en         = <0>;
      	lcd_fsync_en        = <0>;
      	lcd_fsync_act_time  = <1000>;
      	lcd_fsync_dis_time  = <1000>;
      	lcd_fsync_pol       = <0>;
      
      	deu_mode            = <0>;
      	lcdgamma4iep        = <22>;
      	smart_color         = <90>;
      
      	lcd_gpio_0 = <&pio PD 9 GPIO_ACTIVE_HIGH>;
      	lcd_bl_en = <&pio PE 12 GPIO_ACTIVE_HIGH>;
      
      	pinctrl-0 = <&dsi2lane_pins_a>;
      	pinctrl-1 = <&dsi2lane_pins_b>;
      }
      
      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【已解决】D1s 调试 MIPI LCD 不亮

      亮了,关闭uboot里的屏幕驱动就ok了,看来uboot的dsi驱动有bug啊

      4401e22d-fd64-413e-a889-5fc777f79252-image.png

      90cdd5cd-1d6d-4270-ad02-f28cadcc6a6f-cd2c1d19ed136f8ad9b0080b4f9bd29.jpg

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【已解决】D1s 调试 MIPI LCD 不亮

      @smiletiger 我这里的uboot没有显示,开了uboit的disp2在kernel内也没有显示

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • D1s 使用 XR829 BT 配置 a2dp-source 出错

      首先按照帖子《D1 开发板使用 XR829 mesh fw 出现 code(56) 错误,如何解决》:
      https://bbs.aw-ol.com/topic/361/share/1 配置了蓝牙,输出

      root@TinaLinux:/# hciattach -n ttyS1 xradio >/dev/null 2>&1 &
      root@TinaLinux:/# [  341.203731]sunxi-rfkill soc@3000000:rfkill@0: set block: 1
      [  341.210080]sunxi-rfkill soc@3000000:rfkill@0: bt power off success
      [  341.237565]sunxi-rfkill soc@3000000:rfkill@0: set block: 0
      [  341.253736]sunxi-rfkill soc@3000000:rfkill@0: bt power on success
      [  341.280858][XR_BT_LPM] bluedroid_write_proc_btwake: bluedroid_write_proc_btwake 1
      [  341.289318][XR_BT_LPM] bluedroid_write_proc_btwake: wakeup bt device
      [  341.296571][XR_BT_LPM] bluedroid_write_proc_lpm: disable lpm mode
      root@TinaLinux:/# hciconfig -a hci0 up
      root@TinaLinux:/# hciconfig
      hci0:   Type: Primary  Bus: UART
              BD Address: 22:22:65:05:28:FE  ACL MTU: 1021:8  SCO MTU: 255:4
              UP RUNNING
              RX bytes:1154 acl:0 sco:0 events:54 errors:0
              TX bytes:744 acl:0 sco:0 commands:54 errors:0
      
      

      然后bt_test -i -p a2dp-source

      root@TinaLinux:/# bt_test -i -p a2dp-source
      8163.127547: BTMG[bt_manager_enable:407]:  bt manager version:Version:3.0.1.202110291544,builed time:Oct 29 2021-09:42:35
      8163.128196: BTMG[bt_test_status_cb:82]:  bt is turnning on.
      Bluetooth init has been completed!!
      ln: /var/lib/bluetooth: No such file or directory
      bluetoothd[296]: Bluetooth daemon 5.54
      D-Bus setup failed: Failed to connect to socket /var/run/dbus/system_bus_socket: No such file or directory
      bluetoothd[296]: Unable to get on D-Bus
      bluealsa: Couldn't initialize controller thread: Bad file descriptor
      8164.563437: BTMG[bt_profile_global_init:355]:  start bluealsa :1 times
      8164.572354: BTMG[bt_routine:68]:  Couldn't obtain D-Bus connection: Could not connect: No such file or directory
      8165.065054: BTMG[bt_manager_enable:449]:  init connection to bluez failed!
      [  577.128339]sunxi-rfkill soc@3000000:rfkill@0: block state already is 1
      stop bluetoothd and hciattach
      8165.198016: BTMG[bt_test_status_cb:65]:  BT is off
      

      估计是我什么配置的问题,麻烦大佬分析一下

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: QT时钟程序报不能加载.so库

      @huanian 两个的libc不同,可以尝试使用相同的编译器,libc库重新编译qt

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
    • 回复: 【极简操作】使用builroot 2021一键编译生成D1 nezha 系统镜像!

      @mxlol233 更新buildroot 2022.05就ok了

      发布在 MR Series
      YuzukiTsuru
      柚木 鉉
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