SDK 里有这两个安装包
YuzukiTsuru 发布的帖子
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回复: Avaota - A1 t527只能用TF卡旺开发板烧写镜像吗？不能像t113用一样的PhoenixSuit.exe吗？发布在 T Series
Avaota-A1 使用主线 SDK，不适用原厂的工具
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回复: LT527X-E 米尔 T527 开发板折腾记录发布在 T Series
// SPDX-License-Identifier: (GPL-2.0+ or MIT) /* * Copyright (C) 2021 liujuan1@allwinnertech.com */ #include <dt-bindings/clock/sun55iw3-ccu.h> #include <dt-bindings/clock/sun55iw3-rtc.h> #include <dt-bindings/clock/sun55iw3-r-ccu.h> #include <dt-bindings/clock/sun55iw3-mcu-ccu.h> #include <dt-bindings/clock/sun55iw3-displl-ccu.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/sun4i-gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/reset/sun55iw3-ccu.h> #include <dt-bindings/reset/sun55iw3-r-ccu.h> #include <dt-bindings/reset/sun55iw3-mcu-ccu.h> #include <dt-bindings/power/a523-power.h> #include <dt-bindings/phy/phy.h> #include <dt-bindings/usb/pd.h> #include <dt-bindings/thermal/thermal.h> #include <dt-bindings/spi/sunxi-spi.h> #include <dt-bindings/clock/sunxi-ccu.h> / { model = "sun55iw3"; interrupt-parent = <&wakeupgen>; #address-cells = <2>; #size-cells = <2>; aliases { serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; serial3 = &uart3; serial4 = &uart4; serial5 = &uart5; serial6 = &uart6; serial7 = &uart7; serial8 = &uart8; serial9 = &uart9; ir0 = &irrx; ir1 = &s_irrx; ir2 = &irtx; pcie = &pcie; gpadc0 = &gpadc0; gpadc1 = &gpadc1; twi0 = &twi0; twi1 = &twi1; twi2 = &twi2; twi3 = &twi3; twi4 = &twi4; twi5 = &twi5; twi6 = &twi6; twi7 = &twi7; twi8 = &twi8; spi0 = &spi0; spi1 = &spi1; spi2 = &spi2; spi3 = &r_spi0; spif0 = &spif0; nand0 = &nand0; ve0 = &ve; ve1 = &ve1; sunxi-mmc0 = &sdc0; sunxi-mmc2 = &sdc2; gmac0 = &gmac0; gmac1 = &gmac1; edp0 = &edp0; nsi0 = &nsi0; }; reg_vdd_sys: vdd-sys { compatible = "regulator-fixed"; regulator-name = "vdd_sys"; regulator-min-microvolt = <900000>; regulator-max-microvolt = <900000>; regulator-boot-on; regulator-always-on; }; reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; bl31 { reg = <0x0 0x48000000 0x0 0x01000000>; }; }; firmware { android { compatible = "android,firmware"; name = "android"; boot_devices = "soc@3000000/4020000.sdmmc,soc@3000000/4022000.sdmmc,soc@3000000"; vbmeta { compatible = "android,vbmeta"; parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot,init_boot"; }; }; optee { compatible = "linaro,optee-tz"; method = "smc"; }; }; cpus { #address-cells = <2>; #size-cells = <0>; cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x0>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <922>; clocks = <&cpupll_ccu CLK_PLL_CPU1>; operating-points-v2 = <&cluster0_opp_table>; #cooling-cells = <2>; dynamic-power-coefficient = <286>; }; cpu1: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x100>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <922>; clocks = <&cpupll_ccu CLK_PLL_CPU1>; operating-points-v2 = <&cluster0_opp_table>; #cooling-cells = <2>; }; cpu2: cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x200>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <922>; clocks = <&cpupll_ccu CLK_PLL_CPU1>; operating-points-v2 = <&cluster0_opp_table>; #cooling-cells = <2>; }; cpu3: cpu@300 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x300>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <922>; clocks = <&cpupll_ccu CLK_PLL_CPU1>; operating-points-v2 = <&cluster0_opp_table>; #cooling-cells = <2>; }; cpu4: cpu@400 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x400>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&cpupll_ccu CLK_PLL_CPU3>; operating-points-v2 = <&cluster1_opp_table>; #cooling-cells = <2>; dynamic-power-coefficient = <354>; }; cpu5: cpu@500 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x500>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&cpupll_ccu CLK_PLL_CPU3>; operating-points-v2 = <&cluster1_opp_table>; #cooling-cells = <2>; }; cpu6: cpu@600 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x600>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&cpupll_ccu CLK_PLL_CPU3>; operating-points-v2 = <&cluster1_opp_table>; #cooling-cells = <2>; }; cpu7: cpu@700 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x700>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&cpupll_ccu CLK_PLL_CPU3>; operating-points-v2 = <&cluster1_opp_table>; #cooling-cells = <2>; }; cpu-map { cluster0 { core0 { cpu = <&cpu0>; }; core1 { cpu = <&cpu1>; }; core2 { cpu = <&cpu2>; }; core3 { cpu = <&cpu3>; }; }; cluster1 { core0 { cpu = <&cpu4>; }; core1 { cpu = <&cpu5>; }; core2 { cpu = <&cpu6>; }; core3 { cpu = <&cpu7>; }; }; }; idle-states { entry-method = "arm,psci"; CPU_SLEEP_0: cpu-sleep-0 { compatible = "arm,idle-state"; arm,psci-suspend-param = <0x0010000>; entry-latency-us = <46>; exit-latency-us = <59>; min-residency-us = <3570>; local-timer-stop; }; CLUSTER_SLEEP_0: cluster-sleep-0 { compatible = "arm,idle-state"; arm,psci-suspend-param = <0x1010000>; entry-latency-us = <47>; exit-latency-us = <74>; min-residency-us = <5000>; local-timer-stop; }; }; }; vf_mapping_table: vf_mapping_table { vf-version = "V0.60"; table = < 0x00 0x0000 0x01 0x0100 0x02 0x0200 0x12 0x0201 0x04 0x0300 0x14 0x0301 0x05 0x0400 0x06 0x0500 >; }; gpu_vf_mapping_table: gpu_vf_mapping_table { table = < 0x01 1 0x02 2 0x12 21 0x04 3 0x14 31 0x05 4 0x06 5 >; }; npu_vf_mapping_table: npu_vf_mapping_table { table = < 0x01 1 0x02 2 0x12 21 0x04 3 0x14 31 0x05 4 0x06 5 >; }; cluster0_opp_table: cluster0-opp-table { compatible = "allwinner,sun50i-operating-points"; opp-shared; opp@408000000 { opp-hz = /bits/ 64 <408000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <900000>; opp-microvolt-vf0100 = <900000>; opp-microvolt-vf0200 = <900000>; opp-microvolt-vf0201 = <900000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@672000000 { opp-hz = /bits/ 64 <672000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <900000>; opp-microvolt-vf0200 = <900000>; opp-microvolt-vf0201 = <900000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@720000000 { opp-hz = /bits/ 64 <720000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <900000>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <0>; }; opp@792000000 { opp-hz = /bits/ 64 <792000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <900000>; opp-microvolt-vf0200 = <900000>; opp-microvolt-vf0201 = <900000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@936000000 { opp-hz = /bits/ 64 <936000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <900000>; opp-microvolt-vf0100 = <920000>; opp-microvolt-vf0200 = <920000>; opp-microvolt-vf0201 = <920000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@1008000000 { opp-hz = /bits/ 64 <1008000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <960000>; opp-microvolt-vf0200 = <960000>; opp-microvolt-vf0201 = <960000>; opp-microvolt-vf0300 = <920000>; opp-microvolt-vf0301 = <920000>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <920000>; }; opp@1032000000 { opp-hz = /bits/ 64 <1032000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <920000>; opp-microvolt-vf0500 = <0>; }; opp@1104000000 { opp-hz = /bits/ 64 <1104000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <1000000>; opp-microvolt-vf0200 = <1000000>; opp-microvolt-vf0201 = <1000000>; opp-microvolt-vf0300 = <960000>; opp-microvolt-vf0301 = <960000>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <960000>; }; opp@1128000000 { opp-hz = /bits/ 64 <1128000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <1000000>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <960000>; opp-microvolt-vf0500 = <0>; }; opp@1224000000 { opp-hz = /bits/ 64 <1224000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <1050000>; opp-microvolt-vf0100 = <1050000>; opp-microvolt-vf0200 = <1050000>; opp-microvolt-vf0201 = <1050000>; opp-microvolt-vf0300 = <1000000>; opp-microvolt-vf0301 = <1000000>; opp-microvolt-vf0400 = <1000000>; opp-microvolt-vf0500 = <1000000>; }; opp@1296000000 { opp-hz = /bits/ 64 <1296000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <1100000>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <0>; }; opp@1320000000 { opp-hz = /bits/ 64 <1320000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <1120000>; opp-microvolt-vf0200 = <1120000>; opp-microvolt-vf0201 = <1120000>; opp-microvolt-vf0300 = <1050000>; opp-microvolt-vf0301 = <1050000>; opp-microvolt-vf0400 = <1050000>; opp-microvolt-vf0500 = <1050000>; }; opp@1416000000 { opp-hz = /bits/ 64 <1416000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <1150000>; opp-microvolt-vf0100 = <1150000>; opp-microvolt-vf0200 = <1150000>; opp-microvolt-vf0201 = <1150000>; opp-microvolt-vf0300 = <1100000>; opp-microvolt-vf0301 = <1100000>; opp-microvolt-vf0400 = <1100000>; opp-microvolt-vf0500 = <1100000>; }; }; cluster1_opp_table: cluster1-opp-table { compatible = "allwinner,sun50i-operating-points"; opp-shared; opp@408000000 { opp-hz = /bits/ 64 <408000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <900000>; opp-microvolt-vf0100 = <900000>; opp-microvolt-vf0200 = <900000>; opp-microvolt-vf0201 = <900000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@672000000 { opp-hz = /bits/ 64 <672000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <900000>; opp-microvolt-vf0200 = <900000>; opp-microvolt-vf0201 = <900000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@720000000 { opp-hz = /bits/ 64 <720000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <900000>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <0>; }; opp@840000000 { opp-hz = /bits/ 64 <840000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <900000>; opp-microvolt-vf0200 = <900000>; opp-microvolt-vf0201 = <900000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@1008000000 { opp-hz = /bits/ 64 <1008000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <900000>; opp-microvolt-vf0200 = <900000>; opp-microvolt-vf0201 = <900000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@1200000000 { opp-hz = /bits/ 64 <1200000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <920000>; opp-microvolt-vf0200 = <920000>; opp-microvolt-vf0201 = <920000>; opp-microvolt-vf0300 = <920000>; opp-microvolt-vf0301 = <920000>; opp-microvolt-vf0400 = <920000>; opp-microvolt-vf0500 = <920000>; }; opp@1248000000 { opp-hz = /bits/ 64 <1248000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <900000>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <0>; }; opp@1344000000 { opp-hz = /bits/ 64 <1344000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <960000>; opp-microvolt-vf0200 = <960000>; opp-microvolt-vf0201 = <960000>; opp-microvolt-vf0300 = <960000>; opp-microvolt-vf0301 = <960000>; opp-microvolt-vf0400 = <960000>; opp-microvolt-vf0500 = <960000>; }; opp@1488000000 { opp-hz = /bits/ 64 <1488000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <1000000>; opp-microvolt-vf0100 = <1000000>; opp-microvolt-vf0200 = <1000000>; opp-microvolt-vf0201 = <1000000>; opp-microvolt-vf0300 = <1000000>; opp-microvolt-vf0301 = <1000000>; opp-microvolt-vf0400 = <1000000>; opp-microvolt-vf0500 = <1000000>; }; opp@1584000000 { opp-hz = /bits/ 64 <1584000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <1050000>; opp-microvolt-vf0100 = <1050000>; opp-microvolt-vf0200 = <1050000>; opp-microvolt-vf0201 = <1050000>; opp-microvolt-vf0300 = <1050000>; opp-microvolt-vf0301 = <1050000>; opp-microvolt-vf0400 = <1050000>; opp-microvolt-vf0500 = <1050000>; }; opp@1680000000 { opp-hz = /bits/ 64 <1680000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <1100000>; opp-microvolt-vf0100 = <1100000>; opp-microvolt-vf0200 = <1100000>; opp-microvolt-vf0201 = <1100000>; opp-microvolt-vf0300 = <1100000>; opp-microvolt-vf0301 = <1100000>; opp-microvolt-vf0400 = <1100000>; opp-microvolt-vf0500 = <0>; }; opp@1800000000 { opp-hz = /bits/ 64 <1800000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <1150000>; opp-microvolt-vf0100 = <1150000>; opp-microvolt-vf0200 = <1150000>; opp-microvolt-vf0201 = <1150000>; opp-microvolt-vf0300 = <1150000>; opp-microvolt-vf0301 = <1150000>; opp-microvolt-vf0400 = <1150000>; opp-microvolt-vf0500 = <0>; }; opp@1992000000 { opp-hz = /bits/ 64 <1992000000>; clock-latency-ns = <244144>; /* 8 32k periods */ opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <1220000>; opp-microvolt-vf0500 = <0>; }; }; dsufreq: dsufreq@0 { compatible = "allwinner,sun55iw3-dsufreq"; reg = <0x0 0x08815000 0x0 0x1000>; clocks = <&cpupll_ccu CLK_PLL_CPU2>; operating-points-v2 = <&dsu_opp_table>; }; dsu_opp_table: dsu-opp-table { compatible = "allwinner,dsu-operating-points"; opp@288000000 { opp-hz = /bits/ 64 <288000000>; opp-microvolt-vf0000 = <900000>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <0>; }; opp@408000000 { opp-hz = /bits/ 64 <408000000>; opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <900000>; opp-microvolt-vf0200 = <900000>; opp-microvolt-vf0201 = <900000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@528000000 { opp-hz = /bits/ 64 <528000000>; opp-microvolt-vf0000 = <900000>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <0>; }; opp@600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <900000>; opp-microvolt-vf0200 = <900000>; opp-microvolt-vf0201 = <900000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@696000000 { opp-hz = /bits/ 64 <696000000>; opp-microvolt-vf0000 = <900000>; opp-microvolt-vf0100 = <900000>; opp-microvolt-vf0200 = <900000>; opp-microvolt-vf0201 = <900000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@792000000 { opp-hz = /bits/ 64 <792000000>; opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <920000>; opp-microvolt-vf0200 = <920000>; opp-microvolt-vf0201 = <920000>; opp-microvolt-vf0300 = <900000>; opp-microvolt-vf0301 = <900000>; opp-microvolt-vf0400 = <900000>; opp-microvolt-vf0500 = <900000>; }; opp@864000000 { opp-hz = /bits/ 64 <864000000>; opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <960000>; opp-microvolt-vf0200 = <960000>; opp-microvolt-vf0201 = <960000>; opp-microvolt-vf0300 = <920000>; opp-microvolt-vf0301 = <920000>; opp-microvolt-vf0400 = <920000>; opp-microvolt-vf0500 = <920000>; }; opp@936000000 { opp-hz = /bits/ 64 <936000000>; opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <1000000>; opp-microvolt-vf0200 = <1000000>; opp-microvolt-vf0201 = <1000000>; opp-microvolt-vf0300 = <960000>; opp-microvolt-vf0301 = <960000>; opp-microvolt-vf0400 = <960000>; opp-microvolt-vf0500 = <960000>; }; opp@984000000 { opp-hz = /bits/ 64 <984000000>; opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <1050000>; opp-microvolt-vf0200 = <1050000>; opp-microvolt-vf0201 = <1050000>; opp-microvolt-vf0300 = <1000000>; opp-microvolt-vf0301 = <1000000>; opp-microvolt-vf0400 = <1000000>; opp-microvolt-vf0500 = <1000000>; }; opp@1008000000 { opp-hz = /bits/ 64 <1008000000>; opp-microvolt-vf0000 = <1000000>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <0>; }; opp@1056000000 { opp-hz = /bits/ 64 <1056000000>; opp-microvolt-vf0000 = <0>; opp-microvolt-vf0100 = <1100000>; opp-microvolt-vf0200 = <1100000>; opp-microvolt-vf0201 = <1100000>; opp-microvolt-vf0300 = <1050000>; opp-microvolt-vf0301 = <1050000>; opp-microvolt-vf0400 = <1050000>; opp-microvolt-vf0500 = <1050000>; }; opp@1104000000 { opp-hz = /bits/ 64 <1104000000>; opp-microvolt-vf0000 = <1050000>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <0>; }; opp@1128000000 { opp-hz = /bits/ 64 <1128000000>; opp-microvolt-vf0000 = <1100000>; opp-microvolt-vf0100 = <0>; opp-microvolt-vf0200 = <0>; opp-microvolt-vf0201 = <0>; opp-microvolt-vf0300 = <0>; opp-microvolt-vf0301 = <0>; opp-microvolt-vf0400 = <0>; opp-microvolt-vf0500 = <0>; }; opp@1152000000 { opp-hz = /bits/ 64 <1152000000>; opp-microvolt-vf0000 = <1150000>; opp-microvolt-vf0100 = <1150000>; opp-microvolt-vf0200 = <1150000>; opp-microvolt-vf0201 = <1150000>; opp-microvolt-vf0300 = <1100000>; opp-microvolt-vf0301 = <1100000>; opp-microvolt-vf0400 = <1100000>; opp-microvolt-vf0500 = <1100000>; }; }; thermal-zones { cpul_thermal_zone: cpul_thermal_zone { polling-delay-passive = <100>; polling-delay = <1000>; thermal-sensors = <&ths1 1>; sustainable-power = <1200>; cpul_trips: trips { cpul_threshold: trip-point@0 { temperature = <70000>; type = "passive"; hysteresis = <0>; }; cpul_target: trip-point@1 { temperature = <90000>; type = "passive"; hysteresis = <0>; }; cpul_crit: cpu_crit@0 { temperature = <110000>; type = "critical"; hysteresis = <0>; }; }; cooling-maps { map0 { trip = <&cpul_target>; cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; contribution = <1024>; }; }; }; cpub_thermal_zone: cpub_thermal_zone { polling-delay-passive = <100>; polling-delay = <1000>; thermal-sensors = <&ths1 0>; sustainable-power = <1600>; cpub_trips: trips { cpub_threshold: trip-point@0 { temperature = <70000>; type = "passive"; hysteresis = <0>; }; cpub_target: trip-point@1 { temperature = <90000>; type = "passive"; hysteresis = <0>; }; cpub_crit: cpu_crit@0 { temperature = <110000>; type = "critical"; hysteresis = <0>; }; }; cooling-maps { map0 { trip = <&cpub_target>; cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; contribution = <1024>; }; }; }; gpu_thermal_zone: gpu_thermal_zone { polling-delay-passive = <100>; polling-delay = <1000>; thermal-sensors = <&ths1 2>; sustainable-power = <2400>; gpu_trips: trips { gpu_threshold: trip-point@0 { temperature = <60000>; type = "passive"; hysteresis = <0>; }; gpu_target: trip-point@1 { temperature = <90000>; type = "passive"; hysteresis = <0>; }; gpu_crit: gpu_crit@0 { temperature = <110000>; type = "critical"; hysteresis = <0>; }; }; cooling-maps { map0 { trip = <&gpu_target>; cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; contribution = <1024>; }; }; }; npu_thermal_zone { polling-delay-passive = <100>; polling-delay = <1000>; thermal-sensors = <&ths1 3>; }; ddr_thermal_zone { polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths0 0>; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; }; dcxo24M: dcxo24M_clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; clock-output-names = "dcxo24M"; }; rc_16m: rc16m_clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <16000000>; clock-accuracy = <300000000>; clock-output-names = "rc-16m"; }; ext_32k: ext32k_clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; clock-output-names = "ext-32k"; }; gic: interrupt-controller@3400000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x0 0x03400000 0 0x10000>, /* GIC Dist */ <0x0 0x03460000 0 0xFF004>; /* GIC Re */ interrupt-parent = <&gic>; }; wakeupgen: interrupt-controller@0 { compatible = "allwinner,sunxi-wakeupgen"; interrupt-controller; #interrupt-cells = <3>; #address-cells = <0>; interrupt-parent = <&gic>; }; timer_arch { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; clock-frequency = <24000000>; interrupt-parent = <&gic>; arm,no-tick-in-suspend; }; power: power-management@7001400 { compatible = "allwinner,a523-pmu", "syscon", "simple-mfd"; reg = <0x0 0x07001400 0x0 0x400>; pd: power-controller { compatible = "allwinner,a523-power-controller"; clocks = <&r_ccu CLK_R_PPU1>; clock-names = "ppu"; resets = <&r_ccu RST_R_PPU1>; reset-names = "ppu_rst"; #power-domain-cells = <1>; #address-cells = <1>; #size-cells = <0>; pd_dsp@A523_PD_DSP { reg = <A523_PD_DSP>; ppu-always-on; }; pd_npu@A523_PD_NPU { reg = <A523_PD_NPU>; }; pd_sram@A523_PD_SRAM { reg = <A523_PD_SRAM>; ppu-always-on; }; pd_riscv@A523_PD_RISCV { reg = <A523_PD_RISCV>; }; }; }; pck: pck-600@7060000 { compatible = "allwinner,a523-pck", "syscon", "simple-mfd"; reg = <0x0 0x07060000 0x0 0x8000>; pd1: power-controller { compatible = "allwinner,a523-pck-600"; clocks = <&r_ccu CLK_R_PPU>; clock-names = "pck"; resets = <&r_ccu RST_R_PPU>; reset-names = "pck_rst"; #power-domain-cells = <1>; #address-cells = <1>; #size-cells = <0>; pd1_ve@A523_PCK_VE { reg = <A523_PCK_VE>; }; pd1_vi@A523_PCK_VI { reg = <A523_PCK_VI>; }; pd1_vo0@A523_PCK_VO0 { reg = <A523_PCK_VO0>; }; pd1_vo1@A523_PCK_VO1 { reg = <A523_PCK_VO1>; }; pd1_de@A523_PCK_DE { reg = <A523_PCK_DE>; }; pd1_nand@A523_PCK_NAND { reg = <A523_PCK_NAND>; }; pd1_pcie@A523_PCK_PCIE { reg = <A523_PCK_PCIE>; }; }; }; nmi_intc: intc-nmi@7010320 { compatible = "allwinner,sun8i-nmi"; interrupt-parent = <&gic>; #interrupt-cells = <2>; #address-cells = <0>; interrupt-controller; reg = <0x0 0x07010320 0 0xc>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; }; mmu_aw: iommu@2010000 { compatible = "allwinner,iommu-v15-sun55iw3"; reg = <0x0 0x02010000 0x0 0x1000>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "iommu-irq"; clocks = <&ccu CLK_IOMMU>; clock-names = "iommu"; /* clock-frequency = <24000000>; */ #iommu-cells = <2>; }; dram: dram { compatible = "allwinner,dram"; clocks = <&ccu CLK_PLL_DDR>; clock-names = "pll_ddr"; }; ddr_clk: clk_ddr { compatible = "allwinner,clock_ddr"; reg = <0x0 0x02001000 0x0 0x1000>; clocks = <&ccu CLK_PLL_DDR>; clock-names = "pll_ddr"; #clock-cells = <0>; }; dram_opp_table: opp_table { compatible = "operating-points-v2"; opp@150000000 { opp-hz = /bits/ 64 <150000000>; clock-latency-ns = <150000>; opp-microvolt = <900000>; }; }; sunxi_dmcfreq: dmcfreq@3120000 { compatible = "allwinner,sun55iw3-dmc", "syscon"; reg = <0x0 0x03120000 0x0 0x11000>, <0x0 0x02020000 0x0 0x4000>; interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ddr_clk>, <&ccu CLK_NSI>; clock-names = "dram", "bus"; operating-points-v2 = <&dram_opp_table>; upthreshold = <60>; downdifferential = <20>; vddcore-supply = <®_vdd_sys>; normalvoltage = <900000>; boostvoltage = <900000>; }; soc: soc@3000000 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; rt-media@1c0e000 { compatible = "allwinner,rt-media"; }; ve: ve@1c0e000 { compatible = "allwinner,sunxi-cedar-ve"; reg = <0x0 0x01c0e000 0x0 0x1000>, <0x0 0x03000000 0x0 0x10>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; clocks =<&ccu CLK_BUS_VE>, <&ccu CLK_VE>, <&ccu CLK_VE_MBUS_GATE>; clock-names = "bus_ve", "ve", "mbus_ve"; resets = <&ccu RST_BUS_VE>; reset-names = "reset_ve"; iommus = <&mmu_aw 2 1>; power-domains = <&pd1 A523_PCK_VE>; }; ve1: ve1@1c0e000 { compatible = "allwinner,sunxi-cedar-ve"; iommus = <&mmu_aw 3 1>; }; pd_ve_test: pd-ve-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd1 A523_PCK_VE>; status = "okay"; }; pd_vi_test: pd-vi-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd1 A523_PCK_VI>; status = "okay"; }; pd_vo0_test: pd-vo0-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd1 A523_PCK_VO0>; status = "okay"; }; pd_vo1_test: pd-vo1-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd1 A523_PCK_VO1>; status = "okay"; }; pd_de_test: pd-de-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd1 A523_PCK_DE>; status = "okay"; }; pd_nand_test: pd-nand-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd1 A523_PCK_NAND>; status = "okay"; }; pd_pcie_test: pd-pcie-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd1 A523_PCK_PCIE>; status = "okay"; }; pd_dsp_test: pd-dsp-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd A523_PD_DSP>; status = "okay"; }; pd_npu_test: pd-npu-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd A523_PD_NPU>; status = "okay"; }; pd_sram_test: pd-sram-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd A523_PD_SRAM>; status = "okay"; }; pd_riscv_test: pd-riscv-test@0 { compatible = "allwinner,sunxi-power-domain-test"; reg = <0x0 0x0 0x0 0x0>; power-domains = <&pd A523_PD_RISCV>; status = "okay"; }; test_ccu: test_ccu@3000090 { compatible = "allwinner,sun55iw3-test-ccu"; device_type = "ccu-test"; resets = <&ccu RST_BUS_UART7>, <&ccu RST_BUS_UART6>; reset-names = "rst-uart7", "rst-uart6"; reg = <0x0 0x3000090 0x0 0x8>; #clock-cells = <1>; }; rtc_ccu: rtc_ccu@7090000 { compatible = "allwinner,sun55iw3-rtc-ccu"; reg = <0x0 0x07090000 0x0 0x400>; #clock-cells = <1>; #reset-cells = <1>; }; cpupll_ccu: clock@8817000 { compatible = "allwinner,sun55iw3-cpupll"; reg = <0x0 0x08817000 0x0 0x4000>; #clock-cells = <1>; #reset-cells = <1>; pll_step = <0x9>; /* pll_ssc will divid pll_ssc_scale in code * keep value 0 < pll_ssc < 10 */ pll_ssc_scale = <0xa>; pll_ssc = <0x1>; }; ccu: ccu@2001000 { compatible = "allwinner,sun55iw3-ccu"; reg = <0x0 0x02001000 0x0 0x1000>; clocks = <&dcxo24M>, <&rtc_ccu CLK_OSC32K>, <&rc_16m>; clock-names = "hosc", "losc", "iosc"; #clock-cells = <1>; #reset-cells = <1>; /* * sdm info: * for example: * pll_npux4 { * sdm-enable = <1>; // required * sdm-factor = <4>; // required * freq-mod = <TR_N>; // optional: default TR_N * sdm-freq = <FREQ_32>; // optional: default FREQ_31_5 * }; */ }; r_ccu: r_ccu@7010000 { compatible = "allwinner,sun55iw3-r-ccu"; reg = <0x0 0x07010000 0x0 0x230>; #clock-cells = <1>; #reset-cells = <1>; }; mcu_ccu: mcu_ccu@7102000 { compatible = "allwinner,sun55iw3-mcu-ccu"; reg = <0x0 0x07102000 0x0 0x165>; #clock-cells = <1>; #reset-cells = <1>; }; disp: disp@5000000 { compatible = "allwinner,sunxi-disp"; reg = <0x0 0x05000000 0x0 0x400000>, /*de*/ <0x0 0x05500000 0x0 0x1000>, /* display_if_top */ <0x0 0x05501000 0x0 0x1000>, /* tcon0 - tcon_lcd0 */ <0x0 0x05502000 0x0 0x1000>, /* tcon1 - tcon_lcd1 */ <0x0 0x05503000 0x0 0x1000>, /* tcon2 - tcon_tv0 */ <0x0 0x05504000 0x0 0x1000>, /* tcon3 - tcon_tv1 */ <0x0 0x05731000 0x0 0x1000>, /* tcon4 - tcon_lcd2 */ <0x0 0x05506000 0x0 0x1fff>, /* dsi0 */ <0x0 0x05508000 0x0 0x1fff>; /* dsi1 */ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* DE */ <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* tcon_lcd0 */ <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, /* tcon_lcd1 */ <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, /* tcon_tv0 */ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* tcon_tv1 */ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, /* tcon_lcd2 */ <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, /* dsi0 */ <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; /* dsi1 */ clocks = <&ccu CLK_DE>, <&ccu CLK_DE>, <&ccu CLK_DE0>, <&ccu CLK_DE0>, <&ccu CLK_VO0_TCONLCD0>, <&ccu CLK_VO0_TCONLCD1>, <&ccu CLK_TCONTV>, <&ccu CLK_TCONTV1>, <&ccu CLK_VO1_TCONLCD0>, <&ccu CLK_BUS_VO0_TCONLCD0>, <&ccu CLK_BUS_VO0_TCONLCD1>, <&ccu CLK_BUS_TCONTV>, <&ccu CLK_BUS_TCONTV1>, <&ccu CLK_BUS_VO1_TCONLCD0>, <&ccu CLK_DPSS_TOP0>, <&ccu CLK_DPSS_TOP0>, <&ccu CLK_DPSS_TOP0>, <&ccu CLK_DPSS_TOP0>, <&ccu CLK_DPSS_TOP1>, <&ccu CLK_DSI0>, <&ccu CLK_DSI1>, <&ccu CLK_BUS_DSI0>, <&ccu CLK_BUS_DSI1>, <&ccu CLK_COMBPHY0>, <&ccu CLK_COMBPHY1>; clock-names = "clk_de0", "clk_de1", "clk_bus_de0", "clk_bus_de1", "clk_tcon0", "clk_tcon1", "clk_tcon2", "clk_tcon3", "clk_tcon4", "clk_bus_tcon0", "clk_bus_tcon1", "clk_bus_tcon2", "clk_bus_tcon3", "clk_bus_tcon4", "clk_bus_dpss_top0", "clk_bus_dpss_top1", "clk_bus_dpss_top2", "clk_bus_dpss_top3", "clk_bus_dpss_top4", "clk_mipi_dsi0", "clk_mipi_dsi1", "clk_bus_mipi_dsi0", "clk_bus_mipi_dsi1", "clk_mipi_dsi_combphy0", "clk_mipi_dsi_combphy1"; resets = <&ccu RST_BUS_DE0>, <&ccu RST_BUS_DE0>, <&ccu RST_BUS_VO0_TCONLCD0>, <&ccu RST_BUS_VO0_TCONLCD1>, <&ccu RST_BUS_TCONTV>, <&ccu RST_BUS_TCONTV1>, <&ccu RST_BUS_VO1_TCONLCD0>, <&ccu RST_BUS_LVDS0>, <&ccu RST_BUS_LVDS1>, <&ccu RST_BUS_DPSS_TOP0>, <&ccu RST_BUS_DPSS_TOP0>, <&ccu RST_BUS_DPSS_TOP0>, <&ccu RST_BUS_DPSS_TOP0>, <&ccu RST_BUS_DPSS_TOP1>, <&ccu RST_BUS_DSI0>, <&ccu RST_BUS_DSI1>; reset-names = "rst_bus_de0", "rst_bus_de1", "rst_bus_tcon0", "rst_bus_tcon1", "rst_bus_tcon2", "rst_bus_tcon3", "rst_bus_tcon4", "rst_bus_lvds0", "rst_bus_lvds1", "rst_bus_dpss_top0", "rst_bus_dpss_top1", "rst_bus_dpss_top2", "rst_bus_dpss_top3", "rst_bus_dpss_top4", "rst_bus_mipi_dsi0", "rst_bus_mipi_dsi1"; assigned-clocks = <&ccu CLK_DE>, <&ccu CLK_VO0_TCONLCD0>, <&ccu CLK_VO0_TCONLCD1>, <&ccu CLK_VO1_TCONLCD0>, <&ccu CLK_BUS_TCONTV>, <&ccu CLK_TCONTV>, <&ccu CLK_TCONTV1>, <&ccu CLK_DSI0>, <&ccu CLK_DSI1>, <&ccu CLK_COMBPHY0>, <&ccu CLK_COMBPHY1>; assigned-clock-parents = <&ccu CLK_PLL_VIDEO3_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_PERI0_150M>, <&ccu CLK_PLL_PERI0_150M>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO0_4X>; assigned-clock-rates = <600000000>; iommus = <&mmu_aw 5 0>; /*power-domains = <&pd1 A523_PCK_DE>, <&pd1 A523_PCK_VO0>, <&pd1 A523_PCK_VO1>; power-domain-names = "pd_de", "pd_vo0", "pd_vo1";*/ power-domains = <&pd1 A523_PCK_DE>, <&pd1 A523_PCK_VO0>; power-domain-names = "pd_de", "pd_vo0"; status = "okay"; boot_disp = <0>; fb_base = <0>; }; hdmi: hdmi@5520000 { compatible = "allwinner,sunxi-hdmi"; reg = <0x0 0x05520000 0x0 0x100000>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_HDMI>, <&ccu CLK_HDMI_24M>, <&ccu CLK_HDMI_CEC>, <&ccu CLK_TCONTV>; clock-names = "clk_hdmi", "clk_hdmi_24M", "clk_cec", "clk_tcon_tv"; resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDMI_MAIN>; reset-names = "rst_bus_sub", "rst_bus_main"; assigned-clocks = <&ccu CLK_HDMI>; assigned-clock-rates = <0>, <0>; status = "okay"; }; edp0: edp0@5720000 { compatible = "allwinner,sunxi-edp0"; reg = <0x0 0x05720000 0x0 0x4000>; interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_EDP>, <&ccu CLK_EDP>, <&ccu CLK_HDMI_24M>; clock-names = "clk_bus_edp", "clk_edp", "edp_clk_24m"; resets = <&ccu RST_BUS_EDP>; reset-names = "rst_bus_edp"; assigned-clocks = <&ccu CLK_EDP>; assigned-clock-parents = <&ccu CLK_PLL_VIDEO1_4X>; status = "disabled"; }; lcd0: lcd0@1c0c000 { compatible = "allwinner,sunxi-lcd0"; /* Fake registers to avoid dtc compiling warnings */ reg = <0x0 0x1c0c000 0x0 0x0>; pinctrl-names = "active","sleep"; }; lcd1: lcd1@1c0c000 { compatible = "allwinner,sunxi-lcd1"; /* Fake registers to avoid dtc compiling warnings */ reg = <0x0 0x1c0c000 0x0 0x0>; pinctrl-names = "active","sleep"; }; lcd2: lcd2@1c0c000 { compatible = "allwinner,sunxi-lcd2"; /* Fake registers to avoid dtc compiling warnings */ reg = <0x0 0x1c0c000 0x0 0x0>; pinctrl-names = "active","sleep"; }; r_pio: pinctrl@7022000 { #address-cells = <1>; compatible = "allwinner,sun55iw3-r-pinctrl"; reg = <0x0 0x07022000 0x0 0x800>, <0x0 0x07010374 0x0 0x4>, <0x0 0x07010378 0x0 0x4>; /* * The reg control i2s0/dmic routes to cpus-pad or sys-pad * 0: use cpus pad, 1: use sys pad */ reg-names = "r-pio", "i2s0", "dmic"; interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>, /* GPIOL */ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; /* GPIOM */ clocks = <&ccu CLK_R_APBS1>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; interrupt-controller; #interrupt-cells = <3>; }; g2d: g2d@5440000 { compatible = "allwinner,sunxi-g2d"; reg = <0x0 0x05440000 0x0 0x30000>; interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_G2D>, <&ccu CLK_G2D>; clock-names = "bus", "g2d"; resets = <&ccu RST_BUS_G2D>; iommus = <&mmu_aw 4 1>; power-domains = <&pd1 A523_PCK_VO0>; power-domain-names = "pd1_vo0"; assigned-clocks = <&ccu CLK_G2D>; assigned-clock-rates = <300000000>; }; pio: pinctrl@2000000 { #address-cells = <1>; compatible = "allwinner,sun55iw3-pinctrl"; /* * The reg control i2s0/dmic routes to cpus-pad or sys-pad * 0: use cpus pad, 1: use sys pad */ reg = <0x0 0x02000000 0x0 0x800>, <0x0 0x07010374 0x0 0x4>, <0x0 0x07010378 0x0 0x4>; reg-names = "pio", "i2s0", "dmic"; interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, /* GPIOB */ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, /* GPIOC */ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, /* GPIOD */ <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, /* GPIOE */ <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, /* GPIOF */ <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, /* GPIOG */ <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>, /* GPIOH */ <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, /* GPIOI */ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, /* GPIOJ */ <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; /* GPIOK */ clocks = <&ccu CLK_APB1>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; interrupt-controller; #interrupt-cells = <3>; sdc0_pins_a: sdc0@0 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "sdc0"; drive-strength = <40>; bias-pull-up; power-source = <3300>; }; sdc0_pins_b: sdc0@1 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "sdc0"; drive-strength = <40>; bias-pull-up; power-source = <1800>; }; sdc0_pins_c: sdc0@2 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "gpio_in"; power-source = <3300>; }; /* TODO: add jtag pin */ sdc0_pins_d: sdc0@3 { pins = "PF2", "PF4"; function = "uart0"; drive-strength = <10>; bias-pull-up; power-source = <3300>; }; sdc0_pins_e: sdc0@4 { pins = "PF0", "PF1", "PF3", "PF5"; function = "jtag"; drive-strength = <10>; bias-pull-up; power-source = <3300>; }; sdc1_pins_a: sdc1@0 { pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; function = "sdc1"; drive-strength = <40>; bias-pull-up; }; sdc1_pins_b: sdc1@1 { pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; function = "gpio_in"; }; sdc2_pins_a: sdc2@0 { pins = "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16"; function = "sdc2"; drive-strength = <40>; bias-pull-up; }; sdc2_pins_b: sdc2@1 { pins = "PC0", "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16"; function = "gpio_in"; }; sdc2_pins_c: sdc2@2 { pins = "PC0"; function = "sdc2"; drive-strength = <40>; bias-pull-down; }; uart1_pins_a: uart1@0 { pins = "PG6", "PG7", "PG8", "PG9"; function = "uart1"; drive-strength = <10>; bias-pull-up; }; uart1_pins_b: uart1@1 { pins = "PG6", "PG7", "PG8", "PG9"; function = "gpio_in"; }; dsi0_4lane_pins_a: dsi0_4lane@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "dsi0"; drive-strength = <30>; bias-disable; }; dsi0_4lane_pins_b: dsi0_4lane@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "io_disabled"; bias-disable; }; dsi1_4lane_pins_a: dsi1_4lane@0 { pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; function = "dsi1"; drive-strength = <30>; bias-disable; }; dsi1_4lane_pins_b: dsi1_4lane@1 { pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; function = "io_disabled"; bias-disable; }; rgb18_pins_a: rgb18@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ "PD20", "PD21"; function = "lcd0"; drive-strength = <30>; }; rgb18_pins_b: rgb18@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ "PD20", "PD21"; function = "gpio_in"; }; lvds1_pins_a: lvds1@0 { pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; function = "lvds1"; drive-strength = <30>; }; lvds1_pins_b: lvds1@1 { pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; function = "gpio_in"; }; lvds2_pins_a: lvds2@0 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9"; function = "lvds2"; drive-strength = <30>; }; lvds2_pins_b: lvds2@1 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9"; function = "gpio_in"; }; lvds3_pins_a: lvds3@0 { pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19"; function = "lvds3"; drive-strength = <30>; }; lvds3_pins_b: lvds3@1 { pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19"; function = "gpio_in"; }; /* csi_mclk0_pins_a: csi_mclk0@0 { pins = "PE0"; function = "mipi0"; drive-strength = <20>; }; csi_mclk0_pins_b: csi_mclk0@1 { pins = "PE0"; function = "gpio_in"; }; */ csi_mclk1_pins_a: csi_mclk1@0 { pins = "PE5"; function = "mipi1"; drive-strength = <20>; }; csi_mclk1_pins_b: csi_mclk1@1 { pins = "PE5"; function = "gpio_in"; }; csi_mclk2_pins_a: csi_mclk2@0 { pins = "PE15"; function = "mipi2"; drive-strength = <20>; }; csi_mclk2_pins_b: csi_mclk2@1 { pins = "PE15"; function = "gpio_in"; }; csi_mclk3_pins_a: csi_mclk3@0 { pins = "PE10"; function = "mipi3"; drive-strength = <20>; }; csi_mclk3_pins_b: csi_mclk3@1 { pins = "PE10"; function = "gpio_in"; }; ncsi_bt656_pins_a: ncsi_BT656@0 { pins = "PK12", "PK14", "PK15", "PK16", "PK17", "PK18", "PK19", "PK20", "PK21", "PK22", "PK23"; function = "ncsi"; drive-strength = <20>; }; ncsi_bt656_pins_b: ncsi_BT656@1 { pins = "PK12", "PK14", "PK15", "PK16", "PK17", "PK18", "PK19", "PK20", "PK21", "PK22", "PK23"; function = "gpio_in"; }; ncsi_bt1120_pins_a: ncsi_BT1120@0 { pins = "PK12", "PK14", "PK15", "PK16", "PK17", "PK18", "PK19", "PK20", "PK21", "PK22", "PK23", "PE6", "PE7", "PE8", "PE9", "PE10", "PE11", "PE12", "PE15"; function = "ncsi"; drive-strength = <20>; }; ncsi_bt1120_pins_b: ncsi_BT1120@1 { pins = "PK12", "PK14", "PK15", "PK16", "PK17", "PK18", "PK19", "PK20", "PK21", "PK22", "PK23", "PE6", "PE7", "PE8", "PE9", "PE10", "PE11", "PE12", "PE15"; function = "gpio_in"; }; mipia_pins_a: mipia@0 { pins = "PK0", "PK1", "PK2", "PK3", "PK4", "PK5"; function = "mcsia"; drive-strength = <10>; }; mipia_pins_b: mipia@1 { pins = "PK0", "PK1", "PK2", "PK3", "PK4", "PK5"; function = "gpio_in"; }; mipib_pins_a: mipib@0 { pins = "PK6", "PK7", "PK8", "PK9", "PK10", "PK11"; function = "mcsib"; drive-strength = <10>; }; mipib_pins_b: mipib@1 { pins = "PK6", "PK7", "PK8", "PK9", "PK10", "PK11"; function = "gpio_in"; }; mipib_4lane_pins_a: mipib_4lane@0 { pins = "PK6", "PK7", "PK8", "PK9", "PK10", "PK11"; function = "mcsib"; drive-strength = <10>; }; mipib_4lane_pins_b: mipib_4lane@1 { pins = "PK6", "PK7", "PK8", "PK9", "PK10", "PK11"; function = "gpio_in"; }; mipic_pins_a: mipic@0 { pins = "PK12", "PK13", "PK14", "PK15", "PK16", "PK17"; function = "mcsic"; drive-strength = <10>; }; mipic_pins_b: mipic@1 { pins = "PK12", "PK13", "PK14", "PK15", "PK16", "PK17"; function = "gpio_in"; }; mipid_pins_a: mipid@0 { pins = "PK18", "PK19", "PK20", "PK21", "PK22", "PK23"; function = "mcsid"; drive-strength = <10>; }; mipid_pins_b: mipid@1 { pins = "PK18", "PK19", "PK20", "PK21", "PK22", "PK23"; function = "gpio_in"; }; mipid_4lane_pins_a: mipid_4lane@0 { pins = "PK18", "PK19", "PK20", "PK21", "PK22", "PK23"; function = "mcsid"; drive-strength = <10>; }; mipid_4lane_pins_b: mipid_4lane@1 { pins = "PK18", "PK19", "PK20", "PK21", "PK22", "PK23"; function = "gpio_in"; }; test_pins_a: test_pins@0 { pins = "PB2", "PB5"; function = "test"; drive-strength = <10>; bias-pull-up; }; test_pins_b: test_pins@1 { pins = "PB2", "PB5"; function = "gpio_in"; }; }; pinctrl_test: pinctrl_test@2000000 { reg = <0x0 0x0 0x0 0x0>; compatible = "allwinner,sunxi-pinctrl-test"; device_type = "pinctrl-test"; pinctrl-0 = <&test_pins_a>; pinctrl-1 = <&test_pins_b>; pinctrl-names = "default", "sleep"; test-gpios = <&pio PB 4 GPIO_ACTIVE_LOW>; suspend-gpios = <&r_pio PL 4 GPIO_ACTIVE_LOW>; wakeup-source; interrupt-parent = <&pio>; interrupts = <PB 6 IRQ_TYPE_LEVEL_HIGH>; }; ths0: ths0@200a000 { compatible = "allwinner,sun55iw3p1-ths0"; reg = <0x0 0x0200a000 0x0 0x400>; clocks = <&ccu CLK_THS>, <&ccu CLK_GPADC0_24M>; clock-names = "bus", "sclk"; resets = <&ccu RST_BUS_TH>; #thermal-sensor-cells = <1>; }; ths1: ths0@2009400 { compatible = "allwinner,sun55iw3p1-ths1"; reg = <0x0 0x02009400 0x0 0x400>; clocks = <&ccu CLK_THS>, <&ccu CLK_GPADC1_24M>; clock-names = "bus", "sclk"; resets = <&ccu RST_BUS_TH>; #thermal-sensor-cells = <1>; }; soc_timer0: timer@3008000 { compatible = "allwinner,sun50i-timer"; device_type = "soc_timer"; reg = <0x0 0x03008000 0x0 0x400>; interrupt-parent = <&gic>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; clock-names = "parent", "bus", "timer0-mod", "timer1-mod"; clocks = <&dcxo24M>, <&ccu CLK_TIMER>, <&ccu CLK_TIMER0>, <&ccu CLK_TIMER1>; resets = <&ccu RST_BUS_TIME>; }; arm_pmu { compatible = "arm,armv8-pmuv3"; interrupt-parent = <&gic>; interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; }; dump_reg:dump_reg@40000 { compatible = "allwinner,sunxi-dump-reg"; reg = <0x0 0x00040000 0x0 0x0004>; }; soft_jtag_master:soft_jtag_master@0 { compatible = "allwinner,soft-jtag-master"; tdi-gpios = <&r_pio PL 2 GPIO_ACTIVE_HIGH>; tdo-gpios = <&r_pio PL 3 GPIO_ACTIVE_HIGH>; tck-gpios = <&pio PB 11 GPIO_ACTIVE_HIGH>; tms-gpios = <&pio PB 12 GPIO_ACTIVE_HIGH>; status = "disabled"; }; reg_pio1_8: pio-18 { compatible = "regulator-fixed"; regulator-name = "pio-18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; reg_pio2_8: pio-28 { compatible = "regulator-fixed"; regulator-name = "pio-28"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; reg_pio3_3: pio-33 { compatible = "regulator-fixed"; regulator-name = "pio-33"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; uart0: uart@2500000 { compatible = "allwinner,sun55i-uart"; reg = <0x0 0x02500000 0x0 0x400>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_UART0>; resets = <&ccu RST_BUS_UART0>; uart0_port = <0>; uart0_type = <2>; status = "disabled"; }; uart1: uart@2500400 { compatible = "allwinner,sun55i-uart"; device_type = "uart1"; reg = <0x0 0x02500400 0x0 0x400>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; sunxi,uart-fifosize = <64>; clocks = <&ccu CLK_BUS_UART1>; clock-names = "uart1"; resets = <&ccu RST_BUS_UART1>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart1_pins_a>; pinctrl-1 = <&uart1_pins_b>; uart1_port = <1>; uart1_type = <4>; status = "disabled"; }; uart2: uart@2500800 { compatible = "allwinner,sun55i-uart"; reg = <0x0 0x2500800 0x0 0x400>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_UART2>; resets = <&ccu RST_BUS_UART2>; uart2_port = <2>; uart2_type = <4>; sunxi,uart-fifosize = <128>; status = "disabled"; }; uart3: uart@2500c00 { compatible = "allwinner,sun55i-uart"; reg = <0x0 0x2500c00 0x0 0x400>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_UART3>; resets = <&ccu RST_BUS_UART3>; uart3_port = <3>; uart3_type = <4>; sunxi,uart-fifosize = <128>; status = "disabled"; }; uart4: uart@2501000 { compatible = "allwinner,sun55i-uart"; reg = <0x0 0x2501000 0x0 0x400>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_UART4>; resets = <&ccu RST_BUS_UART4>; uart4_port = <4>; uart4_type = <4>; sunxi,uart-fifosize = <128>; status = "disabled"; }; uart5: uart@2501400 { compatible = "allwinner,sun55i-uart"; reg = <0x0 0x2501400 0x0 0x400>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_UART5>; resets = <&ccu RST_BUS_UART5>; uart5_port = <5>; uart5_type = <4>; sunxi,uart-fifosize = <128>; status = "disabled"; }; uart6: uart@2501800 { compatible = "allwinner,sun55i-uart"; reg = <0x0 0x2501800 0x0 0x400>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_UART6>; resets = <&ccu RST_BUS_UART6>; uart6_port = <6>; uart6_type = <4>; sunxi,uart-fifosize = <128>; status = "disabled"; }; uart7: uart@2501c00 { compatible = "allwinner,sun55i-uart"; reg = <0x0 0x2501c00 0x0 0x400>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_UART7>; resets = <&ccu RST_BUS_UART7>; uart7_port = <7>; uart7_type = <4>; sunxi,uart-fifosize = <128>; status = "disabled"; }; uart8: uart@7080000 { compatible = "allwinner,sun55i-uart"; reg = <0x0 0x7080000 0x0 0x400>; interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_BUS_R_UART0>; resets = <&r_ccu RST_R_UART0>; uart8_port = <8>; uart8_type = <2>; sunxi,uart-fifosize = <64>; status = "disabled"; }; uart9: uart@7080400 { compatible = "allwinner,sun55i-uart"; reg = <0x0 0x7080400 0x0 0x400>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_BUS_R_UART1>; resets = <&r_ccu RST_R_UART1>; uart9_port = <9>; uart9_type = <2>; sunxi,uart-fifosize = <64>; status = "disabled"; }; dma:dma-controller@3002000 { compatible = "allwinner,dma-v105"; reg = <0x0 0x03002000 0x0 0x1000>; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_DMA>, <&ccu CLK_DMA_MBUS_GATE>; clock-names = "bus", "mbus"; dma-channels = <8>; dma-requests = <54>; resets = <&ccu RST_BUS_DMA>; #dma-cells = <1>; status = "okay"; }; dma1:dma1-controller@7121000 { compatible = "allwinner,dma-v104"; reg = <0x0 0x7121000 0x0 0x1000>; interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mcu_ccu CLK_BUS_MCU_DMA>, <&mcu_ccu CLK_BUS_MCU_DMA_MBUS>, <&mcu_ccu CLK_BUS_MCU_MBUS>; clock-names = "bus", "mbus", "mcu-mbus"; dma-channels = <8>; dma-requests = <15>; resets = <&mcu_ccu RST_BUS_MCU_DMA>; #dma-cells = <1>; status = "okay"; }; npu: npu@7122000 { compatible = "allwinner,npu"; reg = <0x0 0x07122000 0x0 0x1000>; device_type = "npu"; dev_name = "npu"; interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_NPU>, <&ccu CLK_PLL_NPU_2X>, <&mcu_ccu CLK_BUS_MCU_NPU_ACLK>, <&mcu_ccu CLK_BUS_MCU_NPU_HCLK>; clock-names = "clk_npu", "clk_parent", "npu-aclk", "npu-hclk"; operating-points-v2 = <&npu_opp_table>; resets = <&mcu_ccu RST_BUS_MCU_NPU>; interrupt-names = "npu"; npu-vf = <1>; power-domains = <&pd A523_PD_NPU>; status = "okay"; }; npu_opp_table: npu-opp-table { compatible = "allwinner,sun55i-operating-points"; opp-shared; npu_opp_table_546: opp-546 { opp-hz = <546000000>; opp-microvolt-vf1 = <920000>; opp-microvolt-vf2 = <920000>; opp-microvolt-vf21 = <920000>; opp-microvolt-vf3 = <920000>; opp-microvolt-vf31 = <920000>; opp-microvolt-vf4 = <920000>; opp-microvolt-vf5 = <920000>; }; npu_opp_table_696: opp-696 { opp-hz = <696000000>; opp-microvolt-vf1 = <1050000>; opp-microvolt-vf2 = <1050000>; opp-microvolt-vf21 = <1050000>; opp-microvolt-vf3 = <1000000>; opp-microvolt-vf31 = <1000000>; opp-microvolt-vf4 = <1000000>; opp-microvolt-vf5 = <960000>; }; }; wdt: watchdog@2050000 { compatible = "allwinner,wdt-v103"; reg = <0x0 0x02050000 0x0 0x20>; /* In Timers Spec */ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; /* In GIC Spec */ }; gpadc0: gpadc0@2009000 { compatible = "allwinner,sunxi-gpadc"; reg = <0x0 0x02009000 0x0 0x400>; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_GPADC0>; clock-names = "bus"; resets = <&ccu RST_BUS_GPADC0>; status = "disabled"; }; gpadc1: gpadc1@2009c00 { compatible = "allwinner,sunxi-gpadc"; reg = <0x0 0x02009c00 0x0 0x400>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_GPADC1>; clock-names = "bus"; resets = <&ccu RST_BUS_GPADC1>; status = "disabled"; }; dsp0_rproc: dsp0_rproc@0 { compatible = "allwinner,hifi4-rproc"; clock-frequency = <600000000>; clocks = <&ccu CLK_PLL_PERI0_2X>, <&mcu_ccu CLK_DSP_DSP>, <&ccu CLK_DSP>, <&mcu_ccu CLK_BUS_DSP_CFG>, <&r_ccu CLK_R_AHB>; clock-names = "pll", "mcu-mod", "mod", "cfg", "ahbs"; resets = <&mcu_ccu RST_BUS_DSP>, <&mcu_ccu RST_BUS_DSP_CFG>, <&mcu_ccu RST_BUS_DSP_DBG>; reset-names = "mod-rst", "cfg-rst", "dbg-rst"; reg = <0x0 0x07010364 0x0 0x04>, <0x0 0x07100000 0x0 0x40>; reg-names = "sram-for-cpux", "hifi4-cfg"; firmware-name = "amp_dsp0.bin"; power-domains = <&pd A523_PD_DSP>, <&pd A523_PD_SRAM>; power-domain-names = "pd_dsp", "pd_sram"; status = "disabled"; }; e906_rproc: e906_rproc@7130000 { compatible = "allwinner,e906-rproc"; clocks = <&mcu_ccu CLK_BUS_PUBSRAM>, <&mcu_ccu CLK_BUS_RV>, <&mcu_ccu CLK_BUS_RV_CFG>; clock-names = "pubsram", "mod", "cfg"; resets = <&mcu_ccu RST_BUS_PUBSRAM>, <&mcu_ccu RST_BUS_RV>, <&mcu_ccu RST_BUS_RV_CFG>, <&mcu_ccu RST_BUS_RV_DBG>; reset-names = "pubsram-rst", "mod-rst", "cfg-rst", "dbg-rst"; firmware-name = "amp_rv0.bin"; reg = <0x0 0x07130000 0x0 0x1000>; reg-names = "e906-cfg"; power-domains = <&pd A523_PD_RISCV>, <&pd A523_PD_SRAM>; power-domain-names = "pd_riscv", "pd_sram"; status = "disabled"; }; msgbox: msgbox@3003000 { compatible = "allwinner,sun55iw3-msgbox"; #mbox-cells = <1>; reg = <0x0 0x03003000 0x0 0x1000>, <0x0 0x07120000 0x0 0x1000>, <0x0 0x07094000 0x0 0x1000>, <0x0 0x07136000 0x0 0x1000>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_MSGBOX0>; clock-names = "msgbox"; resets = <&ccu RST_BUS_MSGBOX0>; reset-names = "rst"; local_id = <0>; }; hwspinlock: hwspinlock@3005000 { compatible = "allwinner,sunxi-hwspinlock"; reg = <0x0 0x3005000 0x0 0x1000>; #hwlock-cells = <1>; clocks = <&ccu CLK_SPINLOCK>; clock-names = "clk_hwspinlock_bus"; resets = <&ccu RST_BUS_SPINLOCK>; reset-names = "rst"; num-locks = <32>; status = "okay"; }; pwm0: pwm0@2000c00 { #pwm-cells = <0x3>; compatible = "allwinner,sunxi-pwm-v201"; reg = <0x0 0x02000c00 0x0 0x400>; clocks = <&ccu CLK_PWM>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; resets = <&ccu RST_BUS_PWM>; pwm-number = <16>; pwm-base = <0x0>; sunxi-pwms = <&pwm0_0>, <&pwm0_1>, <&pwm0_2>, <&pwm0_3>, <&pwm0_4>, <&pwm0_5>, <&pwm0_6>, <&pwm0_7>, <&pwm0_8>, <&pwm0_9>, <&pwm0_10>, <&pwm0_11>, <&pwm0_12>, <&pwm0_13>, <&pwm0_14>, <&pwm0_15>; status = "okay"; }; pwm0_0: pwm0_0@2000c10 { compatible = "allwinner,sunxi-pwm0"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c10 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_1: pwm0_1@2000c11 { compatible = "allwinner,sunxi-pwm1"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c11 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_2: pwm0_2@2000c12 { compatible = "allwinner,sunxi-pwm2"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c12 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_3: pwm0_3@2000c13 { compatible = "allwinner,sunxi-pwm3"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c13 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_4: pwm0_4@2000c14 { compatible = "allwinner,sunxi-pwm4"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c14 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_5: pwm0_5@2000c15 { compatible = "allwinner,sunxi-pwm5"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c15 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_6: pwm0_6@2000c16 { compatible = "allwinner,sunxi-pwm6"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c16 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_7: pwm0_7@2000c17 { compatible = "allwinner,sunxi-pwm7"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c17 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_8: pwm0_8@2000c18 { compatible = "allwinner,sunxi-pwm8"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c18 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_9: pwm0_9@2000c19 { compatible = "allwinner,sunxi-pwm9"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c19 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_10: pwm0_10@2000c1a { compatible = "allwinner,sunxi-pwm10"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c1a 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_11: pwm0_11@2000c1b { compatible = "allwinner,sunxi-pwm11"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c1b 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_12: pwm0_12@2000c1c { compatible = "allwinner,sunxi-pwm12"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c1c 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_13: pwm0_13@2000c1d { compatible = "allwinner,sunxi-pwm13"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c1d 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_14: pwm0_14@2000c1e { compatible = "allwinner,sunxi-pwm14"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c1e 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm0_15: pwm0_15@2000c1f { compatible = "allwinner,sunxi-pwm15"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02000c1f 0x0 0x4>; reg_base = <0x02000c00>; status = "disabled"; }; pwm1: pwm1@2051000 { #pwm-cells = <0x3>; compatible = "allwinner,sunxi-pwm-v201"; reg = <0x0 0x02051000 0x0 0x400>; clocks = <&ccu CLK_PWM1>; interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; resets = <&ccu RST_BUS_PWM1>; pwm-number = <4>; pwm-base = <0x10>; sunxi-pwms = <&pwm1_0>, <&pwm1_1>, <&pwm1_2>, <&pwm1_3>; status = "disabled"; }; pwm1_0: pwm1_0@2051010 { compatible = "allwinner,sunxi-pwm16"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02051010 0x0 0x4>; reg_base = <0x02051000>; status = "disabled"; }; pwm1_1: pwm1_1@2051011 { compatible = "allwinner,sunxi-pwm17"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02051011 0x0 0x4>; reg_base = <0x02051000>; status = "disabled"; }; pwm1_2: pwm1_2@2051012 { compatible = "allwinner,sunxi-pwm18"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02051012 0x0 0x4>; reg_base = <0x02051000>; status = "disabled"; }; pwm1_3: pwm1_3@2051013 { compatible = "allwinner,sunxi-pwm19"; pinctrl-names = "active", "sleep"; reg = <0x0 0x02051013 0x0 0x4>; reg_base = <0x02051000>; status = "disabled"; }; s_pwm0: s_pwm0@7020c00 { #pwm-cells = <0x3>; compatible = "allwinner,sunxi-pwm-v202"; reg = <0x0 0x07020c00 0x0 0x400>; clocks = <&r_ccu CLK_R_PWM>,<&r_ccu CLK_BUS_R_PWM>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; clock-names = "clk_pwm","clk_bus_pwm"; resets = <&r_ccu RST_R_PWM>; pwm-number = <2>; pwm-base = <0x14>; sunxi-pwms = <&s_pwm0_0>, <&s_pwm0_1>; status = "disabled"; }; s_pwm0_0: s_pwm0_0@7020c10 { compatible = "allwinner,sunxi-pwm20"; pinctrl-names = "active", "sleep"; reg = <0x0 0x07020c10 0x0 0x4>; reg_base = <0x07020c00>; status = "disabled"; }; s_pwm0_1: s_pwm0_1@7020c11 { compatible = "allwinner,sunxi-pwm21"; pinctrl-names = "active", "sleep"; reg = <0x0 0x07020c11 0x0 0x4>; reg_base = <0x07020c00>; status = "disabled"; }; mcu_pwm0: mcu_pwm0@7103000 { #pwm-cells = <0x3>; compatible = "allwinner,sunxi-pwm-v202"; reg = <0x0 0x07103000 0x0 0x400>; clocks = <&mcu_ccu CLK_MCU_PWM>,<&mcu_ccu CLK_BUS_MCU_PWM>; interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; clock-names = "clk_pwm","clk_bus_pwm"; resets = <&mcu_ccu RST_BUS_MCU_PWM>; pwm-number = <8>; pwm-base = <0x16>; sunxi-pwms = <&mcu_pwm0_0>, <&mcu_pwm0_1>, <&mcu_pwm0_2>, <&mcu_pwm0_3>, <&mcu_pwm0_4>,<&mcu_pwm0_5>, <&mcu_pwm0_6>, <&mcu_pwm0_7>; status = "disabled"; }; mcu_pwm0_0: mcu_pwm0_0@7103010 { compatible = "allwinner,sunxi-pwm22"; pinctrl-names = "active", "sleep"; reg = <0x0 0x07103010 0x0 0x4>; reg_base = <0x07103000>; status = "disabled"; }; mcu_pwm0_1: mcu_pwm0_1@7103020 { compatible = "allwinner,sunxi-pwm23"; pinctrl-names = "active", "sleep"; reg = <0x0 0x07103020 0x0 0x4>; reg_base = <0x07103000>; status = "disabled"; }; mcu_pwm0_2: mcu_pwm0_2@7103030 { compatible = "allwinner,sunxi-pwm24"; pinctrl-names = "active", "sleep"; reg = <0x0 0x07103030 0x0 0x4>; reg_base = <0x07103000>; status = "disabled"; }; mcu_pwm0_3: mcu_pwm0_3@7103040 { compatible = "allwinner,sunxi-pwm25"; pinctrl-names = "active", "sleep"; reg = <0x0 0x07103040 0x0 0x4>; reg_base = <0x07103000>; status = "disabled"; }; mcu_pwm0_4: mcu_pwm0_4@7103050 { compatible = "allwinner,sunxi-pwm26"; pinctrl-names = "active", "sleep"; reg = <0x0 0x07103050 0x0 0x4>; reg_base = <0x07103000>; status = "disabled"; }; mcu_pwm0_5: mcu_pwm0_5@7103060 { compatible = "allwinner,sunxi-pwm27"; pinctrl-names = "active", "sleep"; reg = <0x0 0x07103060 0x0 0x4>; reg_base = <0x07103000>; status = "disabled"; }; mcu_pwm0_6: mcu_pwm0_6@7103070 { compatible = "allwinner,sunxi-pwm28"; pinctrl-names = "active", "sleep"; reg = <0x0 0x07103070 0x0 0x4>; reg_base = <0x07103000>; status = "disabled"; }; mcu_pwm0_7: mcu_pwm0_7@7103080 { compatible = "allwinner,sunxi-pwm29"; pinctrl-names = "active", "sleep"; reg = <0x0 0x07103080 0x0 0x4>; reg_base = <0x07103000>; status = "disabled"; }; ledc: ledc@2008000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-leds"; reg = <0x0 0x02008000 0x0 0x400>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_LEDC>, <&ccu CLK_BUS_LEDC>; clock-names = "clk_ledc", "clk_cpuapb"; resets = <&ccu RST_BUS_LEDC>; reset-names = "ledc_reset"; dmas = <&dma 42>, <&dma 42>; dma-names = "rx", "tx"; status = "disabled"; }; irrx: irrx@2005000 { compatible = "allwinner,irrx"; reg = <0x0 0x02005000 0x0 0x400>; interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_IRRX>, <&dcxo24M>, <&ccu CLK_IRRX>; clock-names = "bus", "pclk", "mclk"; resets = <&ccu RST_BUS_IRRX>; status = "disabled"; }; s_irrx: s_irrx@7040000 { compatible = "allwinner,irrx"; reg = <0x0 0x07040000 0x0 0x400>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_BUS_R_IRRX>, <&dcxo24M>, <&r_ccu CLK_R_IRRX>; clock-names = "bus", "pclk", "mclk"; resets = <&r_ccu RST_R_IRRX>; status = "disabled"; }; irtx: irtx@2003000 { compatible = "allwinner,irtx"; reg = <0x0 0x02003000 0x0 0x400>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_IRTX>, <&dcxo24M>, <&ccu CLK_IRTX>; clock-names = "bus", "pclk", "mclk"; resets = <&ccu RST_BUS_IRTX>; status = "disabled"; }; twi0: twi0@2502000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-twi-v101"; device_type = "twi0"; reg = <0x0 0x02502000 0x0 0x400>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_TWI0>; clock-names = "bus"; resets = <&ccu RST_BUS_TWI0>; dmas = <&dma 43>, <&dma 43>; dma-names = "tx", "rx"; status = "okay"; }; twi1: twi1@2502400 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-twi-v101"; device_type = "twi1"; reg = <0x0 0x02502400 0x0 0x400>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_TWI1>; clock-names = "bus"; resets = <&ccu RST_BUS_TWI1>; dmas = <&dma 44>, <&dma 44>; dma-names = "tx", "rx"; status = "disabled"; }; twi2: twi2@2502800 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-twi-v101"; device_type = "twi2"; reg = <0x0 0x02502800 0x0 0x400>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_TWI2>; clock-names = "bus"; resets = <&ccu RST_BUS_TWI2>; dmas = <&dma 45>, <&dma 45>; dma-names = "tx", "rx"; status = "disabled"; }; twi3: twi3@2502c00 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-twi-v101"; device_type = "twi3"; reg = <0x0 0x02502c00 0x0 0x400>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_TWI3>; clock-names = "bus"; resets = <&ccu RST_BUS_TWI3>; dmas = <&dma 46>, <&dma 46>; dma-names = "tx", "rx"; status = "disabled"; }; twi4: twi4@2503000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-twi-v101"; device_type = "twi4"; reg = <0x0 0x02503000 0x0 0x400>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_TWI4>; clock-names = "bus"; resets = <&ccu RST_BUS_TWI4>; dmas = <&dma 47>, <&dma 47>; dma-names = "tx", "rx"; status = "disabled"; }; twi5: twi5@2503400{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-twi-v101"; device_type = "twi5"; reg = <0x0 0x02503400 0x0 0x400>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_TWI5>; clock-names = "bus"; resets = <&ccu RST_BUS_TWI5>; dmas = <&dma 48>, <&dma 48>; dma-names = "tx", "rx"; status = "disabled"; }; twi6: s_twi0@7081400 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-twi-v101"; device_type = "twi6"; reg = <0x0 0x07081400 0x0 0x400>; interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_BUS_R_TWI0>; clock-names = "bus"; resets = <&r_ccu RST_R_TWI0>; dmas = <&dma1 9>, <&dma1 9>; dma-names = "tx", "rx"; status = "disabled"; }; twi7: s_twi1@7081800 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-twi-v101"; device_type = "twi7"; reg = <0x0 0x07081800 0x0 0x400>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_BUS_R_TWI1>; clock-names = "bus"; resets = <&r_ccu RST_R_TWI1>; dmas = <&dma1 10>, <&dma1 10>; dma-names = "tx", "rx"; status = "disabled"; }; twi8: s_twi2@7081c00 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-twi-v101"; device_type = "twi8"; reg = <0x0 0x07081C00 0x0 0x400>; interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_BUS_R_TWI2>; clock-names = "bus"; resets = <&r_ccu RST_R_TWI2>; dmas = <&dma1 14>, <&dma1 14>; dma-names = "tx", "rx"; status = "disabled"; }; spi0: spi@4025000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-spi-v1.3"; device_type = "spi0"; reg = <0x0 0x04025000 0x0 0x1000>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI0>, <&ccu CLK_BUS_SPI0>; clock-names = "pll", "mod", "bus"; resets = <&ccu RST_BUS_SPI0>; dmas = <&dma 22>, <&dma 22>; dma-names = "tx", "rx"; status = "disabled"; }; spi1: spi@4026000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-spi-v1.3"; device_type = "spi1"; reg = <0x0 0x04026000 0x0 0x1000>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI1>, <&ccu CLK_BUS_SPI1>; clock-names = "pll", "mod", "bus"; resets = <&ccu RST_BUS_SPI1>; dmas = <&dma 23>, <&dma 23>; dma-names = "tx", "rx"; status = "disabled"; }; spi2: spi@4027000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-spi-v1.3"; device_type = "spi2"; reg = <0x0 0x04027000 0x0 0x1000>; interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI2>, <&ccu CLK_BUS_SPI2>; clock-names = "pll", "mod", "bus"; resets = <&ccu RST_BUS_SPI2>; dmas = <&dma 24>, <&dma 24>; dma-names = "tx", "rx"; status = "disabled"; }; r_spi0: spi@7092000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-spi-v1.3"; device_type = "r_spi0"; reg = <0x0 0x07092000 0x0 0x1000>; interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_PLL_PERI0_300M>, <&r_ccu CLK_R_SPI>, <&r_ccu CLK_BUS_R_SPI>; clock-names = "pll", "mod", "bus"; resets = <&r_ccu RST_R_SPI>; dmas = <&dma1 13>, <&dma1 13>; dma-names = "tx", "rx"; status = "disabled"; }; spif0: spif@47f0000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun55i-spif"; device_type = "spif"; reg = <0x0 0x047f0000 0x0 0x1000>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_PLL_PERI0_400M>, <&ccu CLK_SPIF>, <&ccu CLK_BUS_SPIF>; clock-names = "pclk", "mclk", "bus"; resets = <&ccu RST_BUS_SPIF>; status = "disabled"; }; nand0:nand0@4011000 { compatible = "allwinner,sun55iw3-nand"; device_type = "nand0"; reg = <0x0 0x04011000 0x0 0x1000>;/* nand0 */ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_PLL_PERI1_400M>, <&ccu CLK_NAND0_CLK0>, <&ccu CLK_NAND0_CLK1>, <&ccu CLK_NAND0>, <&ccu CLK_NAND_MBUS_GATE>; clock-names = "pll_periph", "mclk","ecc", "bus", "mbus"; resets = <&ccu RST_BUS_NAND0>; reset-names = "rst"; power-domains = <&pd1 A523_PCK_NAND>; nand0_regulator1 = "none"; nand0_regulator2 = "none"; nand0_cache_level = <0x55aaaa55>; nand0_flush_cache_num = <0x55aaaa55>; nand0_capacity_level = <0x55aaaa55>; nand0_id_number_ctl = <0x55aaaa55>; nand0_print_level = <0x55aaaa55>; nand0_p0 = <0x55aaaa55>; nand0_p1 = <0x55aaaa55>; nand0_p2 = <0x55aaaa55>; nand0_p3 = <0x55aaaa55>; chip_code = "sun50iw10"; status = "disabled"; boot_crc = "disabled"; }; lradc: lradc@2009800 { compatible = "allwinner,keyboard_1350mv"; reg = <0x0 0x02009800 0x0 0x100>; interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_LRADC>; resets = <&ccu RST_BUS_LRADC>; status = "disabled"; }; nsi0: nsi-controller@2020000 { compatible = "allwinner,sun55i-nsi"; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; reg = <0x0 0x02020000 0x0 0x10000>, <0x0 0x02071000 0x0 0x400>; clocks = <&ccu CLK_PLL_DDR>, <&ccu CLK_MBUS>; clock-names = "pll", "bus"; resets = <&ccu RST_MBUS>; clock-frequency = <462000000>; #nsi-cells = <1>; npu{ id = <5>; mode = <0>; pri = <0>; select = <1>; }; gmac0{ id = <18>; mode = <0>; pri = <1>; select = <1>; }; gmac1{ id = <19>; mode = <0>; pri = <1>; select = <1>; }; smhc0{ id = <20>; mode = <0>; pri = <1>; select = <1>; }; smhc1{ id = <21>; mode = <0>; pri = <1>; select = <1>; }; smhc2{ id = <22>; mode = <0>; pri = <1>; select = <1>; }; usb0{ id = <23>; mode = <0>; pri = <1>; select = <1>; }; usb1{ id = <24>; mode = <0>; pri = <1>; select = <1>; }; usb2{ id = <25>; mode = <0>; pri = <1>; select = <1>; }; isp{ id = <6>; mode = <0>; pri = <2>; select = <1>; }; iommu{ id = <10>; mode = <0>; pri = <3>; select = <1>; }; ve_r{ id = <11>; mode = <0>; pri = <2>; select = <1>; }; ve_rw{ id = <12>; mode = <0>; pri = <2>; select = <1>; }; de{ id = <13>; mode = <0>; pri = <2>; select = <1>; }; csi{ id = <14>; mode = <0>; pri = <2>; select = <1>; }; }; npd0: npd@2070000 { compatible = "allwinner,sun55i-npd"; status = "okay"; }; cryptoengine: ce@3040000 { compatible = "allwinner,sunxi-ce"; device_name = "ce"; reg = <0x0 0x03040000 0x0 0xa0>, /* non-secure space */ <0x0 0x03040800 0x0 0xa0>; /* secure space */ interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>, /*non-secure*/ <GIC_SPI 53 IRQ_TYPE_EDGE_RISING>; /* secure*/ clock-frequency = <400000000>; /* 400MHz */ clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, <&ccu CLK_CE_MBUS_GATE>, <&ccu CLK_PLL_PERI0_400M>, <&ccu CLK_CE_SYS>; clock-names = "bus_ce", "ce_clk", "mbus_ce", "clk_src", "ce_sys_clk"; resets = <&ccu RST_BUS_CE>; }; rtc: rtc@7090000 { compatible = "allwinner,rtc-v201"; device_type = "rtc"; wakeup-source; reg = <0x0 0x07090000 0x0 0x320>; interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_BUS_R_RTC>, <&rtc_ccu CLK_RTC_1K>, <&rtc_ccu CLK_RTC_SPI>; clock-names = "r-ahb-rtc", "rtc-1k", "rtc-spi"; resets = <&r_ccu RST_R_RTC>; gpr_cur_pos = <6>; gpr_bootcount_pos = <7>; }; sdc2: sdmmc@4022000 { compatible = "allwinner,sunxi-mmc-v4p6x"; device_type = "sdc2"; reg = <0x0 0x04022000 0x0 0x1000>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; clocks = <&dcxo24M>, <&ccu CLK_PLL_PERI1_800M>, <&ccu CLK_PLL_PERI1_600M>, <&ccu CLK_SMHC2>, <&ccu CLK_BUS_SMHC2>; clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; resets = <&ccu RST_BUS_SMHC2>; reset-names = "rst"; pinctrl-names = "default","sleep"; pinctrl-0 = <&sdc2_pins_a &sdc2_pins_c>; pinctrl-1 = <&sdc2_pins_b>; bus-width = <8>; req-page-count = <2>; cap-mmc-highspeed; cap-cmd23; mmc-cache-ctrl; non-removable; /*max-frequency = <200000000>;*/ max-frequency = <50000000>; cap-erase; mmc-high-capacity-erase-size; no-sdio; no-sd; /*-- speed mode --*/ /*sm0: DS26_SDR12*/ /*sm1: HSSDR52_SDR25*/ /*sm2: HSDDR52_DDR50*/ /*sm3: HS200_SDR104*/ /*sm4: HS400*/ /*-- frequency point --*/ /*f0: CLK_400K*/ /*f1: CLK_25M*/ /*f2: CLK_50M*/ /*f3: CLK_100M*/ /*f4: CLK_150M*/ /*f5: CLK_200M*/ ctl-spec-caps = <0x328>; sdc_tm4_sm0_freq0 = <0>; sdc_tm4_sm0_freq1 = <0>; sdc_tm4_sm1_freq0 = <0x00000000>; sdc_tm4_sm1_freq1 = <0>; sdc_tm4_sm2_freq0 = <0x00000000>; sdc_tm4_sm2_freq1 = <0>; sdc_tm4_sm3_freq0 = <0x05000000>; sdc_tm4_sm3_freq1 = <0x00000005>; sdc_tm4_sm4_freq0 = <0x00050000>; sdc_tm4_sm4_freq1 = <0x00000004>; sdc_tm4_sm4_freq0_cmd = <0>; sdc_tm4_sm4_freq1_cmd = <0>; /*vmmc-supply = <®_3p3v>;*/ /*vqmc-supply = <®_3p3v>;*/ /*vdmc-supply = <®_3p3v>;*/ /*vmmc = "vcc-card";*/ /*vqmc = "";*/ /*vdmc = "";*/ /*sunxi-power-save-mode;*/ }; sdc0: sdmmc@4020000 { compatible = "allwinner,sunxi-mmc-v5p3x"; device_type = "sdc0"; reg = <0x0 0x04020000 0x0 0x1000>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; clocks = <&dcxo24M>, <&ccu CLK_PLL_PERI1_400M>, <&ccu CLK_PLL_PERI1_300M>, <&ccu CLK_SMHC0>, <&ccu CLK_BUS_SMHC0>; clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; resets = <&ccu RST_BUS_SMHC0>; reset-names = "rst"; pinctrl-names = "default","mmc_1v8","sleep","uart_jtag"; pinctrl-0 = <&sdc0_pins_a>; pinctrl-1 = <&sdc0_pins_b>; pinctrl-2 = <&sdc0_pins_c>; pinctrl-3 = <&sdc0_pins_d &sdc0_pins_e>; max-frequency = <50000000>; bus-width = <4>; req-page-count = <2>; /*non-removable;*/ /*broken-cd;*/ /*cd-inverted*/ /*cd-gpios = <&pio PF 6 GPIO_ACTIVE_LOW>;*/ /* vmmc-supply = <®_3p3v>;*/ /* vqmc-supply = <®_3p3v>;*/ /* vdmc-supply = <®_3p3v>;*/ /*vmmc = "vcc-card";*/ /*vqmc = "";*/ /*vdmc = "";*/ cap-sd-highspeed; cap-wait-while-busy; /*sd-uhs-sdr50;*/ /*sd-uhs-ddr50;*/ /*cap-sdio-irq;*/ /*keep-power-in-suspend;*/ /*ignore-pm-notify;*/ /*sunxi-power-save-mode;*/ /*sunxi-dly-400k = <1 0 0 0>; */ /*sunxi-dly-26M = <1 0 0 0>;*/ /*sunxi-dly-52M = <1 0 0 0>;*/ /*sunxi-dly-52M-ddr4 = <1 0 0 0>;*/ /*sunxi-dly-52M-ddr8 = <1 0 0 0>;*/ /*sunxi-dly-104M = <1 0 0 0>;*/ /*sunxi-dly-208M = <1 0 0 0>;*/ /*sunxi-dly-104M-ddr = <1 0 0 0>;*/ /*sunxi-dly-208M-ddr = <1 0 0 0>;*/ ctl-spec-caps = <0x428>; status = "okay"; }; sdc1: sdmmc@4021000 { compatible = "allwinner,sunxi-mmc-v5p3x"; device_type = "sdc1"; reg = <0x0 0x04021000 0x0 0x1000>; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clocks = <&dcxo24M>, <&ccu CLK_PLL_PERI1_400M>, <&ccu CLK_PLL_PERI1_300M>, <&ccu CLK_SMHC1>, <&ccu CLK_BUS_SMHC1>; clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; resets = <&ccu RST_BUS_SMHC1>; reset-names = "rst"; pinctrl-names = "default","sleep"; pinctrl-0 = <&sdc1_pins_a>; pinctrl-1 = <&sdc1_pins_b>; max-frequency = <50000000>; bus-width = <4>; /*broken-cd;*/ /*cd-inverted*/ /*cd-gpios = <&pio PG 6 6 1 2 0>;*/ /* vmmc-supply = <®_3p3v>;*/ /* vqmc-supply = <®_3p3v>;*/ /* vdmc-supply = <®_3p3v>;*/ /*vmmc = "vcc-card";*/ /*vqmc = "";*/ /*vdmc = "";*/ cap-sd-highspeed; cap-sdio-irq; ignore-pm-notify; /*sd-uhs-sdr50;*/ /*sd-uhs-ddr50;*/ /*sd-uhs-sdr104;*/ /*cap-sdio-irq;*/ keep-power-in-suspend; /*ignore-pm-notify;*/ /*sunxi-power-save-mode;*/ /*sunxi-dly-400k = <0xff 0xff 0xff 0xff 0xff 0xff>; */ /*sunxi-dly-26M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ /*sunxi-dly-52M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ /*sunxi-dly-52M-ddr4 = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ /*sunxi-dly-52M-ddr8 = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ /*sunxi-dly-104M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ /*sunxi-dly-208M = <0xff 0xff 0xff 0xff 0xff 0xff> ;*/ /*sunxi-dly-104M-ddr = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ /*sunxi-dly-208M-ddr = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ sunxi-dly-208M = <0xff 0x1 0xff 0xff 0xff 0xff>; ctl-spec-caps = <0x428>; status = "okay"; }; usbc0: usbc0@10 { device_type = "usbc0"; compatible = "allwinner,sunxi-otg-manager"; reg = <0x0 0x10 0x0 0x1000>; usb_port_type = <2>; usb_detect_type = <1>; usb_detect_mode = <0>; usb_id_gpio; usb_det_vbus_gpio; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; usb_luns = <3>; usb_serial_unique = <0>; usb_serial_number = "20080411"; rndis_wceis = <1>; status = "disabled"; }; udc:udc-controller@4100000 { compatible = "allwinner,sunxi-udc"; reg = <0x0 0x04100000 0x0 0x1000>, /*udc base*/ <0x0 0x00000000 0x0 0x100>; /*sram base*/ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOTG0>; clock-names = "hosc", "bus_otg"; resets = <&ccu RST_USB_OTG0>, <&ccu RST_USB_PHY0_RSTN>; reset-names = "otg", "phy"; status = "disabled"; }; ehci0:ehci0-controller@4101000 { compatible = "allwinner,sunxi-ehci0"; reg = <0x0 0x04101000 0x0 0xFFF>, /*hci0 base*/ <0x0 0x00000000 0x0 0x100>, /*sram base*/ <0x0 0x04100000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBEHCI0>; clock-names = "hosc", "bus_hci"; resets = <&ccu RST_USB_EHCI0>, <&ccu RST_USB_PHY0_RSTN>; reset-names = "hci", "phy"; hci_ctrl_no = <0>; status = "disabled"; }; ohci0:ohci0-controller@4101400 { compatible = "allwinner,sunxi-ohci0"; reg = <0x0 0x04101400 0x0 0xFFF>, /*hci0 base*/ <0x0 0x00000000 0x0 0x100>, /*sram base*/ <0x0 0x04100000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOHCI0>, <&ccu CLK_USB0>; clock-names = "hosc", "bus_hci", "ohci"; resets = <&ccu RST_USB_OHCI0>, <&ccu RST_USB_PHY0_RSTN>; reset-names = "hci", "phy"; hci_ctrl_no = <0>; status = "disabled"; }; usbc1: usbc1@11 { device_type = "usbc1"; reg = <0x0 0x11 0x0 0x1000>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "disabled"; }; ehci1: ehci1-controller@4200000 { compatible = "allwinner,sunxi-ehci1"; reg = <0x0 0x04200000 0x0 0xFFF>, /*ehci1 base*/ <0x0 0x00000000 0x0 0x100>, /*sram base*/ <0x0 0x04100000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBEHCI1>; clock-names = "hosc", "bus_hci"; resets = <&ccu RST_USB_EHCI1>, <&ccu RST_USB_PHY1_RSTN>; reset-names = "hci", "phy"; hci_ctrl_no = <1>; status = "disabled"; }; ohci1: ohci1-controller@4200400 { compatible = "allwinner,sunxi-ohci1"; reg = <0x0 0x04200400 0x0 0xFFF>, /*ohci1 base*/ <0x0 0x00000000 0x0 0x100>, /*sram base*/ <0x0 0x04100000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOHCI1>, <&ccu CLK_USB1>; clock-names = "hosc", "bus_hci", "ohci"; resets = <&ccu RST_USB_OHCI1>, <&ccu RST_USB_PHY1_RSTN>; reset-names = "hci", "phy"; hci_ctrl_no = <1>; status = "disabled"; }; usbc2:usbc2@12 { device_type = "usbc2"; compatible = "allwinner,sunxi-plat-dwc3"; reg = <0x0 0x12 0x0 0x1000>; #address-cells = <2>; #size-cells = <2>; ranges; aw,hcgen2-phygen1-quirk; status = "disabled"; xhci2: xhci2-controller@4d00000 { compatible = "snps,dwc3"; reg = <0x0 0x04d00000 0x0 0x100000>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; dr_mode = "otg"; // dr_mode option: host, peripheral, otg clocks = <&ccu CLK_USB3_MBUS_GATE>, <&ccu CLK_USB3_REF>, <&ccu CLK_USB2_REF>, <&ccu CLK_USB3_SUSPEND>; clock-names = "bus_clk", "ref_clk3", "ref_clk2", "suspend"; resets = <&ccu RST_USB_3>; reset-names = "hci"; maximum-speed = "super-speed"; phy_type = "utmi"; snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; snps,dis_u3_susphy_quirk; snps,dis_u2_susphy_quirk; phys = <&u2phy>, <&combophy PHY_TYPE_USB3>; phy-names = "usb2-phy", "usb3-phy"; status = "disabled"; }; }; u2phy: phy@4e00000 { compatible = "allwinner,sunxi-plat-phy"; reg = <0x0 0x04e00000 0x0 0x800>; /* Application Registers */ #phy-cells = <0>; status = "disabled"; }; vind0: vind@5800800 { compatible = "allwinner,sunxi-vin-media", "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; device_id = <0>; csi_top = <336000000>; csi_isp = <327000000>; reg = <0x0 0x05800800 0x0 0x200>, <0x0 0x05800000 0x0 0x800>, <0x0 0x05810000 0x0 0x100>; interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_CSI>, <&ccu CLK_PLL_VIDEO3_4X>, <&ccu CLK_CSI_MASTER0>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, <&ccu CLK_CSI_MASTER1>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, <&ccu CLK_CSI_MASTER2>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, <&ccu CLK_CSI_MASTER3>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, <&ccu CLK_ISP>, <&ccu CLK_PLL_VIDEO2_4X>, <&ccu CLK_BUS_CSI>, <&ccu CLK_CSI_MBUS_GATE>, <&ccu CLK_ISP_MBUS_GATE>; clock-names = "csi_top", "csi_top_src", "csi_mclk0", "csi_mclk0_24m", "csi_mclk0_pll", "csi_mclk1", "csi_mclk1_24m", "csi_mclk1_pll", "csi_mclk2", "csi_mclk2_24m", "csi_mclk2_pll", "csi_mclk3", "csi_mclk3_24m", "csi_mclk3_pll", "csi_isp", "csi_isp_src", "csi_bus", "csi_mbus", "csi_isp_mbus"; resets = <&ccu RST_BUS_CSI>, <&ccu RST_BUS_ISP>; reset-names = "csi_ret", "isp_ret"; //pinctrl-names = "mclk0-default", "mclk0-sleep", "mclk1-default", "mclk1-sleep", // "mclk2-default", "mclk2-sleep", "mclk3-default", "mclk3-sleep"; pinctrl-names = "mclk1-default", "mclk1-sleep", "mclk2-default", "mclk2-sleep", "mclk3-default", "mclk3-sleep"; //pinctrl-0 = <&csi_mclk0_pins_a>; //pinctrl-1 = <&csi_mclk0_pins_b>; pinctrl-2 = <&csi_mclk1_pins_a>; pinctrl-3 = <&csi_mclk1_pins_b>; pinctrl-4 = <&csi_mclk2_pins_a>; pinctrl-5 = <&csi_mclk2_pins_b>; pinctrl-6 = <&csi_mclk3_pins_a>; pinctrl-7 = <&csi_mclk3_pins_b>; power-domains = <&pd1 A523_PCK_VI>; dram_dfs_time = <150>; status = "okay"; csi0: csi@5820000 { compatible = "allwinner,sunxi-csi"; reg = <0x0 0x05820000 0x0 0x1000>; interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; device_id = <0>; status = "okay"; }; csi1: csi@5821000 { compatible = "allwinner,sunxi-csi"; reg = <0x0 0x05821000 0x0 0x1000>; interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; device_id = <1>; status = "okay"; }; csi2: csi@5822000 { compatible = "allwinner,sunxi-csi"; reg = <0x0 0x05822000 0x0 0x1000>; interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; device_id = <2>; status = "okay"; }; csi3: csi@5823000 { compatible = "allwinner,sunxi-csi"; reg = <0x0 0x05823000 0x0 0x1000>; interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default","sleep"; pinctrl-0 = <&ncsi_bt656_pins_a>; pinctrl-1 = <&ncsi_bt656_pins_b>; device_id = <3>; status = "okay"; }; mipi0: mipi@5810100 { compatible = "allwinner,sunxi-mipi"; reg = <0x0 0x05810100 0x0 0x100>, <0x0 0x05811000 0x0 0x400>; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "mipi0-default","mipi0-sleep", "mipi1-4lane-default","mipi1-4lane-sleep"; pinctrl-0 = <&mipia_pins_a>; pinctrl-1 = <&mipia_pins_b>; pinctrl-2 = <&mipib_4lane_pins_a>; pinctrl-3 = <&mipib_4lane_pins_b>; device_id = <0>; status = "okay"; }; mipi1: mipi@5810200 { compatible = "allwinner,sunxi-mipi"; reg = <0x0 0x05810200 0x0 0x100>, <0x0 0x05811400 0x0 0x400>; pinctrl-names = "mipi1-default","mipi1-sleep"; pinctrl-0 = <&mipib_pins_a>; pinctrl-1 = <&mipib_pins_b>; device_id = <1>; status = "okay"; }; mipi2: mipi@5810300 { compatible = "allwinner,sunxi-mipi"; reg = <0x0 0x05810300 0x0 0x100>, <0x0 0x05811800 0x0 0x400>; pinctrl-names = "mipi2-default","mipi2-sleep", "mipi3-4lane-default","mipi3-4lane-sleep"; pinctrl-0 = <&mipic_pins_a>; pinctrl-1 = <&mipic_pins_b>; pinctrl-2 = <&mipid_4lane_pins_a>; pinctrl-3 = <&mipid_4lane_pins_b>; device_id = <2>; status = "okay"; }; mipi3: mipi@5810400 { compatible = "allwinner,sunxi-mipi"; reg = <0x0 0x05810400 0x0 0x100>, <0x0 0x05811C00 0x0 0x400>; pinctrl-names = "mipi3-default","mipi3-sleep"; pinctrl-0 = <&mipid_pins_a>; pinctrl-1 = <&mipid_pins_b>; device_id = <3>; status = "okay"; }; tdm0: tdm@5908000 { compatible = "allwinner,sunxi-tdm"; reg = <0x0 0x05908000 0x0 0x300>; interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; work_mode = <0x0>; device_id = <0>; iommus = <&mmu_aw 0 0>; status = "okay"; }; isp00:isp@5900000 { compatible = "allwinner,sunxi-isp"; reg = <0x0 0x05900000 0x0 0x1300>; interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; work_mode = <0x0>; device_id = <0>; iommus = <&mmu_aw 0 0>; status = "okay"; }; isp01:isp@58ffffc { compatible = "allwinner,sunxi-isp"; reg = <0x0 0x058ffffc 0x0 0x1304>; interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; work_mode = <0xff>; device_id = <1>; iommus = <&mmu_aw 0 0>; status = "okay"; }; isp02:isp@58ffff8 { compatible = "allwinner,sunxi-isp"; reg = <0x0 0x058ffff8 0x0 0x1308>; interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; work_mode = <0xff>; device_id = <2>; iommus = <&mmu_aw 0 0>; status = "okay"; }; isp03:isp@58ffff4 { compatible = "allwinner,sunxi-isp"; reg = <0x0 0x058ffff4 0x0 0x130c>; interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; work_mode = <0xff>; device_id = <3>; iommus = <&mmu_aw 0 0>; status = "okay"; }; isp10:isp@4 { compatible = "allwinner,sunxi-isp"; device_id = <4>; iommus = <&mmu_aw 0 0>; status = "okay"; }; isp20:isp@5 { compatible = "allwinner,sunxi-isp"; device_id = <5>; iommus = <&mmu_aw 0 0>; status = "okay"; }; isp30:isp@6 { compatible = "allwinner,sunxi-isp"; device_id = <6>; iommus = <&mmu_aw 0 0>; status = "okay"; }; scaler00:scaler@5910000 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x05910000 0x0 0x400>; interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; work_mode = <0x0>; device_id = <0>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler01:scaler@590fffc { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x0590fffc 0x0 0x404>; work_mode = <0xff>; device_id = <1>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler02:scaler@590fff8 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x0590fff8 0x0 0x408>; work_mode = <0xff>; device_id = <2>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler03:scaler@590fff4 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x0590fff4 0x0 0x40c>; work_mode = <0xff>; device_id = <3>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler10:scaler@5910400 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x05910400 0x0 0x400>; interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; work_mode = <0x0>; device_id = <4>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler11:scaler@59103fc { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x059103fc 0x0 0x404>; work_mode = <0xff>; device_id = <5>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler12:scaler@59103f8 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x059103f8 0x0 0x408>; work_mode = <0xff>; device_id = <6>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler13:scaler@59103f4 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x059103f4 0x0 0x40c>; work_mode = <0xff>; device_id = <7>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler20:scaler@5910800 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x05910800 0x0 0x400>; interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; work_mode = <0x0>; device_id = <8>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler21:scaler@59107fc { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x059107fc 0x0 0x404>; work_mode = <0xff>; device_id = <9>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler22:scaler@59107f8 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x059107f8 0x0 0x408>; work_mode = <0xff>; device_id = <10>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler23:scaler@59107f4 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x059107f4 0x0 0x40c>; work_mode = <0xff>; device_id = <11>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler30:scaler@5910c00 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x05910c00 0x0 0x400>; interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; work_mode = <0x0>; device_id = <12>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler31:scaler@5910bfc { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x05910bfc 0x0 0x404>; work_mode = <0xff>; device_id = <13>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler32:scaler@5910bf8 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x05910bf8 0x0 0x408>; work_mode = <0xff>; device_id = <14>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler33:scaler@5910bf4 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x05910bf4 0x0 0x40c>; work_mode = <0xff>; device_id = <15>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler40:scaler@16 { compatible = "allwinner,sunxi-scaler"; device_id = <16>; iommus = <&mmu_aw 1 0>; status = "okay"; }; scaler50:scaler@17 { compatible = "allwinner,sunxi-scaler"; device_id = <17>; iommus = <&mmu_aw 1 0>; status = "okay"; }; actuator0: actuator@2108180 { compatible = "allwinner,sunxi-actuator"; device_type = "actuator0"; reg = <0x0 0x02108180 0x0 0x10>; actuator0_name = "ad5820_act"; actuator0_slave = <0x18>; actuator0_af_pwdn = <>; actuator0_afvdd = "afvcc-csi"; actuator0_afvdd_vol = <2800000>; status = "disabled"; }; flash0: flash@2108190 { device_type = "flash0"; compatible = "allwinner,sunxi-flash"; reg = <0x0 0x02108190 0x0 0x10>; flash0_type = <2>; flash0_en = <>; flash0_mode = <>; flash0_flvdd = ""; flash0_flvdd_vol = <>; device_id = <0>; status = "disabled"; }; sensor0: sensor@5812000 { reg = <0x0 0x05812000 0x0 0x10>; device_type = "sensor0"; compatible = "allwinner,sunxi-sensor"; sensor0_mname = "ov5640"; sensor0_twi_cci_id = <2>; sensor0_twi_addr = <0x78>; sensor0_mclk_id = <0>; sensor0_pos = "rear"; sensor0_isp_used = <0>; sensor0_fmt = <0>; sensor0_stby_mode = <0>; sensor0_vflip = <0>; sensor0_hflip = <0>; sensor0_iovdd-supply = <>; sensor0_iovdd_vol = <>; sensor0_avdd-supply = <>; sensor0_avdd_vol = <>; sensor0_dvdd-supply = <>; sensor0_dvdd_vol = <>; sensor0_power_en = <>; sensor0_reset = <>; sensor0_pwdn = <>; sensor0_sm_vs = <>; flash_handle = <&flash0>; act_handle = <&actuator0>; device_id = <0>; status = "disabled"; }; sensor1: sensor@5812010 { reg = <0x0 0x05812010 0x0 0x10>; device_type = "sensor1"; compatible = "allwinner,sunxi-sensor"; sensor1_mname = "ov5647"; sensor1_twi_cci_id = <3>; sensor1_twi_addr = <0x6c>; sensor1_mclk_id = <1>; sensor1_pos = "front"; sensor1_isp_used = <0>; sensor1_fmt = <0>; sensor1_stby_mode = <0>; sensor1_vflip = <0>; sensor1_hflip = <0>; sensor1_iovdd-supply = <>; sensor1_iovdd_vol = <>; sensor1_avdd-supply = <>; sensor1_avdd_vol = <>; sensor1_dvdd-supply = <>; sensor1_dvdd_vol = <>; sensor1_power_en = <>; sensor1_reset = <>; sensor1_pwdn = <>; sensor1_sm_vs = <>; flash_handle = <>; act_handle = <>; device_id = <1>; status = "disabled"; }; sensor2: sensor@5812020 { reg = <0x0 0x05812020 0x0 0x10>; device_type = "sensor2"; compatible = "allwinner,sunxi-sensor"; sensor2_mname = "imx386_mipi"; sensor2_twi_cci_id = <3>; sensor2_twi_addr = <0x6c>; sensor2_mclk_id = <1>; sensor2_pos = "rear"; sensor2_isp_used = <0>; sensor2_fmt = <0>; sensor2_stby_mode = <0>; sensor2_vflip = <0>; sensor2_hflip = <0>; sensor2_iovdd-supply = <>; sensor2_iovdd_vol = <>; sensor2_avdd-supply = <>; sensor2_avdd_vol = <>; sensor2_dvdd-supply = <>; sensor2_dvdd_vol = <>; sensor2_power_en = <>; sensor2_reset = <>; sensor2_pwdn = <>; sensor2_sm_vs = <>; flash_handle = <>; act_handle = <>; device_id = <2>; status= "disabled"; }; sensor3: sensor@5812030 { reg = <0x0 0x05812030 0x0 0x10>; device_type = "sensor3"; compatible = "allwinner,sunxi-sensor"; sensor3_mname = "imx317_mipi"; sensor3_twi_cci_id = <3>; sensor3_twi_addr = <0x6c>; sensor3_mclk_id = <1>; sensor3_pos = "rear"; sensor3_isp_used = <0>; sensor3_fmt = <0>; sensor3_stby_mode = <0>; sensor3_vflip = <0>; sensor3_hflip = <0>; sensor3_iovdd-supply = <>; sensor3_iovdd_vol = <>; sensor3_avdd-supply = <>; sensor3_avdd_vol = <>; sensor3_dvdd-supply = <>; sensor3_dvdd_vol = <>; sensor3_power_en = <>; sensor3_reset = <>; sensor3_pwdn = <>; sensor3_sm_vs = <>; flash_handle = <>; act_handle = <>; device_id = <2>; status= "disabled"; }; sensor_list0:sensor_list@200b820 { reg = <0x0 0x0200b820 0x0 0x10>; device_type = "sensor_list0"; compatible = "allwinner,sunxi-sensor-list"; csi_sel = <0>; sensor00_mname = "gc5035_mipi"; sensor00_twi_addr = <0x6c>; sensor00_type = <1>; sensor00_hflip = <0>; sensor00_vflip = <0>; sensor00_act_used = <1>; sensor00_act_name = ""; sensor00_act_twi_addr = <>; sensor01_mname = "ov5675_mipi"; sensor01_twi_addr = <0x6c>; sensor01_type = <1>; sensor01_hflip = <0>; sensor01_vflip = <0>; sensor01_act_used = <1>; sensor01_act_name = "dw9714_act"; sensor01_act_twi_addr = <0x18>; sensor02_mname = "sp5409_mipi"; sensor02_twi_addr = <0x78>; sensor02_type = <1>; sensor02_hflip = <0>; sensor02_vflip = <0>; sensor02_act_used = <0>; sensor02_act_name = "dw9714_act"; sensor02_act_twi_addr = <0x18>; device_id = <0>; status = "disabled"; }; sensor_list1:sensor_list@200b830 { reg = <0x0 0x0200b830 0x0 0x10>; device_type = "sensor_list1"; compatible = "allwinner,sunxi-sensor-list"; csi_sel = <0>; sensor10_mname = "gc02m2_mipi"; sensor10_twi_addr = <0x20>; sensor10_type = <1>; sensor10_hflip = <0>; sensor10_vflip = <0>; sensor10_act_used = <1>; sensor10_act_name = "dw9714_act"; sensor10_act_twi_addr = <0x18>; sensor11_mname = "ov02a10_mipi"; sensor11_twi_addr = <0x7a>; sensor11_type = <1>; sensor11_hflip = <1>; sensor11_vflip = <0>; sensor11_act_used = <0>; sensor11_act_name = ""; sensor11_act_twi_addr = <>; sensor12_mname = "gc030a_mipi"; sensor12_twi_addr = <0x42>; sensor12_type = <1>; sensor12_hflip = <0>; sensor12_vflip = <0>; sensor12_act_used = <0>; sensor12_act_name = ""; sensor12_act_twi_addr = <>; device_id = <1>; status = "disabled"; }; vinc00:vinc@5830000 { device_type = "vinc0"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05830000 0x0 0x1000>; interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; vinc0_csi_sel = <3>; vinc0_mipi_sel = <0xff>; vinc0_isp_sel = <0>; vinc0_isp_tx_ch = <0>; vinc0_tdm_rx_sel = <0>; vinc0_rear_sensor_sel = <0>; vinc0_front_sensor_sel = <0>; vinc0_sensor_list = <0>; device_id = <0>; work_mode = <0x0>; iommus = <&mmu_aw 1 0>; status = "okay"; }; vinc01:vinc@582fffc { device_type = "vinc1"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x0582fffc 0x0 0x1004>; vinc1_csi_sel = <2>; vinc1_mipi_sel = <0xff>; vinc1_isp_sel = <1>; vinc1_isp_tx_ch = <1>; vinc1_tdm_rx_sel = <1>; vinc1_rear_sensor_sel = <0>; vinc1_front_sensor_sel = <0>; vinc1_sensor_list = <0>; device_id = <1>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc02:vinc@582fff8 { device_type = "vinc2"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x0582fff8 0x0 0x1008>; vinc2_csi_sel = <2>; vinc2_mipi_sel = <0xff>; vinc2_isp_sel = <2>; vinc2_isp_tx_ch = <2>; vinc2_tdm_rx_sel = <2>; vinc2_rear_sensor_sel = <0>; vinc2_front_sensor_sel = <0>; vinc2_sensor_list = <0>; device_id = <2>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc03:vinc@582fff4 { device_type = "vinc3"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x0582fff4 0x0 0x100c>; vinc3_csi_sel = <0>; vinc3_mipi_sel = <0xff>; vinc3_isp_sel = <0>; vinc3_isp_tx_ch = <0>; vinc3_tdm_rx_sel = <0>; vinc3_rear_sensor_sel = <1>; vinc3_front_sensor_sel = <1>; vinc3_sensor_list = <0>; device_id = <3>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc10:vinc@5831000 { device_type = "vinc4"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05831000 0x0 0x1000>; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; vinc4_csi_sel = <3>; vinc4_mipi_sel = <0xff>; vinc4_isp_sel = <0>; vinc4_isp_tx_ch = <0>; vinc4_tdm_rx_sel = <1>; vinc4_rear_sensor_sel = <0>; vinc4_front_sensor_sel = <0>; vinc4_sensor_list = <0>; device_id = <4>; work_mode = <0x0>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc11:vinc@5830ffc { device_type = "vinc5"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05830ffc 0x0 0x1004>; vinc5_csi_sel = <2>; vinc5_mipi_sel = <0xff>; vinc5_isp_sel = <1>; vinc5_isp_tx_ch = <1>; vinc5_tdm_rx_sel = <1>; vinc5_rear_sensor_sel = <0>; vinc5_front_sensor_sel = <0>; vinc5_sensor_list = <0>; device_id = <5>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc12:vinc@5830ff8 { device_type = "vinc6"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05830ff8 0x0 0x1008>; vinc6_csi_sel = <2>; vinc6_mipi_sel = <0xff>; vinc6_isp_sel = <0>; vinc6_isp_tx_ch = <0>; vinc6_tdm_rx_sel = <0>; vinc6_rear_sensor_sel = <0>; vinc6_front_sensor_sel = <0>; vinc6_sensor_list = <0>; device_id = <6>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc13:vinc@5830ff4 { device_type = "vinc7"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05830ff4 0x0 0x100c>; vinc7_csi_sel = <2>; vinc7_mipi_sel = <0xff>; vinc7_isp_sel = <0>; vinc7_isp_tx_ch = <0>; vinc7_tdm_rx_sel = <0>; vinc7_rear_sensor_sel = <0>; vinc7_front_sensor_sel = <0>; vinc7_sensor_list = <0>; device_id = <7>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc20:vinc@5832000 { device_type = "vinc8"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05832000 0x0 0x1000>; interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; vinc8_csi_sel = <2>; vinc8_mipi_sel = <0xff>; vinc8_isp_sel = <4>; vinc8_isp_tx_ch = <3>; vinc8_tdm_rx_sel = <3>; vinc8_rear_sensor_sel = <0>; vinc8_front_sensor_sel = <0>; vinc8_sensor_list = <0>; device_id = <8>; work_mode = <0x0>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc21:vinc@5831ffc { device_type = "vinc9"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05831ffc 0x0 0x1004>; vinc9_csi_sel = <2>; vinc9_mipi_sel = <0xff>; vinc9_isp_sel = <0>; vinc9_isp_tx_ch = <0>; vinc9_tdm_rx_sel = <0>; vinc9_rear_sensor_sel = <0>; vinc9_front_sensor_sel = <0>; vinc9_sensor_list = <0>; device_id = <9>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc22:vinc@5831ff8 { device_type = "vinc10"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05831ff8 0x0 0x1008>; vinc10_csi_sel = <2>; vinc10_mipi_sel = <0xff>; vinc10_isp_sel = <0>; vinc10_isp_tx_ch = <0>; vinc10_tdm_rx_sel = <0>; vinc10_rear_sensor_sel = <0>; vinc10_front_sensor_sel = <0>; vinc10_sensor_list = <0>; device_id = <10>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc23:vinc@5831ff4 { device_type = "vinc11"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05831ff4 0x0 0x100c>; vinc11_csi_sel = <2>; vinc11_mipi_sel = <0xff>; vinc11_isp_sel = <0>; vinc11_isp_tx_ch = <0>; vinc11_tdm_rx_sel = <0>; vinc11_rear_sensor_sel = <0>; vinc11_front_sensor_sel = <0>; vinc11_sensor_list = <0>; device_id = <11>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc30:vinc@5833000 { device_type = "vinc12"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05833000 0x0 0x1000>; interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; vinc12_csi_sel = <2>; vinc12_mipi_sel = <0xff>; vinc12_isp_sel = <0>; vinc12_isp_tx_ch = <0>; vinc12_tdm_rx_sel = <0>; vinc12_rear_sensor_sel = <0>; vinc12_front_sensor_sel = <0>; vinc12_sensor_list = <0>; device_id = <12>; work_mode = <0x0>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc31:vinc@5832ffc { device_type = "vinc13"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05832ffc 0x0 0x1004>; vinc13_csi_sel = <2>; vinc13_mipi_sel = <0xff>; vinc13_isp_sel = <0>; vinc13_isp_tx_ch = <0>; vinc13_tdm_rx_sel = <0>; vinc13_rear_sensor_sel = <0>; vinc13_front_sensor_sel = <0>; vinc13_sensor_list = <0>; device_id = <13>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc32:vinc@5832ff8 { device_type = "vinc14"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05832ff8 0x0 0x1008>; vinc14_csi_sel = <2>; vinc14_mipi_sel = <0xff>; vinc14_isp_sel = <0>; vinc14_isp_tx_ch = <0>; vinc14_tdm_rx_sel = <0>; vinc14_rear_sensor_sel = <0>; vinc14_front_sensor_sel = <0>; vinc14_sensor_list = <0>; device_id = <14>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc33:vinc@5832ff4 { device_type = "vinc15"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05832ff4 0x0 0x100c>; vinc15_csi_sel = <2>; vinc15_mipi_sel = <0xff>; vinc15_isp_sel = <0>; vinc15_isp_tx_ch = <0>; vinc15_tdm_rx_sel = <0>; vinc15_rear_sensor_sel = <0>; vinc15_front_sensor_sel = <0>; vinc15_sensor_list = <0>; device_id = <15>; work_mode = <0xff>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc40:vinc@5834000 { device_type = "vinc16"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05834000 0x0 0x1000>; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; vinc16_csi_sel = <2>; vinc16_mipi_sel = <0xff>; vinc16_isp_sel = <0>; vinc16_isp_tx_ch = <0>; vinc16_tdm_rx_sel = <0>; vinc16_rear_sensor_sel = <0>; vinc16_front_sensor_sel = <0>; vinc16_sensor_list = <0>; device_id = <16>; work_mode = <0x0>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; vinc50:vinc@5835000 { device_type = "vinc17"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05835000 0x0 0x1000>; interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; vinc17_csi_sel = <2>; vinc17_mipi_sel = <0xff>; vinc17_isp_sel = <0>; vinc17_isp_tx_ch = <0>; vinc17_tdm_rx_sel = <0>; vinc17_rear_sensor_sel = <0>; vinc17_front_sensor_sel = <0>; vinc17_sensor_list = <0>; device_id = <17>; work_mode = <0x0>; iommus = <&mmu_aw 1 0>; status = "disabled"; }; }; di:deinterlace@5400000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-deinterlace"; reg = <0x0 0x05400000 0x0 0x040000>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; iommus = <&mmu_aw 6 1>; power-domains = <&pd1 A523_PCK_VO0>; status = "okay"; clocks = <&ccu CLK_DI>, <&ccu CLK_BUS_DI>, <&ccu CLK_PLL_VIDEO0_4X>; clock-names = "clk_di", "clk_bus_di", "clk_di_parent"; clock-frequency = <300000000>; resets = <&ccu RST_BUS_DI>; reset-names = "rst_bus_di"; }; gpu:gpu@1800000 { device_type = "gpu"; compatible = "arm,mali-valhall"; reg = <0x0 0x01800000 0x0 0x10000>; interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "JOB", "MMU", "GPU"; clocks = <&ccu CLK_PLL_GPU>, <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>; clock-names = "clk_parent", "clk_mali", "clk_bus"; resets = <&ccu RST_BUS_GPU>; operating-points-v2 = <&gpu_opp_table>; #cooling-cells = <2>; ipa_dvfs:ipa_dvfs { compatible = "arm,mali-simple-power-model"; static-coefficient = <636>; dynamic-coefficient = <1434>; /* ts0 -> ts3 */ ts = <0xcc77c0 217000 0xffffd508 200>; thermal-zone = "gpu_thermal_zone"; /*ss-coefficient = <36>;*/ /*ff-coefficient = <291>;*/ }; /*power-domains = <&pd1 A523_PCK_GPU>;*/ }; gpu_opp_table: gpu-opp-table { compatible = "allwinner, mali-valhall-operating-points"; opp@150000000 { opp-hz = /bits/ 64 <150000000>; opp-microvolt = <900000>; }; opp@200000000 { opp-hz = /bits/ 64 <200000000>; opp-microvolt = <900000>; }; opp@300000000 { opp-hz = /bits/ 64 <300000000>; opp-microvolt = <900000>; }; opp@400000000 { opp-hz = /bits/ 64 <400000000>; opp-microvolt = <900000>; }; opp@600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <900000>; }; opp@648000000 { opp-hz = /bits/ 64 <648000000>; opp-microvolt = <0>; opp-microvolt-vf0900 = <900000>; }; opp@696000000 { opp-hz = /bits/ 64 <696000000>; opp-microvolt = <0>; opp-microvolt-vf1920 = <900000>; opp-microvolt-vf2920 = <900000>; opp-microvolt-vf3920 = <900000>; opp-microvolt-vf21920 = <900000>; opp-microvolt-vf31920 = <900000>; opp-microvolt-vf5920 = <900000>; }; opp@744000000 { opp-hz = /bits/ 64 <744000000>; opp-microvolt = <0>; opp-microvolt-vf4920 = <900000>; /* Not use: only for performance test opp-microvolt-vf2920 = <900000>; opp-microvolt-vf3920 = <900000>; opp-microvolt-vf21920 = <900000>; opp-microvolt-vf31920 = <900000>; */ }; /* Not use: only for performance test */ opp@792000000 { opp-hz = /bits/ 64 <792000000>; opp-microvolt = <0>; /* opp-microvolt-vf2950 = <900000>; opp-microvolt-vf3950 = <900000>; opp-microvolt-vf21950 = <900000>; opp-microvolt-vf31950 = <900000>; */ }; }; combophy: phy@4f00000 { compatible = "allwinner,inno-combphy"; reg = <0x0 0x04f00000 0x0 0x80000>, /* Sub-System Application Registers */ <0x0 0x04f80000 0x0 0x80000>; /* Combo INNO PHY Registers */ reg-names = "phy-ctl", "phy-clk"; power-domains = <&pd1 A523_PCK_PCIE>; phy_refclk_sel = <0>; /* 0:internal clk; 1:external clk */ #phy-cells = <1>; status = "disabled"; }; pcie: pcie@4800000 { #address-cells = <3>; #size-cells = <2>; compatible = "allwinner,sunxi-pcie-v210"; bus-range = <0x0 0xff>; reg = <0 0x04800000 0 0x480000>; reg-names = "dbi"; device_type = "pci"; ranges = <0x00000800 0 0x20000000 0x0 0x20000000 0 0x01000000 0x81000000 0 0x21000000 0x0 0x21000000 0 0x01000000 0x82000000 0 0x22000000 0x0 0x22000000 0 0x07000000>; num-lanes = <1>; phys = <&combophy PHY_TYPE_PCIE>; phy-names = "pcie-phy"; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "msi", "sii", "edma-w0", "edma-w1", "edma-w2", "edma-w3", "edma-r0", "edma-r1", "edma-r2", "edma-r3"; #interrupt-cells = <1>; num-edma = <4>; max-link-speed = <2>; num-ib-windows = <8>; num-ob-windows = <8>; num-viewport = <8>; linux,pci-domain = <0>; power-domains = <&pd1 A523_PCK_PCIE>; clocks = <&ccu CLK_USB3_REF>, <&ccu CLK_PLL_PERI0_200M>, <&dcxo24M>, <&ccu CLK_PCIE_AUX>; clock-names = "pclk_ref", "pclk_per", "hosc", "pclk_aux"; resets = <&ccu RST_BUS_PCIE_USB3>; reset-names = "pclk_rst"; busno = <0>; status = "disabled"; }; /* audio dirver module -> audio codec */ codec:codec@7110000 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-snd-codec"; reg = <0x0 0x07110000 0x0 0x348>; resets = <&mcu_ccu RST_BUS_MCU_AUDIO_CODEC>; clocks = <&ccu CLK_PLL_PERI0_2X>, <&ccu CLK_DSP>, <&mcu_ccu CLK_DSP_DSP>, <&mcu_ccu CLK_BUS_MCU_AUDIO_CODEC>, <&ccu CLK_PLL_AUDIO0_4X>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, <&mcu_ccu CLK_MCU_AUDIO_CODEC_DAC>, <&mcu_ccu CLK_MCU_AUDIO_CODEC_ADC>; clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_audio", "clk_pll_audio0_4x", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_audio_dac", "clk_audio_adc"; interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; codec_plat:codec_plat { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-snd-plat-aaudio"; dac-txdata = <0x07110020>; adc-txdata = <0x07110040>; dmas = <&dma1 7>, <&dma1 7>; dma-names = "tx", "rx"; playback-cma = <128>; capture-cma = <128>; tx-fifo-size = <128>; rx-fifo-size = <128>; status = "disabled"; }; codec_mach:codec_mach { compatible = "allwinner,sunxi-snd-mach"; soundcard-mach,name = "audiocodec"; soundcard-mach,pin-switches = "MIC1", "MIC2", "MIC3", "LINEOUTL", "LINEOUTR", "HPOUT", "SPK"; soundcard-mach,routing = "MIC1P_PIN", "MIC1", "MIC1N_PIN", "MIC1", "MIC2P_PIN", "MIC2", "MIC2N_PIN", "MIC2", "MIC3P_PIN", "MIC3", "MIC3N_PIN", "MIC3", "LINEOUTL", "LINEOUTLP_PIN", "LINEOUTL", "LINEOUTLN_PIN", "LINEOUTR", "LINEOUTRP_PIN", "LINEOUTR", "LINEOUTRN_PIN", "SPK", "LINEOUTLP_PIN", "SPK", "LINEOUTLN_PIN", "SPK", "LINEOUTRP_PIN", "SPK", "LINEOUTRN_PIN", "HPOUT", "HPOUTL_PIN", "HPOUT", "HPOUTR_PIN"; soundcard-mach,jack-support = <1>; status = "disabled"; soundcard-mach,cpu { sound-dai = <&codec_plat>; }; soundcard-mach,codec { sound-dai = <&codec>; soundcard-mach,pll-fs = <1>; }; }; hdmi_codec:hdmi_codec { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-snd-codec-hdmi"; status = "disabled"; }; edp_codec:edp_codec { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-snd-codec-edp"; status = "disabled"; }; /* audio dirver module -> owa */ owa_plat:owa_plat@7116000 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-snd-plat-owa"; reg = <0x0 0x07116000 0x0 0x58>; resets = <&mcu_ccu RST_BUS_MCU_OWA>; clocks = <&ccu CLK_PLL_PERI0_2X>, <&ccu CLK_DSP>, <&mcu_ccu CLK_DSP_DSP>, <&mcu_ccu CLK_BUS_MCU_OWA>, <&ccu CLK_PLL_AUDIO0_4X>, <&ccu CLK_PLL_PERI0_300M>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, <&mcu_ccu CLK_MCU_OWA_TX>, <&mcu_ccu CLK_MCU_OWA_RX>; clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_owa", "clk_pll_audio0_4x", "clk_pll_peri0_300", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_owa_tx", "clk_owa_rx"; dmas = <&dma1 2>, <&dma1 2>; dma-names = "tx", "rx"; playback-cma = <128>; capture-cma = <128>; tx-fifo-size = <128>; rx-fifo-size = <128>; status = "disabled"; }; owa_mach:owa_mach { compatible = "allwinner,sunxi-snd-mach"; soundcard-mach,name = "sndowa"; status = "disabled"; soundcard-mach,cpu { sound-dai = <&owa_plat>; }; soundcard-mach,codec { }; }; /* audio dirver module -> dmic */ dmic_plat:dmic_plat@7111000 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-snd-plat-dmic"; reg = <0x0 0x07111000 0x0 0x50>; resets = <&mcu_ccu RST_BUS_MCU_DMIC>; clocks = <&ccu CLK_PLL_PERI0_2X>, <&ccu CLK_DSP>, <&mcu_ccu CLK_DSP_DSP>, <&mcu_ccu CLK_BUS_MCU_DMIC>, <&ccu CLK_PLL_AUDIO0_4X>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, <&mcu_ccu CLK_MCU_DMIC>; clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_dmic", "clk_pll_audio0_4x", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_dmic"; dmas = <&dma1 8>; dma-names = "rx"; capture-cma = <128>; rx-fifo-size = <128>; status = "disabled"; }; dmic_mach:dmic_mach{ compatible = "allwinner,sunxi-snd-mach"; soundcard-mach,name = "snddmic"; soundcard-mach,capture-only; status = "disabled"; soundcard-mach,cpu { sound-dai = <&dmic_plat>; }; soundcard-mach,codec { }; }; /* audio dirver module -> I2S/PCM */ i2s0_plat:i2s0_plat@7112000 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-snd-plat-i2s"; reg = <0x0 0x07112000 0x0 0xA0>; resets = <&mcu_ccu RST_BUS_MCU_I2S0>; clocks = <&ccu CLK_PLL_PERI0_2X>, <&ccu CLK_DSP>, <&mcu_ccu CLK_DSP_DSP>, <&mcu_ccu CLK_BUS_MCU_I2S0>, <&ccu CLK_PLL_AUDIO0_4X>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, <&mcu_ccu CLK_MCU_I2S0>; clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_i2s", "clk_pll_audio0_4x", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_i2s"; dmas = <&dma1 3>, <&dma1 3>; dma-names = "tx", "rx"; playback-cma = <128>; capture-cma = <128>; tx-fifo-size = <128>; rx-fifo-size = <128>; status = "disabled"; }; i2s0_mach:i2s0_mach{ compatible = "allwinner,sunxi-snd-mach"; soundcard-mach,name = "sndi2s0"; soundcard-mach,format = "i2s"; soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; soundcard-mach,cpu { sound-dai = <&i2s0_plat>; }; soundcard-mach,codec { }; }; i2s1_plat:i2s1_plat@7113000 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-snd-plat-i2s"; reg = <0x0 0x07113000 0x0 0xA0>; resets = <&mcu_ccu RST_BUS_MCU_I2S1>; clocks = <&ccu CLK_PLL_PERI0_2X>, <&ccu CLK_DSP>, <&mcu_ccu CLK_DSP_DSP>, <&mcu_ccu CLK_BUS_MCU_I2S1>, <&ccu CLK_PLL_AUDIO0_4X>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, <&mcu_ccu CLK_MCU_I2S1>; clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_i2s", "clk_pll_audio0_4x", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_i2s"; dmas = <&dma1 4>, <&dma1 4>; dma-names = "tx", "rx"; playback-cma = <128>; capture-cma = <128>; tx-fifo-size = <128>; rx-fifo-size = <128>; status = "disabled"; }; i2s1_mach:i2s1_mach{ compatible = "allwinner,sunxi-snd-mach"; soundcard-mach,name = "sndi2s1"; soundcard-mach,format = "i2s"; soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; soundcard-mach,cpu { sound-dai = <&i2s1_plat>; }; soundcard-mach,codec { }; }; i2s2_plat:i2s2_plat@7114000 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-snd-plat-i2s"; reg = <0x0 0x07114000 0x0 0xA0>; resets = <&mcu_ccu RST_BUS_MCU_I2S2>; clocks = <&ccu CLK_PLL_PERI0_2X>, <&ccu CLK_DSP>, <&mcu_ccu CLK_DSP_DSP>, <&mcu_ccu CLK_BUS_MCU_I2S2>, <&ccu CLK_PLL_AUDIO0_4X>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, <&mcu_ccu CLK_MCU_I2S2>; clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_i2s", "clk_pll_audio0_4x", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_i2s"; dmas = <&dma1 5>, <&dma1 5>; dma-names = "tx", "rx"; playback-cma = <128>; capture-cma = <128>; tx-fifo-size = <128>; rx-fifo-size = <128>; status = "disabled"; }; i2s2_mach:i2s2_mach{ compatible = "allwinner,sunxi-snd-mach"; /* card name. hdmi: "sndhdmi"; edp: "sndedp" */ soundcard-mach,name = "sndhdmi"; soundcard-mach,format = "i2s"; soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; soundcard-mach,cpu { sound-dai = <&i2s2_plat>; }; soundcard-mach,codec { }; }; i2s3_plat:i2s3_plat@7115000 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-snd-plat-i2s"; reg = <0x0 0x07115000 0x0 0xA0>; resets = <&mcu_ccu RST_BUS_MCU_I2S3>; clocks = <&ccu CLK_PLL_PERI0_2X>, <&ccu CLK_DSP>, <&mcu_ccu CLK_DSP_DSP>, <&mcu_ccu CLK_BUS_MCU_I2S3>, <&ccu CLK_PLL_AUDIO0_4X>, <&ccu CLK_PLL_PERI0_300M>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, <&mcu_ccu CLK_MCU_I2S3_ASRC>, <&mcu_ccu CLK_MCU_I2S3>; clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_i2s", "clk_pll_audio0_4x", "clk_pll_peri0_300", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_i2s_asrc", "clk_i2s"; dmas = <&dma1 6>, <&dma1 6>; dma-names = "tx", "rx"; playback-cma = <128>; capture-cma = <128>; tx-fifo-size = <128>; rx-fifo-size = <128>; status = "disabled"; }; i2s3_mach:i2s3_mach{ compatible = "allwinner,sunxi-snd-mach"; soundcard-mach,name = "sndi2s3"; soundcard-mach,format = "i2s"; soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; soundcard-mach,cpu { sound-dai = <&i2s3_plat>; }; soundcard-mach,codec { }; }; rfkill: rfkill { compatible = "allwinner,sunxi-rfkill"; status = "disabled"; }; addr_mgt: addr_mgt { compatible = "allwinner,sunxi-addr_mgt"; status = "disabled"; }; btlpm: btlpm { compatible = "allwinner,sunxi-btlpm"; status = "disabled"; }; mdio0: mdio0@4500048 { compatible = "allwinner,sunxi-mdio"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x04500048 0x0 0x8>; status = "disabled"; //gmac0_phy0: ethernet-phy@1 { // /* RTL8211F (0x001cc916) */ // reg = <1>; // max-speed = <1000>; /* Max speed capability */ // reset-gpios = <&pio PH 19 GPIO_ACTIVE_LOW>; // /* PHY datasheet rst time */ // reset-assert-us = <10000>; // reset-deassert-us = <150000>; //}; }; gmac0: gmac0@4500000 { compatible = "allwinner,sunxi-gmac"; reg = <0x0 0x04500000 0x0 0x10000>, <0x0 0x03000030 0x0 0x4>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "gmacirq"; clocks = <&ccu CLK_GMAC0>, <&ccu CLK_GMAC0_25M>; clock-names = "gmac", "phy25m"; resets = <&ccu RST_BUS_GMAC0>; //phy-handle = <&gmac0_phy0>; status = "disabled"; }; gmac1: ethernet@4510000 { compatible = "allwinner,sunxi-gmac-200", "snps,dwmac-4.20a"; reg = <0x0 0x04510000 0x0 0x10000>, <0x0 0x03000034 0x0 0x4>; interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; clocks = <&ccu CLK_GMAC1>, <&ccu CLK_GMAC1_MBUS_GATE>, <&ccu CLK_GMAC1_25M>; clock-names = "stmmaceth", "pclk", "phy25m"; resets = <&ccu RST_BUS_GMAC1>; reset-names = "stmmaceth"; //phy-handle = <&gmac1_phy0>; power-domains = <&pd1 A523_PCK_VO1>; status = "disabled"; snps,fixed-burst; snps,axi-config = <&gmac1_stmmac_axi_setup>; snps,mtl-rx-config = <&gmac1_mtl_rx_setup>; snps,mtl-tx-config = <&gmac1_mtl_tx_setup>; gmac1_stmmac_axi_setup: stmmac-axi-config { snps,wr_osr_lmt = <0xf>; snps,rd_osr_lmt = <0xf>; snps,blen = <256 128 64 32 16 8 4>; }; gmac1_mtl_rx_setup: rx-queues-config { snps,rx-queues-to-use = <1>; queue0 {}; }; gmac1_mtl_tx_setup: tx_queues-config { snps,tx-queues-to-use = <1>; queue0 {}; }; mdio1: mdio1@1 { compatible = "snps,dwmac-mdio"; #address-cells = <1>; #size-cells = <0>; //gmac1_phy0: ethernet-phy@1 { // compatible = "ethernet-phy-ieee802.3-c22"; // reg = <0x1>; // max-speed = <1000>; /* Max speed capability */ // reset-gpios = <&pio PJ 27 GPIO_ACTIVE_LOW>; // /* PHY datasheet rst time */ // reset-assert-us = <10000>; // reset-deassert-us = <150000>; //}; }; }; sid@3006000 { compatible = "allwinner,sun55iw3p1-sid", "allwinner,sunxi-sid"; reg = <0x0 0x03006000 0 0x1000>; #address-cells = <1>; #size-cells = <1>; non-secure-maxoffset = <0x80>; non-secure-maxlen = <0x20>; secure_status { reg = <0x0 0>; offset = <0xa0>; size = <0x4>; }; chipid { reg = <0x0 0>; offset = <0x200>; size = <0x10>; }; rotpk { reg = <0x0 0>; offset = <0x140>; size = <0x20>; }; }; sram_ctrl: sram_ctrl@3000000 { compatible = "allwinner,sram_ctrl"; reg = <0x0 0x03000000 0 0x184>; soc_ver { offset = <0x24>; mask = <0x7>; shift = <0>; ver_a = <0x00000000>; ver_b = <0x00000001>; ver_c = <0x00000002>; }; soc_id { offset = <0x200>; mask = <0x1>; shift = <22>; }; soc_bin { offset = <0x0>; mask = <0x3ff>; shift = <0x0>; }; }; }; };
-
LT527X-E 米尔 T527 开发板折腾记录发布在 T Series
下载SDK之后能看到三份设备树
/* * Allwinner Technology CO., Ltd. */ /dts-v1/; #include "sun55iw3p1.dtsi" #include <uapi/linux/input-event-codes.h> /{ board = "T527", "T527-DEMO-AXP717B"; compatible = "allwinner,t527", "arm,sun55iw3p1"; aliases { pmu0 = &pmu0; serial0 = &uart0; hdmi = &hdmi; reg-tcs0 = ®_tcs0; reg-sy0 = ®_sy0; reg-axp1530 = ®_ext_axp1530_dcdc1; tcs0 = &tcs0; sy0 = &sy0; axp1530 = &axp1530; cpu-ext = &cpu4; standby-param = &standby_param; arisc-config = &arisc_config; cir_param = &cir_param; }; /* reg_usb0_vbus: usb0-vbus { compatible = "regulator-fixed"; regulator-name = "usb0-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-enable-ramp-delay = <1000>; gpio = <&pio PB 12 GPIO_ACTIVE_HIGH>; enable-active-high; }; */ reg_usb1_vbus: usb1-vbus { compatible = "regulator-fixed"; regulator-name = "usb1-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-enable-ramp-delay = <1000>; gpio = <&pio PB 3 GPIO_ACTIVE_HIGH>; enable-active-high; }; standby_param: standby_param { vdd-cpu = <0x00000001>; vdd-cpub = <0x00000001>; vdd-sys = <0x00000002>; vcc-pll = <0x00000080>; vcc-io = <0x00004000>; osc24m-on = <0x0>; mcu-standby-en = <0x1>; }; cir_param: cir_param { gpio_group = <1>; /* 0:PL 1:PM */ gpio_pin = <11>; gpio_function = <2>; count = <15>; ir_power_key_code0 = <0x40>; ir_addr_code0 = <0xfe01>; ir_power_key_code1 = <0x1a>; ir_addr_code1 = <0xfb04>; ir_power_key_code2 = <0xf2>; ir_addr_code2 = <0x2992>; ir_power_key_code3 = <0x57>; ir_addr_code3 = <0x9f00>; ir_power_key_code4 = <0xdc>; ir_addr_code4 = <0x4cb3>; ir_power_key_code5 = <0x18>; ir_addr_code5 = <0xff00>; ir_power_key_code6 = <0xdc>; ir_addr_code6 = <0xdd22>; ir_power_key_code7 = <0x0d>; ir_addr_code7 = <0xbc00>; ir_power_key_code8 = <0x4d>; ir_addr_code8 = <0x4040>; ir_power_key_code9 = <0x08>; ir_addr_code9 = <0xfb04>; ir_power_key_code10 = <0x00>; ir_addr_code10 = <0xfc03>; ir_power_key_code11 = <0x00>; ir_addr_code11 = <0xbf00>; ir_power_key_code12 = <0xea>; ir_addr_code12 = <0xfb04>; ir_power_key_code13 = <0x42>; ir_addr_code13 = <0xbf00>; ir_power_key_code14 = <0x0f>; ir_addr_code14 = <0xff00>; }; arisc_config: arisc_config { s_uart_config { pins = "PL2", "PL3"; function = <2>, <2>; status = "disabled"; }; }; reserved-memory { dsp0ddr_reserved: dsp0ddr@4a000000 { reg = <0x0 0x4a000000 0x0 0x00a00000>; no-map; }; riscvsram0_reserved: riscvsram0@7280000 { reg = <0x0 0x07280000 0x0 0x40000>; no-map; }; riscvsram1_reserved: riscvsram1@72c0000 { reg = <0x0 0x072c0000 0x0 0x40000>; no-map; }; /* * The name should be "vdev%dbuffer". * Its size should be not less than * RPMSG_BUF_SIZE * (num of buffers in a vring) * 2 * = 512 * (num of buffers in a vring) * 2 */ dsp_vdev0buffer: vdev0buffer@4ac00000 { compatible = "shared-dma-pool"; reg = <0x0 0x4ac00000 0x0 0x40000>; no-map; }; /* * The name should be "vdev%dvring%d". * The size of each should be not less than * PAGE_ALIGN(vring_size(num, align)) * = PAGE_ALIGN(16 * num + 6 + 2 * num + (pads for align) + 6 + 8 * num) * * (Please refer to the vring layout in include/uapi/linux/virtio_ring.h) */ dsp_vdev0vring0: vdev0vring0@4ac40000 { reg = <0x0 0x4ac40000 0x0 0x2000>; no-map; }; dsp_vdev0vring1: vdev0vring1@4ac42000 { reg = <0x0 0x4ac42000 0x0 0x2000>; no-map; }; /* * The name should be "vdev%dbuffer". * Its size should be not less than * RPMSG_BUF_SIZE * (num of buffers in a vring) * 2 * = 512 * (num of buffers in a vring) * 2 */ rv_vdev0buffer: vdev0buffer@4ae00000 { compatible = "shared-dma-pool"; reg = <0x0 0x4ae00000 0x0 0x40000>; no-map; }; /* * The name should be "vdev%dvring%d". * The size of each should be not less than * PAGE_ALIGN(vring_size(num, align)) * = PAGE_ALIGN(16 * num + 6 + 2 * num + (pads for align) + 6 + 8 * num) * * (Please refer to the vring layout in include/uapi/linux/virtio_ring.h) */ rv_vdev0vring0: vdev0vring0@4ae40000 { reg = <0x0 0x4ae40000 0x0 0x2000>; no-map; }; rv_vdev0vring1: vdev0vring1@4ae42000 { reg = <0x0 0x4ae42000 0x0 0x2000>; no-map; }; /* * mcu ram addr */ mcu0iram_reserved: mcu0iram@20000 { reg = <0x0 0x20000 0x0 0x10000>; no-map; }; mcu0dram0_reserved: mcu0dram0@30000 { reg = <0x0 0x30000 0x0 0x8000>; no-map; }; mcu0dram1_reserved: mcu0dram1@38000 { reg = <0x0 0x38000 0x0 0x8000>; no-map; }; dsp0_rpbuf_reserved: dsp0_rpbuf@4ae44000 { compatible = "shared-dma-pool"; no-map; reg = <0x0 0x4ae44000 0x0 0x8000>; }; dsp_share_space@4ab00000 { no-map; reg = <0x0 0x4ab00000 0x0 0x10000>; }; }; rpbuf_controller0: rpbuf_controller@0 { compatible = "allwinner,rpbuf-controller"; remoteproc = <&dsp0_rproc>; ctrl_id = <0>; memory-region = <&dsp0_rpbuf_reserved>; status = "okay"; }; ap6256_wifi: ap6256_wifi { compatible = "android,bcmdhd_wlan"; gpio_wl_reg_on = <&pio PC 3 GPIO_ACTIVE_HIGH>; gpio_wl_host_wake = <&pio PC 7 GPIO_ACTIVE_HIGH>; }; gpio-keys { compatible = "gpio-keys"; status = "okay"; home-key { gpios = <&pio PI 11 GPIO_ACTIVE_LOW>; linux,code = <172>; label = "user key"; debounce-interval = <10>; wakeup-source = <0x1>; gpio-key,wakeup; }; }; awlink0: awlink@0x0{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,t527-awlink"; device_type = "awlink0"; awlink-pin = <1>; id = <0>; status = "okay"; }; awlink1: awlink@0x1{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,t527-awlink"; device_type = "awlink1"; awlink-pin = <0>; id = <1>; status = "okay"; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; status = "okay"; led0: led-green { label = "green"; gpios = <&pio PB 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; linux,default-trigger = "heartbeat"; default-state = "on"; }; led1: led-red { label = "red"; gpios = <&pio PB 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; linux,default-trigger = "heartbeat"; default-state = "on"; }; }; }; &r_pio { awlink1_pins_a: awlink1_pins@0{ pins = "PL4", "PL5"; function = "can"; }; awlink1_pins_b: awlink1_pins@1{ pins = "PL4", "PL5"; function = "gpio_in"; }; uart8_pins_a: uart8_pins@0 { pins = "PL12", "PL13"; function = "s_uart0"; }; uart8_pins_b: uart8_pins@1 { pins = "PL12", "PL13"; function = "gpio_in"; }; uart9_pins_a: uart9_pins@0 { pins = "PL2", "PL3"; function = "s_uart1"; }; uart9_pins_b: uart9_pins@1 { pins = "PL2", "PL3"; function = "gpio_in"; }; s_twi0_pins_default: s_twi0@0 { pins = "PL0", "PL1"; function = "s_twi0"; drive-strength = <10>; bias-pull-up; }; s_twi0_pins_sleep: s_twi0@1 { pins = "PL0", "PL1"; function = "gpio_in"; }; s_twi1_pins_default: s_twi1@0 { pins = "PL8", "PL9"; function = "s_twi1"; drive-strength = <10>; bias-pull-up; }; s_twi1_pins_sleep: s_twi1@1 { pins = "PL8", "PL9"; function = "gpio_in"; }; s_twi2_pins_default: s_twi2@0 { pins = "PM4", "PM5"; function = "s_twi2"; drive-strength = <20>; bias-pull-up; }; s_twi2_pins_sleep: s_twi2@1 { pins = "PM4", "PM5"; function = "gpio_in"; }; s_irrx_pins_default: s_irrx@0 { pins = "PL11"; function = "s_cir"; }; s_irrx_pins_sleep: s_irrx@1 { pins = "PL11"; function = "gpio_in"; }; }; &pio { vcc-pg-supply = <®_pio1_8>; vcc-pf-supply = <®_pio1_8>; vcc-pfo-supply = <®_pio3_3>; vcc-pd-supply = <®_pio3_3>; vcc-pe-supply = <®_pio3_3>; vcc-pi-supply = <®_pio3_3>; vcc-pj-supply = <®_pio3_3>; vcc-pk-supply = <®_pio3_3>; uart0_pins_a: uart0_pins@0 { pins = "", ""; function = "uart0"; }; uart0_pins_b: uart0_pins@1 { pins = "", ""; function = "gpio_in"; }; awlink0_pins_a: awlink0_pins@0{ pins = "PI15", "PI16"; function = "can"; }; awlink0_pins_b: awlink0_pins@1{ pins = "PI15", "PI16"; function = "gpio_in"; }; uart2_pins_a: uart2_pins@0 { pins = "PB0", "PB1"; function = "uart2"; }; uart2_pins_b: uart2_pins@1 { pins = "PB0", "PB1"; function = "gpio_in"; }; uart3_pins_a: uart3_pins@0 { pins = "PJ20", "PJ21", "PJ22", "PJ23"; function = "uart3"; }; uart3_pins_b: uart3_pins@1 { pins = "PJ20", "PJ21", "PJ22", "PJ23"; function = "gpio_in"; }; uart4_pins_a: uart4_pins@0 { pins = "PE1", "PE2"; // "PE3", "PE4"; function = "uart4"; }; uart4_pins_b: uart4_pins@1 { pins = "PE1", "PE2"; // "PE3", "PE4"; function = "gpio_in"; }; uart5_pins_a: uart5_pins@0 { pins = "PE13", "PE14"; function = "uart5"; }; uart5_pins_b: uart5_pins@1 { pins = "PE13", "PE14"; function = "gpio_in"; }; uart6_pins_a: uart6_pins@0 { pins = "PE11", "PE12"; function = "uart6"; }; uart6_pins_b: uart6_pins@1 { pins = "PE11", "PE12"; function = "gpio_in"; }; uart7_pins_a: uart7_pins@0 { pins = "PB11", "PB12", "PB13", "PB14"; function = "uart7"; }; uart7_pins_b: uart7_pins@1 { pins = "PB11", "PB12", "PB13", "PB14"; function = "gpio_in"; }; pwm0_0_pin_active: pwm0_0@0 { pins = "PD23"; function = "pwm0_0"; }; pwm0_0_pin_sleep: pwm0_0@1 { pins = "PD23"; function = "gpio_in"; bias-pull-down; }; pwm0_1_pin_active: pwm0_1@0 { pins = "PD22"; function = "pwm0_1"; }; pwm0_1_pin_sleep: pwm0_1@1 { pins = "PD22"; function = "gpio_in"; bias-pull-down; }; pwm0_2_pin_active: pwm0_2@0 { pins = "PB11"; function = "pwm0_2"; }; pwm0_2_pin_sleep: pwm0_2@1 { pins = "PB11"; function = "gpio_in"; bias-pull-down; }; pwm0_3_pin_active: pwm0_3@0 { pins = "PB12"; function = "pwm0_3"; }; pwm0_3_pin_sleep: pwm0_3@1 { pins = "PB12"; function = "gpio_in"; bias-pull-down; }; pwm0_4_pin_active: pwm0_4@0 { pins = "PI3"; function = "pwm0_4"; }; pwm0_4_pin_sleep: pwm0_4@1 { pins = "PI3"; function = "gpio_in"; bias-pull-down; }; pwm0_5_pin_active: pwm0_5@0 { pins = "PI4"; function = "pwm0_5"; }; pwm0_5_pin_sleep: pwm0_5@1 { pins = "PI4"; function = "gpio_in"; bias-pull-down; }; pwm0_10_pin_active: pwm0_10@0 { pins = "PI9"; function = "pwm0_10"; }; pwm0_10_pin_sleep: pwm0_10@1 { pins = "PI9"; function = "gpio_in"; bias-pull-down; }; ledc_pins_a: ledc@0 { pins = "PG0"; function = "ledc"; drive-strength = <10>; }; ledc_pins_b: ledc@1 { pins = "PG0"; function = "gpio_in"; }; irrx_pins_default: irrx@0 { pins = "PI8"; function = "cir"; }; irrx_pins_sleep: irrx@1 { pins = "PI8"; function = "gpio_in"; }; irtx_pins_default: irtx@0 { pins = "PH18"; function = "cir"; }; irtx_pins_sleep: irtx@1 { pins = "PH18"; function = "gpio_in"; }; twi0_pins_default: twi0@0 { pins = "PD22", "PD23"; function = "twi0"; drive-strength = <10>; bias-pull-up; }; twi0_pins_sleep: twi0@1 { pins = "PD22", "PD23"; function = "gpio_in"; }; twi1_pins_default: twi1@0 { pins = "PB4", "PB5"; function = "twi1"; drive-strength = <10>; bias-pull-up; }; twi1_pins_sleep: twi1@1 { pins = "PB4", "PB5"; function = "gpio_in"; }; twi2_pins_default: twi2@0 { pins = "PE1", "PE2"; function = "twi2"; drive-strength = <20>; bias-pull-up; }; twi2_pins_sleep: twi2@1 { pins = "PE1", "PE2"; function = "gpio_in"; }; twi3_pins_default: twi3@0 { pins = "PE3", "PE4"; function = "twi3"; drive-strength = <20>; bias-pull-up; }; twi3_pins_sleep: twi3@1 { pins = "PE3", "PE4"; function = "gpio_in"; }; twi4_pins_default: twi4@0 { pins = "PI0", "PI1"; function = "twi4"; drive-strength = <10>; bias-pull-up; }; twi4_pins_sleep: twi4@1 { pins = "PI0", "PI1"; function = "gpio_in"; }; twi5_pins_default: twi5@0 { pins = "PJ26", "PJ27"; function = "twi5"; drive-strength = <10>; bias-pull-up; }; twi5_pins_sleep: twi5@1 { pins = "PJ26", "PJ27"; function = "gpio_in"; }; owa_pins_a: owa@0 { pins = "PI10"; function = "owa"; drive-strength = <20>; bias-disable; }; owa_pins_b: owa@1 { pins = "PI10"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s0_pins_a: i2s0@0 { pins = "PB4", "PB5", "PB6"; function = "i2s0"; drive-strength = <20>; bias-disable; }; i2s0_pins_b: i2s0@1 { pins = "PB4", "PB5", "PB6", "PB7", "PB8"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s0_pins_c: i2s0@2 { pins = "PB7"; function = "i2s0_dout"; drive-strength = <20>; bias-disable; }; i2s0_pins_d: i2s0@3 { pins = "PB8"; function = "i2s0_din"; drive-strength = <20>; bias-disable; }; i2s1_pins_a: i2s1@0 { pins = "PG10", "PG11", "PG12"; function = "i2s1"; drive-strength = <20>; bias-disable; }; i2s1_pins_b: i2s1@1 { pins = "PG10", "PG11", "PG12", "PG13", "PG14"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s1_pins_c: i2s1@2 { pins = "PG13"; function = "i2s1_dout"; drive-strength = <20>; bias-disable; }; i2s1_pins_d: i2s1@3 { pins = "PG14"; function = "i2s1_din"; drive-strength = <20>; bias-disable; }; i2s2_pins_a: i2s2@0 { pins = "PH9", "PH10"; function = "i2s2"; drive-strength = <20>; bias-disable; }; i2s2_pins_b: i2s2@1 { pins = "PH2", "PH3", "PH8", "PH9", "PH10", "PH11", "PH12"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s2_pins_c: i2s2@2 { pins = "PH2", "PH3", "PH12"; function = "i2s2_din"; drive-strength = <20>; bias-disable; }; i2s2_pins_d: i2s2@3 { pins = "PH11"; function = "i2s2_dout"; drive-strength = <20>; bias-disable; }; i2s2_pins_e: i2s2@4 { pins = "PH8"; function = "i2s2_mclk"; drive-strength = <20>; bias-disable; }; i2s3_pins_a: i2s3@0 { pins = "PF3", "PF5", "PF6"; function = "i2s3"; drive-strength = <20>; bias-disable; }; i2s3_pins_b: i2s3@1 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5", "PF6"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s3_pins_c: i2s3@2 { pins = "PF0", "PF2", "PF4"; function = "i2s3_din"; drive-strength = <20>; bias-disable; }; i2s3_pins_d: i2s3@3 { pins = "PF1"; function = "i2s3_dout"; drive-strength = <20>; bias-disable; }; rgb24_pins_a: rgb24@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ "PD20", "PD21", "PD22","PD23","PD24","PD25","PD26","PD27"; function = "dpss"; drive-strength = <30>; }; rgb24_pins_b: rgb24@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ "PD20", "PD21", "PD22", "PD23","PD24","PD25","PD26","PD27"; function = "gpio_in"; }; lvds0_pins_a: lvds0@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "lvds0"; drive-strength = <30>; }; lvds0_pins_b: lvds0@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "gpio_in"; }; nand0_pins_default: nand0@0 { pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; function = "nand0"; drive-strength = <30>; }; nand0_pins_rb: nand0@1 { pins = "PC4", "PC6", "PC3", "PC7"; function = "nand0"; drive-strength = <30>; bias-pull-up; /* only RB&CE should be pulled up */ }; nand0_pins_sleep: nand0@2 { pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; function = "io_disabled"; drive-strength = <10>; }; gmac0_pins_default: gmac0@0 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10","PH13","PH14", "PH15","PH16","PH17","PH18"; drive-strength = <40>; function = "gmac0"; bias-pull-up; }; gmac0_pins_sleep: gmac0@1 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10","PH13","PH14", "PH15","PH16","PH17","PH18"; function = "gpio_in"; }; gmac1_pins_default: gmac1@0 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12","PJ13", "PJ14", "PJ15"; drive-strength = <40>; function = "gmac1"; bias-pull-up; }; gmac1_pins_sleep: gmac1@1 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12","PJ13", "PJ14", "PJ15"; function = "gpio_in"; }; spi1_pin_default: spi1_pin_default{ pins = "PI2","PI3","PI4","PI5"; function = "spi1"; }; spi1_pin_sleep: spi1_pin_sleep{ pins = "PI2","PI3","PI4","PI5"; function = "gpio_in"; }; spi2_pin_default: spi2_default { pins = "PI6","PI7","PI8","PI12"; function = "spi2"; }; spi2_pin_sleep: spi2_sleep { pins = "PI6","PI7","PI8","PI12"; function = "gpio_in"; }; }; &spi1 { clock-frequency = <100000000>; pinctrl-names = "default","sleep"; pinctrl-0 = <&spi1_pin_default>; pinctrl-1 = <&spi1_pin_sleep>; sunxi,spi-num-cs = <1>; sunxi,spi-bus-mode = <SUNXI_SPI_BUS_MASTER>; sunxi,spi-cs-mode = <SUNXI_SPI_CS_AUTO>; status = "okay"; spidev1 { reg = <0>; compatible = "rohm,dh2228fv"; spi-max-frequency = <500000>; spi-rx-bus-width = <0x1>; spi-tx-bus-width = <0x1>; }; }; &spi2{ clock-frequency = <100000000>; pinctrl-names = "default","sleep"; pinctrl-0 = <&spi2_pin_default>; pinctrl-1 = <&spi2_pin_sleep>; sunxi,spi-num-cs = <1>; sunxi,spi-bus-mode = <SUNXI_SPI_BUS_MASTER>; sunxi,spi-cs-mode = <SUNXI_SPI_CS_AUTO>; status = "okay"; spidev2 { reg = <0>; compatible = "rohm,dh2228fv"; spi-max-frequency = <500000>; spi-rx-bus-width = <0x1>; spi-tx-bus-width = <0x1>; }; }; &soc { auto_print@54321 { reg = <0x0 0x54321 0x0 0x0>; device_type = "auto_print"; status = "okay"; }; car_reverse: car-reverse { compatible = "allwinner,sunxi-car-reverse"; /* video source setting*/ video_channel = <0>; video_source = <0>; format_type = <0>; video_source_width = <1920>; video_source_height = <1080>; src_size_adaptive = <1>; /* display setting */ overview_type = <1>; screen_width = <1280>; screen_height = <800>; screen_size_adaptive = <1>; discard_frame = <0>; di_used = <0>; g2d_used = <1>; rotation = <0>; /* auxiliary line setting */ auxiliary_line_type = <1>; aux_angle = <0>; aux_lr = <0>; reverse_int_pin = <&pio PI 15 GPIO_ACTIVE_HIGH>; status = "disabled"; }; dsp0_rproc: dsp0_rproc@0 { mboxes = <&msgbox 4>, <&msgbox 6>; mbox-names = "arm-kick", "dsp-standby"; memory-region = <&dsp0ddr_reserved>, <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, <&dsp_vdev0vring1>, <&mcu0iram_reserved>, <&mcu0dram0_reserved>, <&mcu0dram1_reserved>; memory-mappings = /* < DA len PA > */ /* local SRAM via external bus */ < 0x20000 0x20000 0x20000 >, /* local SRAM via internal bus */ < 0x400000 0x10000 0x20000 >, < 0x420000 0x8000 0x30000 >, < 0x440000 0x8000 0x38000 >, /* DDR front 256MB */ < 0x10000000 0x10000000 0x40000000 >, /* local SRAM via internal bus */ < 0x20020000 0x10000 0x400000 >, < 0x20030000 0x8000 0x420000 >, < 0x20038000 0x8000 0x440000 >, /* DDR front 256MB */ < 0x30000000 0x10000000 0x40000000 >, /* DDR front 1GB */ < 0x40000000 0x40000000 0x40000000 >, /* DDR front 1GB */ < 0x80000000 0x40000000 0x40000000 >, /* DDR front 1GB */ < 0xC0000000 0x40000000 0x40000000 >; standby-ctrl-en = <0x1>; standby-record-reg = <0x07090110>; status = "okay"; }; e906_rproc: e906_rproc@7130000 { mboxes = <&msgbox 8>; mbox-names = "arm-kick"; memory-region = <&riscvsram0_reserved>, <&riscvsram1_reserved>, <&rv_vdev0buffer>, <&rv_vdev0vring0>, <&rv_vdev0vring1>; memory-mappings = /* < DA len PA > */ /* DSP RAM */ < 0x20000 0x20000 0x20000 >, /* SRAM A2 */ < 0x40000 0x24000 0x40000 >, /* DDR */ < 0x8000000 0x37f00000 0x8000000 >, /* SRAM SPACE 0 */ < 0x3ffc0000 0x40000 0x07280000 >, /* SRAM SPACE 1 */ < 0x40000000 0x40000 0x072c0000 >, /* DRAM SPACE */ < 0x40040000 0x3ffc0000 0x40040000>; status = "okay"; }; }; &awlink0 { pinctrl-names = "defautl", "sleep"; pinctrl-0 = <&awlink0_pins_a>; pinctrl-1 = <&awlink0_pins_b>; status = "okay"; }; &awlink1 { pinctrl-names = "defautl", "sleep"; pinctrl-0 = <&awlink1_pins_a>; pinctrl-1 = <&awlink1_pins_b>; status = "okay"; }; &uart0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pins_a>; pinctrl-1 = <&uart0_pins_b>; uart-supply = <®_cldo3>; status = "okay"; }; &uart1 { status = "okay"; }; &uart2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart2_pins_a>; pinctrl-1 = <&uart2_pins_b>; status = "okay"; }; &uart3 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pins_a>; pinctrl-1 = <&uart3_pins_b>; status = "okay"; }; &uart4 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart4_pins_a>; pinctrl-1 = <&uart4_pins_b>; uart4_type = <2>; //io_num sunxi,uart-rs485 = <1>; sunxi,uart-485fl = <0>; //sunxi,uart-485oe-gpios = <&pio PE 3 1 0xffffffff 0xffffffff 0>; sunxi,uart-485oe-gpios = <&pio PE 3 GPIO_ACTIVE_HIGH>; status = "okay"; }; &uart5 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart5_pins_a>; pinctrl-1 = <&uart5_pins_b>; status = "disabled"; }; &uart6 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart6_pins_a>; pinctrl-1 = <&uart6_pins_b>; uart6_type = <2>; //io_num sunxi,uart-rs485 = <1>; sunxi,uart-485fl = <0>; //sunxi,uart-485oe-gpios = <&pio PE 13 1 0xffffffff 0xffffffff 0>; sunxi,uart-485oe-gpios = <&pio PE 13 GPIO_ACTIVE_HIGH>; status = "okay"; }; &uart7 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart7_pins_a>; pinctrl-1 = <&uart7_pins_b>; status = "okay"; }; &uart8 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart8_pins_a>; pinctrl-1 = <&uart8_pins_b>; status = "okay"; }; &uart9 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart9_pins_a>; pinctrl-1 = <&uart9_pins_b>; status = "okay"; }; &lradc { key_cnt = <2>; key0 = <210 0x73>; key1 = <410 0x72>; key_debounce; debounce_value = <50>; status = "okay"; }; &irrx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&irrx_pins_default>; pinctrl-1 = <&irrx_pins_sleep>; irrx-supply = <®_dcdc4>; status = "disabled"; }; &s_irrx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&s_irrx_pins_default>; pinctrl-1 = <&s_irrx_pins_sleep>; status = "okay"; }; &irtx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&irtx_pins_default>; pinctrl-1 = <&irtx_pins_sleep>; status = "disabled"; }; &gpadc0 { channel_num = <5>; channel_select = <0x18>; channel_data_select = <0x18>; channel_compare_select = <0x18>; channel_cld_select = <0x18>; channel_chd_select = <0x18>; // channel0_compare_lowdata = <1700000>; // channel0_compare_higdata = <460000>; // channel1_compare_lowdata = <460000>; // channel1_compare_higdata = <1200000>; // channel2_compare_lowdata = <1700000>; // channel2_compare_higdata = <460000>; // channel3_compare_lowdata = <1700000>; // channel3_compare_higdata = <460000>; // channel4_compare_lowdata = <1700000>; // channel4_compare_higdata = <460000>; status = "okay"; }; &gpadc1 { channel_num = <2>; channel_select = <3>; channel_data_select = <3>; channel_compare_select = <3>; channel_cld_select = <3>; channel_chd_select = <3>; channel0_compare_lowdata = <1700000>; channel0_compare_higdata = <1200000>; channel1_compare_lowdata = <460000>; channel1_compare_higdata = <1200000>; status = "disabled"; }; &pwm0_0 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_0_pin_active>; pinctrl-1 = <&pwm0_0_pin_sleep>; pwm-supply = <®_dcdc4>; status = "okay"; }; &pwm0_1 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_1_pin_active>; pinctrl-1 = <&pwm0_1_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &pwm0_2 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_2_pin_active>; pinctrl-1 = <&pwm0_2_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &pwm0_3 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_3_pin_active>; pinctrl-1 = <&pwm0_3_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &pwm0_4 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_4_pin_active>; pinctrl-1 = <&pwm0_4_pin_sleep>; pwm-supply = <®_dcdc4>; status = "okay"; }; &pwm0_5 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_5_pin_active>; pinctrl-1 = <&pwm0_5_pin_sleep>; pwm-supply = <®_dcdc4>; status = "okay"; }; &pwm0_10 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_10_pin_active>; pinctrl-1 = <&pwm0_10_pin_sleep>; pwm-supply = <®_dcdc4>; status = "okay"; }; &ledc { pinctrl-names = "default", "sleep"; pinctrl-0 = <&ledc_pins_a>; pinctrl-1 = <&ledc_pins_b>; led_count = <34>; output_mode = "GRB"; reset_ns = <84>; t1h_ns = <800>; t1l_ns = <320>; t0h_ns = <300>; t0l_ns = <800>; wait_time0_ns = <84>; wait_time1_ns = <84>; wait_data_time_ns = <600000>; status = "disabled"; }; &twi0 { clock-frequency = <400000>; pinctrl-0 = <&twi0_pins_default>; pinctrl-1 = <&twi0_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; pcie_usb_phy@74 { compatible = "combphy,phy74"; reg = <0x74>; status = "disabled"; }; pcie_usb_phy@75 { compatible = "combphy,phy75"; reg = <0x75>; status = "disabled"; }; ctp { compatible = "allwinner,goodix"; reg = <0x5d>; device_type = "ctp"; status = "disabled"; ctp_name = "gt9xxnew_ts"; ctp_twi_id = <0x0>; ctp_twi_addr = <0x5d>; ctp_screen_max_x = <0x320>; ctp_screen_max_y = <0x500>; ctp_revert_x_flag = <0x1>; ctp_revert_y_flag = <0x1>; ctp_exchange_x_y_flag = <0x0>; ctp_int_port = <&pio PH 9 GPIO_ACTIVE_LOW>; ctp_wakeup = <&pio PH 10 GPIO_ACTIVE_LOW>; ctp-supply = <®_cldo2>; ctp_power_ldo_vol = <3300>; }; gt9xx { compatible = "goodix,gt9xx"; reg = <0x5d>; status = "disabled"; irq-gpios = <&pio PD 20 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PD 21 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ B4 00 05 20 03 0A 3D 00 01 0A 28 0F 50 32 03 05 00 00 00 00 00 00 06 17 19 1F 14 8E 2E 99 2D 2F 35 11 00 00 00 1A 03 10 00 00 00 00 00 00 00 00 00 00 00 32 50 94 D5 02 07 00 00 04 8E 48 00 8A 4D 00 86 53 00 83 59 00 80 60 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 05 06 07 08 09 0C 0D 0E 0F 10 11 14 15 16 17 FF FF FF FF FF FF FF FF FF FF FF FF 28 27 26 25 24 23 22 21 20 1F 1E 1C 1B 19 13 12 11 10 0F 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF AB 01 ]; }; }; &twi1 { clock-frequency = <400000>; pinctrl-0 = <&twi1_pins_default>; pinctrl-1 = <&twi1_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; status = "okay"; mir3da { compatible = "allwinner,mir3da"; reg = <0x26>; device_type = "gsensor"; status = "disabled"; gsensor_twi_id = <0x1>; gsensor_twi_addr = <0x26>; gsensor_int1 = <&pio PH 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; gsensor-supply = <®_cldo3>; gsensor_vcc_io_val = <3300>; }; eeprom@50 { compatible = "atmel,24c32"; reg = <0x50>; status = "okay"; }; }; &twi2 { clock-frequency = <400000>; pinctrl-0 = <&twi2_pins_default>; pinctrl-1 = <&twi2_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "disabled"; }; &twi3 { clock-frequency = <400000>; pinctrl-0 = <&twi3_pins_default>; pinctrl-1 = <&twi3_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "disabled"; }; &twi4 { clock-frequency = <400000>; pinctrl-0 = <&twi4_pins_default>; pinctrl-1 = <&twi4_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; rtc@51 { compatible = "nxp,pcf8563"; reg = <0x51>; #clock-cells = <0>; status = "okay"; }; //070 inch ft5x06: ft5x06@38 { compatible = "edt,edt-ft5406", "edt,edt-ft5x06"; reg = <0x38>; pinctrl-names = "default"; interrupt-parent = <&pio>; interrupts = <PJ 19 IRQ_TYPE_EDGE_FALLING>; reset-gpios = <&pio PJ 18 GPIO_ACTIVE_LOW>; touchscreen-size-x=<1024>; touchscreen-size-y=<600>; }; // 101 inch gt9271@14 { compatible = "goodix,gt9271"; reg = <0x14>; //pinctrl-names = "default"; //pinctrl-0 = <&pinctrl_i2c_synaptics_dsx_io>; interrupt-parent = <&pio>; interrupts = <PJ 19 IRQ_TYPE_EDGE_FALLING>; reset-gpios = <&pio PJ 18 GPIO_ACTIVE_LOW>; /*synaptics,y-rotation;*/ esd-recovery-timeout-ms = <2000>; irq-gpios = <&pio PJ 19 GPIO_ACTIVE_HIGH>; //reset-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; status = "disabled"; }; gt9xx { compatible = "goodix,gt9xx"; reg = <0x5d>; status = "disabled"; irq-gpios = <&pio PJ 19 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PJ 18 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ B4 00 05 20 03 0A 3D 00 01 0A 28 0F 50 32 03 05 00 00 00 00 00 00 06 17 19 1F 14 8E 2E 99 2D 2F 35 11 00 00 00 1A 03 10 00 00 00 00 00 00 00 00 00 00 00 32 50 94 D5 02 07 00 00 04 8E 48 00 8A 4D 00 86 53 00 83 59 00 80 60 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 05 06 07 08 09 0C 0D 0E 0F 10 11 14 15 16 17 FF FF FF FF FF FF FF FF FF FF FF FF 28 27 26 25 24 23 22 21 20 1F 1E 1C 1B 19 13 12 11 10 0F 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF AB 01 ]; }; }; &twi5 { clock-frequency = <400000>; pinctrl-0 = <&twi5_pins_default>; pinctrl-1 = <&twi5_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "disabled"; gt9xx_secondary { compatible = "goodix,gt9xx_secondary"; reg = <0x5d>; status = "okay"; irq-gpios = <&pio PI 13 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PI 14 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ 43 B0 04 80 07 0A 35 00 01 08 28 0F 50 32 03 05 00 00 00 00 00 00 00 17 19 1B 14 90 2B 99 2F 31 8E 12 00 00 00 DA 03 10 00 00 00 00 00 00 00 00 00 11 00 29 4B 94 C5 02 07 00 00 04 85 2B 00 7D 31 00 77 37 00 72 3E 00 6F 46 00 6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 C0 00 00 00 00 00 00 00 17 16 15 14 11 10 0F 0E 0D 0C 09 08 07 06 05 04 01 00 FF FF FF FF FF FF 00 00 00 00 00 00 25 24 23 22 21 20 1F 1E 1C 1B 19 14 13 12 11 10 0F 0E 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF 00 00 00 00 00 00 00 00 00 00 73 01 ]; }; }; &csi_mclk3_pins_a { pins = "PK13"; function = "ncsi"; }; &csi_mclk3_pins_b { pins = "PK13"; }; &mipib_4lane_pins_a { pins = "PK6", "PK7", "PK8", "PK9"; }; &mipib_4lane_pins_b { pins = "PK6", "PK7", "PK8", "PK9"; }; &vind0 { csi_top = <360000000>; csi_isp = <300000000>; vind_mclkpin-supply = <®_bldo3>; /* vcc-pe */ vind_mclkpin_vol = <1800000>; vind_mcsipin-supply = <®_bldo3>; /* vcc-pk */ vind_mcsipin_vol = <1800000>; vind_mipipin-supply = <®_bldo3>; /* vcc-mcsi */ vind_mipipin_vol = <1800000>; status = "okay"; csi3:csi@5823000 { pinctrl-names = "default","sleep"; pinctrl-0 = <&ncsi_bt1120_pins_a>; pinctrl-1 = <&ncsi_bt1120_pins_b>; status = "disabled"; }; tdm0:tdm@5908000 { work_mode = <0>; }; isp00:isp@5900000 { work_mode = <0>; }; isp01:isp@58ffffc { status = "disabled"; }; isp02:isp@58ffff8 { status = "disabled"; }; isp03:isp@58ffff4 { status = "disabled"; }; isp10:isp@4 { status = "okay"; }; isp20:isp@5 { status = "okay"; }; scaler00:scaler@5910000 { work_mode = <0>; }; scaler01:scaler@590fffc { status = "disabled"; }; scaler02:scaler@590fff8 { status = "disabled"; }; scaler03:scaler@590fff4 { status = "disabled"; }; scaler10:scaler@5910400 { work_mode = <0>; }; scaler11:scaler@59103fc { status = "disabled"; }; scaler12:scaler@59103f8 { status = "disabled"; }; scaler13:scaler@59103f4 { status = "disabled"; }; scaler20:scaler@5910800 { work_mode = <0>; }; scaler21:scaler@59107fc { status = "disabled"; }; scaler22:scaler@59107f8 { status = "disabled"; }; scaler23:scaler@59107f4 { status = "disabled"; }; scaler30:scaler@5910c00 { work_mode = <0>; }; scaler31:scaler@5910bfc { status = "disabled"; }; scaler32:scaler@5910bf8 { status = "disabled"; }; scaler33:scaler@5910bf4 { status = "disabled"; }; scaler40:scaler@16 { status = "okay"; }; scaler50:scaler@17 { status = "okay"; }; actuator0: actuator@2108180 { device_type = "actuator0"; actuator0_name = "dw9714_act"; actuator0_slave = <0x18>; actuator0_af_pwdn = <>; actuator0_afvdd = "afvcc-csi"; actuator0_afvdd_vol = <2800000>; status = "disabled"; }; flash0: flash@2108190 { device_type = "flash0"; flash0_type = <2>; flash0_en = <&r_pio PL 11 GPIO_ACTIVE_LOW>; flash0_mode = <>; flash0_flvdd = ""; flash0_flvdd_vol = <>; device_id = <0>; status = "disabled"; }; sensor0:sensor@5812000 { device_type = "sensor0"; sensor0_mname = "ov5640_mipi_cam1"; sensor0_twi_cci_id = <7>; sensor0_twi_addr = <0x78>; // sensor0_mclk_id = <0>; sensor0_pos = "rear"; sensor0_isp_used = <0>; sensor0_fmt = <0>; sensor0_stby_mode = <0>; sensor0_vflip = <0>; sensor0_hflip = <0>; sensor0_cameravdd-supply = <>; sensor0_cameravdd_vol = <>; sensor0_iovdd-supply = <>; sensor0_iovdd_vol = <>; sensor0_avdd-supply = <>; sensor0_avdd_vol = <>; sensor0_dvdd-supply = <>; sensor0_dvdd_vol = <>; sensor0_power_en = <&pio PH 11 GPIO_ACTIVE_HIGH>; sensor0_reset = <&r_pio PM 0 GPIO_ACTIVE_LOW>; sensor0_pwdn = <&r_pio PM 1 GPIO_ACTIVE_HIGH>; status = "okay"; }; sensor1:sensor@5812010 { device_type = "sensor1"; sensor1_mname = "ov5640_mipi_cam2"; sensor1_twi_cci_id = <8>; sensor1_twi_addr = <0x78>; // sensor1_mclk_id = <3>; sensor1_pos = "front"; sensor1_isp_used = <0>; sensor1_fmt = <0>; sensor1_stby_mode = <0>; sensor1_vflip = <0>; sensor1_hflip = <0>; sensor1_iovdd-supply = <>; sensor1_iovdd_vol = <>; sensor1_avdd-supply = <>; sensor1_avdd_vol = <>; sensor1_dvdd-supply = <>; sensor1_dvdd_vol = <>; sensor1_power_en = <&pio PH 8 GPIO_ACTIVE_HIGH>; sensor1_reset = <&r_pio PM 2 GPIO_ACTIVE_LOW>; sensor1_pwdn = <&r_pio PM 3 GPIO_ACTIVE_HIGH>; status = "okay"; }; vinc00:vinc@5830000 { vinc0_csi_sel = <0>; vinc0_mipi_sel = <0>; vinc0_isp_sel = <4>; vinc0_isp_tx_ch = <0>; vinc0_tdm_rx_sel = <0>; vinc0_rear_sensor_sel = <0>; vinc0_front_sensor_sel = <0>; vinc0_sensor_list = <0>; device_id = <0>; work_mode = <0x0>; status = "okay"; }; vinc01:vinc@582fffc { vinc1_csi_sel = <1>; vinc1_mipi_sel = <2>; vinc1_isp_sel = <1>; vinc1_isp_tx_ch = <0>; vinc1_tdm_rx_sel = <1>; vinc1_rear_sensor_sel = <1>; vinc1_front_sensor_sel = <1>; vinc1_sensor_list = <0>; device_id = <1>; status = "disabled"; }; vinc02:vinc@582fff8 { vinc2_csi_sel = <2>; vinc2_mipi_sel = <0xff>; vinc2_isp_sel = <2>; vinc2_isp_tx_ch = <2>; vinc2_tdm_rx_sel = <2>; vinc2_rear_sensor_sel = <0>; vinc2_front_sensor_sel = <0>; vinc2_sensor_list = <0>; device_id = <2>; status = "disabled"; }; vinc03:vinc@582fff4 { vinc3_csi_sel = <0>; vinc3_mipi_sel = <0xff>; vinc3_isp_sel = <0>; vinc3_isp_tx_ch = <0>; vinc3_tdm_rx_sel = <0>; vinc3_rear_sensor_sel = <1>; vinc3_front_sensor_sel = <1>; vinc3_sensor_list = <0>; device_id = <3>; status = "disabled"; }; vinc10:vinc@5831000 { vinc4_csi_sel = <0>; vinc4_mipi_sel = <0>; vinc4_isp_sel = <4>; vinc4_isp_tx_ch = <1>; vinc4_tdm_rx_sel = <0>; vinc4_rear_sensor_sel = <0>; vinc4_front_sensor_sel = <0>; vinc4_sensor_list = <0>; device_id = <4>; work_mode = <0x0>; status = "okay"; }; vinc11:vinc@5830ffc { vinc5_csi_sel = <2>; vinc5_mipi_sel = <0xff>; vinc5_isp_sel = <1>; vinc5_isp_tx_ch = <1>; vinc5_tdm_rx_sel = <1>; vinc5_rear_sensor_sel = <0>; vinc5_front_sensor_sel = <0>; vinc5_sensor_list = <0>; device_id = <5>; status = "disabled"; }; vinc12:vinc@5830ff8 { vinc6_csi_sel = <2>; vinc6_mipi_sel = <0xff>; vinc6_isp_sel = <0>; vinc6_isp_tx_ch = <0>; vinc6_tdm_rx_sel = <0>; vinc6_rear_sensor_sel = <0>; vinc6_front_sensor_sel = <0>; vinc6_sensor_list = <0>; device_id = <6>; status = "disabled"; }; vinc13:vinc@5830ff4 { vinc7_csi_sel = <2>; vinc7_mipi_sel = <0xff>; vinc7_isp_sel = <0>; vinc7_isp_tx_ch = <0>; vinc7_tdm_rx_sel = <0>; vinc7_rear_sensor_sel = <0>; vinc7_front_sensor_sel = <0>; vinc7_sensor_list = <0>; device_id = <7>; status = "disabled"; }; vinc20:vinc@5832000 { vinc8_csi_sel = <0>; vinc8_mipi_sel = <0>; vinc8_isp_sel = <4>; vinc8_isp_tx_ch = <2>; vinc8_tdm_rx_sel = <0>; vinc8_rear_sensor_sel = <0>; vinc8_front_sensor_sel = <0>; vinc8_sensor_list = <0>; device_id = <8>; work_mode = <0x0>; status = "okay"; }; vinc21:vinc@5831ffc { vinc9_csi_sel = <2>; vinc9_mipi_sel = <0xff>; vinc9_isp_sel = <0>; vinc9_isp_tx_ch = <0>; vinc9_tdm_rx_sel = <0>; vinc9_rear_sensor_sel = <0>; vinc9_front_sensor_sel = <0>; vinc9_sensor_list = <0>; device_id = <9>; status = "disabled"; }; vinc22:vinc@5831ff8 { vinc10_csi_sel = <2>; vinc10_mipi_sel = <0xff>; vinc10_isp_sel = <0>; vinc10_isp_tx_ch = <0>; vinc10_tdm_rx_sel = <0>; vinc10_rear_sensor_sel = <0>; vinc10_front_sensor_sel = <0>; vinc10_sensor_list = <0>; device_id = <10>; status = "disabled"; }; vinc23:vinc@5831ff4 { vinc11_csi_sel = <2>; vinc11_mipi_sel = <0xff>; vinc11_isp_sel = <0>; vinc11_isp_tx_ch = <0>; vinc11_tdm_rx_sel = <0>; vinc11_rear_sensor_sel = <0>; vinc11_front_sensor_sel = <0>; vinc11_sensor_list = <0>; device_id = <11>; status = "disabled"; }; vinc30:vinc@5833000 { vinc12_csi_sel = <0>; vinc12_mipi_sel = <0>; vinc12_isp_sel = <4>; vinc12_isp_tx_ch = <3>; vinc12_tdm_rx_sel = <0>; vinc12_rear_sensor_sel = <0>; vinc12_front_sensor_sel = <0>; vinc12_sensor_list = <0>; device_id = <12>; work_mode = <0x0>; status = "okay"; }; vinc31:vinc@5832ffc { vinc13_csi_sel = <2>; vinc13_mipi_sel = <0xff>; vinc13_isp_sel = <0>; vinc13_isp_tx_ch = <0>; vinc13_tdm_rx_sel = <0>; vinc13_rear_sensor_sel = <0>; vinc13_front_sensor_sel = <0>; vinc13_sensor_list = <0>; device_id = <13>; status = "disabled"; }; vinc32:vinc@5832ff8 { vinc14_csi_sel = <2>; vinc14_mipi_sel = <0xff>; vinc14_isp_sel = <0>; vinc14_isp_tx_ch = <0>; vinc14_tdm_rx_sel = <0>; vinc14_rear_sensor_sel = <0>; vinc14_front_sensor_sel = <0>; vinc14_sensor_list = <0>; device_id = <14>; status = "disabled"; }; vinc33:vinc@5832ff4 { vinc15_csi_sel = <2>; vinc15_mipi_sel = <0xff>; vinc15_isp_sel = <0>; vinc15_isp_tx_ch = <0>; vinc15_tdm_rx_sel = <0>; vinc15_rear_sensor_sel = <0>; vinc15_front_sensor_sel = <0>; vinc15_sensor_list = <0>; device_id = <15>; status = "disabled"; }; vinc40:vinc@5834000 { vinc16_csi_sel = <2>; vinc16_mipi_sel = <2>; vinc16_isp_sel = <4>; vinc16_isp_tx_ch = <0>; vinc16_tdm_rx_sel = <0>; vinc16_rear_sensor_sel = <1>; vinc16_front_sensor_sel = <1>; vinc16_sensor_list = <1>; device_id = <16>; status = "okay"; }; vinc50:vinc@5835000 { vinc17_csi_sel = <2>; vinc17_mipi_sel = <2>; vinc17_isp_sel = <4>; vinc17_isp_tx_ch = <1>; vinc17_tdm_rx_sel = <0>; vinc17_rear_sensor_sel = <1>; vinc17_front_sensor_sel = <1>; vinc17_sensor_list = <1>; device_id = <17>; status = "okay"; }; }; &twi6 { clock-frequency = <400000>; pinctrl-0 = <&s_twi0_pins_default>; pinctrl-1 = <&s_twi0_pins_sleep>; pinctrl-names = "default", "sleep"; device_type = "twi6"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; no_suspend = <1>; status = "okay"; tcs0: tcs@41 { compatible = "ext,tcs4838"; reg = <0x41>; status = "okay"; tcs4838_delay = <0>; regulator1: regulators@1 { reg_tcs0: dcdc0 { regulator-name = "tcs4838-dcdc0"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_tcs1: dcdc1 { regulator-name = "tcs4838-dcdc1"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; }; }; virtual-ext-dcdc0 { compatible = "xpower-vregulator,ext-dcdc0"; dcdc0-supply = <®_tcs0>; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_tcs1>; }; }; sy0: sy@60 { compatible = "ext,sy8827g"; reg = <0x60>; status = "okay"; sy8827g_delay = <0>; regulator2: regulators@2 { reg_sy0: dcdc0 { regulator-name = "sy8827g-dcdc0"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_sy1: dcdc1 { regulator-name = "sy8827g-dcdc1"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; }; }; virtual-ext-dcdc0 { compatible = "xpower-vregulator,ext-dcdc0"; dcdc0-supply = <®_sy0>; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_sy1>; }; }; axp1530: axp1530@36{ compatible = "ext,axp1530"; status = "okay"; reg = <0x36>; wakeup-source; regulators{ reg_ext_axp1530_dcdc1: dcdc1 { regulator-name = "axp1530-dcdc1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3400000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-always-on; }; reg_ext_axp1530_dcdc2: dcdc2 { regulator-name = "axp1530-dcdc2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1540000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-ramp-delay = <200>; /* FIXME */ regulator-always-on; }; reg_ext_axp1530_dcdc3: dcdc3 { regulator-name = "axp1530-dcdc3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1840000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-always-on; }; reg_ext_axp1530_aldo1: ldo1 { regulator-name = "axp1530-aldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; }; reg_ext_axp1530_dldo1: ldo2 { regulator-name = "axp1530-dldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; }; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_ext_axp1530_dcdc1>; }; virtual-ext-dcdc2 { compatible = "xpower-vregulator,ext-dcdc2"; dcdc2-supply = <®_ext_axp1530_dcdc2>; }; virtual-ext-dcdc3 { compatible = "xpower-vregulator,ext-dcdc3"; dcdc3-supply = <®_ext_axp1530_dcdc3>; }; virtual-ext-aldo1 { compatible = "xpower-vregulator,ext-aldo1"; aldo1-supply = <®_ext_axp1530_aldo1>; }; virtual-ext-dldo1 { compatible = "xpower-vregulator,ext-dldo1"; dldo1-supply = <®_ext_axp1530_dldo1>; }; }; pmu0: pmu@35 { compatible = "x-powers,axp2202"; reg = <0x35>; status = "okay"; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&nmi_intc>; x-powers,drive-vbus-en; pmu_reset = <0>; pmu_irq_wakeup = <1>; pmu_hot_shutdown = <1>; wakeup-source; usb_power_supply: usb_power_supply { compatible = "x-powers,axp2202-usb-power-supply"; status = "okay"; pmu_usbpc_vol = <4600>; pmu_usbpc_cur = <500>; pmu_usbad_vol = <4000>; pmu_usbad_cur = <2500>; pmu_usb_typec_used = <1>; wakeup_usb_in; wakeup_usb_out; det_acin_supply = <&gpio_power_supply>; pmu_acin_usbid_drv = <&pio PH 12 GPIO_ACTIVE_LOW>; pmu_vbus_det_gpio = <&pio PH 13 GPIO_ACTIVE_LOW>; }; gpio_power_supply: gpio_power_supply { compatible = "x-powers,gpio-supply"; status = "disabled"; pmu_acin_det_gpio = <&pio PH 14 GPIO_ACTIVE_LOW>; det_usb_supply = <&usb_power_supply>; }; bat_power_supply: bat-power-supply { compatible = "x-powers,axp2202-bat-power-supply"; param = <&axp2202_parameter>; status = "disabled"; pmu_chg_ic_temp = <0>; pmu_battery_rdc= <147>; pmu_battery_cap = <1771>; pmu_runtime_chgcur = <1000>; pmu_suspend_chgcur = <1500>; pmu_shutdown_chgcur = <1500>; pmu_init_chgvol = <4200>; pmu_battery_warning_level1 = <15>; pmu_battery_warning_level2 = <0>; pmu_chgled_func = <0>; pmu_chgled_type = <0>; pmu_bat_para1 = <0>; pmu_bat_para2 = <0>; pmu_bat_para3 = <0>; pmu_bat_para4 = <0>; pmu_bat_para5 = <0>; pmu_bat_para6 = <0>; pmu_bat_para7 = <2>; pmu_bat_para8 = <3>; pmu_bat_para9 = <4>; pmu_bat_para10 = <6>; pmu_bat_para11 = <9>; pmu_bat_para12 = <14>; pmu_bat_para13 = <26>; pmu_bat_para14 = <38>; pmu_bat_para15 = <49>; pmu_bat_para16 = <52>; pmu_bat_para17 = <56>; pmu_bat_para18 = <60>; pmu_bat_para19 = <64>; pmu_bat_para20 = <70>; pmu_bat_para21 = <77>; pmu_bat_para22 = <83>; pmu_bat_para23 = <87>; pmu_bat_para24 = <90>; pmu_bat_para25 = <95>; pmu_bat_para26 = <99>; pmu_bat_para27 = <99>; pmu_bat_para28 = <100>; pmu_bat_para29 = <100>; pmu_bat_para30 = <100>; pmu_bat_para31 = <100>; pmu_bat_para32 = <100>; pmu_bat_temp_enable = <1>; pmu_jetia_en = <1>; pmu_bat_charge_ltf = <1738>; //-5 pmu_bat_charge_htf = <150>; //60 pmu_bat_shutdown_ltf = <2125>; //-10 pmu_bat_shutdown_htf = <130>; //65 pmu_jetia_cool = <1390>; //0 pmu_jetia_warm = <206>; //50 pmu_jcool_ifall = <2>;//75% pmu_jwarm_ifall = <2>;//75% pmu_bat_temp_para1 = <4592>; //SDNT-25 pmu_bat_temp_para2 = <2781>; //-15 pmu_bat_temp_para3 = <2125>; //-10 pmu_bat_temp_para4 = <1738>; //-5 pmu_bat_temp_para5 = <1390>;//0 pmu_bat_temp_para6 = <1118>; //5 pmu_bat_temp_para7 = <906>; //10 pmu_bat_temp_para8 = <606>; //20 pmu_bat_temp_para9 = <415>; //30 pmu_bat_temp_para10 = <290>; //40 pmu_bat_temp_para11 = <244>; //45 pmu_bat_temp_para12 = <206>; //50 pmu_bat_temp_para13 = <175>; //55 pmu_bat_temp_para14 = <150>; //60 pmu_bat_temp_para15 = <110>; //70 pmu_bat_temp_para16 = <83>; //80 wakeup_bat_out; /* wakeup_bat_in; */ /* wakeup_bat_charging; */ /* wakeup_bat_charge_over; */ /* wakeup_low_warning1; */ /* wakeup_low_warning2; */ /* wakeup_bat_untemp_work; */ /* wakeup_bat_ovtemp_work; */ /* wakeup_bat_untemp_chg; */ /* wakeup_bat_ovtemp_chg; */ }; powerkey0: powerkey@0 { status = "okay"; compatible = "x-powers,axp2101-pek"; pmu_powkey_off_time = <6000>; pmu_powkey_off_func = <0>; pmu_powkey_off_en = <1>; pmu_powkey_long_time = <1500>; pmu_powkey_on_time = <512>; wakeup_rising; wakeup_falling; }; regulator0: regulators@0 { reg_dcdc1: dcdc1 { regulator-name = "axp2202-dcdc1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1540000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_dcdc2: dcdc2 { regulator-name = "axp2202-dcdc2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3400000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_dcdc3: dcdc3 { regulator-name = "axp2202-dcdc3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1840000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-always-on; }; reg_dcdc4: dcdc4 { regulator-name = "axp2202-dcdc4"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3700000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; }; reg_rtcldo: rtcldo { /* RTC_LDO is a fixed, always-on regulator */ regulator-name = "axp2202-rtcldo"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_aldo1: aldo1 { regulator-name = "axp2202-aldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_aldo2: aldo2 { regulator-name = "axp2202-aldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_aldo3: aldo3 { regulator-name = "axp2202-aldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_aldo4: aldo4 { regulator-name = "axp2202-aldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_bldo1: bldo1 { regulator-name = "axp2202-bldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_bldo2: bldo2 { regulator-name = "axp2202-bldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_bldo3: bldo3 { regulator-name = "axp2202-bldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_bldo4: bldo4 { regulator-name = "axp2202-bldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo1: cldo1 { regulator-name = "axp2202-cldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo2: cldo2 { regulator-name = "axp2202-cldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo3: cldo3 { regulator-name = "axp2202-cldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-ramp-delay = <2500>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_cldo4: cldo4 { regulator-name = "axp2202-cldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cpusldo: cpusldo { /* cpus */ regulator-name = "axp2202-cpusldo"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1400000>; regulator-boot-on; regulator-always-on; }; reg_vmid: vmid { regulator-name = "axp2202-vmid"; regulator-enable-ramp-delay = <1000>; }; reg_drivevbus: drivevbus { regulator-name = "axp2202-drivevbus"; regulator-enable-ramp-delay = <1000>; drivevbusin-supply = <®_vmid>; }; }; virtual-dcdc1 { compatible = "xpower-vregulator,dcdc1"; dcdc1-supply = <®_dcdc1>; }; virtual-dcdc2 { compatible = "xpower-vregulator,dcdc2"; dcdc2-supply = <®_dcdc2>; }; virtual-dcdc3 { compatible = "xpower-vregulator,dcdc3"; dcdc3-supply = <®_dcdc3>; }; virtual-dcdc4 { compatible = "xpower-vregulator,dcdc4"; dcdc4-supply = <®_dcdc4>; }; virtual-rtcldo { compatible = "xpower-vregulator,rtcldo"; rtcldo-supply = <®_rtcldo>; }; virtual-aldo1 { compatible = "xpower-vregulator,aldo1"; aldo1-supply = <®_aldo1>; }; virtual-aldo2 { compatible = "xpower-vregulator,aldo2"; aldo2-supply = <®_aldo2>; }; virtual-aldo3 { compatible = "xpower-vregulator,aldo3"; aldo3-supply = <®_aldo3>; }; virtual-aldo4 { compatible = "xpower-vregulator,aldo4"; aldo4-supply = <®_aldo4>; }; virtual-bldo1 { compatible = "xpower-vregulator,bldo1"; bldo1-supply = <®_bldo1>; }; virtual-bldo2 { compatible = "xpower-vregulator,bldo2"; bldo2-supply = <®_bldo2>; }; virtual-bldo3 { compatible = "xpower-vregulator,bldo3"; bldo3-supply = <®_bldo3>; }; virtual-bldo4 { compatible = "xpower-vregulator,bldo4"; bldo4-supply = <®_bldo4>; }; virtual-cldo1 { compatible = "xpower-vregulator,cldo1"; cldo1-supply = <®_cldo1>; }; virtual-cldo2 { compatible = "xpower-vregulator,cldo2"; cldo2-supply = <®_cldo2>; }; virtual-cldo3 { compatible = "xpower-vregulator,cldo3"; cldo3-supply = <®_cldo3>; }; virtual-cldo4 { compatible = "xpower-vregulator,cldo4"; cldo4-supply = <®_cldo4>; }; virtual-cpusldo { compatible = "xpower-vregulator,cpusldo"; cpusldo-supply = <®_cpusldo>; }; virtual-drivevbus { compatible = "xpower-vregulator,drivevbus"; drivevbus-supply = <®_drivevbus>; }; axp_gpio0: axp_gpio@0 { gpio-controller; #size-cells = <0>; #gpio-cells = <6>; status = "okay"; }; }; }; /{ axp2202_parameter:axp2202-parameter { select = "battery-model"; battery-model { parameter = /bits/ 8 <0x01 0xf5 0x40 0x00 0x1b 0x1e 0x28 0x0f 0x0c 0x1e 0x32 0x02 0x14 0x05 0x0a 0x04 0x74 0xfb 0xc8 0x0d 0x43 0x10 0x36 0xfb 0x46 0x01 0xea 0x0d 0x2a 0x06 0x36 0x05 0xf4 0x0a 0xb5 0x0f 0x42 0x0e 0xe6 0x09 0x9a 0x0e 0x42 0x0e 0x3b 0x04 0x2d 0x04 0x23 0x09 0x18 0x0e 0x09 0x0e 0x04 0x08 0xf7 0x0d 0xda 0x0d 0xd0 0x03 0xbb 0x03 0x9d 0x08 0x7f 0x0d 0x6a 0x0d 0x55 0x07 0xc2 0x57 0x2b 0x27 0x1e 0x0d 0x14 0x08 0xc5 0x98 0x7e 0x66 0x4e 0x44 0x38 0x1a 0x12 0x0a 0xf6 0x00 0x00 0xf6 0x00 0xf6 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xf6 0x00 0x00 0xf6 0x00 0xf6 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xf6 0x00 0x00 0xf6 0x00 0xf6>; }; }; }; &twi7 { clock-frequency = <400000>; pinctrl-0 = <&s_twi1_pins_default>; pinctrl-1 = <&s_twi1_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_aldo3>; status = "okay"; lt9611: lt9611@39 { compatible = "myir,lt9611"; reg = <0x39>; lt9611-rst-gpios = <&r_pio PL 6 GPIO_ACTIVE_HIGH>; lt9611-power-en-gpios = <&pio PG 12 GPIO_ACTIVE_HIGH>; interrupt-parent = <&r_pio>; interrupts = <PL 7 IRQ_TYPE_EDGE_FALLING>; status = "okay"; }; ac107: ac107@36 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-ac107"; reg = <0x36>; pllclk-src = "MCLK"; sysclk-src = "MCLK"; pcm-bit-first = "MSB"; frame-sync-width = <1>; rx-chmap = <0xaaaa>; ch1-dig-vol = <160>; ch2-dig-vol = <160>; ch1-pga-gain = <26>; ch2-pga-gain = <26>; status = "disabled"; }; }; &twi8 { clock-frequency = <400000>; pinctrl-0 = <&s_twi2_pins_default>; pinctrl-1 = <&s_twi2_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_aldo3>; status = "okay"; }; &sdc2 { non-removable; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; no-sdio; no-sd; ctl-spec-caps = <0x308>; cap-mmc-highspeed; sunxi-power-save-mode; sunxi-dis-signal-vol-sw; mmc-bootpart-noacc; /*cap-hsq;*/ cqe-on; ctl-cmdq-md = <0x2>; max-frequency = <150000000>; vmmc-supply = <®_cldo3>; /*emmc io vol 3.3v*/ /*vqmmc-supply = <®_aldo1>;*/ /*emmc io vol 1.8v*/ vqmmc-supply = <®_cldo1>; status = "disabled"; }; &sdc0 { bus-width = <4>; cd-gpios = <&pio PF 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /*non-removable;*/ /*broken-cd;*/ /*cd-inverted*/ /*data3-detect;*/ /*card-pwr-gpios = <&pio PH 14 1 1 2 0xffffffff>;*/ cd-used-24M; cd-set-debounce = <0x1>; cap-sd-highspeed; // sd-uhs-sdr50; // sd-uhs-ddr50; // sd-uhs-sdr104; no-sdio; no-mmc; sunxi-power-save-mode; /*sunxi-dis-signal-vol-sw;*/ max-frequency = <150000000>; ctl-spec-caps = <0x408>; sunxi-dly-208M = <0xff 1 0xff 0xff 0xff 0xff>; vmmc-supply = <®_cldo3>; vqmmc33sw-supply = <®_cldo3>; vdmmc33sw-supply = <®_cldo3>; // vqmmc18sw-supply = <®_bldo3>; // vdmmc18sw-supply = <®_bldo3>; status = "okay"; }; &sdc1 { bus-width = <4>; no-mmc; no-sd; cap-sd-highspeed; /*sd-uhs-sdr12*/ sd-uhs-sdr25; sd-uhs-sdr50; sd-uhs-ddr50; sd-uhs-sdr104; /*sunxi-power-save-mode;*/ sunxi-dis-signal-vol-sw; cap-sdio-irq; keep-power-in-suspend; ignore-pm-notify; max-frequency = <150000000>; ctl-spec-caps = <0x408>; status = "okay"; }; &nand0 { compatible = "allwinner,sun55iw3-nand"; device_type = "nand0"; //reg = <0x0 0x04011000 0x0 0x1000>;/* nand0 */ pinctrl-names = "default", "sleep"; pinctrl-0 = <&nand0_pins_default &nand0_pins_rb>; pinctrl-1 = <&nand0_pins_sleep>; nand0_regulator1 = "vcc-nand"; nand0_regulator2 = "none"; nand0_cache_level = <0x55aaaa55>; nand0_flush_cache_num = <0x55aaaa55>; nand0_capacity_level = <0x55aaaa55>; nand0_id_number_ctl = <0x55aaaa55>; nand0_print_level = <0x55aaaa55>; nand0_p0 = <0x55aaaa55>; nand0_p1 = <0x55aaaa55>; nand0_p2 = <0x55aaaa55>; nand0_p3 = <0x55aaaa55>; chip_code = "sun55iw3"; status = "disabled"; }; &rfkill { compatible = "allwinner,sunxi-rfkill"; chip_en; power_en; pinctrl-0; pinctrl-names; status = "okay"; /* bt session */ bt { compatible = "allwinner,sunxi-bt"; clocks; clock-names; bt_power = "axp2202-aldo3", "axp2202-bldo1"; /* vcc-pl/vcc-pg/vcc-pm */ bt_power_vol= <3300000>, <1800000>; bt_rst_n = <&pio PC 4 GPIO_ACTIVE_LOW>; }; }; &addr_mgt { compatible = "allwinner,sunxi-addr_mgt"; type_addr_wifi = <0x0>; type_addr_bt = <0x0>; type_addr_eth = <0x0>; status = "okay"; }; &btlpm { compatible = "allwinner,sunxi-btlpm"; uart_index = <0x1>; bt_wake = <&pio PC 12 GPIO_ACTIVE_HIGH>; bt_hostwake = <&pio PC 2 GPIO_ACTIVE_HIGH>; wakeup-source; status = "okay"; }; /* *usb_port_type: usb mode. 0-device, 1-host, 2-otg. *usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-id/dpdm detect. *usb_detect_mode: 0-thread scan, 1-id gpio interrupt. *usb_id_gpio: gpio for id detect. *usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl"; *usb_wakeup_suspend：0-SUPER_STANDBY, 1-USB_STANDBY. */ &usbc0 { device_type = "usbc0"; usb_port_type = <0x2>; usb_detect_type = <0x1>; usb_detect_mode = <0x0>; usb_id_gpio = <&r_pio PL 10 GPIO_ACTIVE_HIGH>; enable-active-high; usb_det_vbus_gpio = <&r_pio PL 10 GPIO_ACTIVE_HIGH>; enable-active-high; detvbus_io-supply = <®_bldo1>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; usb_luns = <3>; usb_serial_unique = <0>; usb_serial_number = "20080411"; rndis_wceis = <1>; status = "okay"; }; &udc { det_vbus_supply = <&usb_power_supply>; status = "okay"; }; &ehci0 { //drvvbus-supply = <®_usb0_vbus>; status = "okay"; }; &ohci0 { //drvvbus-supply = <®_usb0_vbus>; status = "okay"; }; &usbc1 { device_type = "usbc1"; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "okay"; }; &ehci1 { //drvvbus-supply = <®_usb1_vbus>; status = "okay"; }; &ohci1 { //drvvbus-supply = <®_usb1_vbus>; status = "okay"; }; &usbc2 { device_type = "usbc2"; drvvbus-supply = <®_drivevbus>; aw,vbus-shared-quirk; status = "okay"; }; &xhci2 { dr_mode = "host"; status = "okay"; }; &u2phy { status = "okay"; }; &combophy { resets = <&ccu RST_BUS_PCIE_USB3>; phy_use_sel = <1>; /* 0:PCIE; 1:USB3 */ status = "okay"; }; &gpu { gpu_idle = <1>; dvfs_status = <1>; mali-supply = <®_dcdc2>; }; /*---------------------------------------------------------------------------------- disp init configuration disp_mode (0:screen0<screen0,fb0>) screenx_output_type (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo) screenx_output_mode (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50) (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60) screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420) screenx_output_bits (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit) screenx_output_eotf (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG) screenx_output_cs (for hdmi, 0:undefined 257:BT709 260:BT601 263:BT2020) screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode) screen0_output_range (for hdmi, 0:default 1:full 2:limited) screen0_output_scan (for hdmi, 0:no data 1:overscan 2:underscan) screen0_output_aspect_ratio (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9) fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444) fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA) fb0_scaler_mode_enable(scaler mode enable, used FE) fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0) lcdx_backlight (lcd init backlight,the range:[0,256],default:197 lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50) lcd0_contrast (LCD contrast, 0~100) lcd0_saturation (LCD saturation, 0~100) lcd0_hue (LCD hue, 0~100) framebuffer software rotation setting: disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y, set fbX_height to lcd_x) degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree) degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree) devX_output_type : config output type in bootGUI framework in UBOOT-2018. (0:none; 1:lcd; 2:tv; 4:hdmi;) devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018 devX_screen_id : config display index of bootGUI framework in UBOOT-2018 devX_do_hpd : whether do hpd detectation or not in UBOOT-2018 chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6 channel, 1:dual display with 4 channel in main display and 2 channel in second display, 2:dual display with 3 channel in main display and 3 channel in second in display. ----------------------------------------------------------------------------------*/ &disp { disp_init_enable = <1>; disp_mode = <0>; screen0_output_type = <1>; screen0_output_mode = <4>; screen0_to_lcd_index = <0>; screen1_output_type = <3>; screen1_output_mode = <10>; screen1_to_lcd_index = <3>; screen1_output_format = <0>; screen1_output_bits = <0>; screen1_output_eotf = <4>; screen1_output_cs = <257>; screen1_output_dvi_hdmi = <2>; screen1_output_range = <2>; screen1_output_scan = <0>; screen1_output_aspect_ratio = <8>; dev0_output_type = <1>; dev0_output_mode = <4>; dev0_screen_id = <0>; dev0_do_hpd = <0>; screen1_output_type = <6>; screen1_output_mode = <10>; dev1_screen_id = <2>; dev1_do_hpd = <1>; def_output_dev = <2>; hdmi_mode_check = <1>; display_device_num = <3>; primary_display_type = "LCD"; primary_de_id = <0>; primary_framebuffer_width = <1280>; primary_framebuffer_height = <800>; primary_dpix = <160>; primary_dpiy = <160>; extend0_display_type = "HDMI"; extend0_de_id = <1>; extend0_framebuffer_width = <1920>; extend0_framebuffer_height = <1080>; extend0_dpix = <160>; extend0_dpiy = <160>; extend1_display_type = "DP"; extend1_de_id = <1>; extend1_framebuffer_width = <1920>; extend1_framebuffer_height = <1080>; extend1_dpix = <160>; extend1_dpiy = <160>; fb_format = <0>; fb_num = <4>; /*<disp channel layer zorder>*/ fb0_map = <0 1 0 16>; fb0_width = <1920>; fb0_height = <1080>; /*<disp channel layer zorder>*/ fb1_map = <1 1 0 16>; fb1_width = <1920>; fb1_height = <1080>; /*<disp channel layer zorder>*/ fb2_map = <1 0 0 16>; fb2_width = <1920>; fb2_height = <1080>; /*<disp channel layer zorder>*/ fb3_map = <1 1 0 16>; fb3_width = <300>; fb3_height = <300>; chn_cfg_mode = <3>; disp_para_zone = <2>; //boot_disp = <0>; //boot_disp1 = <0>; //boot_disp2 = <0>; /* dual display clock constraints: 1. two tcons cannot share a parent clock. 2. when dsi uses ccu clock, combphy and corresponding tcon use the same parent clock. */ assigned-clocks = <&ccu CLK_DE>, <&ccu CLK_VO0_TCONLCD0>, <&ccu CLK_VO0_TCONLCD1>, <&ccu CLK_VO1_TCONLCD0>, <&ccu CLK_TCONTV>, <&ccu CLK_TCONTV1>, <&ccu CLK_COMBPHY0>, <&ccu CLK_COMBPHY1>, <&ccu CLK_DSI0>, <&ccu CLK_DSI1>, <&ccu CLK_EDP>; assigned-clock-parents = <&ccu CLK_PLL_VIDEO3_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_PERI0_150M>, <&ccu CLK_PLL_PERI0_150M>, <&ccu CLK_PLL_VIDEO1_4X>; assigned-clock-rates = <600000000>; cldo3-supply = <®_cldo3>; dcdc4-supply = <®_dcdc4>; cldo1-supply = <®_cldo1>; //pwms = <&pwm0 4 5000000 0>, <&pwm0 5 5000000 0>; pwms = <&pwm0 10 50000 0>, <&pwm0 5 5000000 0>; pwm-names = "lvds0_backlight", "lvds2_backlight"; power-domains = <&pd1 A523_PCK_DE>, <&pd1 A523_PCK_VO0>, <&pd1 A523_PCK_VO1>; power-domain-names = "pd_de", "pd_vo0", "pd_vo1"; pinctrl-names = "active", "sleep"; //pinctrl-0 = <&pwm0_0_pin_active>; //pinctrl-1 = <&pwm0_0_pin_sleep>; pinctrl-0 = <&pwm0_10_pin_active>; pinctrl-1 = <&pwm0_10_pin_sleep>; }; /*** ;lcd0 configuration ;lcd_if: 0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi ;lcd_hv_if 0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656 ;lcd_hv_clk_phase 0:0 degree;1:90 degree;2:180 degree;3:270 degree ;lcd_hv_sync_polarity 0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high ;lcd_hv_syuv_seq 0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY ;lcd_cpu_if 0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565) ; 6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565) ;lcd_cpu_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge; ;lcd_dsi_if 0:video mode; 1: Command mode; 2:video burst mode ;lcd_dsi_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge; ;lcd_x: lcd horizontal resolution ;lcd_y: lcd vertical resolution ;lcd_width: width of lcd in mm ;lcd_height: height of lcd in mm ;lcd_dclk_freq: in MHZ unit ;lcd_pwm_freq: in HZ unit ;lcd_pwm_pol: lcd backlight PWM polarity ;lcd_pwm_max_limit lcd backlight PWM max limit(<=255) ;lcd_hbp: hsync back porch(pixel) + hsync plus width(pixel); ;lcd_ht: hsync total cycle(pixel) ;lcd_vbp: vsync back porch(line) + vysnc plus width(line) ;lcd_vt: vysnc total cycle(line) ;lcd_hspw: hsync plus width(pixel) ;lcd_vspw: vysnc plus width(pixel) ;lcd_lvds_if: 0:single link; 1:dual link ;lcd_lvds_colordepth: 0:8bit; 1:6bit ;lcd_lvds_mode: 0:NS mode; 1:JEIDA mode ;lcd_frm: 0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither ;lcd_io_phase: 0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase; ; 8~11bit:dclk phase; 12~15bit:de phase) ;lcd_gamma_en lcd gamma correction enable ;lcd_bright_curve_en lcd bright curve correction enable ;lcd_cmap_en lcd color map function enable ;deu_mode 0:smoll lcd screen; 1:large lcd screen(larger than 10inch) ;lcdgamma4iep: Smart Backlight parameter, lcd gamma vale * 10; ; decrease it while lcd is not bright enough; increase while lcd is too bright ;smart_color 90:normal lcd screen 65:retina lcd screen(9.7inch) ;Pin setting for special function ie.LVDS, RGB data or vsync ; name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level> ;Pin setting for gpio: ; lcd_gpio_X = port:PD12<pin function><pull up or pull down><drive ability><output level> ;Pin setting for backlight enable pin ; lcd_bl_en = port:PD12<pin function><pull up or pull down><drive ability><output level> ;fsync setting, pulse to csi ;lcd_fsync_en (0:disable fsync,1:enable) ;lcd_fsync_act_time (active time of fsync, unit:pixel) ;lcd_fsync_dis_time (disactive time of fsync, unit:pixel) ;lcd_fsync_pol (0:positive;1:negative) ;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function, pull up or pull down(default 0), driver level(default 1), data> ;For dual link lvds: use lvds2link_pins_a and lvds2link_pins_b instead ;For rgb24: use rgb24_pins_a and rgb24_pins_b instead ;For lvds1: use lvds1_pins_a and lvds1_pins_b instead ;For lvds0: use lvds0_pins_a and lvds0_pins_b instead ***/ &lcd0 { lcd_used = <1>; lcd_driver_name = "default_lcd"; lcd_backlight = <200>; lcd_if = <3>; lcd_x = <1280>; lcd_y = <800>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <63>; lcd_pwm_used = <1>; lcd_pwm_ch = <10>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_pwm_name = "lvds0_backlight"; lcd_hbp = <88>; lcd_ht = <1451>; lcd_hspw = <18>; lcd_vbp = <23>; lcd_vt = <860>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <0>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_fsync_en = <0>; lcd_fsync_act_time = <1000>; lcd_fsync_dis_time = <1000>; lcd_fsync_pol = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_pin_power = "cldo3"; lcd_power = "dcdc4"; lcd_power1 = "cldo1"; //lcd_gpio_0 = <&pio PI 2 GPIO_ACTIVE_HIGH>; //reset //lcd_bl_en = <&pio PI 2 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&lvds0_pins_a>; pinctrl-1 = <&lvds0_pins_b>; lvds0_pinctrl-0 = <&lvds0_pins_a>; lvds0_pinctrl-1 = <&lvds0_pins_b>; lvds1_pinctrl-0 = <&lvds1_pins_a>; lvds1_pinctrl-1 = <&lvds1_pins_b>; dsi0_pinctrl-0 = <&dsi0_4lane_pins_a>; dsi0_pinctrl-1 = <&dsi0_4lane_pins_b>; dual_dsi_pinctrl-0 = <&dsi0_4lane_pins_a>, <&dsi1_4lane_pins_a>; dual_dsi_pinctrl-1 = <&dsi0_4lane_pins_b>, <&dsi1_4lane_pins_b>; dual_lvds0_pinctrl-0 = <&lvds0_pins_a>, <&lvds1_pins_a>; dual_lvds0_pinctrl-1 = <&lvds0_pins_b>, <&lvds1_pins_b>; }; #if 1 &lcd1 { lcd_used = <1>; status = "okay"; lcd_driver_name = "SQ101D_Q5DI404_84H501"; lcd_backlight = <200>; lcd_if = <4>; lcd_x = <1920>; lcd_y = <1080>; lcd_width = <136>; lcd_height = <217>; lcd_dclk_freq = <148>; lcd_pwm_used = <1>; lcd_pwm_ch = <0>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_hbp = <88>; lcd_ht = <2200>; lcd_hspw = <44>; lcd_vbp = <4>; lcd_vt = <1125>; lcd_vspw = <5>; lcd_frm = <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_dsi_if = <0>; lcd_dsi_lane = <4>; lcd_dsi_format = <0>; lcd_dsi_te = <0>; lcd_dsi_eotp = <0>; lcd_pin_power = "dcdc4"; lcd_power1 = "cldo4"; lcd_power2 = "cldo1"; lcd_gpio_2 = <&pio PD 22 GPIO_ACTIVE_HIGH>; //reset pinctrl-0 = <&dsi0_4lane_pins_a>; pinctrl-1 = <&dsi0_4lane_pins_b>; // lcd_bl_en = <&pio PH 16 GPIO_ACTIVE_HIGH>; lcd_bl_0_percent = <5>; }; #else &lcd1 { lcd_used = <1>; lcd_driver_name = "default_lcd"; lcd_backlight = <50>; lcd_if = <0>; lcd_x = <800>; lcd_y = <480>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <48>; lcd_pwm_used = <1>; lcd_pwm_ch = <7>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_hbp = <55>; lcd_ht = <1240>; lcd_hspw = <20>; lcd_vbp = <35>; lcd_vt = <650>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <1>; lcd_lvds_mode = <0>; lcd_frm = <1>; lcd_io_phase = <0x0000>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; }; #endif &lcd2 { lcd_used = <1>; lcd_driver_name = "bp101wx1"; lcd_backlight = <50>; lcd_if = <3>; lcd_x = <1280>; lcd_y = <800>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <75>; lcd_pwm_used = <1>; lcd_pwm_ch = <5>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_pwm_name = "lvds2_backlight"; lcd_hbp = <88>; lcd_ht = <1451>; lcd_hspw = <18>; lcd_vbp = <23>; lcd_vt = <860>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <0>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_fsync_en = <0>; lcd_fsync_pol = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_pin_power = "cldo3"; lcd_power = "dcdc4"; /* lvds_power & other interface power */ lcd_bl_en = <&pio PI 5 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&lvds2_pins_a>; pinctrl-1 = <&lvds2_pins_b>; lvds2_pinctrl-0 = <&lvds2_pins_a>; lvds2_pinctrl-1 = <&lvds2_pins_b>; lvds3_pinctrl-0 = <&lvds3_pins_a>; lvds3_pinctrl-1 = <&lvds3_pins_b>; dual_lvds1_pinctrl-0 = <&lvds2_pins_a>, <&lvds3_pins_a>; dual_lvds1_pinctrl-1 = <&lvds2_pins_b>, <&lvds3_pins_b>; status = "disabled"; }; &edp0 { compatible = "allwinner,sunxi-dp0"; // use if hardware reset pin is need /* edp_hw_reset_pin = <&pio PH XX GPIO_ACTIVE_LOW>; */ edp_ssc_en = <0>; edp_ssc_mode = <0>; edp_psr_support = <0>; edp_colordepth = <8>; /* 6/8/10/12/16 */ edp_color_fmt = <0>; /* 0:RGB 1: YUV444 2: YUV422 */ edp_lane_rate = <1>; edp_lane_cnt = <4>; lane0_sw = <0>; lane0_pre = <0>; lane1_sw = <0>; lane1_pre = <0>; lane2_sw = <0>; lane2_pre = <0>; lane3_sw = <0>; lane3_pre = <0>; efficient_training = <0>; sink_capacity_prefer = <0>; edid_timings_prefer = <1>; timings_fixed = <0>; edp_traning_param_type = <1>; edp_timings_type = <0>; edp_panel_used = <0>; /* edp_panel_used = <1>; edp_panel_driver = "general_panel"; edp_bl_en = <&pio PI 5 GPIO_ACTIVE_HIGH>; edp_pwm_used = <1>; edp_pwm_ch = <5>; edp_pwm_freq = <50000>; edp_pwm_pol = <0>; edp_default_backlight = <200>; edp_panel_power_0 = "edp-panel"; */ /* edp_x = <1280>; edp_y = <800>; edp_width = <150>; edp_height = <94>; edp_dclk_freq = <75>; edp_hbp = <88>; edp_ht = <1451>; edp_hspw = <18>; edp_vbp = <23>; edp_vt = <860>; edp_vspw = <10>; edp_fps = <30>; */ vcc-edp-supply = <®_bldo3>; vdd-edp-supply = <®_dcdc2>; edp-panel-supply = <®_dcdc4>; status = "okay"; }; &ve { ve-supply = <®_dcdc2>; enable_setup_ve_freq = <0>; /* default disable */ ve_freq_value = <624>; /* setup to 624MHz */ }; /* audio dirver module -> audio codec */ &codec { tx-hub-en; rx-sync-en; dac-vol = <63>; /* default value:63 range:0->63 */ dacl-vol = <190>; /* default value:160 range:0->255 */ dacr-vol = <190>; /* default value:160 range:0->255 */ adc1-vol = <190>; /* default value:160 range:0->255 */ adc2-vol = <190>; /* default value:160 range:0->255 */ adc3-vol = <190>; /* default value:160 range:0->255 */ lineout-gain = <31>; /* default value:31 range:0->31 */ hpout-gain = <7>; /* default value:7 range:0->7 */ adc1-gain = <31>; /* default value:31 range:0->31 */ adc2-gain = <31>; /* default value:31 range:0->31 */ adc3-gain = <31>; /* default value:31 range:0->31 */ /* to do: avcc-1.8 vdd33-3.3 cpvin-1.8 */ avcc-external; avcc-supply = <®_aldo4>; avcc-vol = <1800000>; vdd-external; vdd-supply = <®_cldo3>; vdd-vol = <3300000>; cpvin-external; cpvin-supply = <®_bldo3>; cpvin-vol = <1800000>; //pa-pin-max = <1>; //pa-pin-0 = <&r_pio PL 7 GPIO_ACTIVE_HIGH>; //pa-pin-level-0 = <1>; //pa-pin-msleep-0 = <0>; jack-det-level = <0>; jack-det-threshold = <8>; jack-det-debouce-time = <250>; /* extcon = <&usb_power_supply>; * jack-swpin-mic-sel = <&pio PH 8 GPIO_ACTIVE_HIGH>; * jack-swpin-hp-en = <&pio PH 15 GPIO_ACTIVE_HIGH>; * jack-swpin-hp-sel = <&pio PH 11 GPIO_ACTIVE_HIGH>; * jack-swmode-hp-off = <0x00>; * jack-swmode-hp-usb = <0x11>; * jack-swmode-hp-audio = <0x10>; * jack-det-level = <1>; * jack-det-threshold = <8>; * jack-det-debouce-time = <250>; */ status = "okay"; }; &codec_plat { status = "okay"; }; &codec_mach { soundcard-mach,jack-support = <1>; status = "okay"; soundcard-mach,cpu { sound-dai = <&codec_plat>; }; soundcard-mach,codec { sound-dai = <&codec>; }; }; &hdmi_codec { extcon = <&hdmi>; status = "okay"; }; &edp_codec { status = "disabled"; }; /* audio dirver module -> owa */ &owa_plat { rglt-max = <1>; rglt0-mode = "PMU"; rglt0-voltage = <3300000>; rglt0-supply = <®_dcdc4>; pinctrl-used; pinctrl-names = "default","sleep"; pinctrl-0 = <&owa_pins_a>; pinctrl-1 = <&owa_pins_b>; tx-hub-en; status = "okay"; }; &owa_mach { status = "okay"; soundcard-mach,cpu { sound-dai = <&owa_plat>; }; soundcard-mach,codec { }; }; /* audio dirver module -> DMIC */ &dmic_plat { rx-chmap = <0x76543210>; data-vol = <0xB0>; rxdelaytime = <0>; /* pinctrl-used; */ /* pinctrl-names = "default","sleep"; */ /* pinctrl-0 = <&dmic_pins_a>; */ /* pinctrl-1 = <&dmic_pins_b>; */ rx-sync-en; status = "disabled"; }; &dmic_mach { status = "disabled"; soundcard-mach,cpu { sound-dai = <&dmic_plat>; }; soundcard-mach,codec { }; }; /* audio dirver module -> I2S/PCM */ &i2s0_plat { tdm-num = <0>; tx-pin = <0>; rx-pin = <0>; pinctrl-used; pinctrl-names = "default","sleep"; pinctrl-0 = <&i2s0_pins_a &i2s0_pins_c &i2s0_pins_d>; pinctrl-1 = <&i2s0_pins_b>; tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s0_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s0_cpu>; soundcard-mach,bitclock-master = <&i2s0_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; soundcard-mach,capture-only; status = "disabled"; i2s0_cpu: soundcard-mach,cpu { sound-dai = <&i2s0_plat>; /* note: pll freq = 24.576M or 22.5792M * pll-fs */ soundcard-mach,pll-fs = <1>; /* note: * mclk freq = mclk-fs * 12.288M or 11.2896M (when mclk-fp ture) * mclk freq = mclk-fs * pcm rate (when mclk-fp false) */ soundcard-mach,mclk-fp; soundcard-mach,mclk-fs = <1>; }; i2s0_codec: soundcard-mach,codec { sound-dai = <&ac107>; soundcard-mach,pll-fs = <1>; }; }; &i2s1_plat { tdm-num = <1>; tx-pin = <0>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s1_pins_a &i2s1_pins_c &i2s1_pins_d>; */ /* pinctrl-1 = <&i2s1_pins_b>; */ tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s1_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s1_cpu>; soundcard-mach,bitclock-master = <&i2s1_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; i2s1_cpu: soundcard-mach,cpu { sound-dai = <&i2s1_plat>; soundcard-mach,pll-fs = <1>; soundcard-mach,mclk-fs = <0>; }; i2s1_codec: soundcard-mach,codec { }; }; &i2s2_plat { tdm-num = <2>; tx-pin = <0 1 2 3>; /* e.g. * tx-pin0-map0 = <0xFEDC3210> -> tx_pin_map[0][0] (Dout0-slot[7:0] map channel[15:12, 3:0]) * tx-pin0-map1 = <0x3210FEDC> -> tx_pin_map[0][1] (Dout0-slot[15:8] map channel[3:0, 15:12]) * tx-pin1-map0 = <0x76543210> -> tx_pin_map[1][0] (Dout1-slot[7:0] map channel[7:0]) */ tx-pin0-map0 = <0x76543210>; tx-pin0-map1 = <0xFEDCBA98>; tx-pin1-map0 = <0x76543210>; tx-pin1-map1 = <0xFEDCBA98>; tx-pin2-map0 = <0x76543210>; tx-pin2-map1 = <0xFEDCBA98>; tx-pin3-map0 = <0x76543210>; tx-pin3-map1 = <0xFEDCBA98>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s2_pins_a &i2s2_pins_c &i2s2_pins_d &i2s2_pins_e>; */ /* pinctrl-1 = <&i2s2_pins_b>; */ tx-hub-en; rx-sync-en; /* edp not need dai-type */ dai-type = "hdmi"; status = "okay"; }; &i2s2_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s2_cpu>; soundcard-mach,bitclock-master = <&i2s2_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; soundcard-mach,playback-only; status = "okay"; i2s2_cpu: soundcard-mach,cpu { sound-dai = <&i2s2_plat>; soundcard-mach,pll-fs = <1>; /* edp mclk: 512fs */ soundcard-mach,mclk-fs = <0>; }; i2s2_codec: soundcard-mach,codec { sound-dai = <&hdmi_codec>; }; }; &i2s3_plat { tdm-num = <3>; tx-pin = <0>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s3_pins_a &i2s3_pins_c &i2s3_pins_d>; */ /* pinctrl-1 = <&i2s3_pins_b>; */ tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s3_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s3_cpu>; soundcard-mach,bitclock-master = <&i2s3_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; i2s3_cpu: soundcard-mach,cpu { sound-dai = <&i2s3_plat>; soundcard-mach,pll-fs = <1>; soundcard-mach,mclk-fs = <0>; }; i2s3_codec: soundcard-mach,codec { }; }; &hdmi { hdmi_used = <1>; bldo3-supply = <®_bldo3>; hdmi_power0 = "bldo3"; hdmi_power_cnt = <1>; hdmi_hdcp_enable = <1>; hdmi_hdcp22_enable = <0>; hdmi_cts_compatibility = <0>; hdmi_cec_support = <1>; hdmi_cec_super_standby = <1>; hdmi_skip_bootedid = <1>; ddc_en_io_ctrl = <0>; power_io_ctrl = <0>; }; &cpu0 { cpu-supply = <®_dcdc1>; }; &dsufreq { dsu-supply = <®_dcdc1>; }; &mdio0 { status = "okay"; gmac0_phy0: ethernet-phy@5 { reg = <0x5>; max-speed = <1000>; /* PHY datasheet rst time */ reset-assert-us = <10000>; reset-deassert-us = <150000>; }; }; &gmac0 { phy-mode = "rgmii"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&gmac0_pins_default>; pinctrl-1 = <&gmac0_pins_sleep>; sunxi,phy-clk-type = <0>; tx-delay = <0>; rx-delay = <0>; phy-handle = <&gmac0_phy0>; gmac3v3-supply = <®_dcdc4>; status = "okay"; }; &gmac1 { phy-mode = "rgmii"; phy-handle = <&gmac1_phy0>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&gmac1_pins_default>; pinctrl-1 = <&gmac1_pins_sleep>; aw,soc-phy25m; tx-delay = <0>; rx-delay = <0>; snps,reset-gpios = <&pio PJ 17 GPIO_ACTIVE_LOW>; snps,phy-addr = <0x6>; dwmac3v3-supply = <®_dcdc4>; status = "okay"; mdio1: mdio1@1 { snps,reset-gpios = <&pio PJ 17 GPIO_ACTIVE_LOW>; gmac1_phy0: ethernet-phy@6 { snps,reset-gpios = <&pio PJ 17 GPIO_ACTIVE_LOW>; reg = <0x6>; max-speed = <1000>; /* PHY datasheet rst time */ reset-assert-us = <10000>; reset-deassert-us = <150000>; }; }; }; &npu { npu-supply = <®_ext_axp1530_dcdc3>; npu_vol = <1050000>; clock-frequency = <696000000>; status = "okay"; }; &dram { dram_para00 = <0x00000000>; dram_para01 = <0x00000000>; dram_para02 = <0x00000000>; dram_para03 = <0x00000000>; dram_para04 = <0x00000000>; dram_para05 = <0x00000000>; dram_para06 = <0x00000000>; dram_para07 = <0x00000000>; dram_para08 = <0x00000000>; dram_para09 = <0x00000000>; dram_para10 = <0x00000000>; dram_para11 = <0x00000000>; dram_para12 = <0x00000000>; dram_para13 = <0x00000000>; dram_para14 = <0x00000000>; dram_para15 = <0x00000000>; dram_para16 = <0x00000000>; dram_para17 = <0x00000000>; dram_para18 = <0x00000000>; dram_para19 = <0x00000000>; dram_para20 = <0x00000000>; dram_para21 = <0x00000000>; dram_para22 = <0x00000000>; dram_para23 = <0x00000000>; dram_para24 = <0x00000000>; dram_para25 = <0x00000000>; dram_para26 = <0x00000000>; dram_para27 = <0x00000000>; dram_para28 = <0x00000000>; dram_para29 = <0x00000000>; dram_para30 = <0x00000000>; dram_para31 = <0x00000000>; dram_para32 = <0x00000000>; dram_para33 = <0x00000000>; dram_para34 = <0x00000000>; dram_para35 = <0x00000000>; dram_para36 = <0x00000000>; dram_para37 = <0x00000000>; dram_para38 = <0x00000000>; dram_para39 = <0x00000000>; dram_para40 = <0x00000000>; dram_para41 = <0x00000000>; dram_para42 = <0x00000000>; dram_para43 = <0x00000000>; dram_para44 = <0x00000000>; dram_para45 = <0x00000000>; dram_para46 = <0x00000000>; dram_para47 = <0x00000000>; dram_para48 = <0x00000000>; dram_para49 = <0x00000000>; dram_para50 = <0x00000000>; dram_para51 = <0x00000000>; dram_para52 = <0x00000000>; dram_para53 = <0x00000000>; dram_para54 = <0x00000000>; dram_para55 = <0x00000000>; dram_para56 = <0x00000000>; dram_para57 = <0x00000000>; dram_para58 = <0x00000000>; dram_para59 = <0x00000000>; dram_para60 = <0x00000000>; dram_para61 = <0x00000000>; dram_para62 = <0x00000000>; dram_para63 = <0x00000000>; dram_para64 = <0x00000000>; dram_para65 = <0x00000000>; dram_para66 = <0x00000000>; dram_para67 = <0x00000000>; dram_para68 = <0x00000000>; dram_para69 = <0x00000000>; dram_para70 = <0x00000000>; dram_para71 = <0x00000000>; dram_para72 = <0x00000000>; dram_para73 = <0x00000000>; dram_para74 = <0x00000000>; dram_para75 = <0x00000000>; dram_para76 = <0x00000000>; dram_para77 = <0x00000000>; dram_para78 = <0x00000000>; dram_para79 = <0x00000000>; dram_para80 = <0x00000000>; dram_para81 = <0x00000000>; dram_para82 = <0x00000000>; dram_para83 = <0x00000000>; dram_para84 = <0x00000000>; dram_para85 = <0x00000000>; dram_para86 = <0x00000000>; dram_para87 = <0x00000000>; dram_para88 = <0x00000000>; dram_para89 = <0x00000000>; dram_para90 = <0x00000000>; dram_para91 = <0x00000000>; dram_para92 = <0x00000000>; dram_para93 = <0x00000000>; dram_para94 = <0x00000000>; dram_para95 = <0x00000000>; }; #if 0 #include "myir-lt527-lvds-10-inch.dtsi " #else #include "myir-lt527-lvds-7-inch.dtsi" #endifmyb-lt527-i-gk.dts:
/* * Allwinner Technology CO., Ltd. */ /dts-v1/; #include "sun55iw3p1.dtsi" #include <uapi/linux/input-event-codes.h> /{ board = "T527", "T527-DEMO-AXP717B"; compatible = "allwinner,t527", "arm,sun55iw3p1"; aliases { pmu0 = &pmu0; serial0 = &uart0; hdmi = &hdmi; reg-tcs0 = ®_tcs0; reg-sy0 = ®_sy0; reg-axp1530 = ®_ext_axp1530_dcdc1; tcs0 = &tcs0; sy0 = &sy0; axp1530 = &axp1530; cpu-ext = &cpu4; standby-param = &standby_param; arisc-config = &arisc_config; cir_param = &cir_param; }; /* reg_usb0_vbus: usb0-vbus { compatible = "regulator-fixed"; regulator-name = "usb0-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-enable-ramp-delay = <1000>; gpio = <&pio PB 12 GPIO_ACTIVE_HIGH>; enable-active-high; }; */ /* reg_usb1_vbus: usb1-vbus { compatible = "regulator-fixed"; regulator-name = "usb1-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-enable-ramp-delay = <1000>; gpio = <&pio PB 3 GPIO_ACTIVE_HIGH>; enable-active-high; }; */ reg_vdd_4g_3v8: vdd_4g_3v8 { compatible = "regulator-fixed"; regulator-name = "vdd_4g_3v8"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-enable-ramp-delay = <1000>; gpio = <&pio PI 13 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-always-on; regulator-boot-on; }; standby_param: standby_param { vdd-cpu = <0x00000001>; vdd-cpub = <0x00000001>; vdd-sys = <0x00000002>; vcc-pll = <0x00000080>; vcc-io = <0x00004000>; osc24m-on = <0x0>; dsp-standby-en = <0x1>; }; cir_param: cir_param { gpio_group = <1>; /* 0:PL 1:PM */ gpio_pin = <11>; gpio_function = <2>; count = <15>; ir_power_key_code0 = <0x40>; ir_addr_code0 = <0xfe01>; ir_power_key_code1 = <0x1a>; ir_addr_code1 = <0xfb04>; ir_power_key_code2 = <0xf2>; ir_addr_code2 = <0x2992>; ir_power_key_code3 = <0x57>; ir_addr_code3 = <0x9f00>; ir_power_key_code4 = <0xdc>; ir_addr_code4 = <0x4cb3>; ir_power_key_code5 = <0x18>; ir_addr_code5 = <0xff00>; ir_power_key_code6 = <0xdc>; ir_addr_code6 = <0xdd22>; ir_power_key_code7 = <0x0d>; ir_addr_code7 = <0xbc00>; ir_power_key_code8 = <0x4d>; ir_addr_code8 = <0x4040>; ir_power_key_code9 = <0x08>; ir_addr_code9 = <0xfb04>; ir_power_key_code10 = <0x00>; ir_addr_code10 = <0xfc03>; ir_power_key_code11 = <0x00>; ir_addr_code11 = <0xbf00>; ir_power_key_code12 = <0xea>; ir_addr_code12 = <0xfb04>; ir_power_key_code13 = <0x42>; ir_addr_code13 = <0xbf00>; ir_power_key_code14 = <0x0f>; ir_addr_code14 = <0xff00>; }; arisc_config: arisc_config { s_uart_config { pins = "PL2", "PL3"; function = <2>, <2>; status = "disabled"; }; }; reserved-memory { dsp0ddr_reserved: dsp0ddr@4a000000 { reg = <0x0 0x4a000000 0x0 0x00a00000>; no-map; }; riscvsram0_reserved: riscvsram0@7280000 { reg = <0x0 0x07280000 0x0 0x40000>; no-map; }; riscvsram1_reserved: riscvsram1@72c0000 { reg = <0x0 0x072c0000 0x0 0x40000>; no-map; }; /* * The name should be "vdev%dbuffer". * Its size should be not less than * RPMSG_BUF_SIZE * (num of buffers in a vring) * 2 * = 512 * (num of buffers in a vring) * 2 */ dsp_vdev0buffer: vdev0buffer@4ac00000 { compatible = "shared-dma-pool"; reg = <0x0 0x4ac00000 0x0 0x40000>; no-map; }; /* * The name should be "vdev%dvring%d". * The size of each should be not less than * PAGE_ALIGN(vring_size(num, align)) * = PAGE_ALIGN(16 * num + 6 + 2 * num + (pads for align) + 6 + 8 * num) * * (Please refer to the vring layout in include/uapi/linux/virtio_ring.h) */ dsp_vdev0vring0: vdev0vring0@4ac40000 { reg = <0x0 0x4ac40000 0x0 0x2000>; no-map; }; dsp_vdev0vring1: vdev0vring1@4ac42000 { reg = <0x0 0x4ac42000 0x0 0x2000>; no-map; }; /* * The name should be "vdev%dbuffer". * Its size should be not less than * RPMSG_BUF_SIZE * (num of buffers in a vring) * 2 * = 512 * (num of buffers in a vring) * 2 */ rv_vdev0buffer: vdev0buffer@4ae00000 { compatible = "shared-dma-pool"; reg = <0x0 0x4ae00000 0x0 0x40000>; no-map; }; /* * The name should be "vdev%dvring%d". * The size of each should be not less than * PAGE_ALIGN(vring_size(num, align)) * = PAGE_ALIGN(16 * num + 6 + 2 * num + (pads for align) + 6 + 8 * num) * * (Please refer to the vring layout in include/uapi/linux/virtio_ring.h) */ rv_vdev0vring0: vdev0vring0@4ae40000 { reg = <0x0 0x4ae40000 0x0 0x2000>; no-map; }; rv_vdev0vring1: vdev0vring1@4ae42000 { reg = <0x0 0x4ae42000 0x0 0x2000>; no-map; }; /* * dsp ram addr */ dsp0iram_reserved: dsp0iram@20000 { reg = <0x0 0x20000 0x0 0x10000>; no-map; }; dsp0dram0_reserved: dsp0dram0@30000 { reg = <0x0 0x30000 0x0 0x8000>; no-map; }; dsp0dram1_reserved: dsp0dram1@38000 { reg = <0x0 0x38000 0x0 0x8000>; no-map; }; dsp0_rpbuf_reserved: dsp0_rpbuf@4ae44000 { compatible = "shared-dma-pool"; no-map; reg = <0x0 0x4ae44000 0x0 0x8000>; }; dsp_share_space@4ab00000 { no-map; reg = <0x0 0x4ab00000 0x0 0x10000>; }; }; rpbuf_controller0: rpbuf_controller@0 { compatible = "allwinner,rpbuf-controller"; remoteproc = <&dsp0_rproc>; ctrl_id = <0>; memory-region = <&dsp0_rpbuf_reserved>; status = "okay"; }; ap6256_wifi: ap6256_wifi { compatible = "android,bcmdhd_wlan"; gpio_wl_reg_on = <&pio PC 3 GPIO_ACTIVE_HIGH>; gpio_wl_host_wake = <&pio PC 7 GPIO_ACTIVE_HIGH>; }; gpio-keys { compatible = "gpio-keys"; status = "okay"; vol-down-key { gpios = <&pio PI 11 GPIO_ACTIVE_LOW>; linux,code = <114>; label = "user key"; debounce-interval = <10>; wakeup-source = <0x1>; gpio-key,wakeup; }; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; status = "okay"; led0: led-green { label = "green"; gpios = <&pio PB 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; linux,defaults-trigger = "heartbeat"; defaults-state = "on"; }; led1: led-red { label = "red"; gpios = <&pio PB 7 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; linux,defaults-trigger = "heartbeat"; defaults-state = "on"; }; }; }; &r_pio { uart8_pins_a: uart8_pins@0 { pins = "PL12", "PL13"; function = "s_uart0"; }; uart8_pins_b: uart8_pins@1 { pins = "PL12", "PL13"; function = "gpio_in"; }; uart9_pins_a: uart9_pins@0 { pins = "PL2", "PL3"; function = "s_uart1"; }; uart9_pins_b: uart9_pins@1 { pins = "PL2", "PL3"; function = "gpio_in"; }; s_twi0_pins_default: s_twi0@0 { pins = "PL0", "PL1"; function = "s_twi0"; drive-strength = <10>; bias-pull-up; }; s_twi0_pins_sleep: s_twi0@1 { pins = "PL0", "PL1"; function = "gpio_in"; }; s_twi1_pins_default: s_twi1@0 { pins = "PL8", "PL9"; function = "s_twi1"; drive-strength = <10>; bias-pull-up; }; s_twi1_pins_sleep: s_twi1@1 { pins = "PL8", "PL9"; function = "gpio_in"; }; s_twi2_pins_default: s_twi2@0 { pins = "PM4", "PM5"; function = "s_twi2"; drive-strength = <20>; bias-pull-up; }; s_twi2_pins_sleep: s_twi2@1 { pins = "PM4", "PM5"; function = "gpio_in"; }; s_irrx_pins_default: s_irrx@0 { pins = "PL11"; function = "s_cir"; }; s_irrx_pins_sleep: s_irrx@1 { pins = "PL11"; function = "gpio_in"; }; }; &pio { vcc-pg-supply = <®_pio1_8>; vcc-pf-supply = <®_pio1_8>; vcc-pfo-supply = <®_pio3_3>; vcc-pd-supply = <®_pio3_3>; vcc-pe-supply = <®_pio3_3>; vcc-pi-supply = <®_pio3_3>; vcc-pj-supply = <®_pio3_3>; vcc-pk-supply = <®_pio3_3>; uart0_pins_a: uart0_pins@0 { pins = "", ""; function = "uart0"; }; uart0_pins_b: uart0_pins@1 { pins = "", ""; function = "gpio_in"; }; uart2_pins_a: uart2_pins@0 { pins = "PB0", "PB1"; function = "uart2"; }; uart2_pins_b: uart2_pins@1 { pins = "PB0", "PB1"; function = "gpio_in"; }; uart3_pins_a: uart3_pins@0 { pins = "PJ20", "PJ21", "PJ22", "PJ23"; function = "uart3"; }; uart3_pins_b: uart3_pins@1 { pins = "PJ20", "PJ21", "PJ22", "PJ23"; function = "gpio_in"; }; uart4_pins_a: uart4_pins@0 { pins = "PE1", "PE2"; // "PE3", "PE4"; function = "uart4"; }; uart4_pins_b: uart4_pins@1 { pins = "PE1", "PE2"; // "PE3", "PE4"; function = "gpio_in"; }; uart5_pins_a: uart5_pins@0 { //pins = "PE13", "PE14"; //function = "uart5"; pins = ""; }; uart5_pins_b: uart5_pins@1 { //pins = "PE13", "PE14"; //function = "gpio_in"; pins = ""; }; uart6_pins_a: uart6_pins@0 { pins = "PE11", "PE12"; function = "uart6"; }; uart6_pins_b: uart6_pins@1 { pins = "PE11", "PE12"; function = "gpio_in"; }; uart7_pins_a: uart7_pins@0 { pins = "PB11", "PB12", "PB13", "PB14"; function = "uart7"; }; uart7_pins_b: uart7_pins@1 { pins = "PB11", "PB12", "PB13", "PB14"; function = "gpio_in"; }; a_pwm0_pin_active: a_pwm0@0 { pins = "PD23"; function = "pwm0"; }; a_pwm0_pin_sleep: a_pwm0@1 { pins = "PD23"; function = "gpio_in"; bias-pull-down; }; a_pwm1_pin_active: a_pwm1@0 { pins = "PD22"; function = "pwm1"; }; a_pwm1_pin_sleep: a_pwm1@1 { pins = "PD22"; function = "gpio_in"; bias-pull-down; }; a_pwm2_pin_active: a_pwm2@0 { pins = "PB11"; function = "pwm2"; }; a_pwm2_pin_sleep: a_pwm2@1 { pins = "PB11"; function = "gpio_in"; bias-pull-down; }; a_pwm3_pin_active: a_pwm3@0 { pins = "PB12"; function = "pwm3"; }; a_pwm3_pin_sleep: a_pwm3@1 { pins = "PB12"; function = "gpio_in"; bias-pull-down; }; a_pwm4_pin_active: a_pwm4@0 { pins = "PI3"; function = "pwm4"; }; a_pwm4_pin_sleep: a_pwm4@1 { pins = "PI3"; function = "gpio_in"; bias-pull-down; }; a_pwm5_pin_active: a_pwm5@0 { pins = "PI4"; function = "pwm5"; }; a_pwm5_pin_sleep: a_pwm5@1 { pins = "PI4"; function = "gpio_in"; bias-pull-down; }; a_pwm10_pin_active: a_pwm10@0 { pins = "PI9"; function = "pwm10"; }; a_pwm10_pin_sleep: a_pwm10@1 { pins = "PI9"; function = "gpio_in"; bias-pull-down; }; ledc_pins_a: ledc@0 { pins = "PG0"; function = "ledc"; drive-strength = <10>; }; ledc_pins_b: ledc@1 { pins = "PG0"; function = "gpio_in"; }; irrx_pins_default: irrx@0 { pins = "PI8"; function = "cir"; }; irrx_pins_sleep: irrx@1 { pins = "PI8"; function = "gpio_in"; }; irtx_pins_default: irtx@0 { pins = "PH18"; function = "cir"; }; irtx_pins_sleep: irtx@1 { pins = "PH18"; function = "gpio_in"; }; twi0_pins_default: twi0@0 { pins = "PD22", "PD23"; function = "twi0"; drive-strength = <10>; bias-pull-up; }; twi0_pins_sleep: twi0@1 { pins = "PD22", "PD23"; function = "gpio_in"; }; twi1_pins_default: twi1@0 { pins = "PB4", "PB5"; function = "twi1"; drive-strength = <10>; bias-pull-up; }; twi1_pins_sleep: twi1@1 { pins = "PB4", "PB5"; function = "gpio_in"; }; twi2_pins_default: twi2@0 { pins = "PE1", "PE2"; function = "twi2"; drive-strength = <20>; bias-pull-up; }; twi2_pins_sleep: twi2@1 { pins = "PE1", "PE2"; function = "gpio_in"; }; twi3_pins_default: twi3@0 { pins = "PE3", "PE4"; function = "twi3"; drive-strength = <20>; bias-pull-up; }; twi3_pins_sleep: twi3@1 { pins = "PE3", "PE4"; function = "gpio_in"; }; twi4_pins_default: twi4@0 { pins = "PI0", "PI1"; function = "twi4"; drive-strength = <10>; bias-pull-up; }; twi4_pins_sleep: twi4@1 { pins = "PI0", "PI1"; function = "gpio_in"; }; twi5_pins_default: twi5@0 { pins = "PJ26", "PJ27"; function = "twi5"; drive-strength = <10>; bias-pull-up; }; twi5_pins_sleep: twi5@1 { pins = "PJ26", "PJ27"; function = "gpio_in"; }; owa_pins_a: owa@0 { pins = "PI10"; function = "owa"; drive-strength = <20>; bias-disable; }; owa_pins_b: owa@1 { pins = "PI10"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s0_pins_a: i2s0@0 { pins = "PB4", "PB5", "PB6", "PB7", "PB8"; function = "i2s0"; drive-strength = <20>; bias-disable; }; i2s0_pins_b: i2s0@1 { pins = "PB4", "PB5", "PB6", "PB7", "PB8"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s1_pins_a: i2s1@0 { pins = "PG10", "PG11", "PG12", "PG13", "PG14"; function = "i2s1"; drive-strength = <20>; bias-disable; }; i2s1_pins_b: i2s1@1 { pins = "PG10", "PG11", "PG12", "PG13", "PG14"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s2_pins_a: i2s2@0 { pins = "PH2", "PH3", "PH8", "PH9", "PH10", "PH11", "PH12"; function = "i2s2"; drive-strength = <20>; bias-disable; }; i2s2_pins_b: i2s2@1 { pins = "PH2", "PH3", "PH8", "PH9", "PH10", "PH11", "PH12"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s3_pins_a: i2s3@0 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5", "PF6"; function = "i2s3"; drive-strength = <20>; bias-disable; }; i2s3_pins_b: i2s3@1 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5", "PF6"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; rgb24_pins_a: rgb24@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ "PD20", "PD21", "PD22","PD23","PD24","PD25","PD26","PD27"; function = "dpss"; drive-strength = <30>; }; rgb24_pins_b: rgb24@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ "PD20", "PD21", "PD22", "PD23","PD24","PD25","PD26","PD27"; function = "gpio_in"; }; lvds0_pins_a: lvds0@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "lvds0"; drive-strength = <30>; }; lvds0_pins_b: lvds0@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "gpio_in"; }; nand0_pins_default: nand0@0 { pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; function = "nand0"; drive-strength = <30>; }; nand0_pins_rb: nand0@1 { pins = "PC4", "PC6", "PC3", "PC7"; function = "nand0"; drive-strength = <30>; bias-pull-up; /* only RB&CE should be pulled up */ }; nand0_pins_sleep: nand0@2 { pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; function = "io_disabled"; drive-strength = <10>; }; gmac0_pins_default: gmac0@0 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10","PH13","PH14", "PH15","PH16","PH17","PH18"; drive-strength = <40>; function = "gmac0"; bias-pull-up; }; gmac0_pins_sleep: gmac0@1 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10","PH13","PH14", "PH15","PH16","PH17","PH18"; function = "gpio_in"; }; gmac1_pins_default: gmac1@0 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12","PJ13", "PJ14", "PJ15"; drive-strength = <40>; function = "gmac1"; bias-pull-up; }; gmac1_pins_sleep: gmac1@1 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12","PJ13", "PJ14", "PJ15"; function = "gpio_in"; }; spi1_pin_default: spi1_pin_default{ pins = "PI2","PI3","PI4","PI5"; function = "spi1"; }; spi1_pin_sleep: spi1_pin_sleep{ pins = "PI2","PI3","PI4","PI5"; function = "gpio_in"; }; spi2_pin_default: spi2_default { pins = "PI6","PI7","PI8","PI12"; function = "spi2"; }; spi2_pin_sleep: spi2_sleep { pins = "PI6","PI7","PI8","PI12"; function = "gpio_in"; }; }; &spi1 { clock-frequency = <100000000>; pinctrl-names = "default","sleep"; pinctrl-0 = <&spi1_pin_default>; pinctrl-1 = <&spi1_pin_sleep>; sunxi,spi-num-cs = <1>; sunxi,spi-bus-mode = <SUNXI_SPI_BUS_MASTER>; sunxi,spi-cs-mode = <SUNXI_SPI_CS_AUTO>; status = "okay"; spidev1 { reg = <0>; compatible = "rohm,dh2228fv"; spi-max-frequency = <500000>; spi-rx-bus-width = <0x1>; spi-tx-bus-width = <0x1>; }; }; &spi2{ clock-frequency = <100000000>; pinctrl-names = "default","sleep"; pinctrl-0 = <&spi2_pin_default>; pinctrl-1 = <&spi2_pin_sleep>; sunxi,spi-num-cs = <1>; sunxi,spi-bus-mode = <SUNXI_SPI_BUS_MASTER>; sunxi,spi-cs-mode = <SUNXI_SPI_CS_AUTO>; status = "okay"; spidev2 { reg = <0>; compatible = "rohm,dh2228fv"; spi-max-frequency = <500000>; spi-rx-bus-width = <0x1>; spi-tx-bus-width = <0x1>; }; }; &soc { auto_print@54321 { reg = <0x0 0x54321 0x0 0x0>; device_type = "auto_print"; status = "okay"; }; car_reverse: car-reverse { compatible = "allwinner,sunxi-car-reverse"; /* video source setting*/ video_channel = <0>; video_source = <0>; format_type = <0>; video_source_width = <1920>; video_source_height = <1080>; src_size_adaptive = <1>; /* display setting */ overview_type = <1>; screen_width = <1280>; screen_height = <800>; screen_size_adaptive = <1>; discard_frame = <0>; di_used = <0>; g2d_used = <1>; rotation = <0>; /* auxiliary line setting */ auxiliary_line_type = <1>; aux_angle = <0>; aux_lr = <0>; reverse_int_pin = <&pio PI 15 GPIO_ACTIVE_HIGH>; status = "disabled"; }; dsp0_rproc: dsp0_rproc@0 { mboxes = <&msgbox 4>, <&msgbox 6>; mbox-names = "arm-kick", "dsp-standby"; memory-region = <&dsp0ddr_reserved>, <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, <&dsp_vdev0vring1>, <&dsp0iram_reserved>, <&dsp0dram0_reserved>, <&dsp0dram1_reserved>; memory-mappings = /* < DA len PA > */ /* local SRAM via external bus */ < 0x20000 0x20000 0x20000 >, /* local SRAM via internal bus */ < 0x400000 0x10000 0x20000 >, < 0x420000 0x8000 0x30000 >, < 0x440000 0x8000 0x38000 >, /* DDR front 256MB */ < 0x10000000 0x10000000 0x40000000 >, /* local SRAM via internal bus */ < 0x20020000 0x10000 0x400000 >, < 0x20030000 0x8000 0x420000 >, < 0x20038000 0x8000 0x440000 >, /* DDR front 256MB */ < 0x30000000 0x10000000 0x40000000 >, /* DDR front 1GB */ < 0x40000000 0x40000000 0x40000000 >, /* DDR front 1GB */ < 0x80000000 0x40000000 0x40000000 >, /* DDR front 1GB */ < 0xC0000000 0x40000000 0x40000000 >; standby-ctrl-en = <0x1>; standby-record-reg = <0x07090110>; status = "okay"; }; e906_rproc: e906_rproc@7130000 { mboxes = <&msgbox 8>; mbox-names = "arm-kick"; memory-region = <&riscvsram0_reserved>, <&riscvsram1_reserved>, <&rv_vdev0buffer>, <&rv_vdev0vring0>, <&rv_vdev0vring1>; memory-mappings = /* < DA len PA > */ /* DSP RAM */ < 0x20000 0x20000 0x20000 >, /* SRAM A2 */ < 0x40000 0x24000 0x40000 >, /* DDR */ < 0x8000000 0x37f00000 0x8000000 >, /* SRAM SPACE 0 */ < 0x3ffc0000 0x40000 0x07280000 >, /* SRAM SPACE 1 */ < 0x40000000 0x40000 0x072c0000 >, /* DRAM SPACE */ < 0x40040000 0x3ffc0000 0x40040000>; status = "okay"; }; }; &uart0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pins_a>; pinctrl-1 = <&uart0_pins_b>; uart-supply = <®_cldo3>; status = "okay"; }; &uart1 { status = "disabled"; }; &uart2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart2_pins_a>; pinctrl-1 = <&uart2_pins_b>; status = "okay"; }; &uart3 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pins_a>; pinctrl-1 = <&uart3_pins_b>; status = "okay"; }; &uart4 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart4_pins_a>; pinctrl-1 = <&uart4_pins_b>; uart4_type = <2>; //io_num sunxi,uart-rs485 = <1>; sunxi,uart-485fl = <0>; //sunxi,uart-485oe-gpios = <&pio PE 3 1 0xffffffff 0xffffffff 0>; sunxi,uart-485oe-gpios = <&pio PE 3 GPIO_ACTIVE_HIGH>; status = "okay"; }; &uart5 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart5_pins_a>; pinctrl-1 = <&uart5_pins_b>; status = "disabled"; }; &uart6 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart6_pins_a>; pinctrl-1 = <&uart6_pins_b>; uart6_type = <2>; //io_num sunxi,uart-rs485 = <1>; sunxi,uart-485fl = <0>; //sunxi,uart-485oe-gpios = <&pio PE 13 1 0xffffffff 0xffffffff 0>; sunxi,uart-485oe-gpios = <&pio PE 13 GPIO_ACTIVE_HIGH>; status = "okay"; }; &uart7 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart7_pins_a>; pinctrl-1 = <&uart7_pins_b>; status = "okay"; }; &uart8 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart8_pins_a>; pinctrl-1 = <&uart8_pins_b>; status = "okay"; }; &uart9 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart9_pins_a>; pinctrl-1 = <&uart9_pins_b>; status = "okay"; }; &lradc { key_cnt = <2>; key0 = <210 0x73>; key1 = <410 0x72>; key_debounce; debounce_value = <50>; status = "okay"; }; &irrx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&irrx_pins_default>; pinctrl-1 = <&irrx_pins_sleep>; irrx-supply = <®_dcdc4>; status = "disabled"; }; &s_irrx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&s_irrx_pins_default>; pinctrl-1 = <&s_irrx_pins_sleep>; status = "okay"; }; &irtx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&irtx_pins_default>; pinctrl-1 = <&irtx_pins_sleep>; status = "disabled"; }; &gpadc0 { channel_num = <2>; channel_select = <3>; channel_data_select = <3>; channel_compare_select = <3>; channel_cld_select = <3>; channel_chd_select = <3>; channel0_compare_lowdata = <1700000>; channel0_compare_higdata = <1200000>; channel1_compare_lowdata = <460000>; channel1_compare_higdata = <1200000>; status = "disabled"; }; &gpadc1 { channel_num = <2>; channel_select = <3>; channel_data_select = <3>; channel_compare_select = <3>; channel_cld_select = <3>; channel_chd_select = <3>; channel0_compare_lowdata = <1700000>; channel0_compare_higdata = <1200000>; channel1_compare_lowdata = <460000>; channel1_compare_higdata = <1200000>; status = "disabled"; }; &a_pwm0 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm0_pin_active>; pinctrl-1 = <&a_pwm0_pin_sleep>; pwm-supply = <®_dcdc4>; status = "okay"; }; &a_pwm1 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm1_pin_active>; pinctrl-1 = <&a_pwm1_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &a_pwm2 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm2_pin_active>; pinctrl-1 = <&a_pwm2_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &a_pwm3 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm3_pin_active>; pinctrl-1 = <&a_pwm3_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &a_pwm4 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm4_pin_active>; pinctrl-1 = <&a_pwm4_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &a_pwm5 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm5_pin_active>; pinctrl-1 = <&a_pwm5_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &a_pwm10 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm10_pin_active>; pinctrl-1 = <&a_pwm10_pin_sleep>; pwm-supply = <®_dcdc4>; status = "okay"; }; &ledc { pinctrl-names = "default", "sleep"; pinctrl-0 = <&ledc_pins_a>; pinctrl-1 = <&ledc_pins_b>; led_count = <34>; output_mode = "GRB"; reset_ns = <84>; t1h_ns = <800>; t1l_ns = <320>; t0h_ns = <300>; t0l_ns = <800>; wait_time0_ns = <84>; wait_time1_ns = <84>; wait_data_time_ns = <600000>; status = "disabled"; }; &twi0 { clock-frequency = <400000>; pinctrl-0 = <&twi0_pins_default>; pinctrl-1 = <&twi0_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; pcie_usb_phy@74 { compatible = "combphy,phy74"; reg = <0x74>; status = "disabled"; }; pcie_usb_phy@75 { compatible = "combphy,phy75"; reg = <0x75>; status = "disabled"; }; ctp { compatible = "allwinner,goodix"; reg = <0x5d>; device_type = "ctp"; status = "disabled"; ctp_name = "gt9xxnew_ts"; ctp_twi_id = <0x0>; ctp_twi_addr = <0x5d>; ctp_screen_max_x = <0x320>; ctp_screen_max_y = <0x500>; ctp_revert_x_flag = <0x1>; ctp_revert_y_flag = <0x1>; ctp_exchange_x_y_flag = <0x0>; ctp_int_port = <&pio PH 9 GPIO_ACTIVE_LOW>; ctp_wakeup = <&pio PH 10 GPIO_ACTIVE_LOW>; ctp-supply = <®_cldo2>; ctp_power_ldo_vol = <3300>; }; gt9xx { compatible = "goodix,gt9xx"; reg = <0x5d>; status = "disabled"; irq-gpios = <&pio PD 20 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PD 21 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ B4 00 05 20 03 0A 3D 00 01 0A 28 0F 50 32 03 05 00 00 00 00 00 00 06 17 19 1F 14 8E 2E 99 2D 2F 35 11 00 00 00 1A 03 10 00 00 00 00 00 00 00 00 00 00 00 32 50 94 D5 02 07 00 00 04 8E 48 00 8A 4D 00 86 53 00 83 59 00 80 60 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 05 06 07 08 09 0C 0D 0E 0F 10 11 14 15 16 17 FF FF FF FF FF FF FF FF FF FF FF FF 28 27 26 25 24 23 22 21 20 1F 1E 1C 1B 19 13 12 11 10 0F 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF AB 01 ]; }; }; &twi1 { clock-frequency = <400000>; pinctrl-0 = <&twi1_pins_default>; pinctrl-1 = <&twi1_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; status = "okay"; mir3da { compatible = "allwinner,mir3da"; reg = <0x26>; device_type = "gsensor"; status = "disabled"; gsensor_twi_id = <0x1>; gsensor_twi_addr = <0x26>; gsensor_int1 = <&pio PH 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; gsensor-supply = <®_cldo3>; gsensor_vcc_io_val = <3300>; }; eeprom@50 { compatible = "atmel,24c32"; reg = <0x50>; status = "okay"; }; }; &twi2 { clock-frequency = <400000>; pinctrl-0 = <&twi2_pins_default>; pinctrl-1 = <&twi2_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "disabled"; }; &twi3 { clock-frequency = <400000>; pinctrl-0 = <&twi3_pins_default>; pinctrl-1 = <&twi3_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "disabled"; }; &twi4 { clock-frequency = <400000>; pinctrl-0 = <&twi4_pins_default>; pinctrl-1 = <&twi4_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; rtc@51 { compatible = "nxp,pcf8563"; reg = <0x51>; #clock-cells = <0>; status = "okay"; }; /* 070 inch ft5x06: ft5x06@38 { compatible = "edt,edt-ft5406", "edt,edt-ft5x06"; reg = <0x38>; pinctrl-names = "default"; interrupt-parent = <&pio>; interrupts = <PJ 19 IRQ_TYPE_EDGE_FALLING>; reset-gpios = <&pio PJ 18 GPIO_ACTIVE_LOW>; touchscreen-size-x=<1024>; touchscreen-size-y=<600>; }; */ // 101 inch gt9271@14 { compatible = "goodix,gt9271"; reg = <0x14>; //pinctrl-names = "default"; //pinctrl-0 = <&pinctrl_i2c_synaptics_dsx_io>; interrupt-parent = <&pio>; interrupts = <PJ 19 IRQ_TYPE_EDGE_FALLING>; reset-gpios = <&pio PJ 18 GPIO_ACTIVE_LOW>; /*synaptics,y-rotation;*/ esd-recovery-timeout-ms = <2000>; irq-gpios = <&pio PJ 19 GPIO_ACTIVE_HIGH>; //reset-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; status = "okay"; }; gt9xx { compatible = "goodix,gt9xx"; reg = <0x5d>; status = "okay"; irq-gpios = <&pio PJ 19 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PJ 18 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ B4 00 05 20 03 0A 3D 00 01 0A 28 0F 50 32 03 05 00 00 00 00 00 00 06 17 19 1F 14 8E 2E 99 2D 2F 35 11 00 00 00 1A 03 10 00 00 00 00 00 00 00 00 00 00 00 32 50 94 D5 02 07 00 00 04 8E 48 00 8A 4D 00 86 53 00 83 59 00 80 60 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 05 06 07 08 09 0C 0D 0E 0F 10 11 14 15 16 17 FF FF FF FF FF FF FF FF FF FF FF FF 28 27 26 25 24 23 22 21 20 1F 1E 1C 1B 19 13 12 11 10 0F 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF AB 01 ]; }; }; &twi5 { clock-frequency = <400000>; pinctrl-0 = <&twi5_pins_default>; pinctrl-1 = <&twi5_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; gt9xx_secondary { compatible = "goodix,gt9xx_secondary"; reg = <0x5d>; status = "okay"; irq-gpios = <&pio PI 13 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PI 14 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ 43 B0 04 80 07 0A 35 00 01 08 28 0F 50 32 03 05 00 00 00 00 00 00 00 17 19 1B 14 90 2B 99 2F 31 8E 12 00 00 00 DA 03 10 00 00 00 00 00 00 00 00 00 11 00 29 4B 94 C5 02 07 00 00 04 85 2B 00 7D 31 00 77 37 00 72 3E 00 6F 46 00 6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 C0 00 00 00 00 00 00 00 17 16 15 14 11 10 0F 0E 0D 0C 09 08 07 06 05 04 01 00 FF FF FF FF FF FF 00 00 00 00 00 00 25 24 23 22 21 20 1F 1E 1C 1B 19 14 13 12 11 10 0F 0E 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF 00 00 00 00 00 00 00 00 00 00 73 01 ]; }; }; &csi_mclk3_pins_a { pins = "PK13"; function = "ncsi"; }; &csi_mclk3_pins_b { pins = "PK13"; }; &mipib_4lane_pins_a { pins = "PK6", "PK7", "PK8", "PK9"; }; &mipib_4lane_pins_b { pins = "PK6", "PK7", "PK8", "PK9"; }; &vind0 { csi_top = <360000000>; csi_isp = <300000000>; vind_mclkpin-supply = <®_bldo3>; /* vcc-pe */ vind_mclkpin_vol = <1800000>; vind_mcsipin-supply = <®_bldo3>; /* vcc-pk */ vind_mcsipin_vol = <1800000>; vind_mipipin-supply = <®_bldo3>; /* vcc-mcsi */ vind_mipipin_vol = <1800000>; status = "okay"; csi3:csi@5823000 { pinctrl-names = "default","sleep"; pinctrl-0 = <&ncsi_bt1120_pins_a>; pinctrl-1 = <&ncsi_bt1120_pins_b>; status = "disabled"; }; tdm0:tdm@5908000 { work_mode = <0>; }; isp00:isp@5900000 { work_mode = <0>; }; isp01:isp@58ffffc { status = "disabled"; }; isp02:isp@58ffff8 { status = "disabled"; }; isp03:isp@58ffff4 { status = "disabled"; }; isp10:isp@4 { status = "okay"; }; isp20:isp@5 { status = "okay"; }; scaler00:scaler@5910000 { work_mode = <0>; }; scaler01:scaler@590fffc { status = "disabled"; }; scaler02:scaler@590fff8 { status = "disabled"; }; scaler03:scaler@590fff4 { status = "disabled"; }; scaler10:scaler@5910400 { work_mode = <0>; }; scaler11:scaler@59103fc { status = "disabled"; }; scaler12:scaler@59103f8 { status = "disabled"; }; scaler13:scaler@59103f4 { status = "disabled"; }; scaler20:scaler@5910800 { work_mode = <0>; }; scaler21:scaler@59107fc { status = "disabled"; }; scaler22:scaler@59107f8 { status = "disabled"; }; scaler23:scaler@59107f4 { status = "disabled"; }; scaler30:scaler@5910c00 { work_mode = <0>; }; scaler31:scaler@5910bfc { status = "disabled"; }; scaler32:scaler@5910bf8 { status = "disabled"; }; scaler33:scaler@5910bf4 { status = "disabled"; }; scaler40:scaler@16 { status = "okay"; }; scaler50:scaler@17 { status = "okay"; }; actuator0: actuator@2108180 { device_type = "actuator0"; actuator0_name = "dw9714_act"; actuator0_slave = <0x18>; actuator0_af_pwdn = <>; actuator0_afvdd = "afvcc-csi"; actuator0_afvdd_vol = <2800000>; status = "disabled"; }; flash0: flash@2108190 { device_type = "flash0"; flash0_type = <2>; flash0_en = <&r_pio PL 11 GPIO_ACTIVE_LOW>; flash0_mode = <>; flash0_flvdd = ""; flash0_flvdd_vol = <>; device_id = <0>; status = "disabled"; }; sensor0:sensor@5812000 { device_type = "sensor0"; sensor0_mname = "ov5640_mipi_cam1"; sensor0_twi_cci_id = <7>; sensor0_twi_addr = <0x78>; // sensor0_mclk_id = <0>; sensor0_pos = "rear"; sensor0_isp_used = <0>; sensor0_fmt = <0>; sensor0_stby_mode = <0>; sensor0_vflip = <0>; sensor0_hflip = <0>; sensor0_cameravdd-supply = <>; sensor0_cameravdd_vol = <>; sensor0_iovdd-supply = <>; sensor0_iovdd_vol = <>; sensor0_avdd-supply = <>; sensor0_avdd_vol = <>; sensor0_dvdd-supply = <>; sensor0_dvdd_vol = <>; sensor0_power_en = <&pio PH 11 GPIO_ACTIVE_LOW>; sensor0_reset = <&r_pio PM 0 GPIO_ACTIVE_LOW>; sensor0_pwdn = <&r_pio PM 1 GPIO_ACTIVE_LOW>; status = "okay"; }; sensor1:sensor@5812010 { device_type = "sensor1"; sensor1_mname = "ov5640_mipi_cam2"; sensor1_twi_cci_id = <8>; sensor1_twi_addr = <0x78>; // sensor1_mclk_id = <3>; sensor1_pos = "front"; sensor1_isp_used = <0>; sensor1_fmt = <0>; sensor1_stby_mode = <0>; sensor1_vflip = <0>; sensor1_hflip = <0>; sensor1_iovdd-supply = <>; sensor1_iovdd_vol = <>; sensor1_avdd-supply = <>; sensor1_avdd_vol = <>; sensor1_dvdd-supply = <>; sensor1_dvdd_vol = <>; sensor1_power_en = <&pio PH 8 GPIO_ACTIVE_HIGH>; sensor1_reset = <&r_pio PM 2 GPIO_ACTIVE_LOW>; sensor1_pwdn = <&r_pio PM 3 GPIO_ACTIVE_LOW>; status = "okay"; }; vinc00:vinc@5830000 { vinc0_csi_sel = <0>; vinc0_mipi_sel = <0>; vinc0_isp_sel = <4>; vinc0_isp_tx_ch = <0>; vinc0_tdm_rx_sel = <0>; vinc0_rear_sensor_sel = <0>; vinc0_front_sensor_sel = <0>; vinc0_sensor_list = <0>; device_id = <0>; work_mode = <0x0>; status = "okay"; }; vinc01:vinc@582fffc { vinc1_csi_sel = <1>; vinc1_mipi_sel = <2>; vinc1_isp_sel = <1>; vinc1_isp_tx_ch = <0>; vinc1_tdm_rx_sel = <1>; vinc1_rear_sensor_sel = <1>; vinc1_front_sensor_sel = <1>; vinc1_sensor_list = <0>; device_id = <1>; status = "disabled"; }; vinc02:vinc@582fff8 { vinc2_csi_sel = <2>; vinc2_mipi_sel = <0xff>; vinc2_isp_sel = <2>; vinc2_isp_tx_ch = <2>; vinc2_tdm_rx_sel = <2>; vinc2_rear_sensor_sel = <0>; vinc2_front_sensor_sel = <0>; vinc2_sensor_list = <0>; device_id = <2>; status = "disabled"; }; vinc03:vinc@582fff4 { vinc3_csi_sel = <0>; vinc3_mipi_sel = <0xff>; vinc3_isp_sel = <0>; vinc3_isp_tx_ch = <0>; vinc3_tdm_rx_sel = <0>; vinc3_rear_sensor_sel = <1>; vinc3_front_sensor_sel = <1>; vinc3_sensor_list = <0>; device_id = <3>; status = "disabled"; }; vinc10:vinc@5831000 { vinc4_csi_sel = <0>; vinc4_mipi_sel = <0>; vinc4_isp_sel = <4>; vinc4_isp_tx_ch = <1>; vinc4_tdm_rx_sel = <0>; vinc4_rear_sensor_sel = <0>; vinc4_front_sensor_sel = <0>; vinc4_sensor_list = <0>; device_id = <4>; work_mode = <0x0>; status = "okay"; }; vinc11:vinc@5830ffc { vinc5_csi_sel = <2>; vinc5_mipi_sel = <0xff>; vinc5_isp_sel = <1>; vinc5_isp_tx_ch = <1>; vinc5_tdm_rx_sel = <1>; vinc5_rear_sensor_sel = <0>; vinc5_front_sensor_sel = <0>; vinc5_sensor_list = <0>; device_id = <5>; status = "disabled"; }; vinc12:vinc@5830ff8 { vinc6_csi_sel = <2>; vinc6_mipi_sel = <0xff>; vinc6_isp_sel = <0>; vinc6_isp_tx_ch = <0>; vinc6_tdm_rx_sel = <0>; vinc6_rear_sensor_sel = <0>; vinc6_front_sensor_sel = <0>; vinc6_sensor_list = <0>; device_id = <6>; status = "disabled"; }; vinc13:vinc@5830ff4 { vinc7_csi_sel = <2>; vinc7_mipi_sel = <0xff>; vinc7_isp_sel = <0>; vinc7_isp_tx_ch = <0>; vinc7_tdm_rx_sel = <0>; vinc7_rear_sensor_sel = <0>; vinc7_front_sensor_sel = <0>; vinc7_sensor_list = <0>; device_id = <7>; status = "disabled"; }; vinc20:vinc@5832000 { vinc8_csi_sel = <0>; vinc8_mipi_sel = <0>; vinc8_isp_sel = <4>; vinc8_isp_tx_ch = <2>; vinc8_tdm_rx_sel = <0>; vinc8_rear_sensor_sel = <0>; vinc8_front_sensor_sel = <0>; vinc8_sensor_list = <0>; device_id = <8>; work_mode = <0x0>; status = "okay"; }; vinc21:vinc@5831ffc { vinc9_csi_sel = <2>; vinc9_mipi_sel = <0xff>; vinc9_isp_sel = <0>; vinc9_isp_tx_ch = <0>; vinc9_tdm_rx_sel = <0>; vinc9_rear_sensor_sel = <0>; vinc9_front_sensor_sel = <0>; vinc9_sensor_list = <0>; device_id = <9>; status = "disabled"; }; vinc22:vinc@5831ff8 { vinc10_csi_sel = <2>; vinc10_mipi_sel = <0xff>; vinc10_isp_sel = <0>; vinc10_isp_tx_ch = <0>; vinc10_tdm_rx_sel = <0>; vinc10_rear_sensor_sel = <0>; vinc10_front_sensor_sel = <0>; vinc10_sensor_list = <0>; device_id = <10>; status = "disabled"; }; vinc23:vinc@5831ff4 { vinc11_csi_sel = <2>; vinc11_mipi_sel = <0xff>; vinc11_isp_sel = <0>; vinc11_isp_tx_ch = <0>; vinc11_tdm_rx_sel = <0>; vinc11_rear_sensor_sel = <0>; vinc11_front_sensor_sel = <0>; vinc11_sensor_list = <0>; device_id = <11>; status = "disabled"; }; vinc30:vinc@5833000 { vinc12_csi_sel = <0>; vinc12_mipi_sel = <0>; vinc12_isp_sel = <4>; vinc12_isp_tx_ch = <3>; vinc12_tdm_rx_sel = <0>; vinc12_rear_sensor_sel = <0>; vinc12_front_sensor_sel = <0>; vinc12_sensor_list = <0>; device_id = <12>; work_mode = <0x0>; status = "okay"; }; vinc31:vinc@5832ffc { vinc13_csi_sel = <2>; vinc13_mipi_sel = <0xff>; vinc13_isp_sel = <0>; vinc13_isp_tx_ch = <0>; vinc13_tdm_rx_sel = <0>; vinc13_rear_sensor_sel = <0>; vinc13_front_sensor_sel = <0>; vinc13_sensor_list = <0>; device_id = <13>; status = "disabled"; }; vinc32:vinc@5832ff8 { vinc14_csi_sel = <2>; vinc14_mipi_sel = <0xff>; vinc14_isp_sel = <0>; vinc14_isp_tx_ch = <0>; vinc14_tdm_rx_sel = <0>; vinc14_rear_sensor_sel = <0>; vinc14_front_sensor_sel = <0>; vinc14_sensor_list = <0>; device_id = <14>; status = "disabled"; }; vinc33:vinc@5832ff4 { vinc15_csi_sel = <2>; vinc15_mipi_sel = <0xff>; vinc15_isp_sel = <0>; vinc15_isp_tx_ch = <0>; vinc15_tdm_rx_sel = <0>; vinc15_rear_sensor_sel = <0>; vinc15_front_sensor_sel = <0>; vinc15_sensor_list = <0>; device_id = <15>; status = "disabled"; }; vinc40:vinc@5834000 { vinc16_csi_sel = <2>; vinc16_mipi_sel = <2>; vinc16_isp_sel = <4>; vinc16_isp_tx_ch = <0>; vinc16_tdm_rx_sel = <0>; vinc16_rear_sensor_sel = <1>; vinc16_front_sensor_sel = <1>; vinc16_sensor_list = <1>; device_id = <16>; status = "okay"; }; vinc50:vinc@5835000 { vinc17_csi_sel = <2>; vinc17_mipi_sel = <2>; vinc17_isp_sel = <4>; vinc17_isp_tx_ch = <1>; vinc17_tdm_rx_sel = <0>; vinc17_rear_sensor_sel = <1>; vinc17_front_sensor_sel = <1>; vinc17_sensor_list = <1>; device_id = <17>; status = "okay"; }; }; &twi6 { clock-frequency = <400000>; pinctrl-0 = <&s_twi0_pins_default>; pinctrl-1 = <&s_twi0_pins_sleep>; pinctrl-names = "default", "sleep"; device_type = "twi6"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; no_suspend = <1>; status = "okay"; tcs0: tcs@41 { compatible = "ext,tcs4838"; reg = <0x41>; status = "okay"; tcs4838_delay = <0>; regulator1: regulators@1 { reg_tcs0: dcdc0 { regulator-name = "tcs4838-dcdc0"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_tcs1: dcdc1 { regulator-name = "tcs4838-dcdc1"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; }; }; virtual-ext-dcdc0 { compatible = "xpower-vregulator,ext-dcdc0"; dcdc0-supply = <®_tcs0>; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_tcs1>; }; }; sy0: sy@60 { compatible = "ext,sy8827g"; reg = <0x60>; status = "okay"; sy8827g_delay = <0>; regulator2: regulators@2 { reg_sy0: dcdc0 { regulator-name = "sy8827g-dcdc0"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_sy1: dcdc1 { regulator-name = "sy8827g-dcdc1"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; }; }; virtual-ext-dcdc0 { compatible = "xpower-vregulator,ext-dcdc0"; dcdc0-supply = <®_sy0>; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_sy1>; }; }; axp1530: axp1530@36{ compatible = "ext,axp1530"; status = "okay"; reg = <0x36>; wakeup-source; regulators{ reg_ext_axp1530_dcdc1: dcdc1 { regulator-name = "axp1530-dcdc1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3400000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-always-on; }; reg_ext_axp1530_dcdc2: dcdc2 { regulator-name = "axp1530-dcdc2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1540000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-ramp-delay = <200>; /* FIXME */ regulator-always-on; }; reg_ext_axp1530_dcdc3: dcdc3 { regulator-name = "axp1530-dcdc3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1840000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-always-on; }; reg_ext_axp1530_aldo1: ldo1 { regulator-name = "axp1530-aldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; }; reg_ext_axp1530_dldo1: ldo2 { regulator-name = "axp1530-dldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; }; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_ext_axp1530_dcdc1>; }; virtual-ext-dcdc2 { compatible = "xpower-vregulator,ext-dcdc2"; dcdc2-supply = <®_ext_axp1530_dcdc2>; }; virtual-ext-dcdc3 { compatible = "xpower-vregulator,ext-dcdc3"; dcdc3-supply = <®_ext_axp1530_dcdc3>; }; virtual-ext-aldo1 { compatible = "xpower-vregulator,ext-aldo1"; aldo1-supply = <®_ext_axp1530_aldo1>; }; virtual-ext-dldo1 { compatible = "xpower-vregulator,ext-dldo1"; dldo1-supply = <®_ext_axp1530_dldo1>; }; }; pmu0: pmu@35 { compatible = "x-powers,axp2202"; reg = <0x35>; status = "okay"; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&nmi_intc>; x-powers,drive-vbus-en; pmu_reset = <0>; pmu_irq_wakeup = <1>; pmu_hot_shutdown = <1>; wakeup-source; usb_power_supply: usb_power_supply { compatible = "x-powers,axp2202-usb-power-supply"; status = "okay"; pmu_usbpc_vol = <4600>; pmu_usbpc_cur = <500>; pmu_usbad_vol = <4000>; pmu_usbad_cur = <2500>; pmu_usb_typec_used = <1>; wakeup_usb_in; wakeup_usb_out; det_acin_supply = <&gpio_power_supply>; pmu_acin_usbid_drv = <&pio PH 12 GPIO_ACTIVE_LOW>; pmu_vbus_det_gpio = <&pio PH 13 GPIO_ACTIVE_LOW>; }; gpio_power_supply: gpio_power_supply { compatible = "x-powers,gpio-supply"; status = "disabled"; pmu_acin_det_gpio = <&pio PH 14 GPIO_ACTIVE_LOW>; det_usb_supply = <&usb_power_supply>; }; bat_power_supply: bat-power-supply { compatible = "x-powers,axp2202-bat-power-supply"; param = <&axp2202_parameter>; status = "disabled"; pmu_chg_ic_temp = <0>; pmu_battery_rdc= <147>; pmu_battery_cap = <1771>; pmu_runtime_chgcur = <1000>; pmu_suspend_chgcur = <1500>; pmu_shutdown_chgcur = <1500>; pmu_init_chgvol = <4200>; pmu_battery_warning_level1 = <15>; pmu_battery_warning_level2 = <0>; pmu_chgled_func = <0>; pmu_chgled_type = <0>; pmu_bat_para1 = <0>; pmu_bat_para2 = <0>; pmu_bat_para3 = <0>; pmu_bat_para4 = <0>; pmu_bat_para5 = <0>; pmu_bat_para6 = <0>; pmu_bat_para7 = <2>; pmu_bat_para8 = <3>; pmu_bat_para9 = <4>; pmu_bat_para10 = <6>; pmu_bat_para11 = <9>; pmu_bat_para12 = <14>; pmu_bat_para13 = <26>; pmu_bat_para14 = <38>; pmu_bat_para15 = <49>; pmu_bat_para16 = <52>; pmu_bat_para17 = <56>; pmu_bat_para18 = <60>; pmu_bat_para19 = <64>; pmu_bat_para20 = <70>; pmu_bat_para21 = <77>; pmu_bat_para22 = <83>; pmu_bat_para23 = <87>; pmu_bat_para24 = <90>; pmu_bat_para25 = <95>; pmu_bat_para26 = <99>; pmu_bat_para27 = <99>; pmu_bat_para28 = <100>; pmu_bat_para29 = <100>; pmu_bat_para30 = <100>; pmu_bat_para31 = <100>; pmu_bat_para32 = <100>; pmu_bat_temp_enable = <1>; pmu_jetia_en = <1>; pmu_bat_charge_ltf = <1738>; //-5 pmu_bat_charge_htf = <150>; //60 pmu_bat_shutdown_ltf = <2125>; //-10 pmu_bat_shutdown_htf = <130>; //65 pmu_jetia_cool = <1390>; //0 pmu_jetia_warm = <206>; //50 pmu_jcool_ifall = <2>;//75% pmu_jwarm_ifall = <2>;//75% pmu_bat_temp_para1 = <4592>; //SDNT-25 pmu_bat_temp_para2 = <2781>; //-15 pmu_bat_temp_para3 = <2125>; //-10 pmu_bat_temp_para4 = <1738>; //-5 pmu_bat_temp_para5 = <1390>;//0 pmu_bat_temp_para6 = <1118>; //5 pmu_bat_temp_para7 = <906>; //10 pmu_bat_temp_para8 = <606>; //20 pmu_bat_temp_para9 = <415>; //30 pmu_bat_temp_para10 = <290>; //40 pmu_bat_temp_para11 = <244>; //45 pmu_bat_temp_para12 = <206>; //50 pmu_bat_temp_para13 = <175>; //55 pmu_bat_temp_para14 = <150>; //60 pmu_bat_temp_para15 = <110>; //70 pmu_bat_temp_para16 = <83>; //80 wakeup_bat_out; /* wakeup_bat_in; */ /* wakeup_bat_charging; */ /* wakeup_bat_charge_over; */ /* wakeup_low_warning1; */ /* wakeup_low_warning2; */ /* wakeup_bat_untemp_work; */ /* wakeup_bat_ovtemp_work; */ /* wakeup_bat_untemp_chg; */ /* wakeup_bat_ovtemp_chg; */ }; powerkey0: powerkey@0 { status = "okay"; compatible = "x-powers,axp2101-pek"; pmu_powkey_off_time = <6000>; pmu_powkey_off_func = <0>; pmu_powkey_off_en = <1>; pmu_powkey_long_time = <1500>; pmu_powkey_on_time = <512>; wakeup_rising; wakeup_falling; }; regulator0: regulators@0 { reg_dcdc1: dcdc1 { regulator-name = "axp2202-dcdc1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1540000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_dcdc2: dcdc2 { regulator-name = "axp2202-dcdc2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3400000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_dcdc3: dcdc3 { regulator-name = "axp2202-dcdc3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1840000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-always-on; }; reg_dcdc4: dcdc4 { regulator-name = "axp2202-dcdc4"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3700000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; }; reg_rtcldo: rtcldo { /* RTC_LDO is a fixed, always-on regulator */ regulator-name = "axp2202-rtcldo"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_aldo1: aldo1 { regulator-name = "axp2202-aldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_aldo2: aldo2 { regulator-name = "axp2202-aldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_aldo3: aldo3 { regulator-name = "axp2202-aldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_aldo4: aldo4 { regulator-name = "axp2202-aldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_bldo1: bldo1 { regulator-name = "axp2202-bldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_bldo2: bldo2 { regulator-name = "axp2202-bldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_bldo3: bldo3 { regulator-name = "axp2202-bldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_bldo4: bldo4 { regulator-name = "axp2202-bldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo1: cldo1 { regulator-name = "axp2202-cldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo2: cldo2 { regulator-name = "axp2202-cldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo3: cldo3 { regulator-name = "axp2202-cldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-ramp-delay = <2500>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_cldo4: cldo4 { regulator-name = "axp2202-cldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cpusldo: cpusldo { /* cpus */ regulator-name = "axp2202-cpusldo"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1400000>; regulator-boot-on; regulator-always-on; }; reg_vmid: vmid { regulator-name = "axp2202-vmid"; regulator-enable-ramp-delay = <1000>; }; reg_drivevbus: drivevbus { regulator-name = "axp2202-drivevbus"; regulator-enable-ramp-delay = <1000>; drivevbusin-supply = <®_vmid>; }; }; virtual-dcdc1 { compatible = "xpower-vregulator,dcdc1"; dcdc1-supply = <®_dcdc1>; }; virtual-dcdc2 { compatible = "xpower-vregulator,dcdc2"; dcdc2-supply = <®_dcdc2>; }; virtual-dcdc3 { compatible = "xpower-vregulator,dcdc3"; dcdc3-supply = <®_dcdc3>; }; virtual-dcdc4 { compatible = "xpower-vregulator,dcdc4"; dcdc4-supply = <®_dcdc4>; }; virtual-rtcldo { compatible = "xpower-vregulator,rtcldo"; rtcldo-supply = <®_rtcldo>; }; virtual-aldo1 { compatible = "xpower-vregulator,aldo1"; aldo1-supply = <®_aldo1>; }; virtual-aldo2 { compatible = "xpower-vregulator,aldo2"; aldo2-supply = <®_aldo2>; }; virtual-aldo3 { compatible = "xpower-vregulator,aldo3"; aldo3-supply = <®_aldo3>; }; virtual-aldo4 { compatible = "xpower-vregulator,aldo4"; aldo4-supply = <®_aldo4>; }; virtual-bldo1 { compatible = "xpower-vregulator,bldo1"; bldo1-supply = <®_bldo1>; }; virtual-bldo2 { compatible = "xpower-vregulator,bldo2"; bldo2-supply = <®_bldo2>; }; virtual-bldo3 { compatible = "xpower-vregulator,bldo3"; bldo3-supply = <®_bldo3>; }; virtual-bldo4 { compatible = "xpower-vregulator,bldo4"; bldo4-supply = <®_bldo4>; }; virtual-cldo1 { compatible = "xpower-vregulator,cldo1"; cldo1-supply = <®_cldo1>; }; virtual-cldo2 { compatible = "xpower-vregulator,cldo2"; cldo2-supply = <®_cldo2>; }; virtual-cldo3 { compatible = "xpower-vregulator,cldo3"; cldo3-supply = <®_cldo3>; }; virtual-cldo4 { compatible = "xpower-vregulator,cldo4"; cldo4-supply = <®_cldo4>; }; virtual-cpusldo { compatible = "xpower-vregulator,cpusldo"; cpusldo-supply = <®_cpusldo>; }; virtual-drivevbus { compatible = "xpower-vregulator,drivevbus"; drivevbus-supply = <®_drivevbus>; }; axp_gpio0: axp_gpio@0 { gpio-controller; #size-cells = <0>; #gpio-cells = <6>; status = "okay"; }; }; }; /{ axp2202_parameter:axp2202-parameter { select = "battery-model"; battery-model { parameter = /bits/ 8 <0x01 0xf5 0x40 0x00 0x1b 0x1e 0x28 0x0f 0x0c 0x1e 0x32 0x02 0x14 0x05 0x0a 0x04 0x74 0xfb 0xc8 0x0d 0x43 0x10 0x36 0xfb 0x46 0x01 0xea 0x0d 0x2a 0x06 0x36 0x05 0xf4 0x0a 0xb5 0x0f 0x42 0x0e 0xe6 0x09 0x9a 0x0e 0x42 0x0e 0x3b 0x04 0x2d 0x04 0x23 0x09 0x18 0x0e 0x09 0x0e 0x04 0x08 0xf7 0x0d 0xda 0x0d 0xd0 0x03 0xbb 0x03 0x9d 0x08 0x7f 0x0d 0x6a 0x0d 0x55 0x07 0xc2 0x57 0x2b 0x27 0x1e 0x0d 0x14 0x08 0xc5 0x98 0x7e 0x66 0x4e 0x44 0x38 0x1a 0x12 0x0a 0xf6 0x00 0x00 0xf6 0x00 0xf6 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xf6 0x00 0x00 0xf6 0x00 0xf6 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xf6 0x00 0x00 0xf6 0x00 0xf6>; }; }; }; &twi7 { clock-frequency = <400000>; pinctrl-0 = <&s_twi1_pins_default>; pinctrl-1 = <&s_twi1_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ //twi_drv_used = <1>; twi-supply = <®_aldo3>; status = "okay"; lt9611: lt9611@39 { compatible = "myir,lt9611"; reg = <0x39>; lt9611-rst-gpios = <&r_pio PL 6 GPIO_ACTIVE_HIGH>; lt9611-power-en-gpios = <&pio PG 12 GPIO_ACTIVE_HIGH>; interrupt-parent = <&r_pio>; interrupts = <PL 7 IRQ_TYPE_EDGE_FALLING>; status = "okay"; }; ac107: ac107@36 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-ac107"; reg = <0x36>; pllclk-src = "MCLK"; sysclk-src = "MCLK"; pcm-bit-first = "MSB"; frame-sync-width = <1>; rx-chmap = <0xaaaa>; ch1-dig-vol = <160>; ch2-dig-vol = <160>; ch1-pga-gain = <26>; ch2-pga-gain = <26>; status = "okay"; }; }; &twi8 { clock-frequency = <400000>; pinctrl-0 = <&s_twi2_pins_default>; pinctrl-1 = <&s_twi2_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_aldo3>; status = "okay"; }; &sdc2 { non-removable; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; no-sdio; no-sd; ctl-spec-caps = <0x308>; cap-mmc-highspeed; sunxi-power-save-mode; sunxi-dis-signal-vol-sw; mmc-bootpart-noacc; /*cap-hsq;*/ cqe-on; ctl-cmdq-md = <0x2>; max-frequency = <150000000>; vmmc-supply = <®_cldo3>; /*emmc io vol 3.3v*/ /*vqmmc-supply = <®_aldo1>;*/ /*emmc io vol 1.8v*/ vqmmc-supply = <®_cldo1>; status = "disabled"; }; &sdc0 { bus-width = <4>; cd-gpios = <&pio PF 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /*non-removable;*/ /*broken-cd;*/ /*cd-inverted*/ /*data3-detect;*/ /*card-pwr-gpios = <&pio PH 14 1 1 2 0xffffffff>;*/ cd-used-24M; cd-set-debounce = <0x1>; cap-sd-highspeed; // sd-uhs-sdr50; // sd-uhs-ddr50; // sd-uhs-sdr104; no-sdio; no-mmc; sunxi-power-save-mode; /*sunxi-dis-signal-vol-sw;*/ max-frequency = <150000000>; ctl-spec-caps = <0x408>; sunxi-dly-208M = <0xff 1 0xff 0xff 0xff 0xff>; vmmc-supply = <®_cldo3>; vqmmc33sw-supply = <®_cldo3>; vdmmc33sw-supply = <®_cldo3>; // vqmmc18sw-supply = <®_bldo3>; // vdmmc18sw-supply = <®_bldo3>; status = "okay"; }; &sdc1 { bus-width = <4>; no-mmc; no-sd; cap-sd-highspeed; /*sd-uhs-sdr12*/ sd-uhs-sdr25; sd-uhs-sdr50; sd-uhs-ddr50; sd-uhs-sdr104; /*sunxi-power-save-mode;*/ sunxi-dis-signal-vol-sw; cap-sdio-irq; keep-power-in-suspend; ignore-pm-notify; max-frequency = <150000000>; ctl-spec-caps = <0x408>; status = "okay"; }; &nand0 { compatible = "allwinner,sun55iw3-nand"; device_type = "nand0"; //reg = <0x0 0x04011000 0x0 0x1000>;/* nand0 */ pinctrl-names = "default", "sleep"; pinctrl-0 = <&nand0_pins_default &nand0_pins_rb>; pinctrl-1 = <&nand0_pins_sleep>; nand0_regulator1 = "vcc-nand"; nand0_regulator2 = "none"; nand0_cache_level = <0x55aaaa55>; nand0_flush_cache_num = <0x55aaaa55>; nand0_capacity_level = <0x55aaaa55>; nand0_id_number_ctl = <0x55aaaa55>; nand0_print_level = <0x55aaaa55>; nand0_p0 = <0x55aaaa55>; nand0_p1 = <0x55aaaa55>; nand0_p2 = <0x55aaaa55>; nand0_p3 = <0x55aaaa55>; chip_code = "sun55iw3"; status = "disabled"; }; &rfkill { compatible = "allwinner,sunxi-rfkill"; chip_en; power_en; pinctrl-0; pinctrl-names; status = "okay"; /* bt session */ bt { compatible = "allwinner,sunxi-bt"; clocks; clock-names; bt_power = "axp2202-aldo3", "axp2202-bldo1"; /* vcc-pl/vcc-pg/vcc-pm */ bt_power_vol= <3300000>, <1800000>; bt_rst_n = <&pio PC 4 GPIO_ACTIVE_HIGH>; }; }; &addr_mgt { compatible = "allwinner,sunxi-addr_mgt"; type_addr_wifi = <0x0>; type_addr_bt = <0x0>; type_addr_eth = <0x0>; status = "okay"; }; &btlpm { compatible = "allwinner,sunxi-btlpm"; uart_index = <0x1>; bt_wake = <&pio PC 12 GPIO_ACTIVE_HIGH>; bt_hostwake = <&pio PC 2 GPIO_ACTIVE_HIGH>; wakeup-source; status = "okay"; }; /* *usb_port_type: usb mode. 0-device, 1-host, 2-otg. *usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-id/dpdm detect. *usb_detect_mode: 0-thread scan, 1-id gpio interrupt. *usb_id_gpio: gpio for id detect. *usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl"; *usb_wakeup_suspend：0-SUPER_STANDBY, 1-USB_STANDBY. */ &usbc0 { device_type = "usbc0"; usb_port_type = <0x2>; usb_detect_type = <0x1>; usb_detect_mode = <0x0>; usb_id_gpio = <&r_pio PL 10 GPIO_ACTIVE_HIGH>; enable-active-high; usb_det_vbus_gpio = <&r_pio PL 10 GPIO_ACTIVE_HIGH>; enable-active-high; detvbus_io-supply = <®_bldo1>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; usb_luns = <3>; usb_serial_unique = <0>; usb_serial_number = "20080411"; rndis_wceis = <1>; status = "okay"; }; &udc { det_vbus_supply = <&usb_power_supply>; status = "okay"; }; &ehci0 { //drvvbus-supply = <®_usb0_vbus>; status = "okay"; }; &ohci0 { //drvvbus-supply = <®_usb0_vbus>; status = "okay"; }; &usbc1 { device_type = "usbc1"; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "okay"; }; &ehci1 { //drvvbus-supply = <®_usb1_vbus>; status = "okay"; }; &ohci1 { //drvvbus-supply = <®_usb1_vbus>; status = "okay"; }; &usbc2 { device_type = "usbc2"; drvvbus-supply = <®_drivevbus>; aw,vbus-shared-quirk; status = "okay"; }; &xhci2 { dr_mode = "host"; status = "okay"; }; &u2phy { status = "okay"; }; &combophy { resets = <&ccu RST_BUS_PCIE_USB3>; phy_use_sel = <1>; /* 0:PCIE; 1:USB3 */ status = "okay"; }; &gpu { gpu_idle = <1>; dvfs_status = <1>; mali-supply = <®_dcdc2>; }; /*---------------------------------------------------------------------------------- disp init configuration disp_mode (0:screen0<screen0,fb0>) screenx_output_type (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo) screenx_output_mode (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50) (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60) screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420) screenx_output_bits (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit) screenx_output_eotf (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG) screenx_output_cs (for hdmi, 0:undefined 257:BT709 260:BT601 263:BT2020) screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode) screen0_output_range (for hdmi, 0:default 1:full 2:limited) screen0_output_scan (for hdmi, 0:no data 1:overscan 2:underscan) screen0_output_aspect_ratio (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9) fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444) fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA) fb0_scaler_mode_enable(scaler mode enable, used FE) fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0) lcdx_backlight (lcd init backlight,the range:[0,256],default:197 lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50) lcd0_contrast (LCD contrast, 0~100) lcd0_saturation (LCD saturation, 0~100) lcd0_hue (LCD hue, 0~100) framebuffer software rotation setting: disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y, set fbX_height to lcd_x) degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree) degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree) devX_output_type : config output type in bootGUI framework in UBOOT-2018. (0:none; 1:lcd; 2:tv; 4:hdmi;) devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018 devX_screen_id : config display index of bootGUI framework in UBOOT-2018 devX_do_hpd : whether do hpd detectation or not in UBOOT-2018 chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6 channel, 1:dual display with 4 channel in main display and 2 channel in second display, 2:dual display with 3 channel in main display and 3 channel in second in display. ----------------------------------------------------------------------------------*/ &disp { disp_init_enable = <1>; disp_mode = <0>; screen0_output_type = <1>; screen0_output_mode = <4>; screen0_to_lcd_index = <0>; screen1_output_type = <3>; screen1_output_mode = <10>; screen1_to_lcd_index = <3>; screen1_output_format = <0>; screen1_output_bits = <0>; screen1_output_eotf = <4>; screen1_output_cs = <257>; screen1_output_dvi_hdmi = <2>; screen1_output_range = <2>; screen1_output_scan = <0>; screen1_output_aspect_ratio = <8>; dev0_output_type = <1>; dev0_output_mode = <4>; dev0_screen_id = <0>; dev0_do_hpd = <0>; screen1_output_type = <6>; screen1_output_mode = <10>; dev1_screen_id = <2>; dev1_do_hpd = <1>; def_output_dev = <2>; hdmi_mode_check = <1>; display_device_num = <3>; primary_display_type = "LCD"; primary_de_id = <0>; primary_framebuffer_width = <1280>; primary_framebuffer_height = <800>; primary_dpix = <160>; primary_dpiy = <160>; extend0_display_type = "HDMI"; extend0_de_id = <1>; extend0_framebuffer_width = <1920>; extend0_framebuffer_height = <1080>; extend0_dpix = <160>; extend0_dpiy = <160>; extend1_display_type = "DP"; extend1_de_id = <1>; extend1_framebuffer_width = <1920>; extend1_framebuffer_height = <1080>; extend1_dpix = <160>; extend1_dpiy = <160>; fb_format = <0>; fb_num = <4>; /*<disp channel layer zorder>*/ fb0_map = <0 1 0 16>; fb0_width = <1920>; fb0_height = <1080>; /*<disp channel layer zorder>*/ fb1_map = <1 1 0 16>; fb1_width = <1920>; fb1_height = <1080>; /*<disp channel layer zorder>*/ fb2_map = <1 0 0 16>; fb2_width = <1920>; fb2_height = <1080>; /*<disp channel layer zorder>*/ fb3_map = <1 1 0 16>; fb3_width = <300>; fb3_height = <300>; chn_cfg_mode = <3>; disp_para_zone = <2>; //boot_disp = <0>; //boot_disp1 = <0>; //boot_disp2 = <0>; /* dual display clock constraints: 1. two tcons cannot share a parent clock. 2. when dsi uses ccu clock, combphy and corresponding tcon use the same parent clock. */ assigned-clocks = <&ccu CLK_DE>, <&ccu CLK_VO0_TCONLCD0>, <&ccu CLK_VO0_TCONLCD1>, <&ccu CLK_VO1_TCONLCD0>, <&ccu CLK_TCONTV>, <&ccu CLK_TCONTV1>, <&ccu CLK_COMBPHY0>, <&ccu CLK_COMBPHY1>, <&ccu CLK_DSI0>, <&ccu CLK_DSI1>, <&ccu CLK_EDP>; assigned-clock-parents = <&ccu CLK_PLL_VIDEO3_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_PERI0_150M>, <&ccu CLK_PLL_PERI0_150M>, <&ccu CLK_PLL_VIDEO1_4X>; assigned-clock-rates = <600000000>; cldo3-supply = <®_cldo3>; dcdc4-supply = <®_dcdc4>; cldo1-supply = <®_cldo1>; //pwms = <&a_pwm 4 5000000 0>, <&a_pwm 5 5000000 0>; pwms = <&a_pwm 10 50000 0>, <&a_pwm 5 5000000 0>; pwm-names = "lvds0_backlight", "lvds2_backlight"; power-domains = <&pd1 A523_PCK_DE>, <&pd1 A523_PCK_VO0>, <&pd1 A523_PCK_VO1>; power-domain-names = "pd_de", "pd_vo0", "pd_vo1"; pinctrl-names = "active", "sleep"; //pinctrl-0 = <&a_pwm0_pin_active>; //pinctrl-1 = <&a_pwm0_pin_sleep>; pinctrl-0 = <&a_pwm10_pin_active>; pinctrl-1 = <&a_pwm10_pin_sleep>; }; /*** ;lcd0 configuration ;lcd_if: 0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi ;lcd_hv_if 0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656 ;lcd_hv_clk_phase 0:0 degree;1:90 degree;2:180 degree;3:270 degree ;lcd_hv_sync_polarity 0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high ;lcd_hv_syuv_seq 0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY ;lcd_cpu_if 0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565) ; 6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565) ;lcd_cpu_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge; ;lcd_dsi_if 0:video mode; 1: Command mode; 2:video burst mode ;lcd_dsi_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge; ;lcd_x: lcd horizontal resolution ;lcd_y: lcd vertical resolution ;lcd_width: width of lcd in mm ;lcd_height: height of lcd in mm ;lcd_dclk_freq: in MHZ unit ;lcd_pwm_freq: in HZ unit ;lcd_pwm_pol: lcd backlight PWM polarity ;lcd_pwm_max_limit lcd backlight PWM max limit(<=255) ;lcd_hbp: hsync back porch(pixel) + hsync plus width(pixel); ;lcd_ht: hsync total cycle(pixel) ;lcd_vbp: vsync back porch(line) + vysnc plus width(line) ;lcd_vt: vysnc total cycle(line) ;lcd_hspw: hsync plus width(pixel) ;lcd_vspw: vysnc plus width(pixel) ;lcd_lvds_if: 0:single link; 1:dual link ;lcd_lvds_colordepth: 0:8bit; 1:6bit ;lcd_lvds_mode: 0:NS mode; 1:JEIDA mode ;lcd_frm: 0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither ;lcd_io_phase: 0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase; ; 8~11bit:dclk phase; 12~15bit:de phase) ;lcd_gamma_en lcd gamma correction enable ;lcd_bright_curve_en lcd bright curve correction enable ;lcd_cmap_en lcd color map function enable ;deu_mode 0:smoll lcd screen; 1:large lcd screen(larger than 10inch) ;lcdgamma4iep: Smart Backlight parameter, lcd gamma vale * 10; ; decrease it while lcd is not bright enough; increase while lcd is too bright ;smart_color 90:normal lcd screen 65:retina lcd screen(9.7inch) ;Pin setting for special function ie.LVDS, RGB data or vsync ; name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level> ;Pin setting for gpio: ; lcd_gpio_X = port:PD12<pin function><pull up or pull down><drive ability><output level> ;Pin setting for backlight enable pin ; lcd_bl_en = port:PD12<pin function><pull up or pull down><drive ability><output level> ;fsync setting, pulse to csi ;lcd_fsync_en (0:disable fsync,1:enable) ;lcd_fsync_act_time (active time of fsync, unit:pixel) ;lcd_fsync_dis_time (disactive time of fsync, unit:pixel) ;lcd_fsync_pol (0:positive;1:negative) ;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function, pull up or pull down(default 0), driver level(default 1), data> ;For dual link lvds: use lvds2link_pins_a and lvds2link_pins_b instead ;For rgb24: use rgb24_pins_a and rgb24_pins_b instead ;For lvds1: use lvds1_pins_a and lvds1_pins_b instead ;For lvds0: use lvds0_pins_a and lvds0_pins_b instead ***/ &lcd0 { lcd_used = <1>; lcd_driver_name = "default_lcd"; lcd_backlight = <200>; lcd_if = <3>; lcd_x = <1280>; lcd_y = <800>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <63>; lcd_pwm_used = <1>; lcd_pwm_ch = <10>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_pwm_name = "lvds0_backlight"; lcd_hbp = <88>; lcd_ht = <1451>; lcd_hspw = <18>; lcd_vbp = <23>; lcd_vt = <860>; lcd_vspw = <10>; lcd_lvds_if = <1>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <1>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_fsync_en = <0>; lcd_fsync_act_time = <1000>; lcd_fsync_dis_time = <1000>; lcd_fsync_pol = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_pin_power = "cldo3"; lcd_power = "dcdc4"; lcd_power1 = "cldo1"; //lcd_gpio_0 = <&pio PI 2 GPIO_ACTIVE_HIGH>; //reset //lcd_bl_en = <&pio PI 2 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&lvds0_pins_a>,<&dsi1_4lane_pins_a>; pinctrl-1 = <&lvds0_pins_b>,<&dsi1_4lane_pins_b>; lvds0_pinctrl-0 = <&lvds0_pins_a>; lvds0_pinctrl-1 = <&lvds0_pins_b>; lvds1_pinctrl-0 = <&lvds1_pins_a>; lvds1_pinctrl-1 = <&lvds1_pins_b>; dsi0_pinctrl-0 = <&dsi0_4lane_pins_a>; dsi0_pinctrl-1 = <&dsi0_4lane_pins_b>; dual_dsi_pinctrl-0 = <&dsi0_4lane_pins_a>, <&dsi1_4lane_pins_a>; dual_dsi_pinctrl-1 = <&dsi0_4lane_pins_b>, <&dsi1_4lane_pins_b>; dual_lvds0_pinctrl-0 = <&lvds0_pins_a>, <&lvds1_pins_a>; dual_lvds0_pinctrl-1 = <&lvds0_pins_b>, <&lvds1_pins_b>; }; #if 1 &lcd1 { lcd_used = <1>; status = "okay"; lcd_driver_name = "SQ101D_Q5DI404_84H501"; lcd_backlight = <200>; lcd_if = <4>; lcd_x = <1920>; lcd_y = <1080>; lcd_width = <136>; lcd_height = <217>; lcd_dclk_freq = <148>; lcd_pwm_used = <1>; lcd_pwm_ch = <0>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_hbp = <88>; lcd_ht = <2200>; lcd_hspw = <44>; lcd_vbp = <4>; lcd_vt = <1125>; lcd_vspw = <5>; lcd_frm = <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_dsi_if = <0>; lcd_dsi_lane = <4>; lcd_dsi_format = <0>; lcd_dsi_te = <0>; lcd_dsi_eotp = <0>; lcd_pin_power = "dcdc4"; lcd_power1 = "cldo4"; lcd_power2 = "cldo1"; lcd_gpio_2 = <&pio PD 22 GPIO_ACTIVE_HIGH>; //reset pinctrl-0 = <&dsi0_4lane_pins_a>; pinctrl-1 = <&dsi0_4lane_pins_b>; // lcd_bl_en = <&pio PH 16 GPIO_ACTIVE_HIGH>; lcd_bl_0_percent = <5>; }; #else &lcd1 { lcd_used = <1>; lcd_driver_name = "default_lcd"; lcd_backlight = <50>; lcd_if = <0>; lcd_x = <800>; lcd_y = <480>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <48>; lcd_pwm_used = <1>; lcd_pwm_ch = <7>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_hbp = <55>; lcd_ht = <1240>; lcd_hspw = <20>; lcd_vbp = <35>; lcd_vt = <650>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <1>; lcd_lvds_mode = <0>; lcd_frm = <1>; lcd_io_phase = <0x0000>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; }; #endif &lcd2 { lcd_used = <1>; lcd_driver_name = "bp101wx1"; lcd_backlight = <50>; lcd_if = <3>; lcd_x = <1280>; lcd_y = <800>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <75>; lcd_pwm_used = <1>; lcd_pwm_ch = <5>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_pwm_name = "lvds2_backlight"; lcd_hbp = <88>; lcd_ht = <1451>; lcd_hspw = <18>; lcd_vbp = <23>; lcd_vt = <860>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <0>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_fsync_en = <0>; lcd_fsync_pol = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_pin_power = "cldo3"; lcd_power = "dcdc4"; /* lvds_power & other interface power */ lcd_bl_en = <&pio PI 5 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&lvds2_pins_a>; pinctrl-1 = <&lvds2_pins_b>; lvds2_pinctrl-0 = <&lvds2_pins_a>; lvds2_pinctrl-1 = <&lvds2_pins_b>; lvds3_pinctrl-0 = <&lvds3_pins_a>; lvds3_pinctrl-1 = <&lvds3_pins_b>; dual_lvds1_pinctrl-0 = <&lvds2_pins_a>, <&lvds3_pins_a>; dual_lvds1_pinctrl-1 = <&lvds2_pins_b>, <&lvds3_pins_b>; status = "disabled"; }; &edp0 { compatible = "allwinner,sunxi-dp0"; // use if hardware reset pin is need /* edp_hw_reset_pin = <&pio PH XX GPIO_ACTIVE_LOW>; */ edp_ssc_en = <0>; edp_ssc_mode = <0>; edp_psr_support = <0>; edp_colordepth = <8>; /* 6/8/10/12/16 */ edp_color_fmt = <0>; /* 0:RGB 1: YUV444 2: YUV422 */ edp_lane_rate = <1>; edp_lane_cnt = <4>; lane0_sw = <0>; lane0_pre = <0>; lane1_sw = <0>; lane1_pre = <0>; lane2_sw = <0>; lane2_pre = <0>; lane3_sw = <0>; lane3_pre = <0>; efficient_training = <0>; sink_capacity_prefer = <0>; edid_timings_prefer = <1>; timings_fixed = <0>; edp_traning_param_type = <1>; edp_timings_type = <0>; edp_panel_used = <0>; /* edp_panel_used = <1>; edp_panel_driver = "general_panel"; edp_bl_en = <&pio PI 5 GPIO_ACTIVE_HIGH>; edp_pwm_used = <1>; edp_pwm_ch = <5>; edp_pwm_freq = <50000>; edp_pwm_pol = <0>; edp_default_backlight = <200>; edp_panel_power_0 = "edp-panel"; */ /* edp_x = <1280>; edp_y = <800>; edp_width = <150>; edp_height = <94>; edp_dclk_freq = <75>; edp_hbp = <88>; edp_ht = <1451>; edp_hspw = <18>; edp_vbp = <23>; edp_vt = <860>; edp_vspw = <10>; edp_fps = <30>; */ vcc-edp-supply = <®_bldo3>; vdd-edp-supply = <®_dcdc2>; edp-panel-supply = <®_dcdc4>; status = "okay"; }; &ve { ve-supply = <®_dcdc2>; }; /* audio dirver module -> audio codec */ &codec { tx-hub-en; rx-sync-en; dac-vol = <63>; /* default value:63 range:0->63 */ dacl-vol = <160>; /* default value:160 range:0->255 */ dacr-vol = <160>; /* default value:160 range:0->255 */ adc1-vol = <160>; /* default value:160 range:0->255 */ adc2-vol = <160>; /* default value:160 range:0->255 */ adc3-vol = <160>; /* default value:160 range:0->255 */ lineout-gain = <31>; /* default value:31 range:0->31 */ hpout-gain = <7>; /* default value:7 range:0->7 */ adc1-gain = <31>; /* default value:31 range:0->31 */ adc2-gain = <31>; /* default value:31 range:0->31 */ adc3-gain = <31>; /* default value:31 range:0->31 */ /* to do: avcc-1.8 vdd33-3.3 cpvin-1.8 */ avcc-external; avcc-supply = <®_aldo4>; avcc-vol = <1800000>; vdd-external; vdd-supply = <®_cldo3>; vdd-vol = <3300000>; cpvin-external; cpvin-supply = <®_bldo3>; cpvin-vol = <1800000>; //pa-pin-max = <1>; //pa-pin-0 = <&r_pio PL 7 GPIO_ACTIVE_HIGH>; //pa-pin-level-0 = <1>; //pa-pin-msleep-0 = <0>; jack-det-level = <0>; jack-det-threshold = <8>; jack-det-debouce-time = <250>; /* extcon = <&usb_power_supply>; * jack-swpin-mic-sel = <&pio PH 8 GPIO_ACTIVE_HIGH>; * jack-swpin-hp-en = <&pio PH 15 GPIO_ACTIVE_HIGH>; * jack-swpin-hp-sel = <&pio PH 11 GPIO_ACTIVE_HIGH>; * jack-swmode-hp-off = <0x00>; * jack-swmode-hp-usb = <0x11>; * jack-swmode-hp-audio = <0x10>; * jack-det-level = <1>; * jack-det-threshold = <8>; * jack-det-debouce-time = <250>; */ status = "okay"; }; &codec_plat { status = "okay"; }; &codec_mach { soundcard-mach,jack-support = <1>; status = "okay"; soundcard-mach,cpu { sound-dai = <&codec_plat>; }; soundcard-mach,codec { sound-dai = <&codec>; }; }; &hdmi_codec { extcon = <&hdmi>; status = "okay"; }; &edp_codec { status = "disabled"; }; /* audio dirver module -> owa */ &owa_plat { rglt-max = <1>; rglt0-mode = "PMU"; rglt0-voltage = <3300000>; rglt0-supply = <®_dcdc4>; pinctrl-used; pinctrl-names = "default","sleep"; pinctrl-0 = <&owa_pins_a>; pinctrl-1 = <&owa_pins_b>; tx-hub-en; status = "okay"; }; &owa_mach { status = "okay"; soundcard-mach,cpu { sound-dai = <&owa_plat>; }; soundcard-mach,codec { }; }; /* audio dirver module -> DMIC */ &dmic_plat { rx-chmap = <0x76543210>; data-vol = <0xB0>; rxdelaytime = <0>; /* pinctrl-used; */ /* pinctrl-names = "default","sleep"; */ /* pinctrl-0 = <&dmic_pins_a>; */ /* pinctrl-1 = <&dmic_pins_b>; */ rx-sync-en; status = "disabled"; }; &dmic_mach { status = "disabled"; soundcard-mach,cpu { sound-dai = <&dmic_plat>; }; soundcard-mach,codec { }; }; /* audio dirver module -> I2S/PCM */ &i2s0_plat { tdm-num = <0>; tx-pin = <0>; rx-pin = <0>; pinctrl-used; pinctrl-names = "default","sleep"; pinctrl-0 = <&i2s0_pins_a>; pinctrl-1 = <&i2s0_pins_b>; tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s0_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s0_cpu>; soundcard-mach,bitclock-master = <&i2s0_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; soundcard-mach,capture-only; status = "disabled"; i2s0_cpu: soundcard-mach,cpu { sound-dai = <&i2s0_plat>; /* note: pll freq = 24.576M or 22.5792M * pll-fs */ soundcard-mach,pll-fs = <1>; /* note: * mclk freq = mclk-fs * 12.288M or 11.2896M (when mclk-fp ture) * mclk freq = mclk-fs * pcm rate (when mclk-fp false) */ soundcard-mach,mclk-fp; soundcard-mach,mclk-fs = <1>; }; i2s0_codec: soundcard-mach,codec { sound-dai = <&ac107>; soundcard-mach,pll-fs = <1>; }; }; &i2s1_plat { tdm-num = <1>; tx-pin = <0>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s1_pins_a>; */ /* pinctrl-1 = <&i2s1_pins_b>; */ tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s1_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s1_cpu>; soundcard-mach,bitclock-master = <&i2s1_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; i2s1_cpu: soundcard-mach,cpu { sound-dai = <&i2s1_plat>; soundcard-mach,pll-fs = <1>; soundcard-mach,mclk-fs = <0>; }; i2s1_codec: soundcard-mach,codec { }; }; &i2s2_plat { tdm-num = <2>; tx-pin = <0 1 2 3>; /* e.g. * tx-pin0-map0 = <0xFEDC3210> -> tx_pin_map[0][0] (Dout0-slot[7:0] map channel[15:12, 3:0]) * tx-pin0-map1 = <0x3210FEDC> -> tx_pin_map[0][1] (Dout0-slot[15:8] map channel[3:0, 15:12]) * tx-pin1-map0 = <0x76543210> -> tx_pin_map[1][0] (Dout1-slot[7:0] map channel[7:0]) */ tx-pin0-map0 = <0x76543210>; tx-pin0-map1 = <0xFEDCBA98>; tx-pin1-map0 = <0x76543210>; tx-pin1-map1 = <0xFEDCBA98>; tx-pin2-map0 = <0x76543210>; tx-pin2-map1 = <0xFEDCBA98>; tx-pin3-map0 = <0x76543210>; tx-pin3-map1 = <0xFEDCBA98>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s2_pins_a>; */ /* pinctrl-1 = <&i2s2_pins_b>; */ tx-hub-en; rx-sync-en; /* edp not need dai-type */ dai-type = "hdmi"; status = "okay"; }; &i2s2_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s2_cpu>; soundcard-mach,bitclock-master = <&i2s2_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; soundcard-mach,playback-only; status = "okay"; i2s2_cpu: soundcard-mach,cpu { sound-dai = <&i2s2_plat>; soundcard-mach,pll-fs = <1>; /* edp mclk: 512fs */ soundcard-mach,mclk-fs = <0>; }; i2s2_codec: soundcard-mach,codec { sound-dai = <&hdmi_codec>; }; }; &i2s3_plat { tdm-num = <3>; tx-pin = <0>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s3_pins_a>; */ /* pinctrl-1 = <&i2s3_pins_b>; */ tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s3_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s3_cpu>; soundcard-mach,bitclock-master = <&i2s3_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; i2s3_cpu: soundcard-mach,cpu { sound-dai = <&i2s3_plat>; soundcard-mach,pll-fs = <1>; soundcard-mach,mclk-fs = <0>; }; i2s3_codec: soundcard-mach,codec { }; }; &hdmi { hdmi_used = <1>; bldo3-supply = <®_bldo3>; hdmi_power0 = "bldo3"; hdmi_power_cnt = <1>; hdmi_hdcp_enable = <1>; hdmi_hdcp22_enable = <0>; hdmi_cts_compatibility = <0>; hdmi_cec_support = <1>; hdmi_cec_super_standby = <1>; hdmi_skip_bootedid = <1>; ddc_en_io_ctrl = <0>; power_io_ctrl = <0>; }; &cpu0 { cpu-supply = <®_dcdc1>; }; &dsufreq { dsu-supply = <®_dcdc1>; }; &mdio0 { status = "okay"; gmac0_phy0: ethernet-phy@5 { reg = <0x5>; max-speed = <1000>; /* PHY datasheet rst time */ reset-assert-us = <10000>; reset-deassert-us = <150000>; }; }; &gmac0 { phy-mode = "rgmii"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&gmac0_pins_default>; pinctrl-1 = <&gmac0_pins_sleep>; sunxi,phy-clk-type = <0>; tx-delay = <0>; rx-delay = <0>; phy-handle = <&gmac0_phy0>; gmac3v3-supply = <®_dcdc4>; status = "okay"; }; &gmac1 { phy-mode = "rgmii"; phy-handle = <&gmac1_phy0>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&gmac1_pins_default>; pinctrl-1 = <&gmac1_pins_sleep>; aw,soc-phy25m; tx-delay = <0>; rx-delay = <0>; snps,reset-gpios = <&pio PJ 17 GPIO_ACTIVE_LOW>; snps,phy-addr = <0x6>; dwmac3v3-supply = <®_dcdc4>; status = "okay"; mdio1: mdio1@1 { snps,reset-gpios = <&pio PJ 17 GPIO_ACTIVE_LOW>; gmac1_phy0: ethernet-phy@6 { snps,reset-gpios = <&pio PJ 17 GPIO_ACTIVE_LOW>; reg = <0x6>; max-speed = <1000>; /* PHY datasheet rst time */ reset-assert-us = <10000>; reset-deassert-us = <150000>; }; }; }; &npu { npu-supply = <®_ext_axp1530_dcdc3>; npu_vol = <1050000>; clock-frequency = <696000000>; status = "okay"; }; &dram { dram_para00 = <0x00000000>; dram_para01 = <0x00000000>; dram_para02 = <0x00000000>; dram_para03 = <0x00000000>; dram_para04 = <0x00000000>; dram_para05 = <0x00000000>; dram_para06 = <0x00000000>; dram_para07 = <0x00000000>; dram_para08 = <0x00000000>; dram_para09 = <0x00000000>; dram_para10 = <0x00000000>; dram_para11 = <0x00000000>; dram_para12 = <0x00000000>; dram_para13 = <0x00000000>; dram_para14 = <0x00000000>; dram_para15 = <0x00000000>; dram_para16 = <0x00000000>; dram_para17 = <0x00000000>; dram_para18 = <0x00000000>; dram_para19 = <0x00000000>; dram_para20 = <0x00000000>; dram_para21 = <0x00000000>; dram_para22 = <0x00000000>; dram_para23 = <0x00000000>; dram_para24 = <0x00000000>; dram_para25 = <0x00000000>; dram_para26 = <0x00000000>; dram_para27 = <0x00000000>; dram_para28 = <0x00000000>; dram_para29 = <0x00000000>; dram_para30 = <0x00000000>; dram_para31 = <0x00000000>; dram_para32 = <0x00000000>; dram_para33 = <0x00000000>; dram_para34 = <0x00000000>; dram_para35 = <0x00000000>; dram_para36 = <0x00000000>; dram_para37 = <0x00000000>; dram_para38 = <0x00000000>; dram_para39 = <0x00000000>; dram_para40 = <0x00000000>; dram_para41 = <0x00000000>; dram_para42 = <0x00000000>; dram_para43 = <0x00000000>; dram_para44 = <0x00000000>; dram_para45 = <0x00000000>; dram_para46 = <0x00000000>; dram_para47 = <0x00000000>; dram_para48 = <0x00000000>; dram_para49 = <0x00000000>; dram_para50 = <0x00000000>; dram_para51 = <0x00000000>; dram_para52 = <0x00000000>; dram_para53 = <0x00000000>; dram_para54 = <0x00000000>; dram_para55 = <0x00000000>; dram_para56 = <0x00000000>; dram_para57 = <0x00000000>; dram_para58 = <0x00000000>; dram_para59 = <0x00000000>; dram_para60 = <0x00000000>; dram_para61 = <0x00000000>; dram_para62 = <0x00000000>; dram_para63 = <0x00000000>; dram_para64 = <0x00000000>; dram_para65 = <0x00000000>; dram_para66 = <0x00000000>; dram_para67 = <0x00000000>; dram_para68 = <0x00000000>; dram_para69 = <0x00000000>; dram_para70 = <0x00000000>; dram_para71 = <0x00000000>; dram_para72 = <0x00000000>; dram_para73 = <0x00000000>; dram_para74 = <0x00000000>; dram_para75 = <0x00000000>; dram_para76 = <0x00000000>; dram_para77 = <0x00000000>; dram_para78 = <0x00000000>; dram_para79 = <0x00000000>; dram_para80 = <0x00000000>; dram_para81 = <0x00000000>; dram_para82 = <0x00000000>; dram_para83 = <0x00000000>; dram_para84 = <0x00000000>; dram_para85 = <0x00000000>; dram_para86 = <0x00000000>; dram_para87 = <0x00000000>; dram_para88 = <0x00000000>; dram_para89 = <0x00000000>; dram_para90 = <0x00000000>; dram_para91 = <0x00000000>; dram_para92 = <0x00000000>; dram_para93 = <0x00000000>; dram_para94 = <0x00000000>; dram_para95 = <0x00000000>; };myb-yt527-e.dts:
/* * Allwinner Technology CO., Ltd. */ /dts-v1/; #include "sun55iw3p1.dtsi" #include <uapi/linux/input-event-codes.h> /{ board = "T527", "T527-DEMO-AXP717B"; compatible = "allwinner,t527", "arm,sun55iw3p1"; aliases { pmu0 = &pmu0; serial0 = &uart0; hdmi = &hdmi; reg-tcs0 = ®_tcs0; reg-sy0 = ®_sy0; reg-axp1530 = ®_ext_axp1530_dcdc1; tcs0 = &tcs0; sy0 = &sy0; axp1530 = &axp1530; cpu-ext = &cpu4; standby-param = &standby_param; arisc-config = &arisc_config; cir_param = &cir_param; }; /* reg_usb0_vbus: usb0-vbus { compatible = "regulator-fixed"; regulator-name = "usb0-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-enable-ramp-delay = <1000>; gpio = <&pio PB 12 GPIO_ACTIVE_HIGH>; enable-active-high; }; */ reg_usb1_vbus: usb1-vbus { compatible = "regulator-fixed"; regulator-name = "usb1-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-enable-ramp-delay = <1000>; gpio = <&pio PB 3 GPIO_ACTIVE_HIGH>; enable-active-high; }; standby_param: standby_param { vdd-cpu = <0x00000001>; vdd-cpub = <0x00000001>; vdd-sys = <0x00000002>; vcc-pll = <0x00000080>; vcc-io = <0x00004000>; osc24m-on = <0x0>; dsp-standby-en = <0x1>; }; cir_param: cir_param { gpio_group = <1>; /* 0:PL 1:PM */ gpio_pin = <11>; gpio_function = <2>; count = <15>; ir_power_key_code0 = <0x40>; ir_addr_code0 = <0xfe01>; ir_power_key_code1 = <0x1a>; ir_addr_code1 = <0xfb04>; ir_power_key_code2 = <0xf2>; ir_addr_code2 = <0x2992>; ir_power_key_code3 = <0x57>; ir_addr_code3 = <0x9f00>; ir_power_key_code4 = <0xdc>; ir_addr_code4 = <0x4cb3>; ir_power_key_code5 = <0x18>; ir_addr_code5 = <0xff00>; ir_power_key_code6 = <0xdc>; ir_addr_code6 = <0xdd22>; ir_power_key_code7 = <0x0d>; ir_addr_code7 = <0xbc00>; ir_power_key_code8 = <0x4d>; ir_addr_code8 = <0x4040>; ir_power_key_code9 = <0x08>; ir_addr_code9 = <0xfb04>; ir_power_key_code10 = <0x00>; ir_addr_code10 = <0xfc03>; ir_power_key_code11 = <0x00>; ir_addr_code11 = <0xbf00>; ir_power_key_code12 = <0xea>; ir_addr_code12 = <0xfb04>; ir_power_key_code13 = <0x42>; ir_addr_code13 = <0xbf00>; ir_power_key_code14 = <0x0f>; ir_addr_code14 = <0xff00>; }; arisc_config: arisc_config { s_uart_config { pins = "PL2", "PL3"; function = <2>, <2>; status = "disabled"; }; }; reserved-memory { dsp0ddr_reserved: dsp0ddr@4a000000 { reg = <0x0 0x4a000000 0x0 0x00a00000>; no-map; }; riscvsram0_reserved: riscvsram0@7280000 { reg = <0x0 0x07280000 0x0 0x40000>; no-map; }; riscvsram1_reserved: riscvsram1@72c0000 { reg = <0x0 0x072c0000 0x0 0x40000>; no-map; }; /* * The name should be "vdev%dbuffer". * Its size should be not less than * RPMSG_BUF_SIZE * (num of buffers in a vring) * 2 * = 512 * (num of buffers in a vring) * 2 */ dsp_vdev0buffer: vdev0buffer@4ac00000 { compatible = "shared-dma-pool"; reg = <0x0 0x4ac00000 0x0 0x40000>; no-map; }; /* * The name should be "vdev%dvring%d". * The size of each should be not less than * PAGE_ALIGN(vring_size(num, align)) * = PAGE_ALIGN(16 * num + 6 + 2 * num + (pads for align) + 6 + 8 * num) * * (Please refer to the vring layout in include/uapi/linux/virtio_ring.h) */ dsp_vdev0vring0: vdev0vring0@4ac40000 { reg = <0x0 0x4ac40000 0x0 0x2000>; no-map; }; dsp_vdev0vring1: vdev0vring1@4ac42000 { reg = <0x0 0x4ac42000 0x0 0x2000>; no-map; }; /* * The name should be "vdev%dbuffer". * Its size should be not less than * RPMSG_BUF_SIZE * (num of buffers in a vring) * 2 * = 512 * (num of buffers in a vring) * 2 */ rv_vdev0buffer: vdev0buffer@4ae00000 { compatible = "shared-dma-pool"; reg = <0x0 0x4ae00000 0x0 0x40000>; no-map; }; /* * The name should be "vdev%dvring%d". * The size of each should be not less than * PAGE_ALIGN(vring_size(num, align)) * = PAGE_ALIGN(16 * num + 6 + 2 * num + (pads for align) + 6 + 8 * num) * * (Please refer to the vring layout in include/uapi/linux/virtio_ring.h) */ rv_vdev0vring0: vdev0vring0@4ae40000 { reg = <0x0 0x4ae40000 0x0 0x2000>; no-map; }; rv_vdev0vring1: vdev0vring1@4ae42000 { reg = <0x0 0x4ae42000 0x0 0x2000>; no-map; }; /* * dsp ram addr */ dsp0iram_reserved: dsp0iram@20000 { reg = <0x0 0x20000 0x0 0x10000>; no-map; }; dsp0dram0_reserved: dsp0dram0@30000 { reg = <0x0 0x30000 0x0 0x8000>; no-map; }; dsp0dram1_reserved: dsp0dram1@38000 { reg = <0x0 0x38000 0x0 0x8000>; no-map; }; dsp0_rpbuf_reserved: dsp0_rpbuf@4ae44000 { compatible = "shared-dma-pool"; no-map; reg = <0x0 0x4ae44000 0x0 0x8000>; }; dsp_share_space@4ab00000 { no-map; reg = <0x0 0x4ab00000 0x0 0x10000>; }; }; rpbuf_controller0: rpbuf_controller@0 { compatible = "allwinner,rpbuf-controller"; remoteproc = <&dsp0_rproc>; ctrl_id = <0>; memory-region = <&dsp0_rpbuf_reserved>; status = "okay"; }; ap6256_wifi: ap6256_wifi { compatible = "android,bcmdhd_wlan"; gpio_wl_reg_on = <&pio PC 3 GPIO_ACTIVE_HIGH>; gpio_wl_host_wake = <&pio PC 7 GPIO_ACTIVE_HIGH>; }; gpio-keys { compatible = "gpio-keys"; status = "okay"; vol-down-key { gpios = <&pio PI 11 GPIO_ACTIVE_LOW>; linux,code = <114>; label = "user key"; debounce-interval = <10>; wakeup-source = <0x1>; gpio-key,wakeup; }; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; status = "okay"; led0: led-green { label = "green"; gpios = <&pio PB 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; linux,defaults-trigger = "heartbeat"; defaults-state = "on"; }; led1: led-red { label = "red"; gpios = <&pio PB 7 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; linux,defaults-trigger = "heartbeat"; defaults-state = "on"; }; }; }; &r_pio { uart8_pins_a: uart8_pins@0 { pins = "PL12", "PL13"; function = "s_uart0"; }; uart8_pins_b: uart8_pins@1 { pins = "PL12", "PL13"; function = "gpio_in"; }; uart9_pins_a: uart9_pins@0 { pins = "PL2", "PL3"; function = "s_uart1"; }; uart9_pins_b: uart9_pins@1 { pins = "PL2", "PL3"; function = "gpio_in"; }; s_twi0_pins_default: s_twi0@0 { pins = "PL0", "PL1"; function = "s_twi0"; drive-strength = <10>; bias-pull-up; }; s_twi0_pins_sleep: s_twi0@1 { pins = "PL0", "PL1"; function = "gpio_in"; }; s_twi1_pins_default: s_twi1@0 { pins = "PL8", "PL9"; function = "s_twi1"; drive-strength = <10>; bias-pull-up; }; s_twi1_pins_sleep: s_twi1@1 { pins = "PL8", "PL9"; function = "gpio_in"; }; s_twi2_pins_default: s_twi2@0 { pins = "PM4", "PM5"; function = "s_twi2"; drive-strength = <20>; bias-pull-up; }; s_twi2_pins_sleep: s_twi2@1 { pins = "PM4", "PM5"; function = "gpio_in"; }; s_irrx_pins_default: s_irrx@0 { pins = "PL11"; function = "s_cir"; }; s_irrx_pins_sleep: s_irrx@1 { pins = "PL11"; function = "gpio_in"; }; }; &pio { vcc-pg-supply = <®_pio1_8>; vcc-pf-supply = <®_pio1_8>; vcc-pfo-supply = <®_pio3_3>; vcc-pd-supply = <®_pio3_3>; vcc-pe-supply = <®_pio3_3>; vcc-pi-supply = <®_pio3_3>; vcc-pj-supply = <®_pio3_3>; vcc-pk-supply = <®_pio3_3>; uart0_pins_a: uart0_pins@0 { pins = "", ""; function = "uart0"; }; uart0_pins_b: uart0_pins@1 { pins = "", ""; function = "gpio_in"; }; uart2_pins_a: uart2_pins@0 { pins = "PB0", "PB1"; function = "uart2"; }; uart2_pins_b: uart2_pins@1 { pins = "PB0", "PB1"; function = "gpio_in"; }; uart3_pins_a: uart3_pins@0 { pins = "PJ20", "PJ21", "PJ22", "PJ23"; function = "uart3"; }; uart3_pins_b: uart3_pins@1 { pins = "PJ20", "PJ21", "PJ22", "PJ23"; function = "gpio_in"; }; uart4_pins_a: uart4_pins@0 { pins = "PE1", "PE2", "PE3", "PE4"; function = "uart4"; }; uart4_pins_b: uart4_pins@1 { pins = "PE1", "PE2", "PE3", "PE4"; function = "gpio_in"; }; uart5_pins_a: uart5_pins@0 { pins = "PE13", "PE14"; function = "uart5"; }; uart5_pins_b: uart5_pins@1 { pins = "PE13", "PE14"; function = "gpio_in"; }; uart6_pins_a: uart6_pins@0 { pins = "PE11", "PE12"; function = "uart6"; }; uart6_pins_b: uart6_pins@1 { pins = "PE11", "PE12"; function = "gpio_in"; }; uart7_pins_a: uart7_pins@0 { pins = "PB11", "PB12", "PB13", "PB14"; function = "uart7"; }; uart7_pins_b: uart7_pins@1 { pins = "PB11", "PB12", "PB13", "PB14"; function = "gpio_in"; }; a_pwm0_pin_active: a_pwm0@0 { pins = "PD23"; function = "pwm0"; }; a_pwm0_pin_sleep: a_pwm0@1 { pins = "PD23"; function = "gpio_in"; bias-pull-down; }; a_pwm1_pin_active: a_pwm1@0 { pins = "PD22"; function = "pwm1"; }; a_pwm1_pin_sleep: a_pwm1@1 { pins = "PD22"; function = "gpio_in"; bias-pull-down; }; a_pwm2_pin_active: a_pwm2@0 { pins = "PB11"; function = "pwm2"; }; a_pwm2_pin_sleep: a_pwm2@1 { pins = "PB11"; function = "gpio_in"; bias-pull-down; }; a_pwm3_pin_active: a_pwm3@0 { pins = "PB12"; function = "pwm3"; }; a_pwm3_pin_sleep: a_pwm3@1 { pins = "PB12"; function = "gpio_in"; bias-pull-down; }; a_pwm4_pin_active: a_pwm4@0 { pins = "PI3"; function = "pwm4"; }; a_pwm4_pin_sleep: a_pwm4@1 { pins = "PI3"; function = "gpio_in"; bias-pull-down; }; a_pwm5_pin_active: a_pwm5@0 { pins = "PI4"; function = "pwm5"; }; a_pwm5_pin_sleep: a_pwm5@1 { pins = "PI4"; function = "gpio_in"; bias-pull-down; }; a_pwm10_pin_active: a_pwm10@0 { pins = "PI9"; function = "pwm10"; }; a_pwm10_pin_sleep: a_pwm10@1 { pins = "PI9"; function = "gpio_in"; bias-pull-down; }; ledc_pins_a: ledc@0 { pins = "PG0"; function = "ledc"; drive-strength = <10>; }; ledc_pins_b: ledc@1 { pins = "PG0"; function = "gpio_in"; }; irrx_pins_default: irrx@0 { pins = "PI8"; function = "cir"; }; irrx_pins_sleep: irrx@1 { pins = "PI8"; function = "gpio_in"; }; irtx_pins_default: irtx@0 { pins = "PH18"; function = "cir"; }; irtx_pins_sleep: irtx@1 { pins = "PH18"; function = "gpio_in"; }; twi0_pins_default: twi0@0 { pins = "PD22", "PD23"; function = "twi0"; drive-strength = <10>; bias-pull-up; }; twi0_pins_sleep: twi0@1 { pins = "PD22", "PD23"; function = "gpio_in"; }; twi1_pins_default: twi1@0 { pins = "PB4", "PB5"; function = "twi1"; drive-strength = <10>; bias-pull-up; }; twi1_pins_sleep: twi1@1 { pins = "PB4", "PB5"; function = "gpio_in"; }; twi2_pins_default: twi2@0 { pins = "PE1", "PE2"; function = "twi2"; drive-strength = <20>; bias-pull-up; }; twi2_pins_sleep: twi2@1 { pins = "PE1", "PE2"; function = "gpio_in"; }; twi3_pins_default: twi3@0 { pins = "PE3", "PE4"; function = "twi3"; drive-strength = <20>; bias-pull-up; }; twi3_pins_sleep: twi3@1 { pins = "PE3", "PE4"; function = "gpio_in"; }; twi4_pins_default: twi4@0 { pins = "PI0", "PI1"; function = "twi4"; drive-strength = <10>; bias-pull-up; }; twi4_pins_sleep: twi4@1 { pins = "PI0", "PI1"; function = "gpio_in"; }; twi5_pins_default: twi5@0 { pins = "PJ26", "PJ27"; function = "twi5"; drive-strength = <10>; bias-pull-up; }; twi5_pins_sleep: twi5@1 { pins = "PJ26", "PJ27"; function = "gpio_in"; }; owa_pins_a: owa@0 { pins = "PI10"; function = "owa"; drive-strength = <20>; bias-disable; }; owa_pins_b: owa@1 { pins = "PI10"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s0_pins_a: i2s0@0 { pins = "PB4", "PB5", "PB6", "PB7", "PB8"; function = "i2s0"; drive-strength = <20>; bias-disable; }; i2s0_pins_b: i2s0@1 { pins = "PB4", "PB5", "PB6", "PB7", "PB8"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s1_pins_a: i2s1@0 { pins = "PG10", "PG11", "PG12", "PG13", "PG14"; function = "i2s1"; drive-strength = <20>; bias-disable; }; i2s1_pins_b: i2s1@1 { pins = "PG10", "PG11", "PG12", "PG13", "PG14"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s2_pins_a: i2s2@0 { pins = "PH2", "PH3", "PH8", "PH9", "PH10", "PH11", "PH12"; function = "i2s2"; drive-strength = <20>; bias-disable; }; i2s2_pins_b: i2s2@1 { pins = "PH2", "PH3", "PH8", "PH9", "PH10", "PH11", "PH12"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s3_pins_a: i2s3@0 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5", "PF6"; function = "i2s3"; drive-strength = <20>; bias-disable; }; i2s3_pins_b: i2s3@1 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5", "PF6"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; rgb24_pins_a: rgb24@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ "PD20", "PD21", "PD22","PD23","PD24","PD25","PD26","PD27"; function = "dpss"; drive-strength = <30>; }; rgb24_pins_b: rgb24@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ "PD20", "PD21", "PD22", "PD23","PD24","PD25","PD26","PD27"; function = "gpio_in"; }; lvds0_pins_a: lvds0@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "lvds0"; drive-strength = <30>; }; lvds0_pins_b: lvds0@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "gpio_in"; }; nand0_pins_default: nand0@0 { pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; function = "nand0"; drive-strength = <30>; }; nand0_pins_rb: nand0@1 { pins = "PC4", "PC6", "PC3", "PC7"; function = "nand0"; drive-strength = <30>; bias-pull-up; /* only RB&CE should be pulled up */ }; nand0_pins_sleep: nand0@2 { pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; function = "io_disabled"; drive-strength = <10>; }; gmac0_pins_default: gmac0@0 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10","PH13","PH14", "PH15","PH16","PH17","PH18"; drive-strength = <40>; function = "gmac0"; bias-pull-up; }; gmac0_pins_sleep: gmac0@1 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10","PH13","PH14", "PH15","PH16","PH17","PH18"; function = "gpio_in"; }; gmac1_pins_default: gmac1@0 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12","PJ13", "PJ14", "PJ15"; drive-strength = <40>; function = "gmac1"; bias-pull-up; }; gmac1_pins_sleep: gmac1@1 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12","PJ13", "PJ14", "PJ15"; function = "gpio_in"; }; spi1_pin_default: spi1_pin_default{ pins = "PI2","PI3","PI4","PI5"; function = "spi1"; }; spi1_pin_sleep: spi1_pin_sleep{ pins = "PI2","PI3","PI4","PI5"; function = "gpio_in"; }; spi2_pin_default: spi2_default { pins = "PI6","PI7","PI8","PI12"; function = "spi2"; }; spi2_pin_sleep: spi2_sleep { pins = "PI6","PI7","PI8","PI12"; function = "gpio_in"; }; }; &spi1 { clock-frequency = <100000000>; pinctrl-names = "default","sleep"; pinctrl-0 = <&spi1_pin_default>; pinctrl-1 = <&spi1_pin_sleep>; sunxi,spi-num-cs = <1>; sunxi,spi-bus-mode = <SUNXI_SPI_BUS_MASTER>; sunxi,spi-cs-mode = <SUNXI_SPI_CS_AUTO>; status = "okay"; spidev1 { reg = <0>; compatible = "rohm,dh2228fv"; spi-max-frequency = <500000>; spi-rx-bus-width = <0x1>; spi-tx-bus-width = <0x1>; }; }; &spi2{ clock-frequency = <100000000>; pinctrl-names = "default","sleep"; pinctrl-0 = <&spi2_pin_default>; pinctrl-1 = <&spi2_pin_sleep>; sunxi,spi-num-cs = <1>; sunxi,spi-bus-mode = <SUNXI_SPI_BUS_MASTER>; sunxi,spi-cs-mode = <SUNXI_SPI_CS_AUTO>; status = "okay"; spidev2 { reg = <0>; compatible = "rohm,dh2228fv"; spi-max-frequency = <500000>; spi-rx-bus-width = <0x1>; spi-tx-bus-width = <0x1>; }; }; &soc { auto_print@54321 { reg = <0x0 0x54321 0x0 0x0>; device_type = "auto_print"; status = "okay"; }; car_reverse: car-reverse { compatible = "allwinner,sunxi-car-reverse"; /* video source setting*/ video_channel = <0>; video_source = <0>; format_type = <0>; video_source_width = <1920>; video_source_height = <1080>; src_size_adaptive = <1>; /* display setting */ overview_type = <1>; screen_width = <1280>; screen_height = <800>; screen_size_adaptive = <1>; discard_frame = <0>; di_used = <0>; g2d_used = <1>; rotation = <0>; /* auxiliary line setting */ auxiliary_line_type = <1>; aux_angle = <0>; aux_lr = <0>; reverse_int_pin = <&pio PI 15 GPIO_ACTIVE_HIGH>; status = "disabled"; }; dsp0_rproc: dsp0_rproc@0 { mboxes = <&msgbox 4>, <&msgbox 6>; mbox-names = "arm-kick", "dsp-standby"; memory-region = <&dsp0ddr_reserved>, <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, <&dsp_vdev0vring1>, <&dsp0iram_reserved>, <&dsp0dram0_reserved>, <&dsp0dram1_reserved>; memory-mappings = /* < DA len PA > */ /* local SRAM via external bus */ < 0x20000 0x20000 0x20000 >, /* local SRAM via internal bus */ < 0x400000 0x10000 0x20000 >, < 0x420000 0x8000 0x30000 >, < 0x440000 0x8000 0x38000 >, /* DDR front 256MB */ < 0x10000000 0x10000000 0x40000000 >, /* local SRAM via internal bus */ < 0x20020000 0x10000 0x400000 >, < 0x20030000 0x8000 0x420000 >, < 0x20038000 0x8000 0x440000 >, /* DDR front 256MB */ < 0x30000000 0x10000000 0x40000000 >, /* DDR front 1GB */ < 0x40000000 0x40000000 0x40000000 >, /* DDR front 1GB */ < 0x80000000 0x40000000 0x40000000 >, /* DDR front 1GB */ < 0xC0000000 0x40000000 0x40000000 >; standby-ctrl-en = <0x1>; standby-record-reg = <0x07090110>; status = "okay"; }; e906_rproc: e906_rproc@7130000 { mboxes = <&msgbox 8>; mbox-names = "arm-kick"; memory-region = <&riscvsram0_reserved>, <&riscvsram1_reserved>, <&rv_vdev0buffer>, <&rv_vdev0vring0>, <&rv_vdev0vring1>; memory-mappings = /* < DA len PA > */ /* DSP RAM */ < 0x20000 0x20000 0x20000 >, /* SRAM A2 */ < 0x40000 0x24000 0x40000 >, /* DDR */ < 0x8000000 0x37f00000 0x8000000 >, /* SRAM SPACE 0 */ < 0x3ffc0000 0x40000 0x07280000 >, /* SRAM SPACE 1 */ < 0x40000000 0x40000 0x072c0000 >, /* DRAM SPACE */ < 0x40040000 0x3ffc0000 0x40040000>; status = "okay"; }; }; &uart0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pins_a>; pinctrl-1 = <&uart0_pins_b>; uart-supply = <®_cldo3>; status = "okay"; }; &uart1 { status = "disabled"; }; &uart2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart2_pins_a>; pinctrl-1 = <&uart2_pins_b>; status = "okay"; }; &uart3 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pins_a>; pinctrl-1 = <&uart3_pins_b>; status = "okay"; }; &uart4 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart4_pins_a>; pinctrl-1 = <&uart4_pins_b>; status = "okay"; }; &uart5 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart5_pins_a>; pinctrl-1 = <&uart5_pins_b>; status = "okay"; }; &uart6 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart6_pins_a>; pinctrl-1 = <&uart6_pins_b>; status = "okay"; }; &uart7 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart7_pins_a>; pinctrl-1 = <&uart7_pins_b>; status = "okay"; }; &uart8 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart8_pins_a>; pinctrl-1 = <&uart8_pins_b>; status = "okay"; }; &uart9 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart9_pins_a>; pinctrl-1 = <&uart9_pins_b>; status = "okay"; }; &lradc { key_cnt = <2>; key0 = <210 0x73>; key1 = <410 0x72>; key_debounce; debounce_value = <50>; status = "okay"; }; &irrx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&irrx_pins_default>; pinctrl-1 = <&irrx_pins_sleep>; irrx-supply = <®_dcdc4>; status = "disabled"; }; &s_irrx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&s_irrx_pins_default>; pinctrl-1 = <&s_irrx_pins_sleep>; status = "okay"; }; &irtx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&irtx_pins_default>; pinctrl-1 = <&irtx_pins_sleep>; status = "disabled"; }; &gpadc0 { channel_num = <2>; channel_select = <3>; channel_data_select = <3>; channel_compare_select = <3>; channel_cld_select = <3>; channel_chd_select = <3>; channel0_compare_lowdata = <1700000>; channel0_compare_higdata = <1200000>; channel1_compare_lowdata = <460000>; channel1_compare_higdata = <1200000>; status = "disabled"; }; &gpadc1 { channel_num = <2>; channel_select = <3>; channel_data_select = <3>; channel_compare_select = <3>; channel_cld_select = <3>; channel_chd_select = <3>; channel0_compare_lowdata = <1700000>; channel0_compare_higdata = <1200000>; channel1_compare_lowdata = <460000>; channel1_compare_higdata = <1200000>; status = "disabled"; }; &a_pwm0 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm0_pin_active>; pinctrl-1 = <&a_pwm0_pin_sleep>; pwm-supply = <®_dcdc4>; status = "okay"; }; &a_pwm1 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm1_pin_active>; pinctrl-1 = <&a_pwm1_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &a_pwm2 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm2_pin_active>; pinctrl-1 = <&a_pwm2_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &a_pwm3 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm3_pin_active>; pinctrl-1 = <&a_pwm3_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &a_pwm4 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm4_pin_active>; pinctrl-1 = <&a_pwm4_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &a_pwm5 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm5_pin_active>; pinctrl-1 = <&a_pwm5_pin_sleep>; pwm-supply = <®_dcdc4>; status = "disabled"; }; &a_pwm10 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&a_pwm10_pin_active>; pinctrl-1 = <&a_pwm10_pin_sleep>; pwm-supply = <®_dcdc4>; status = "okay"; }; &ledc { pinctrl-names = "default", "sleep"; pinctrl-0 = <&ledc_pins_a>; pinctrl-1 = <&ledc_pins_b>; led_count = <34>; output_mode = "GRB"; reset_ns = <84>; t1h_ns = <800>; t1l_ns = <320>; t0h_ns = <300>; t0l_ns = <800>; wait_time0_ns = <84>; wait_time1_ns = <84>; wait_data_time_ns = <600000>; status = "disabled"; }; &twi0 { clock-frequency = <400000>; pinctrl-0 = <&twi0_pins_default>; pinctrl-1 = <&twi0_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; pcie_usb_phy@74 { compatible = "combphy,phy74"; reg = <0x74>; status = "disabled"; }; pcie_usb_phy@75 { compatible = "combphy,phy75"; reg = <0x75>; status = "disabled"; }; ctp { compatible = "allwinner,goodix"; reg = <0x5d>; device_type = "ctp"; status = "disabled"; ctp_name = "gt9xxnew_ts"; ctp_twi_id = <0x0>; ctp_twi_addr = <0x5d>; ctp_screen_max_x = <0x320>; ctp_screen_max_y = <0x500>; ctp_revert_x_flag = <0x1>; ctp_revert_y_flag = <0x1>; ctp_exchange_x_y_flag = <0x0>; ctp_int_port = <&pio PH 9 GPIO_ACTIVE_LOW>; ctp_wakeup = <&pio PH 10 GPIO_ACTIVE_LOW>; ctp-supply = <®_cldo2>; ctp_power_ldo_vol = <3300>; }; gt9xx { compatible = "goodix,gt9xx"; reg = <0x5d>; status = "disabled"; irq-gpios = <&pio PD 20 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PD 21 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ B4 00 05 20 03 0A 3D 00 01 0A 28 0F 50 32 03 05 00 00 00 00 00 00 06 17 19 1F 14 8E 2E 99 2D 2F 35 11 00 00 00 1A 03 10 00 00 00 00 00 00 00 00 00 00 00 32 50 94 D5 02 07 00 00 04 8E 48 00 8A 4D 00 86 53 00 83 59 00 80 60 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 05 06 07 08 09 0C 0D 0E 0F 10 11 14 15 16 17 FF FF FF FF FF FF FF FF FF FF FF FF 28 27 26 25 24 23 22 21 20 1F 1E 1C 1B 19 13 12 11 10 0F 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF AB 01 ]; }; }; &twi1 { clock-frequency = <400000>; pinctrl-0 = <&twi1_pins_default>; pinctrl-1 = <&twi1_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; status = "okay"; mir3da { compatible = "allwinner,mir3da"; reg = <0x26>; device_type = "gsensor"; status = "disabled"; gsensor_twi_id = <0x1>; gsensor_twi_addr = <0x26>; gsensor_int1 = <&pio PH 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; gsensor-supply = <®_cldo3>; gsensor_vcc_io_val = <3300>; }; eeprom@50 { compatible = "atmel,24c32"; reg = <0x50>; status = "okay"; }; }; &twi2 { clock-frequency = <400000>; pinctrl-0 = <&twi2_pins_default>; pinctrl-1 = <&twi2_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "disabled"; }; &twi3 { clock-frequency = <400000>; pinctrl-0 = <&twi3_pins_default>; pinctrl-1 = <&twi3_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "disabled"; }; &twi4 { clock-frequency = <400000>; pinctrl-0 = <&twi4_pins_default>; pinctrl-1 = <&twi4_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; rtc@51 { compatible = "nxp,pcf8563"; reg = <0x51>; #clock-cells = <0>; status = "okay"; }; /* 070 inch ft5x06: ft5x06@38 { compatible = "edt,edt-ft5406", "edt,edt-ft5x06"; reg = <0x38>; pinctrl-names = "default"; interrupt-parent = <&pio>; interrupts = <PJ 19 IRQ_TYPE_EDGE_FALLING>; reset-gpios = <&pio PJ 18 GPIO_ACTIVE_LOW>; touchscreen-size-x=<1024>; touchscreen-size-y=<600>; }; */ // 101 inch gt9271@14 { compatible = "goodix,gt9271"; reg = <0x14>; //pinctrl-names = "default"; //pinctrl-0 = <&pinctrl_i2c_synaptics_dsx_io>; interrupt-parent = <&pio>; interrupts = <PJ 19 IRQ_TYPE_EDGE_FALLING>; reset-gpios = <&pio PJ 18 GPIO_ACTIVE_LOW>; /*synaptics,y-rotation;*/ esd-recovery-timeout-ms = <2000>; irq-gpios = <&pio PJ 19 GPIO_ACTIVE_HIGH>; //reset-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; status = "okay"; }; gt9xx { compatible = "goodix,gt9xx"; reg = <0x5d>; status = "okay"; irq-gpios = <&pio PJ 19 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PJ 18 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ B4 00 05 20 03 0A 3D 00 01 0A 28 0F 50 32 03 05 00 00 00 00 00 00 06 17 19 1F 14 8E 2E 99 2D 2F 35 11 00 00 00 1A 03 10 00 00 00 00 00 00 00 00 00 00 00 32 50 94 D5 02 07 00 00 04 8E 48 00 8A 4D 00 86 53 00 83 59 00 80 60 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 05 06 07 08 09 0C 0D 0E 0F 10 11 14 15 16 17 FF FF FF FF FF FF FF FF FF FF FF FF 28 27 26 25 24 23 22 21 20 1F 1E 1C 1B 19 13 12 11 10 0F 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF AB 01 ]; }; }; &twi5 { clock-frequency = <400000>; pinctrl-0 = <&twi5_pins_default>; pinctrl-1 = <&twi5_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; gt9xx_secondary { compatible = "goodix,gt9xx_secondary"; reg = <0x5d>; status = "okay"; irq-gpios = <&pio PI 13 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PI 14 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ 43 B0 04 80 07 0A 35 00 01 08 28 0F 50 32 03 05 00 00 00 00 00 00 00 17 19 1B 14 90 2B 99 2F 31 8E 12 00 00 00 DA 03 10 00 00 00 00 00 00 00 00 00 11 00 29 4B 94 C5 02 07 00 00 04 85 2B 00 7D 31 00 77 37 00 72 3E 00 6F 46 00 6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 C0 00 00 00 00 00 00 00 17 16 15 14 11 10 0F 0E 0D 0C 09 08 07 06 05 04 01 00 FF FF FF FF FF FF 00 00 00 00 00 00 25 24 23 22 21 20 1F 1E 1C 1B 19 14 13 12 11 10 0F 0E 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF 00 00 00 00 00 00 00 00 00 00 73 01 ]; }; }; &csi_mclk3_pins_a { pins = "PK13"; function = "ncsi"; }; &csi_mclk3_pins_b { pins = "PK13"; }; &mipib_4lane_pins_a { pins = "PK6", "PK7", "PK8", "PK9"; }; &mipib_4lane_pins_b { pins = "PK6", "PK7", "PK8", "PK9"; }; &vind0 { csi_top = <360000000>; csi_isp = <300000000>; vind_mclkpin-supply = <®_bldo3>; /* vcc-pe */ vind_mclkpin_vol = <1800000>; vind_mcsipin-supply = <®_bldo3>; /* vcc-pk */ vind_mcsipin_vol = <1800000>; vind_mipipin-supply = <®_bldo3>; /* vcc-mcsi */ vind_mipipin_vol = <1800000>; status = "okay"; csi3:csi@5823000 { pinctrl-names = "default","sleep"; pinctrl-0 = <&ncsi_bt1120_pins_a>; pinctrl-1 = <&ncsi_bt1120_pins_b>; status = "disabled"; }; tdm0:tdm@5908000 { work_mode = <0>; }; isp00:isp@5900000 { work_mode = <0>; }; isp01:isp@58ffffc { status = "disabled"; }; isp02:isp@58ffff8 { status = "disabled"; }; isp03:isp@58ffff4 { status = "disabled"; }; isp10:isp@4 { status = "okay"; }; isp20:isp@5 { status = "okay"; }; scaler00:scaler@5910000 { work_mode = <0>; }; scaler01:scaler@590fffc { status = "disabled"; }; scaler02:scaler@590fff8 { status = "disabled"; }; scaler03:scaler@590fff4 { status = "disabled"; }; scaler10:scaler@5910400 { work_mode = <0>; }; scaler11:scaler@59103fc { status = "disabled"; }; scaler12:scaler@59103f8 { status = "disabled"; }; scaler13:scaler@59103f4 { status = "disabled"; }; scaler20:scaler@5910800 { work_mode = <0>; }; scaler21:scaler@59107fc { status = "disabled"; }; scaler22:scaler@59107f8 { status = "disabled"; }; scaler23:scaler@59107f4 { status = "disabled"; }; scaler30:scaler@5910c00 { work_mode = <0>; }; scaler31:scaler@5910bfc { status = "disabled"; }; scaler32:scaler@5910bf8 { status = "disabled"; }; scaler33:scaler@5910bf4 { status = "disabled"; }; scaler40:scaler@16 { status = "okay"; }; scaler50:scaler@17 { status = "okay"; }; actuator0: actuator@2108180 { device_type = "actuator0"; actuator0_name = "dw9714_act"; actuator0_slave = <0x18>; actuator0_af_pwdn = <>; actuator0_afvdd = "afvcc-csi"; actuator0_afvdd_vol = <2800000>; status = "disabled"; }; flash0: flash@2108190 { device_type = "flash0"; flash0_type = <2>; flash0_en = <&r_pio PL 11 GPIO_ACTIVE_LOW>; flash0_mode = <>; flash0_flvdd = ""; flash0_flvdd_vol = <>; device_id = <0>; status = "disabled"; }; sensor0:sensor@5812000 { device_type = "sensor0"; sensor0_mname = "ov5640_mipi_cam1"; sensor0_twi_cci_id = <7>; sensor0_twi_addr = <0x78>; // sensor0_mclk_id = <0>; sensor0_pos = "rear"; sensor0_isp_used = <0>; sensor0_fmt = <0>; sensor0_stby_mode = <0>; sensor0_vflip = <0>; sensor0_hflip = <0>; sensor0_cameravdd-supply = <>; sensor0_cameravdd_vol = <>; sensor0_iovdd-supply = <>; sensor0_iovdd_vol = <>; sensor0_avdd-supply = <>; sensor0_avdd_vol = <>; sensor0_dvdd-supply = <>; sensor0_dvdd_vol = <>; sensor0_power_en = <&pio PH 11 GPIO_ACTIVE_HIGH>; sensor0_reset = <&r_pio PM 0 GPIO_ACTIVE_LOW>; sensor0_pwdn = <&r_pio PM 1 GPIO_ACTIVE_LOW>; status = "okay"; }; sensor1:sensor@5812010 { device_type = "sensor1"; sensor1_mname = "ov5640_mipi_cam2"; sensor1_twi_cci_id = <8>; sensor1_twi_addr = <0x78>; // sensor1_mclk_id = <3>; sensor1_pos = "front"; sensor1_isp_used = <0>; sensor1_fmt = <0>; sensor1_stby_mode = <0>; sensor1_vflip = <0>; sensor1_hflip = <0>; sensor1_iovdd-supply = <>; sensor1_iovdd_vol = <>; sensor1_avdd-supply = <>; sensor1_avdd_vol = <>; sensor1_dvdd-supply = <>; sensor1_dvdd_vol = <>; sensor1_power_en = <&pio PH 8 GPIO_ACTIVE_HIGH>; sensor1_reset = <&r_pio PM 2 GPIO_ACTIVE_LOW>; sensor1_pwdn = <&r_pio PM 3 GPIO_ACTIVE_LOW>; status = "okay"; }; vinc00:vinc@5830000 { vinc0_csi_sel = <0>; vinc0_mipi_sel = <0>; vinc0_isp_sel = <4>; vinc0_isp_tx_ch = <0>; vinc0_tdm_rx_sel = <0>; vinc0_rear_sensor_sel = <0>; vinc0_front_sensor_sel = <0>; vinc0_sensor_list = <0>; device_id = <0>; work_mode = <0x0>; status = "okay"; }; vinc01:vinc@582fffc { vinc1_csi_sel = <1>; vinc1_mipi_sel = <2>; vinc1_isp_sel = <1>; vinc1_isp_tx_ch = <0>; vinc1_tdm_rx_sel = <1>; vinc1_rear_sensor_sel = <1>; vinc1_front_sensor_sel = <1>; vinc1_sensor_list = <0>; device_id = <1>; status = "disabled"; }; vinc02:vinc@582fff8 { vinc2_csi_sel = <2>; vinc2_mipi_sel = <0xff>; vinc2_isp_sel = <2>; vinc2_isp_tx_ch = <2>; vinc2_tdm_rx_sel = <2>; vinc2_rear_sensor_sel = <0>; vinc2_front_sensor_sel = <0>; vinc2_sensor_list = <0>; device_id = <2>; status = "disabled"; }; vinc03:vinc@582fff4 { vinc3_csi_sel = <0>; vinc3_mipi_sel = <0xff>; vinc3_isp_sel = <0>; vinc3_isp_tx_ch = <0>; vinc3_tdm_rx_sel = <0>; vinc3_rear_sensor_sel = <1>; vinc3_front_sensor_sel = <1>; vinc3_sensor_list = <0>; device_id = <3>; status = "disabled"; }; vinc10:vinc@5831000 { vinc4_csi_sel = <0>; vinc4_mipi_sel = <0>; vinc4_isp_sel = <4>; vinc4_isp_tx_ch = <1>; vinc4_tdm_rx_sel = <0>; vinc4_rear_sensor_sel = <0>; vinc4_front_sensor_sel = <0>; vinc4_sensor_list = <0>; device_id = <4>; work_mode = <0x0>; status = "okay"; }; vinc11:vinc@5830ffc { vinc5_csi_sel = <2>; vinc5_mipi_sel = <0xff>; vinc5_isp_sel = <1>; vinc5_isp_tx_ch = <1>; vinc5_tdm_rx_sel = <1>; vinc5_rear_sensor_sel = <0>; vinc5_front_sensor_sel = <0>; vinc5_sensor_list = <0>; device_id = <5>; status = "disabled"; }; vinc12:vinc@5830ff8 { vinc6_csi_sel = <2>; vinc6_mipi_sel = <0xff>; vinc6_isp_sel = <0>; vinc6_isp_tx_ch = <0>; vinc6_tdm_rx_sel = <0>; vinc6_rear_sensor_sel = <0>; vinc6_front_sensor_sel = <0>; vinc6_sensor_list = <0>; device_id = <6>; status = "disabled"; }; vinc13:vinc@5830ff4 { vinc7_csi_sel = <2>; vinc7_mipi_sel = <0xff>; vinc7_isp_sel = <0>; vinc7_isp_tx_ch = <0>; vinc7_tdm_rx_sel = <0>; vinc7_rear_sensor_sel = <0>; vinc7_front_sensor_sel = <0>; vinc7_sensor_list = <0>; device_id = <7>; status = "disabled"; }; vinc20:vinc@5832000 { vinc8_csi_sel = <0>; vinc8_mipi_sel = <0>; vinc8_isp_sel = <4>; vinc8_isp_tx_ch = <2>; vinc8_tdm_rx_sel = <0>; vinc8_rear_sensor_sel = <0>; vinc8_front_sensor_sel = <0>; vinc8_sensor_list = <0>; device_id = <8>; work_mode = <0x0>; status = "okay"; }; vinc21:vinc@5831ffc { vinc9_csi_sel = <2>; vinc9_mipi_sel = <0xff>; vinc9_isp_sel = <0>; vinc9_isp_tx_ch = <0>; vinc9_tdm_rx_sel = <0>; vinc9_rear_sensor_sel = <0>; vinc9_front_sensor_sel = <0>; vinc9_sensor_list = <0>; device_id = <9>; status = "disabled"; }; vinc22:vinc@5831ff8 { vinc10_csi_sel = <2>; vinc10_mipi_sel = <0xff>; vinc10_isp_sel = <0>; vinc10_isp_tx_ch = <0>; vinc10_tdm_rx_sel = <0>; vinc10_rear_sensor_sel = <0>; vinc10_front_sensor_sel = <0>; vinc10_sensor_list = <0>; device_id = <10>; status = "disabled"; }; vinc23:vinc@5831ff4 { vinc11_csi_sel = <2>; vinc11_mipi_sel = <0xff>; vinc11_isp_sel = <0>; vinc11_isp_tx_ch = <0>; vinc11_tdm_rx_sel = <0>; vinc11_rear_sensor_sel = <0>; vinc11_front_sensor_sel = <0>; vinc11_sensor_list = <0>; device_id = <11>; status = "disabled"; }; vinc30:vinc@5833000 { vinc12_csi_sel = <0>; vinc12_mipi_sel = <0>; vinc12_isp_sel = <4>; vinc12_isp_tx_ch = <3>; vinc12_tdm_rx_sel = <0>; vinc12_rear_sensor_sel = <0>; vinc12_front_sensor_sel = <0>; vinc12_sensor_list = <0>; device_id = <12>; work_mode = <0x0>; status = "okay"; }; vinc31:vinc@5832ffc { vinc13_csi_sel = <2>; vinc13_mipi_sel = <0xff>; vinc13_isp_sel = <0>; vinc13_isp_tx_ch = <0>; vinc13_tdm_rx_sel = <0>; vinc13_rear_sensor_sel = <0>; vinc13_front_sensor_sel = <0>; vinc13_sensor_list = <0>; device_id = <13>; status = "disabled"; }; vinc32:vinc@5832ff8 { vinc14_csi_sel = <2>; vinc14_mipi_sel = <0xff>; vinc14_isp_sel = <0>; vinc14_isp_tx_ch = <0>; vinc14_tdm_rx_sel = <0>; vinc14_rear_sensor_sel = <0>; vinc14_front_sensor_sel = <0>; vinc14_sensor_list = <0>; device_id = <14>; status = "disabled"; }; vinc33:vinc@5832ff4 { vinc15_csi_sel = <2>; vinc15_mipi_sel = <0xff>; vinc15_isp_sel = <0>; vinc15_isp_tx_ch = <0>; vinc15_tdm_rx_sel = <0>; vinc15_rear_sensor_sel = <0>; vinc15_front_sensor_sel = <0>; vinc15_sensor_list = <0>; device_id = <15>; status = "disabled"; }; vinc40:vinc@5834000 { vinc16_csi_sel = <2>; vinc16_mipi_sel = <2>; vinc16_isp_sel = <4>; vinc16_isp_tx_ch = <0>; vinc16_tdm_rx_sel = <0>; vinc16_rear_sensor_sel = <1>; vinc16_front_sensor_sel = <1>; vinc16_sensor_list = <1>; device_id = <16>; status = "okay"; }; vinc50:vinc@5835000 { vinc17_csi_sel = <2>; vinc17_mipi_sel = <2>; vinc17_isp_sel = <4>; vinc17_isp_tx_ch = <1>; vinc17_tdm_rx_sel = <0>; vinc17_rear_sensor_sel = <1>; vinc17_front_sensor_sel = <1>; vinc17_sensor_list = <1>; device_id = <17>; status = "okay"; }; }; &twi6 { clock-frequency = <400000>; pinctrl-0 = <&s_twi0_pins_default>; pinctrl-1 = <&s_twi0_pins_sleep>; pinctrl-names = "default", "sleep"; device_type = "twi6"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; no_suspend = <1>; status = "okay"; tcs0: tcs@41 { compatible = "ext,tcs4838"; reg = <0x41>; status = "okay"; tcs4838_delay = <0>; regulator1: regulators@1 { reg_tcs0: dcdc0 { regulator-name = "tcs4838-dcdc0"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_tcs1: dcdc1 { regulator-name = "tcs4838-dcdc1"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; }; }; virtual-ext-dcdc0 { compatible = "xpower-vregulator,ext-dcdc0"; dcdc0-supply = <®_tcs0>; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_tcs1>; }; }; sy0: sy@60 { compatible = "ext,sy8827g"; reg = <0x60>; status = "okay"; sy8827g_delay = <0>; regulator2: regulators@2 { reg_sy0: dcdc0 { regulator-name = "sy8827g-dcdc0"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_sy1: dcdc1 { regulator-name = "sy8827g-dcdc1"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; }; }; virtual-ext-dcdc0 { compatible = "xpower-vregulator,ext-dcdc0"; dcdc0-supply = <®_sy0>; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_sy1>; }; }; axp1530: axp1530@36{ compatible = "ext,axp1530"; status = "okay"; reg = <0x36>; wakeup-source; regulators{ reg_ext_axp1530_dcdc1: dcdc1 { regulator-name = "axp1530-dcdc1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3400000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-always-on; }; reg_ext_axp1530_dcdc2: dcdc2 { regulator-name = "axp1530-dcdc2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1540000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-ramp-delay = <200>; /* FIXME */ regulator-always-on; }; reg_ext_axp1530_dcdc3: dcdc3 { regulator-name = "axp1530-dcdc3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1840000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-always-on; }; reg_ext_axp1530_aldo1: ldo1 { regulator-name = "axp1530-aldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; }; reg_ext_axp1530_dldo1: ldo2 { regulator-name = "axp1530-dldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; }; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_ext_axp1530_dcdc1>; }; virtual-ext-dcdc2 { compatible = "xpower-vregulator,ext-dcdc2"; dcdc2-supply = <®_ext_axp1530_dcdc2>; }; virtual-ext-dcdc3 { compatible = "xpower-vregulator,ext-dcdc3"; dcdc3-supply = <®_ext_axp1530_dcdc3>; }; virtual-ext-aldo1 { compatible = "xpower-vregulator,ext-aldo1"; aldo1-supply = <®_ext_axp1530_aldo1>; }; virtual-ext-dldo1 { compatible = "xpower-vregulator,ext-dldo1"; dldo1-supply = <®_ext_axp1530_dldo1>; }; }; pmu0: pmu@35 { compatible = "x-powers,axp2202"; reg = <0x35>; status = "okay"; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&nmi_intc>; x-powers,drive-vbus-en; pmu_reset = <0>; pmu_irq_wakeup = <1>; pmu_hot_shutdown = <1>; wakeup-source; usb_power_supply: usb_power_supply { compatible = "x-powers,axp2202-usb-power-supply"; status = "okay"; pmu_usbpc_vol = <4600>; pmu_usbpc_cur = <500>; pmu_usbad_vol = <4000>; pmu_usbad_cur = <2500>; pmu_usb_typec_used = <1>; wakeup_usb_in; wakeup_usb_out; det_acin_supply = <&gpio_power_supply>; pmu_acin_usbid_drv = <&pio PH 12 GPIO_ACTIVE_LOW>; pmu_vbus_det_gpio = <&pio PH 13 GPIO_ACTIVE_LOW>; }; gpio_power_supply: gpio_power_supply { compatible = "x-powers,gpio-supply"; status = "disabled"; pmu_acin_det_gpio = <&pio PH 14 GPIO_ACTIVE_LOW>; det_usb_supply = <&usb_power_supply>; }; bat_power_supply: bat-power-supply { compatible = "x-powers,axp2202-bat-power-supply"; param = <&axp2202_parameter>; status = "disabled"; pmu_chg_ic_temp = <0>; pmu_battery_rdc= <147>; pmu_battery_cap = <1771>; pmu_runtime_chgcur = <1000>; pmu_suspend_chgcur = <1500>; pmu_shutdown_chgcur = <1500>; pmu_init_chgvol = <4200>; pmu_battery_warning_level1 = <15>; pmu_battery_warning_level2 = <0>; pmu_chgled_func = <0>; pmu_chgled_type = <0>; pmu_bat_para1 = <0>; pmu_bat_para2 = <0>; pmu_bat_para3 = <0>; pmu_bat_para4 = <0>; pmu_bat_para5 = <0>; pmu_bat_para6 = <0>; pmu_bat_para7 = <2>; pmu_bat_para8 = <3>; pmu_bat_para9 = <4>; pmu_bat_para10 = <6>; pmu_bat_para11 = <9>; pmu_bat_para12 = <14>; pmu_bat_para13 = <26>; pmu_bat_para14 = <38>; pmu_bat_para15 = <49>; pmu_bat_para16 = <52>; pmu_bat_para17 = <56>; pmu_bat_para18 = <60>; pmu_bat_para19 = <64>; pmu_bat_para20 = <70>; pmu_bat_para21 = <77>; pmu_bat_para22 = <83>; pmu_bat_para23 = <87>; pmu_bat_para24 = <90>; pmu_bat_para25 = <95>; pmu_bat_para26 = <99>; pmu_bat_para27 = <99>; pmu_bat_para28 = <100>; pmu_bat_para29 = <100>; pmu_bat_para30 = <100>; pmu_bat_para31 = <100>; pmu_bat_para32 = <100>; pmu_bat_temp_enable = <1>; pmu_jetia_en = <1>; pmu_bat_charge_ltf = <1738>; //-5 pmu_bat_charge_htf = <150>; //60 pmu_bat_shutdown_ltf = <2125>; //-10 pmu_bat_shutdown_htf = <130>; //65 pmu_jetia_cool = <1390>; //0 pmu_jetia_warm = <206>; //50 pmu_jcool_ifall = <2>;//75% pmu_jwarm_ifall = <2>;//75% pmu_bat_temp_para1 = <4592>; //SDNT-25 pmu_bat_temp_para2 = <2781>; //-15 pmu_bat_temp_para3 = <2125>; //-10 pmu_bat_temp_para4 = <1738>; //-5 pmu_bat_temp_para5 = <1390>;//0 pmu_bat_temp_para6 = <1118>; //5 pmu_bat_temp_para7 = <906>; //10 pmu_bat_temp_para8 = <606>; //20 pmu_bat_temp_para9 = <415>; //30 pmu_bat_temp_para10 = <290>; //40 pmu_bat_temp_para11 = <244>; //45 pmu_bat_temp_para12 = <206>; //50 pmu_bat_temp_para13 = <175>; //55 pmu_bat_temp_para14 = <150>; //60 pmu_bat_temp_para15 = <110>; //70 pmu_bat_temp_para16 = <83>; //80 wakeup_bat_out; /* wakeup_bat_in; */ /* wakeup_bat_charging; */ /* wakeup_bat_charge_over; */ /* wakeup_low_warning1; */ /* wakeup_low_warning2; */ /* wakeup_bat_untemp_work; */ /* wakeup_bat_ovtemp_work; */ /* wakeup_bat_untemp_chg; */ /* wakeup_bat_ovtemp_chg; */ }; powerkey0: powerkey@0 { status = "okay"; compatible = "x-powers,axp2101-pek"; pmu_powkey_off_time = <6000>; pmu_powkey_off_func = <0>; pmu_powkey_off_en = <1>; pmu_powkey_long_time = <1500>; pmu_powkey_on_time = <512>; wakeup_rising; wakeup_falling; }; regulator0: regulators@0 { reg_dcdc1: dcdc1 { regulator-name = "axp2202-dcdc1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1540000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_dcdc2: dcdc2 { regulator-name = "axp2202-dcdc2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3400000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_dcdc3: dcdc3 { regulator-name = "axp2202-dcdc3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1840000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-always-on; }; reg_dcdc4: dcdc4 { regulator-name = "axp2202-dcdc4"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3700000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; }; reg_rtcldo: rtcldo { /* RTC_LDO is a fixed, always-on regulator */ regulator-name = "axp2202-rtcldo"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_aldo1: aldo1 { regulator-name = "axp2202-aldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_aldo2: aldo2 { regulator-name = "axp2202-aldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_aldo3: aldo3 { regulator-name = "axp2202-aldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_aldo4: aldo4 { regulator-name = "axp2202-aldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_bldo1: bldo1 { regulator-name = "axp2202-bldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_bldo2: bldo2 { regulator-name = "axp2202-bldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_bldo3: bldo3 { regulator-name = "axp2202-bldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_bldo4: bldo4 { regulator-name = "axp2202-bldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo1: cldo1 { regulator-name = "axp2202-cldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo2: cldo2 { regulator-name = "axp2202-cldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo3: cldo3 { regulator-name = "axp2202-cldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-ramp-delay = <2500>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_cldo4: cldo4 { regulator-name = "axp2202-cldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cpusldo: cpusldo { /* cpus */ regulator-name = "axp2202-cpusldo"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1400000>; regulator-boot-on; regulator-always-on; }; reg_vmid: vmid { regulator-name = "axp2202-vmid"; regulator-enable-ramp-delay = <1000>; }; reg_drivevbus: drivevbus { regulator-name = "axp2202-drivevbus"; regulator-enable-ramp-delay = <1000>; drivevbusin-supply = <®_vmid>; }; }; virtual-dcdc1 { compatible = "xpower-vregulator,dcdc1"; dcdc1-supply = <®_dcdc1>; }; virtual-dcdc2 { compatible = "xpower-vregulator,dcdc2"; dcdc2-supply = <®_dcdc2>; }; virtual-dcdc3 { compatible = "xpower-vregulator,dcdc3"; dcdc3-supply = <®_dcdc3>; }; virtual-dcdc4 { compatible = "xpower-vregulator,dcdc4"; dcdc4-supply = <®_dcdc4>; }; virtual-rtcldo { compatible = "xpower-vregulator,rtcldo"; rtcldo-supply = <®_rtcldo>; }; virtual-aldo1 { compatible = "xpower-vregulator,aldo1"; aldo1-supply = <®_aldo1>; }; virtual-aldo2 { compatible = "xpower-vregulator,aldo2"; aldo2-supply = <®_aldo2>; }; virtual-aldo3 { compatible = "xpower-vregulator,aldo3"; aldo3-supply = <®_aldo3>; }; virtual-aldo4 { compatible = "xpower-vregulator,aldo4"; aldo4-supply = <®_aldo4>; }; virtual-bldo1 { compatible = "xpower-vregulator,bldo1"; bldo1-supply = <®_bldo1>; }; virtual-bldo2 { compatible = "xpower-vregulator,bldo2"; bldo2-supply = <®_bldo2>; }; virtual-bldo3 { compatible = "xpower-vregulator,bldo3"; bldo3-supply = <®_bldo3>; }; virtual-bldo4 { compatible = "xpower-vregulator,bldo4"; bldo4-supply = <®_bldo4>; }; virtual-cldo1 { compatible = "xpower-vregulator,cldo1"; cldo1-supply = <®_cldo1>; }; virtual-cldo2 { compatible = "xpower-vregulator,cldo2"; cldo2-supply = <®_cldo2>; }; virtual-cldo3 { compatible = "xpower-vregulator,cldo3"; cldo3-supply = <®_cldo3>; }; virtual-cldo4 { compatible = "xpower-vregulator,cldo4"; cldo4-supply = <®_cldo4>; }; virtual-cpusldo { compatible = "xpower-vregulator,cpusldo"; cpusldo-supply = <®_cpusldo>; }; virtual-drivevbus { compatible = "xpower-vregulator,drivevbus"; drivevbus-supply = <®_drivevbus>; }; axp_gpio0: axp_gpio@0 { gpio-controller; #size-cells = <0>; #gpio-cells = <6>; status = "okay"; }; }; }; /{ axp2202_parameter:axp2202-parameter { select = "battery-model"; battery-model { parameter = /bits/ 8 <0x01 0xf5 0x40 0x00 0x1b 0x1e 0x28 0x0f 0x0c 0x1e 0x32 0x02 0x14 0x05 0x0a 0x04 0x74 0xfb 0xc8 0x0d 0x43 0x10 0x36 0xfb 0x46 0x01 0xea 0x0d 0x2a 0x06 0x36 0x05 0xf4 0x0a 0xb5 0x0f 0x42 0x0e 0xe6 0x09 0x9a 0x0e 0x42 0x0e 0x3b 0x04 0x2d 0x04 0x23 0x09 0x18 0x0e 0x09 0x0e 0x04 0x08 0xf7 0x0d 0xda 0x0d 0xd0 0x03 0xbb 0x03 0x9d 0x08 0x7f 0x0d 0x6a 0x0d 0x55 0x07 0xc2 0x57 0x2b 0x27 0x1e 0x0d 0x14 0x08 0xc5 0x98 0x7e 0x66 0x4e 0x44 0x38 0x1a 0x12 0x0a 0xf6 0x00 0x00 0xf6 0x00 0xf6 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xf6 0x00 0x00 0xf6 0x00 0xf6 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xf6 0x00 0x00 0xf6 0x00 0xf6>; }; }; }; &twi7 { clock-frequency = <400000>; pinctrl-0 = <&s_twi1_pins_default>; pinctrl-1 = <&s_twi1_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ //twi_drv_used = <1>; twi-supply = <®_aldo3>; status = "okay"; lt9611: lt9611@39 { compatible = "myir,lt9611"; reg = <0x39>; lt9611-rst-gpios = <&r_pio PL 6 GPIO_ACTIVE_HIGH>; lt9611-power-en-gpios = <&pio PG 12 GPIO_ACTIVE_HIGH>; interrupt-parent = <&r_pio>; interrupts = <PL 7 IRQ_TYPE_EDGE_FALLING>; status = "okay"; }; ac107: ac107@36 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-ac107"; reg = <0x36>; pllclk-src = "MCLK"; sysclk-src = "MCLK"; pcm-bit-first = "MSB"; frame-sync-width = <1>; rx-chmap = <0xaaaa>; ch1-dig-vol = <160>; ch2-dig-vol = <160>; ch1-pga-gain = <26>; ch2-pga-gain = <26>; status = "okay"; }; }; &twi8 { clock-frequency = <400000>; pinctrl-0 = <&s_twi2_pins_default>; pinctrl-1 = <&s_twi2_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_aldo3>; status = "okay"; }; &sdc2 { non-removable; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; no-sdio; no-sd; ctl-spec-caps = <0x308>; cap-mmc-highspeed; sunxi-power-save-mode; sunxi-dis-signal-vol-sw; mmc-bootpart-noacc; /*cap-hsq;*/ cqe-on; ctl-cmdq-md = <0x2>; max-frequency = <150000000>; vmmc-supply = <®_cldo3>; /*emmc io vol 3.3v*/ /*vqmmc-supply = <®_aldo1>;*/ /*emmc io vol 1.8v*/ vqmmc-supply = <®_cldo1>; status = "disabled"; }; &sdc0 { bus-width = <4>; cd-gpios = <&pio PF 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /*non-removable;*/ /*broken-cd;*/ /*cd-inverted*/ /*data3-detect;*/ /*card-pwr-gpios = <&pio PH 14 1 1 2 0xffffffff>;*/ cd-used-24M; cd-set-debounce = <0x1>; cap-sd-highspeed; // sd-uhs-sdr50; // sd-uhs-ddr50; // sd-uhs-sdr104; no-sdio; no-mmc; sunxi-power-save-mode; /*sunxi-dis-signal-vol-sw;*/ max-frequency = <150000000>; ctl-spec-caps = <0x408>; sunxi-dly-208M = <0xff 1 0xff 0xff 0xff 0xff>; vmmc-supply = <®_cldo3>; vqmmc33sw-supply = <®_cldo3>; vdmmc33sw-supply = <®_cldo3>; // vqmmc18sw-supply = <®_bldo3>; // vdmmc18sw-supply = <®_bldo3>; status = "okay"; }; &sdc1 { bus-width = <4>; no-mmc; no-sd; cap-sd-highspeed; /*sd-uhs-sdr12*/ sd-uhs-sdr25; sd-uhs-sdr50; sd-uhs-ddr50; sd-uhs-sdr104; /*sunxi-power-save-mode;*/ sunxi-dis-signal-vol-sw; cap-sdio-irq; keep-power-in-suspend; ignore-pm-notify; max-frequency = <150000000>; ctl-spec-caps = <0x408>; status = "okay"; }; &nand0 { compatible = "allwinner,sun55iw3-nand"; device_type = "nand0"; //reg = <0x0 0x04011000 0x0 0x1000>;/* nand0 */ pinctrl-names = "default", "sleep"; pinctrl-0 = <&nand0_pins_default &nand0_pins_rb>; pinctrl-1 = <&nand0_pins_sleep>; nand0_regulator1 = "vcc-nand"; nand0_regulator2 = "none"; nand0_cache_level = <0x55aaaa55>; nand0_flush_cache_num = <0x55aaaa55>; nand0_capacity_level = <0x55aaaa55>; nand0_id_number_ctl = <0x55aaaa55>; nand0_print_level = <0x55aaaa55>; nand0_p0 = <0x55aaaa55>; nand0_p1 = <0x55aaaa55>; nand0_p2 = <0x55aaaa55>; nand0_p3 = <0x55aaaa55>; chip_code = "sun55iw3"; status = "disabled"; }; &rfkill { compatible = "allwinner,sunxi-rfkill"; chip_en; power_en; pinctrl-0; pinctrl-names; status = "okay"; /* bt session */ bt { compatible = "allwinner,sunxi-bt"; clocks; clock-names; bt_power = "axp2202-aldo3", "axp2202-bldo1"; /* vcc-pl/vcc-pg/vcc-pm */ bt_power_vol= <3300000>, <1800000>; bt_rst_n = <&pio PC 4 GPIO_ACTIVE_HIGH>; }; }; &addr_mgt { compatible = "allwinner,sunxi-addr_mgt"; type_addr_wifi = <0x0>; type_addr_bt = <0x0>; type_addr_eth = <0x0>; status = "okay"; }; &btlpm { compatible = "allwinner,sunxi-btlpm"; uart_index = <0x1>; bt_wake = <&pio PC 12 GPIO_ACTIVE_HIGH>; bt_hostwake = <&pio PC 2 GPIO_ACTIVE_HIGH>; wakeup-source; status = "okay"; }; /* *usb_port_type: usb mode. 0-device, 1-host, 2-otg. *usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-id/dpdm detect. *usb_detect_mode: 0-thread scan, 1-id gpio interrupt. *usb_id_gpio: gpio for id detect. *usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl"; *usb_wakeup_suspend：0-SUPER_STANDBY, 1-USB_STANDBY. */ &usbc0 { device_type = "usbc0"; usb_port_type = <0x2>; usb_detect_type = <0x1>; usb_detect_mode = <0x0>; usb_id_gpio = <&r_pio PL 10 GPIO_ACTIVE_HIGH>; enable-active-high; usb_det_vbus_gpio = <&r_pio PL 10 GPIO_ACTIVE_HIGH>; enable-active-high; detvbus_io-supply = <®_bldo1>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; usb_luns = <3>; usb_serial_unique = <0>; usb_serial_number = "20080411"; rndis_wceis = <1>; status = "okay"; }; &udc { det_vbus_supply = <&usb_power_supply>; status = "okay"; }; &ehci0 { //drvvbus-supply = <®_usb0_vbus>; status = "okay"; }; &ohci0 { //drvvbus-supply = <®_usb0_vbus>; status = "okay"; }; &usbc1 { device_type = "usbc1"; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "okay"; }; &ehci1 { //drvvbus-supply = <®_usb1_vbus>; status = "okay"; }; &ohci1 { //drvvbus-supply = <®_usb1_vbus>; status = "okay"; }; &usbc2 { device_type = "usbc2"; drvvbus-supply = <®_drivevbus>; aw,vbus-shared-quirk; status = "okay"; }; &xhci2 { dr_mode = "host"; status = "okay"; }; &u2phy { status = "okay"; }; &combophy { resets = <&ccu RST_BUS_PCIE_USB3>; phy_use_sel = <1>; /* 0:PCIE; 1:USB3 */ status = "okay"; }; &gpu { gpu_idle = <1>; dvfs_status = <1>; mali-supply = <®_dcdc2>; }; /*---------------------------------------------------------------------------------- disp init configuration disp_mode (0:screen0<screen0,fb0>) screenx_output_type (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo) screenx_output_mode (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50) (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60) screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420) screenx_output_bits (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit) screenx_output_eotf (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG) screenx_output_cs (for hdmi, 0:undefined 257:BT709 260:BT601 263:BT2020) screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode) screen0_output_range (for hdmi, 0:default 1:full 2:limited) screen0_output_scan (for hdmi, 0:no data 1:overscan 2:underscan) screen0_output_aspect_ratio (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9) fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444) fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA) fb0_scaler_mode_enable(scaler mode enable, used FE) fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0) lcdx_backlight (lcd init backlight,the range:[0,256],default:197 lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50) lcd0_contrast (LCD contrast, 0~100) lcd0_saturation (LCD saturation, 0~100) lcd0_hue (LCD hue, 0~100) framebuffer software rotation setting: disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y, set fbX_height to lcd_x) degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree) degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree) devX_output_type : config output type in bootGUI framework in UBOOT-2018. (0:none; 1:lcd; 2:tv; 4:hdmi;) devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018 devX_screen_id : config display index of bootGUI framework in UBOOT-2018 devX_do_hpd : whether do hpd detectation or not in UBOOT-2018 chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6 channel, 1:dual display with 4 channel in main display and 2 channel in second display, 2:dual display with 3 channel in main display and 3 channel in second in display. ----------------------------------------------------------------------------------*/ &disp { disp_init_enable = <1>; disp_mode = <0>; screen0_output_type = <1>; screen0_output_mode = <4>; screen0_to_lcd_index = <0>; screen1_output_type = <3>; screen1_output_mode = <10>; screen1_to_lcd_index = <3>; screen1_output_format = <0>; screen1_output_bits = <0>; screen1_output_eotf = <4>; screen1_output_cs = <257>; screen1_output_dvi_hdmi = <2>; screen1_output_range = <2>; screen1_output_scan = <0>; screen1_output_aspect_ratio = <8>; dev0_output_type = <1>; dev0_output_mode = <4>; dev0_screen_id = <0>; dev0_do_hpd = <0>; screen1_output_type = <6>; screen1_output_mode = <10>; dev1_screen_id = <2>; dev1_do_hpd = <1>; def_output_dev = <2>; hdmi_mode_check = <1>; display_device_num = <3>; primary_display_type = "LCD"; primary_de_id = <0>; primary_framebuffer_width = <1280>; primary_framebuffer_height = <800>; primary_dpix = <160>; primary_dpiy = <160>; extend0_display_type = "HDMI"; extend0_de_id = <1>; extend0_framebuffer_width = <1920>; extend0_framebuffer_height = <1080>; extend0_dpix = <160>; extend0_dpiy = <160>; extend1_display_type = "DP"; extend1_de_id = <1>; extend1_framebuffer_width = <1920>; extend1_framebuffer_height = <1080>; extend1_dpix = <160>; extend1_dpiy = <160>; fb_format = <0>; fb_num = <4>; /*<disp channel layer zorder>*/ fb0_map = <0 1 0 16>; fb0_width = <1920>; fb0_height = <1080>; /*<disp channel layer zorder>*/ fb1_map = <1 1 0 16>; fb1_width = <1920>; fb1_height = <1080>; /*<disp channel layer zorder>*/ fb2_map = <1 0 0 16>; fb2_width = <1920>; fb2_height = <1080>; /*<disp channel layer zorder>*/ fb3_map = <1 1 0 16>; fb3_width = <300>; fb3_height = <300>; chn_cfg_mode = <3>; disp_para_zone = <2>; //boot_disp = <0>; //boot_disp1 = <0>; //boot_disp2 = <0>; /* dual display clock constraints: 1. two tcons cannot share a parent clock. 2. when dsi uses ccu clock, combphy and corresponding tcon use the same parent clock. */ assigned-clocks = <&ccu CLK_DE>, <&ccu CLK_VO0_TCONLCD0>, <&ccu CLK_VO0_TCONLCD1>, <&ccu CLK_VO1_TCONLCD0>, <&ccu CLK_TCONTV>, <&ccu CLK_TCONTV1>, <&ccu CLK_COMBPHY0>, <&ccu CLK_COMBPHY1>, <&ccu CLK_DSI0>, <&ccu CLK_DSI1>, <&ccu CLK_EDP>; assigned-clock-parents = <&ccu CLK_PLL_VIDEO3_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_PERI0_150M>, <&ccu CLK_PLL_PERI0_150M>, <&ccu CLK_PLL_VIDEO1_4X>; assigned-clock-rates = <600000000>; cldo3-supply = <®_cldo3>; dcdc4-supply = <®_dcdc4>; cldo1-supply = <®_cldo1>; //pwms = <&a_pwm 4 5000000 0>, <&a_pwm 5 5000000 0>; pwms = <&a_pwm 10 50000 0>, <&a_pwm 5 5000000 0>; pwm-names = "lvds0_backlight", "lvds2_backlight"; power-domains = <&pd1 A523_PCK_DE>, <&pd1 A523_PCK_VO0>, <&pd1 A523_PCK_VO1>; power-domain-names = "pd_de", "pd_vo0", "pd_vo1"; pinctrl-names = "active", "sleep"; //pinctrl-0 = <&a_pwm0_pin_active>; //pinctrl-1 = <&a_pwm0_pin_sleep>; pinctrl-0 = <&a_pwm10_pin_active>; pinctrl-1 = <&a_pwm10_pin_sleep>; }; /*** ;lcd0 configuration ;lcd_if: 0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi ;lcd_hv_if 0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656 ;lcd_hv_clk_phase 0:0 degree;1:90 degree;2:180 degree;3:270 degree ;lcd_hv_sync_polarity 0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high ;lcd_hv_syuv_seq 0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY ;lcd_cpu_if 0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565) ; 6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565) ;lcd_cpu_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge; ;lcd_dsi_if 0:video mode; 1: Command mode; 2:video burst mode ;lcd_dsi_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge; ;lcd_x: lcd horizontal resolution ;lcd_y: lcd vertical resolution ;lcd_width: width of lcd in mm ;lcd_height: height of lcd in mm ;lcd_dclk_freq: in MHZ unit ;lcd_pwm_freq: in HZ unit ;lcd_pwm_pol: lcd backlight PWM polarity ;lcd_pwm_max_limit lcd backlight PWM max limit(<=255) ;lcd_hbp: hsync back porch(pixel) + hsync plus width(pixel); ;lcd_ht: hsync total cycle(pixel) ;lcd_vbp: vsync back porch(line) + vysnc plus width(line) ;lcd_vt: vysnc total cycle(line) ;lcd_hspw: hsync plus width(pixel) ;lcd_vspw: vysnc plus width(pixel) ;lcd_lvds_if: 0:single link; 1:dual link ;lcd_lvds_colordepth: 0:8bit; 1:6bit ;lcd_lvds_mode: 0:NS mode; 1:JEIDA mode ;lcd_frm: 0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither ;lcd_io_phase: 0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase; ; 8~11bit:dclk phase; 12~15bit:de phase) ;lcd_gamma_en lcd gamma correction enable ;lcd_bright_curve_en lcd bright curve correction enable ;lcd_cmap_en lcd color map function enable ;deu_mode 0:smoll lcd screen; 1:large lcd screen(larger than 10inch) ;lcdgamma4iep: Smart Backlight parameter, lcd gamma vale * 10; ; decrease it while lcd is not bright enough; increase while lcd is too bright ;smart_color 90:normal lcd screen 65:retina lcd screen(9.7inch) ;Pin setting for special function ie.LVDS, RGB data or vsync ; name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level> ;Pin setting for gpio: ; lcd_gpio_X = port:PD12<pin function><pull up or pull down><drive ability><output level> ;Pin setting for backlight enable pin ; lcd_bl_en = port:PD12<pin function><pull up or pull down><drive ability><output level> ;fsync setting, pulse to csi ;lcd_fsync_en (0:disable fsync,1:enable) ;lcd_fsync_act_time (active time of fsync, unit:pixel) ;lcd_fsync_dis_time (disactive time of fsync, unit:pixel) ;lcd_fsync_pol (0:positive;1:negative) ;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function, pull up or pull down(default 0), driver level(default 1), data> ;For dual link lvds: use lvds2link_pins_a and lvds2link_pins_b instead ;For rgb24: use rgb24_pins_a and rgb24_pins_b instead ;For lvds1: use lvds1_pins_a and lvds1_pins_b instead ;For lvds0: use lvds0_pins_a and lvds0_pins_b instead ***/ &lcd0 { lcd_used = <1>; lcd_driver_name = "default_lcd"; lcd_backlight = <200>; lcd_if = <3>; lcd_x = <1280>; lcd_y = <800>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <63>; lcd_pwm_used = <1>; lcd_pwm_ch = <10>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_pwm_name = "lvds0_backlight"; lcd_hbp = <88>; lcd_ht = <1451>; lcd_hspw = <18>; lcd_vbp = <23>; lcd_vt = <860>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <1>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_fsync_en = <0>; lcd_fsync_act_time = <1000>; lcd_fsync_dis_time = <1000>; lcd_fsync_pol = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_pin_power = "cldo3"; lcd_power = "dcdc4"; lcd_power1 = "cldo1"; //lcd_gpio_0 = <&pio PI 2 GPIO_ACTIVE_HIGH>; //reset //lcd_bl_en = <&pio PI 2 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&lvds0_pins_a>,<&dsi1_4lane_pins_a>; pinctrl-1 = <&lvds0_pins_b>,<&dsi1_4lane_pins_b>; lvds0_pinctrl-0 = <&lvds0_pins_a>; lvds0_pinctrl-1 = <&lvds0_pins_b>; lvds1_pinctrl-0 = <&lvds1_pins_a>; lvds1_pinctrl-1 = <&lvds1_pins_b>; dsi0_pinctrl-0 = <&dsi0_4lane_pins_a>; dsi0_pinctrl-1 = <&dsi0_4lane_pins_b>; dual_dsi_pinctrl-0 = <&dsi0_4lane_pins_a>, <&dsi1_4lane_pins_a>; dual_dsi_pinctrl-1 = <&dsi0_4lane_pins_b>, <&dsi1_4lane_pins_b>; dual_lvds0_pinctrl-0 = <&lvds0_pins_a>, <&lvds1_pins_a>; dual_lvds0_pinctrl-1 = <&lvds0_pins_b>, <&lvds1_pins_b>; }; #if 1 &lcd1 { lcd_used = <1>; status = "okay"; lcd_driver_name = "SQ101D_Q5DI404_84H501"; lcd_backlight = <200>; lcd_if = <4>; lcd_x = <1920>; lcd_y = <1080>; lcd_width = <136>; lcd_height = <217>; lcd_dclk_freq = <148>; lcd_pwm_used = <1>; lcd_pwm_ch = <0>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_hbp = <88>; lcd_ht = <2200>; lcd_hspw = <44>; lcd_vbp = <4>; lcd_vt = <1125>; lcd_vspw = <5>; lcd_frm = <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_dsi_if = <0>; lcd_dsi_lane = <4>; lcd_dsi_format = <0>; lcd_dsi_te = <0>; lcd_dsi_eotp = <0>; lcd_pin_power = "dcdc4"; lcd_power1 = "cldo4"; lcd_power2 = "cldo1"; lcd_gpio_2 = <&pio PD 22 GPIO_ACTIVE_HIGH>; //reset pinctrl-0 = <&dsi0_4lane_pins_a>; pinctrl-1 = <&dsi0_4lane_pins_b>; // lcd_bl_en = <&pio PH 16 GPIO_ACTIVE_HIGH>; lcd_bl_0_percent = <5>; }; #else &lcd1 { lcd_used = <1>; lcd_driver_name = "default_lcd"; lcd_backlight = <50>; lcd_if = <0>; lcd_x = <800>; lcd_y = <480>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <48>; lcd_pwm_used = <1>; lcd_pwm_ch = <7>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_hbp = <55>; lcd_ht = <1240>; lcd_hspw = <20>; lcd_vbp = <35>; lcd_vt = <650>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <1>; lcd_lvds_mode = <0>; lcd_frm = <1>; lcd_io_phase = <0x0000>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; }; #endif &lcd2 { lcd_used = <1>; lcd_driver_name = "bp101wx1"; lcd_backlight = <50>; lcd_if = <3>; lcd_x = <1280>; lcd_y = <800>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <75>; lcd_pwm_used = <1>; lcd_pwm_ch = <5>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_pwm_name = "lvds2_backlight"; lcd_hbp = <88>; lcd_ht = <1451>; lcd_hspw = <18>; lcd_vbp = <23>; lcd_vt = <860>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <0>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_fsync_en = <0>; lcd_fsync_pol = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_pin_power = "cldo3"; lcd_power = "dcdc4"; /* lvds_power & other interface power */ lcd_bl_en = <&pio PI 5 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&lvds2_pins_a>; pinctrl-1 = <&lvds2_pins_b>; lvds2_pinctrl-0 = <&lvds2_pins_a>; lvds2_pinctrl-1 = <&lvds2_pins_b>; lvds3_pinctrl-0 = <&lvds3_pins_a>; lvds3_pinctrl-1 = <&lvds3_pins_b>; dual_lvds1_pinctrl-0 = <&lvds2_pins_a>, <&lvds3_pins_a>; dual_lvds1_pinctrl-1 = <&lvds2_pins_b>, <&lvds3_pins_b>; status = "disabled"; }; &edp0 { compatible = "allwinner,sunxi-dp0"; // use if hardware reset pin is need /* edp_hw_reset_pin = <&pio PH XX GPIO_ACTIVE_LOW>; */ edp_ssc_en = <0>; edp_ssc_mode = <0>; edp_psr_support = <0>; edp_colordepth = <8>; /* 6/8/10/12/16 */ edp_color_fmt = <0>; /* 0:RGB 1: YUV444 2: YUV422 */ edp_lane_rate = <1>; edp_lane_cnt = <4>; lane0_sw = <0>; lane0_pre = <0>; lane1_sw = <0>; lane1_pre = <0>; lane2_sw = <0>; lane2_pre = <0>; lane3_sw = <0>; lane3_pre = <0>; efficient_training = <0>; sink_capacity_prefer = <0>; edid_timings_prefer = <1>; timings_fixed = <0>; edp_traning_param_type = <1>; edp_timings_type = <0>; edp_panel_used = <0>; /* edp_panel_used = <1>; edp_panel_driver = "general_panel"; edp_bl_en = <&pio PI 5 GPIO_ACTIVE_HIGH>; edp_pwm_used = <1>; edp_pwm_ch = <5>; edp_pwm_freq = <50000>; edp_pwm_pol = <0>; edp_default_backlight = <200>; edp_panel_power_0 = "edp-panel"; */ /* edp_x = <1280>; edp_y = <800>; edp_width = <150>; edp_height = <94>; edp_dclk_freq = <75>; edp_hbp = <88>; edp_ht = <1451>; edp_hspw = <18>; edp_vbp = <23>; edp_vt = <860>; edp_vspw = <10>; edp_fps = <30>; */ vcc-edp-supply = <®_bldo3>; vdd-edp-supply = <®_dcdc2>; edp-panel-supply = <®_dcdc4>; status = "okay"; }; &ve { ve-supply = <®_dcdc2>; }; /* audio dirver module -> audio codec */ &codec { tx-hub-en; rx-sync-en; dac-vol = <63>; /* default value:63 range:0->63 */ dacl-vol = <160>; /* default value:160 range:0->255 */ dacr-vol = <160>; /* default value:160 range:0->255 */ adc1-vol = <160>; /* default value:160 range:0->255 */ adc2-vol = <160>; /* default value:160 range:0->255 */ adc3-vol = <160>; /* default value:160 range:0->255 */ lineout-gain = <31>; /* default value:31 range:0->31 */ hpout-gain = <7>; /* default value:7 range:0->7 */ adc1-gain = <31>; /* default value:31 range:0->31 */ adc2-gain = <31>; /* default value:31 range:0->31 */ adc3-gain = <31>; /* default value:31 range:0->31 */ /* to do: avcc-1.8 vdd33-3.3 cpvin-1.8 */ avcc-external; avcc-supply = <®_aldo4>; avcc-vol = <1800000>; vdd-external; vdd-supply = <®_cldo3>; vdd-vol = <3300000>; cpvin-external; cpvin-supply = <®_bldo3>; cpvin-vol = <1800000>; //pa-pin-max = <1>; //pa-pin-0 = <&r_pio PL 7 GPIO_ACTIVE_HIGH>; //pa-pin-level-0 = <1>; //pa-pin-msleep-0 = <0>; jack-det-level = <0>; jack-det-threshold = <8>; jack-det-debouce-time = <250>; /* extcon = <&usb_power_supply>; * jack-swpin-mic-sel = <&pio PH 8 GPIO_ACTIVE_HIGH>; * jack-swpin-hp-en = <&pio PH 15 GPIO_ACTIVE_HIGH>; * jack-swpin-hp-sel = <&pio PH 11 GPIO_ACTIVE_HIGH>; * jack-swmode-hp-off = <0x00>; * jack-swmode-hp-usb = <0x11>; * jack-swmode-hp-audio = <0x10>; * jack-det-level = <1>; * jack-det-threshold = <8>; * jack-det-debouce-time = <250>; */ status = "okay"; }; &codec_plat { status = "okay"; }; &codec_mach { soundcard-mach,jack-support = <1>; status = "okay"; soundcard-mach,cpu { sound-dai = <&codec_plat>; }; soundcard-mach,codec { sound-dai = <&codec>; }; }; &hdmi_codec { extcon = <&hdmi>; status = "okay"; }; &edp_codec { status = "disabled"; }; /* audio dirver module -> owa */ &owa_plat { rglt-max = <1>; rglt0-mode = "PMU"; rglt0-voltage = <3300000>; rglt0-supply = <®_dcdc4>; pinctrl-used; pinctrl-names = "default","sleep"; pinctrl-0 = <&owa_pins_a>; pinctrl-1 = <&owa_pins_b>; tx-hub-en; status = "okay"; }; &owa_mach { status = "okay"; soundcard-mach,cpu { sound-dai = <&owa_plat>; }; soundcard-mach,codec { }; }; /* audio dirver module -> DMIC */ &dmic_plat { rx-chmap = <0x76543210>; data-vol = <0xB0>; rxdelaytime = <0>; /* pinctrl-used; */ /* pinctrl-names = "default","sleep"; */ /* pinctrl-0 = <&dmic_pins_a>; */ /* pinctrl-1 = <&dmic_pins_b>; */ rx-sync-en; status = "disabled"; }; &dmic_mach { status = "disabled"; soundcard-mach,cpu { sound-dai = <&dmic_plat>; }; soundcard-mach,codec { }; }; /* audio dirver module -> I2S/PCM */ &i2s0_plat { tdm-num = <0>; tx-pin = <0>; rx-pin = <0>; pinctrl-used; pinctrl-names = "default","sleep"; pinctrl-0 = <&i2s0_pins_a>; pinctrl-1 = <&i2s0_pins_b>; tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s0_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s0_cpu>; soundcard-mach,bitclock-master = <&i2s0_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; soundcard-mach,capture-only; status = "disabled"; i2s0_cpu: soundcard-mach,cpu { sound-dai = <&i2s0_plat>; /* note: pll freq = 24.576M or 22.5792M * pll-fs */ soundcard-mach,pll-fs = <1>; /* note: * mclk freq = mclk-fs * 12.288M or 11.2896M (when mclk-fp ture) * mclk freq = mclk-fs * pcm rate (when mclk-fp false) */ soundcard-mach,mclk-fp; soundcard-mach,mclk-fs = <1>; }; i2s0_codec: soundcard-mach,codec { sound-dai = <&ac107>; soundcard-mach,pll-fs = <1>; }; }; &i2s1_plat { tdm-num = <1>; tx-pin = <0>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s1_pins_a>; */ /* pinctrl-1 = <&i2s1_pins_b>; */ tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s1_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s1_cpu>; soundcard-mach,bitclock-master = <&i2s1_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; i2s1_cpu: soundcard-mach,cpu { sound-dai = <&i2s1_plat>; soundcard-mach,pll-fs = <1>; soundcard-mach,mclk-fs = <0>; }; i2s1_codec: soundcard-mach,codec { }; }; &i2s2_plat { tdm-num = <2>; tx-pin = <0 1 2 3>; /* e.g. * tx-pin0-map0 = <0xFEDC3210> -> tx_pin_map[0][0] (Dout0-slot[7:0] map channel[15:12, 3:0]) * tx-pin0-map1 = <0x3210FEDC> -> tx_pin_map[0][1] (Dout0-slot[15:8] map channel[3:0, 15:12]) * tx-pin1-map0 = <0x76543210> -> tx_pin_map[1][0] (Dout1-slot[7:0] map channel[7:0]) */ tx-pin0-map0 = <0x76543210>; tx-pin0-map1 = <0xFEDCBA98>; tx-pin1-map0 = <0x76543210>; tx-pin1-map1 = <0xFEDCBA98>; tx-pin2-map0 = <0x76543210>; tx-pin2-map1 = <0xFEDCBA98>; tx-pin3-map0 = <0x76543210>; tx-pin3-map1 = <0xFEDCBA98>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s2_pins_a>; */ /* pinctrl-1 = <&i2s2_pins_b>; */ tx-hub-en; rx-sync-en; /* edp not need dai-type */ dai-type = "hdmi"; status = "okay"; }; &i2s2_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s2_cpu>; soundcard-mach,bitclock-master = <&i2s2_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; soundcard-mach,playback-only; status = "okay"; i2s2_cpu: soundcard-mach,cpu { sound-dai = <&i2s2_plat>; soundcard-mach,pll-fs = <1>; /* edp mclk: 512fs */ soundcard-mach,mclk-fs = <0>; }; i2s2_codec: soundcard-mach,codec { sound-dai = <&hdmi_codec>; }; }; &i2s3_plat { tdm-num = <3>; tx-pin = <0>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s3_pins_a>; */ /* pinctrl-1 = <&i2s3_pins_b>; */ tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s3_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s3_cpu>; soundcard-mach,bitclock-master = <&i2s3_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; i2s3_cpu: soundcard-mach,cpu { sound-dai = <&i2s3_plat>; soundcard-mach,pll-fs = <1>; soundcard-mach,mclk-fs = <0>; }; i2s3_codec: soundcard-mach,codec { }; }; &hdmi { hdmi_used = <1>; bldo3-supply = <®_bldo3>; hdmi_power0 = "bldo3"; hdmi_power_cnt = <1>; hdmi_hdcp_enable = <1>; hdmi_hdcp22_enable = <0>; hdmi_cts_compatibility = <0>; hdmi_cec_support = <1>; hdmi_cec_super_standby = <1>; hdmi_skip_bootedid = <1>; ddc_en_io_ctrl = <0>; power_io_ctrl = <0>; }; &cpu0 { cpu-supply = <®_dcdc1>; }; &dsufreq { dsu-supply = <®_dcdc1>; }; &mdio0 { status = "okay"; gmac0_phy0: ethernet-phy@5 { reg = <0x5>; max-speed = <1000>; /* PHY datasheet rst time */ reset-assert-us = <10000>; reset-deassert-us = <150000>; }; }; &gmac0 { phy-mode = "rgmii"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&gmac0_pins_default>; pinctrl-1 = <&gmac0_pins_sleep>; sunxi,phy-clk-type = <0>; tx-delay = <0>; rx-delay = <0>; phy-handle = <&gmac0_phy0>; gmac3v3-supply = <®_dcdc4>; status = "okay"; }; &gmac1 { phy-mode = "rgmii"; phy-handle = <&gmac1_phy0>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&gmac1_pins_default>; pinctrl-1 = <&gmac1_pins_sleep>; aw,soc-phy25m; tx-delay = <0>; rx-delay = <0>; snps,reset-gpios = <&pio PJ 17 GPIO_ACTIVE_LOW>; snps,phy-addr = <0x6>; dwmac3v3-supply = <®_dcdc4>; status = "okay"; mdio1: mdio1@1 { snps,reset-gpios = <&pio PJ 17 GPIO_ACTIVE_LOW>; gmac1_phy0: ethernet-phy@6 { snps,reset-gpios = <&pio PJ 17 GPIO_ACTIVE_LOW>; reg = <0x6>; max-speed = <1000>; /* PHY datasheet rst time */ reset-assert-us = <10000>; reset-deassert-us = <150000>; }; }; }; &npu { npu-supply = <®_ext_axp1530_dcdc3>; npu_vol = <1050000>; clock-frequency = <696000000>; status = "okay"; }; &dram { dram_para00 = <0x00000000>; dram_para01 = <0x00000000>; dram_para02 = <0x00000000>; dram_para03 = <0x00000000>; dram_para04 = <0x00000000>; dram_para05 = <0x00000000>; dram_para06 = <0x00000000>; dram_para07 = <0x00000000>; dram_para08 = <0x00000000>; dram_para09 = <0x00000000>; dram_para10 = <0x00000000>; dram_para11 = <0x00000000>; dram_para12 = <0x00000000>; dram_para13 = <0x00000000>; dram_para14 = <0x00000000>; dram_para15 = <0x00000000>; dram_para16 = <0x00000000>; dram_para17 = <0x00000000>; dram_para18 = <0x00000000>; dram_para19 = <0x00000000>; dram_para20 = <0x00000000>; dram_para21 = <0x00000000>; dram_para22 = <0x00000000>; dram_para23 = <0x00000000>; dram_para24 = <0x00000000>; dram_para25 = <0x00000000>; dram_para26 = <0x00000000>; dram_para27 = <0x00000000>; dram_para28 = <0x00000000>; dram_para29 = <0x00000000>; dram_para30 = <0x00000000>; dram_para31 = <0x00000000>; dram_para32 = <0x00000000>; dram_para33 = <0x00000000>; dram_para34 = <0x00000000>; dram_para35 = <0x00000000>; dram_para36 = <0x00000000>; dram_para37 = <0x00000000>; dram_para38 = <0x00000000>; dram_para39 = <0x00000000>; dram_para40 = <0x00000000>; dram_para41 = <0x00000000>; dram_para42 = <0x00000000>; dram_para43 = <0x00000000>; dram_para44 = <0x00000000>; dram_para45 = <0x00000000>; dram_para46 = <0x00000000>; dram_para47 = <0x00000000>; dram_para48 = <0x00000000>; dram_para49 = <0x00000000>; dram_para50 = <0x00000000>; dram_para51 = <0x00000000>; dram_para52 = <0x00000000>; dram_para53 = <0x00000000>; dram_para54 = <0x00000000>; dram_para55 = <0x00000000>; dram_para56 = <0x00000000>; dram_para57 = <0x00000000>; dram_para58 = <0x00000000>; dram_para59 = <0x00000000>; dram_para60 = <0x00000000>; dram_para61 = <0x00000000>; dram_para62 = <0x00000000>; dram_para63 = <0x00000000>; dram_para64 = <0x00000000>; dram_para65 = <0x00000000>; dram_para66 = <0x00000000>; dram_para67 = <0x00000000>; dram_para68 = <0x00000000>; dram_para69 = <0x00000000>; dram_para70 = <0x00000000>; dram_para71 = <0x00000000>; dram_para72 = <0x00000000>; dram_para73 = <0x00000000>; dram_para74 = <0x00000000>; dram_para75 = <0x00000000>; dram_para76 = <0x00000000>; dram_para77 = <0x00000000>; dram_para78 = <0x00000000>; dram_para79 = <0x00000000>; dram_para80 = <0x00000000>; dram_para81 = <0x00000000>; dram_para82 = <0x00000000>; dram_para83 = <0x00000000>; dram_para84 = <0x00000000>; dram_para85 = <0x00000000>; dram_para86 = <0x00000000>; dram_para87 = <0x00000000>; dram_para88 = <0x00000000>; dram_para89 = <0x00000000>; dram_para90 = <0x00000000>; dram_para91 = <0x00000000>; dram_para92 = <0x00000000>; dram_para93 = <0x00000000>; dram_para94 = <0x00000000>; dram_para95 = <0x00000000>; };
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回复: T113-i SD DMA 传输不工作发布在 创龙科技专区
SyterKit 实现了 SMHC DMA访问，可以参考
https://github.com/YuzukiHD/SyterKit/blob/main/src/drivers/sun8iw20/sys-sdhci.c
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回复: pack 报错发布在 MR Series
@cwj1986521 在 pack 报错 中说：
/home/jay/linux/allwinner/Tina-Linux-20220815/Tina-Linux/lichee/linux-6.6/scripts/dtc/dtc:
你的环境里有 Linux 6.6 的dtc，版本更新了导致不认识 -F 参数
这个是自己魔改的tina吗
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TinyVision V851se 使用 SyterKit 启动 Linux 6.7 主线内核发布在 V Series
原文：https://www.gloomyghost.com/live/20231216.aspx
SyterKit
SyterKit 是一个纯裸机框架，用于 TinyVision 或者其他 v851se/v851s/v851s3/v853 等芯片的开发板，SyterKit 使用 CMake 作为构建系统构建，支持多种应用与多种外设驱动。同时 SyterKit 也具有启动引导的功能，可以替代 U-Boot 实现快速启动
获取 SyterKit 源码
SyterKit 源码位于GitHub，可以前往下载。
git clone https://github.com/YuzukiHD/SyterKit.git从零构建 SyterKit
构建 SyterKit 非常简单，只需要在 Linux 操作系统中安装配置环境即可编译。SyterKit 需要的软件包有：
gcc-arm-none-eabiCMake
对于常用的 Ubuntu 系统，可以通过如下命令安装
sudo apt-get update sudo apt-get install gcc-arm-none-eabi cmake build-essential -y然后新建一个文件夹存放编译的输出文件，并且进入这个文件夹
mkdir build cd build然后运行命令编译 SyterKit
cmake .. make
编译后的可执行文件位于
build/app中，这里包括 SyterKit 的多种APP可供使用。
这里我们使用的是
syter_boot作为启动引导。进入 syter_boot 文件夹，可以看到这些文件
由于 TinyVision 是 TF 卡启动，所以我们需要用到
syter_boot_bin_card.bin
移植 Linux 6.7 主线
有了启动引导，接下来是移植 Linux 6.7 主线，前往 https://kernel.org/ 找到 Linux 6.7，选择
tarball下载
下载后解压缩
tar xvf linux-6.7-rc5.tar.gz进入 linux 6.7 目录，开始移植相关驱动。
搭建 Kernel 相关环境
Kernel 编译需要一些软件包，需要提前安装。
sudo apt-get update && sudo apt-get install -y gcc-arm-none-eabi gcc-arm-linux-gnueabihf g++-arm-linux-gnueabihf build-essential libncurses5-dev zlib1g-dev gawk flex bison quilt libssl-dev xsltproc libxml-parser-perl mercurial bzr ecj cvs unzip lsof安装完成后可以尝试编译一下，看看能不能编译通过，先应用配置文件
CROSS_COMPILE=arm-linux-gnueabihf- make ARCH=arm sunxi_defconfig
然后尝试编译
CROSS_COMPILE=arm-linux-gnueabihf- make ARCH=arm可以用
-j32来加速编译，32指的是使用32线程编译，一般cpu有几个核心就设置几线程CROSS_COMPILE=arm-linux-gnueabihf- make ARCH=arm -j32正常编译
移植 clk 驱动
这里提供已经适配修改后的驱动：https://github.com/YuzukiHD/TinyVision/tree/main/kernel/linux-6.7-driver 可以直接使用。
也可以参考 https://github.com/YuzukiHD/TinyVision/tree/main/kernel/bsp/drivers/clk 中的驱动移植。
进入文件夹
include/dt-bindings/clock/新建文件sun8i-v851se-ccu.h，将 CLK 填入
进入
include/dt-bindings/reset新建文件sun8i-v851se-ccu.h将 RST 填入
进入
drivers/clk/sunxi-ng找到sunxi-ngclk 驱动，复制文件ccu-sun20i-d1.c和ccu-sun20i-d1.h文件并改名为ccu-sun8i-v851se.c，ccu-sun8i-v851se.h作为模板。
将文件中的
SUN20I_D1改为SUN8I_V851SE
打开芯片数据手册V851SX_Datasheet_V1.2.pdf，找到 CCU 章节
对照手册编写驱动文件适配 V851se 平台。
然后找到
drivers/clk/sunxi-ng/Kconfig文件，增加刚才编写的驱动的 Kconfig 说明
config SUN8I_V851SE_CCU tristate "Support for the Allwinner V851se CCU" default y depends on MACH_SUN8I || COMPILE_TEST同时打开
drivers/clk/sunxi-ng/Makefile
obj-$(CONFIG_SUN8I_V851SE_CCU) += sun8i-v851se-ccu.o sun8i-v851se-ccu-y += ccu-sun8i-v851se.o来检查一下是否移植成功，先查看
menuconfig，找到Device Drivers > Common Clock Framework，查看是否有 V851se 平台选项出现CROSS_COMPILE=arm-linux-gnueabihf- make ARCH=arm menuconfig
编译测试，有几处未使用的变量的警告，无视即可。
CROSS_COMPILE=arm-linux-gnueabihf- make ARCH=arm
正常编译成功
移植 pinctrl 驱动
这里提供已经适配修改后的驱动：https://github.com/YuzukiHD/TinyVision/tree/main/kernel/linux-6.7-driver 可以直接使用。
前往
drivers/pinctrl/sunxi/新建文件pinctrl-sun8i-v851se.c
打开 V851SE_PINOUT_V1.0.xlsx 对照填入PIN的值与功能。
同样的，修改
drivers/pinctrl/sunxi/Kconfig增加选项
修改
drivers/pinctrl/sunxi/Makefile增加路径
来检查一下是否移植成功，先查看
menuconfig，找到> Device Drivers > Pin controllers，查看是否有 V851se 平台选项出现CROSS_COMPILE=arm-linux-gnueabihf- make ARCH=arm menuconfig
编译测试，编译通过
CROSS_COMPILE=arm-linux-gnueabihf- make ARCH=arm
编写设备树
这里提供已经适配修改后的驱动：https://github.com/YuzukiHD/TinyVision/tree/main/kernel/linux-6.7-driver/dts 可以直接使用。
这部分直接给结果了，把上面适配的设备树放到
/home/yuzuki/WorkSpace/aa/linux-6.7-rc5/arch/arm/boot/dts/allwinner/，修改/home/yuzuki/WorkSpace/aa/linux-6.7-rc5/arch/arm/boot/dts/allwinner/Makefile
sun8i-v851se-tinyvision.dtb
生成刷机镜像
编译内核后，可以在文件夹
arch/arm/boot/dts/allwinner生成sun8i-v851se-tinyvision.dtb，在文件夹arch/arm/boot生成zImage，把他们拷贝出来。
然后将
sun8i-v851se-tinyvision.dtb改名为sunxi.dtb，这个设备树名称是定义在 SyterKit 源码中的，如果之前修改了 SyterKit 的源码需要修改到对应的名称，SyterKit 会去读取这个设备树。然后编写一个
config.txt作为配置文件[configs] bootargs=cma=4M root=/dev/mmcblk0p2 init=/sbin/init console=ttyS0,115200 earlyprintk=sunxi-uart,0x02500000 rootwait clk_ignore_unused mac_addr=4a:13:e4:f9:79:75 bootdelay=3安装 genimage
这里我们使用 genimage 作为打包工具
sudo apt-get install libconfuse-dev #安装genimage依赖库 sudo apt-get install genext2fs # 制作镜像时genimage将会用到 git clone https://github.com/pengutronix/genimage.git cd genimage ./autogen.sh # 配置生成configure ./configure # 配置生成makefile make sudo make install编译后运行试一试，这里正常
使用 genimage 打包固件
编写 genimage.cfg 作为打包的配置
image boot.vfat { vfat { files = { "zImage", "sunxi.dtb", "config.txt" } } size = 8M } image sdcard.img { hdimage {} partition boot0 { in-partition-table = "no" image = "syter_boot_bin_card.bin" offset = 8K } partition boot0-gpt { in-partition-table = "no" image = "syter_boot_bin_card.bin" offset = 128K } partition kernel { partition-type = 0xC bootable = "true" image = "boot.vfat" } }由于genimage的脚本比较复杂，所以编写一个
genimage.sh作为简易使用的工具#!/usr/bin/env bash die() { cat <<EOF >&2 Error: $@ Usage: ${0} -c GENIMAGE_CONFIG_FILE EOF exit 1 } # Parse arguments and put into argument list of the script opts="$(getopt -n "${0##*/}" -o c: -- "$@")" || exit $? eval set -- "$opts" GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp" while true ; do case "$1" in -c) GENIMAGE_CFG="${2}"; shift 2 ;; --) # Discard all non-option parameters shift 1; break ;; *) die "unknown option '${1}'" ;; esac done [ -n "${GENIMAGE_CFG}" ] || die "Missing argument" # Pass an empty rootpath. genimage makes a full copy of the given rootpath to # ${GENIMAGE_TMP}/root so passing TARGET_DIR would be a waste of time and disk # space. We don't rely on genimage to build the rootfs image, just to insert a # pre-built one in the disk image. trap 'rm -rf "${ROOTPATH_TMP}"' EXIT ROOTPATH_TMP="$(mktemp -d)" GENIMAGE_TMP="$(mktemp -d)" rm -rf "${GENIMAGE_TMP}" genimage \ --rootpath "${ROOTPATH_TMP}" \ --tmppath "${GENIMAGE_TMP}" \ --inputpath "${BINARIES_DIR}" \ --outputpath "${BINARIES_DIR}" \ --config "${GENIMAGE_CFG}"准备完成，文件如下所示
运行命令进行打包
chmod 777 genimage.sh ./genimage.sh -c genimage.cfg
打包完成，可以找到
sdcard.img使用软件烧录固件到TF卡上
测试
插卡，上电，成功启动系统
可以看到 Linux 版本是 6.7.0
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回复: V851S tina linux ov5647 驱动程序没有 dmesg发布在 V Series
@kanken6174 我之前尝试移植过，可以使用这个帖子中的驱动测试
Porject Yosemite - 基于全志V853的开发板
https://bbs.aw-ol.com/topic/1389/share/41
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回复: T113/D1-H （MQ-Pro）驱动 OV5640 摄像头（内含驱动源码）发布在 T Series
@lansecd 段错误位于_device_attach_driver，iic调用，查看配置文件是否配置iic as cci，查看iic是否扫卡，iic配置是否正常，这个报错与vin无关。另外SDK请问使用的是哪一个，mangopi开源的那个版本测试vin驱动不能用，所以我才单独打了一个包，考虑iic驱动也有类似的问题
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T113/D1-H （MQ-Pro）驱动 OV5640 摄像头（内含驱动源码）发布在 T Series
内核配置
运行
m kernel_menuconfig勾选下列驱动Device Drivers ---> <*> Multimedia support ---> [*] V4L platform devices ---> <*> Video Multiplexer [*] SUNXI platform devices ---> <*> sunxi video input (camera csi/mipi isp vipp)driver <M> v4l2 new driver for SUNXI <*> use cci function select cci or cci to twi (chenge cci to twi) ---> [*] use IOMMU for memery alloc [*] ISP WDR module [*] sensor same i2c addr sensor driver select ---> <M> use ov5640 driver [*] Memory-to-memory multimedia devices ---> <*> Deinterlace support <*> SuperH VEU mem2mem video processing driver设备树配置
路径：
lichee/linux-5.4/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsivind0: vind@5800800 { compatible = "allwinner,sunxi-vin-media", "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; device_id = <0>; csi_top = <336000000>; csi_isp = <327000000>; reg = <0x0 0x05800800 0x0 0x200>, <0x0 0x05800000 0x0 0x800>; clocks = <&ccu CLK_CSI_TOP>, <&ccu CLK_PLL_VIDEO1_2X>, <&ccu CLK_CSI0_MCLK>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO1>, <&ccu CLK_BUS_CSI>, <&ccu CLK_MBUS_CSI>; clock-names = "csi_top", "csi_top_src", "csi_mclk0", "csi_mclk0_24m", "csi_mclk0_pll", "csi_bus", "csi_mbus"; resets = <&ccu RST_BUS_CSI>; reset-names = "csi_ret"; pinctrl-names = "mclk0-default", "mclk0-sleep"; pinctrl-0 = <&csi_mclk0_pins_a>; pinctrl-1 = <&csi_mclk0_pins_b>; status = "okay"; csi0: csi@5801000{ compatible = "allwinner,sunxi-csi"; reg = <0x0 0x05801000 0x0 0x1000>; interrupts-extended = <&plic0 116 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default","sleep"; pinctrl-0 = <&csi0_pins_a>; pinctrl-1 = <&csi0_pins_b>; device_id = <0>; iommus = <&mmu_aw 1 1>; status = "okay"; }; isp0: isp@5809410 { compatible = "allwinner,sunxi-isp"; reg = <0x0 0x05809410 0x0 0x10>; device_id = <0xfe>; status = "okay"; }; isp1: isp@5809420 { compatible = "allwinner,sunxi-isp"; reg = <0x0 0x05809420 0x0 0x10>; device_id = <0xff>; status = "okay"; }; scaler0: scaler@5809430 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x05809430 0x0 0x10>; device_id = <0xfe>; status = "okay"; }; scaler1: scaler@5809440 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x05809440 0x0 0x10>; device_id = <0xff>; status = "okay"; }; actuator0: actuator@5809450 { compatible = "allwinner,sunxi-actuator"; device_type = "actuator0"; reg = <0x0 0x05809450 0x0 0x10>; actuator0_name = "ad5820_act"; actuator0_slave = <0x18>; actuator0_af_pwdn = <>; actuator0_afvdd = "afvcc-csi"; actuator0_afvdd_vol = <2800000>; status = "okay"; }; flash0: flash@5809460 { device_type = "flash0"; compatible = "allwinner,sunxi-flash"; reg = <0x0 0x05809460 0x0 0x10>; flash0_type = <2>; flash0_en = <>; flash0_mode = <>; flash0_flvdd = ""; flash0_flvdd_vol = <>; device_id = <0>; status = "okay"; }; sensor0: sensor@5809470 { reg = <0x0 0x05809470 0x0 0x10>; device_type = "sensor0"; compatible = "allwinner,sunxi-sensor"; sensor0_mname = "ov5640"; sensor0_twi_cci_id = <2>; sensor0_twi_addr = <0x78>; sensor0_mclk_id = <0>; sensor0_pos = "rear"; sensor0_isp_used = <0>; sensor0_fmt = <0>; sensor0_stby_mode = <0>; sensor0_vflip = <0>; sensor0_hflip = <0>; sensor0_iovdd-supply = <>; sensor0_iovdd_vol = <>; sensor0_avdd-supply = <>; sensor0_avdd_vol = <>; sensor0_dvdd-supply = <>; sensor0_dvdd_vol = <>; sensor0_power_en = <>; sensor0_reset = <&pio PE 14 GPIO_ACTIVE_LOW>; sensor0_pwdn = <&pio PE 15 GPIO_ACTIVE_LOW>; sensor0_sm_vs = <>; flash_handle = <&flash0>; act_handle = <&actuator0>; device_id = <0>; status = "okay"; }; sensor1: sensor@5809480 { reg = <0x0 0x05809480 0x0 0x10>; device_type = "sensor1"; compatible = "allwinner,sunxi-sensor"; sensor1_mname = "ov5647"; sensor1_twi_cci_id = <3>; sensor1_twi_addr = <0x6c>; sensor1_mclk_id = <1>; sensor1_pos = "front"; sensor1_isp_used = <0>; sensor1_fmt = <0>; sensor1_stby_mode = <0>; sensor1_vflip = <0>; sensor1_hflip = <0>; sensor1_iovdd-supply = <>; sensor1_iovdd_vol = <>; sensor1_avdd-supply = <>; sensor1_avdd_vol = <>; sensor1_dvdd-supply = <>; sensor1_dvdd_vol = <>; sensor1_power_en = <>; sensor1_reset = <&pio PE 7 GPIO_ACTIVE_LOW>; sensor1_pwdn = <&pio PE 6 GPIO_ACTIVE_LOW>; sensor1_sm_vs = <>; flash_handle = <>; act_handle = <>; device_id = <1>; status = "disabled"; }; vinc0: vinc@5809000 { compatible = "allwinner,sunxi-vin-core"; device_type = "vinc0"; reg = <0x0 0x05809000 0x0 0x200>; interrupts-extended = <&plic0 111 IRQ_TYPE_LEVEL_HIGH>; vinc0_csi_sel = <0>; vinc0_mipi_sel = <0xff>; vinc0_isp_sel = <0>; vinc0_tdm_rx_sel = <0xff>; vinc0_rear_sensor_sel = <0>; vinc0_front_sensor_sel = <0>; vinc0_sensor_list = <0>; device_id = <0>; iommus = <&mmu_aw 1 1>; status = "okay"; }; vinc1: vinc@5809200 { device_type = "vinc1"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x05809200 0x0 0x200>; interrupts-extended = <&plic0 112 IRQ_TYPE_LEVEL_HIGH>; vinc1_csi_sel = <0>; vinc1_mipi_sel = <0xff>; vinc1_isp_sel = <1>; vinc1_tdm_rx_sel = <0xff>; vinc1_rear_sensor_sel = <0>; vinc1_front_sensor_sel = <0>; vinc1_sensor_list = <0>; device_id = <1>; iommus = <&mmu_aw 1 1>; status = "disabled"; }; };
ROOTFS 配置
运行
m menuconfig，勾选<*> kmod-sunxi-vin......................................... sunxi-vin support
常见错误
[VIN_ERR]media_entity_find_link null
驱动版本不匹配所致，目前SDK分支过多驱动版本过多，用下列驱动替换即可：
sunxi-vin.tar.gz解压，覆盖到
tina-d1-h/lichee/linux-5.4/drivers/media/platform/sunxi-vin文件夹测试固件
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R128 IO 翻转测试发布在 A Series
hal_gpio_set_pull(GPIOA(18), GPIO_PULL_UP); hal_gpio_set_direction(GPIOA(18), GPIO_DIRECTION_OUTPUT); hal_gpio_pinmux_set_function(GPIOA(18), GPIO_MUXSEL_OUT); while (1) { hal_gpio_set_data(GPIOA(18), GPIO_DATA_LOW); hal_gpio_set_data(GPIOA(18), GPIO_DATA_HIGH); }粗略测试一下 R128 的 IO 翻转性能，1.61MHz，另外考虑 RTOS 存在调度
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编译 Android 13 SDK 出现 'libelf.h' file not found 应该怎么配置发布在 H/F/TV Series
编译 Android 13 SDK 出现 'libelf.h' file not found
main.c:55:10: fatal error: 'libelf.h' file not found #include <libelf.h> ^~~~~~~~~~ 1 error generated.
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回复: 适配 Yuzuki Chameleon 上的 XR829 主线 Wi-Fi 驱动发布在 H/F/TV Series
搭建 armbian 的编译环境
sudo apt install -y ccache debian-archive-keyring debootstrap device-tree-compiler dwarves sudo apt install -y gcc-arm-linux-gnueabihf jq libbison-dev libc6-dev-armhf-cross sudo apt install -y libelf-dev libfl-dev liblz4-tool libpython2.7-dev libusb-1.0-0-dev sudo apt install -y pigz pixz pv swig pkg-config python3-distutils qemu-user-static u-boot-tools sudo apt install -y distcc uuid-dev lib32ncurses-dev lib32stdc++6 apt-cacher-ng sudo apt install -y aptly aria2 libfdt-dev libssl-dev
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回复: 适配 Yuzuki Chameleon 上的 XR829 主线 Wi-Fi 驱动发布在 H/F/TV Series
下载驱动，放到指定位置，修改Kconfig和Makefile
进Kernel选择驱动
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适配 Yuzuki Chameleon 上的 XR829 主线 Wi-Fi 驱动发布在 H/F/TV Series
最近放假，有时间折腾一下之前的老坑。
先上移植好的驱动：https://github.com/YuzukiHD/Xradio-XR829/tree/5.15
这里使用的是armbian配套的 u-boot v2021.10，kernel v5.16.17
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回复: 深入开箱跑分全志A523平板电脑 台电P26T发布在 其它全志芯片讨论区
原神：全低画质 15~40 帧
Applications Graphics Acceleration Info: Uptime: 13155175 Realtime: 13155175 ** Graphics info for pid 18983 [com.miHoYo.Yuanshen] ** Stats since: 6718860763285ns Total frames rendered: 104 Janky frames: 28 (26.92%) Janky frames (legacy): 23 (22.12%) 50th percentile: 9ms 90th percentile: 25ms 95th percentile: 44ms 99th percentile: 150ms Number Missed Vsync: 4 Number High input latency: 22 Number Slow UI thread: 5 Number Slow bitmap uploads: 0 Number Slow issue draw commands: 25 Number Frame deadline missed: 28 Number Frame deadline missed (legacy): 8 HISTOGRAM: 5ms=11 6ms=15 7ms=19 8ms=6 9ms=6 10ms=4 11ms=10 12ms=2 13ms=1 14ms=1 15ms=0 16ms=1 17ms=1 18ms=0 19ms=0 20ms=0 21ms=1 22ms=4 23ms=6 24ms=5 25ms=2 26ms=1 27ms=2 28ms=0 29ms=0 30ms=0 31ms=0 32ms=0 34ms=0 36ms=0 38ms=0 40ms=0 42ms=0 44ms=1 46ms=0 48ms=1 53ms=1 57ms=0 61ms=0 65ms=1 69ms=0 73ms=0 77ms=0 81ms=0 85ms=0 89ms=0 93ms=0 97ms=0 101ms=0 105ms=0 109ms=0 113ms=0 117ms=0 121ms=0 125ms=0 129ms=0 133ms=0 150ms=2 200ms=0 250ms=0 300ms=0 350ms=0 400ms=0 450ms=0 500ms=0 550ms=0 600ms=0 650ms=0 700ms=0 750ms=0 800ms=0 850ms=0 900ms=0 950ms=0 1000ms=0 1050ms=0 1100ms=0 1150ms=0 1200ms=0 1250ms=0 1300ms=0 1350ms=0 1400ms=0 1450ms=0 1500ms=0 1550ms=0 1600ms=0 1650ms=0 1700ms=0 1750ms=0 1800ms=0 1850ms=0 1900ms=0 1950ms=0 2000ms=0 2050ms=0 2100ms=0 2150ms=0 2200ms=0 2250ms=0 2300ms=0 2350ms=0 2400ms=0 2450ms=0 2500ms=0 2550ms=0 2600ms=0 2650ms=0 2700ms=0 2750ms=0 2800ms=0 2850ms=0 2900ms=0 2950ms=0 3000ms=0 3050ms=0 3100ms=0 3150ms=0 3200ms=0 3250ms=0 3300ms=0 3350ms=0 3400ms=0 3450ms=0 3500ms=0 3550ms=0 3600ms=0 3650ms=0 3700ms=0 3750ms=0 3800ms=0 3850ms=0 3900ms=0 3950ms=0 4000ms=0 4050ms=0 4100ms=0 4150ms=0 4200ms=0 4250ms=0 4300ms=0 4350ms=0 4400ms=0 4450ms=0 4500ms=0 4550ms=0 4600ms=0 4650ms=0 4700ms=0 4750ms=0 4800ms=0 4850ms=0 4900ms=0 4950ms=0 50th gpu percentile: 3ms 90th gpu percentile: 8ms 95th gpu percentile: 9ms 99th gpu percentile: 10ms GPU HISTOGRAM: 1ms=4 2ms=35 3ms=31 4ms=7 5ms=4 6ms=2 7ms=6 8ms=6 9ms=5 10ms=3 11ms=1 12ms=0 13ms=0 14ms=0 15ms=0 16ms=0 17ms=0 18ms=0 19ms=0 20ms=0 21ms=0 22ms=0 23ms=0 24ms=0 25ms=0 4950ms=0 Pipeline=Skia (OpenGL) CPU Caches: Glyph Cache: 69.44 KB (1 entry) Glyph Count: 26 Total CPU memory usage: 71103 bytes, 69.44 KB (0.00 bytes is purgeable) GPU Caches: Other: Other: 0.00 bytes (1 entry) Image: Texture: 127.59 KB (10 entries) Scratch: Buffer Object: 78.00 KB (2 entries) Texture: 2.00 MB (1 entry) Total GPU memory usage: 2307680 bytes, 2.20 MB (127.59 KB is purgeable) Profile data in ms: com.miHoYo.Yuanshen/com.miHoYo.GetMobileInfo.MainActivity/android.view.ViewRootImpl@a46020a (visibility=0) View hierarchy: com.miHoYo.Yuanshen/com.miHoYo.GetMobileInfo.MainActivity/android.view.ViewRootImpl@a46020a 7 views, 8.70 kB of render nodes Total ViewRootImpl : 1 Total attached Views : 7 Total RenderNode : 8.70 kB (used) / 8.70 kB (capacity)
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回复: 深入开箱跑分全志A523平板电脑 台电P26T发布在 其它全志芯片讨论区
硬件规格
主控
全志 A523M00X0000：
内存
宏芯宇 HG4XD04G-C2JA 4GByte LPDDR4X
eMMC
佰维 BWCTARV11X64G
PMU组
芯智汇 AXP323
芯智汇 AXP717C
触摸芯片
思立微 GSL3676
跑分
选用P26T平板（A523） 与 芒果派CyberPad（R818）跑分测试对比：
A523是4核心1.8G + 4核心1.4G big.LITTLE架构，Geekbench只会显示1.4G，无视即可
GeekBench4：
系统参数：
CPU 跑分测试：
A523 单核心跑分 846，多核心 3265
R818 单核心跑分 638，多核心 1714
详细链接：https://browser.geekbench.com/v4/cpu/compare/16815834?baseline=16815756
GPU跑分测试
A523 MaliG57 跑分 2836
R818 GE8300 跑分 1254
详细链接：https://browser.geekbench.com/v4/compute/compare/5203221?baseline=5203219
GeekBench5：
系统参数：
CPU 跑分测试
A523：单核 170，多核 778
R818：单核 113，多核 372
详细链接：https://browser.geekbench.com/v5/cpu/compare/21444054?baseline=21444058
GeekBench6:
由于GeekBench6不提供arm32版本，故此处对比跑分A523与RK3568
系统参数：
CPU 跑分测试
A523：单核 230，多核 850
RK3568：单核 208，多核 493
详细链接：https://browser.geekbench.com/v6/cpu/compare/1893406?baseline=1852318
GPU 跑分测试
A523：Vulkan跑分 441
RK3568：Vulkan跑分 435
详细链接：https://browser.geekbench.com/v6/compute/compare/663853?baseline=649654
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深入开箱跑分全志A523平板电脑 台电P26T发布在 其它全志芯片讨论区
首先外观和观感就不说了，图都有，来看看内部实际的东西。
主控全志A523M00X0000，配套Android 13 + 5.15 Kernel系统。4G内存，64G eMMC，屏幕1280*800分辨率。
平板开启了安全启动所以想买来开发刷机可以歇歇了
（串口也关闭了，没有输出）AIDA 64 测试
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回复: buildroot 怎么取消用户登录？发布在 Linux
buildroot文件系统架构特性。
1、如何修改提示语和账号密码，找到buildroot配置属性BR2_TARGET_GENERIC_HOSTNAME、BR2_TARGET_GENERIC_ISSUE、BR2_TARGET_GENERIC_ROOT_PASSWD修改，如下：
BR2_TARGET_GENERIC_ROOT_PASSWD=“”
2、如何取消账号登入，在/etc/inittab中添加::respawn:-/bin/sh,去掉ttyAS0::respawn:/sbin/getty -L ttyAS0 115200 vt100 # GENERIC_SERIAL，反之亦然
3、如果要修改源码，查看文件系统inittab生成，添加修改就可以。
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R128 SDK 0.7 /bin/bash: line 4: @set: command not found发布在 A Series
cd /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/ && TERM=xterm-color CONFIG_=CONFIG_ PROJECT_DIR=/home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos kconfig-mconf Kconfig components/aw/camera_preview/Kconfig:1:warning: leading whitespace ignored drivers/drv/bluetooth/driver/controller/Kconfig:7:warning: defaults for choice values not supported *** End of the configuration. *** Execute 'make' to start the build or try 'make help'. make mkconfig if [ ! -f /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h ]; then \ @set -e; set -o pipefail; mkdir -p /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906; \ @set -e; set -o pipefail; /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/../.dbuild/scripts/mkconfig/mkconfig /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/ > /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h; \ else \ @set -e; set -o pipefail; /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/../.dbuild/scripts/mkconfig/mkconfig /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/ > /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h.tmp; \ diff /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h.tmp &>/dev/null; \ if [ $? -ne 0 ]; then \ cp /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h.tmp /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h; \ rm /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h.tmp; \ fi; \ fi \ /bin/bash: line 4: @set: command not found if [ ! -f /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h ]; then \ @set -e; set -o pipefail; mkdir -p /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906; \ @set -e; set -o pipefail; /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/../.dbuild/scripts/mkconfig/mkconfig /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/ > /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h; \ else \ @set -e; set -o pipefail; /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/../.dbuild/scripts/mkconfig/mkconfig /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/ > /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h.tmp; \ diff /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h.tmp &>/dev/null; \ if [ $? -ne 0 ]; then \ cp /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h.tmp /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h; \ rm /home/yuzuki/WorkSpace/R128-FreeRTOS/lichee/rtos/.dbuild/..//include/generated/r128s2_pro_c906/autoconf.h.tmp; \ fi; \ fi \ /bin/bash: line 4: @set: command not found修改：lichee/rtos/.dbuild/dbuild.mk，把
$(DBUILD_ROOT).dbuild/scripts/mkconfig/mkconfig$(OS_EXT)前的$(Q)去了.PHONY: mkconfig mkconfig: $(DBUILD_ROOT).dbuild/scripts/mkconfig/mkconfig$(OS_EXT) ifeq ($(DBUILD_OS), WIN32) if [ ! -f $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME) ]; then \ $(Q)mkdir -p $(CONFIG_HEADER_PATH); \ $(Q)$(DBUILD_ROOT).dbuild/scripts/mkconfig/mkconfig$(OS_EXT) $(subst \,\\,$(shell cygpath -w $(PROJECT_DIR)/)) > $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME); \ else \ $(DBUILD_ROOT).dbuild/scripts/mkconfig/mkconfig$(OS_EXT) $(subst \,\\,$(shell cygpath -w $(PROJECT_DIR)/)) > $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME).tmp; \ diff $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME) $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME).tmp &>/dev/null; \ if [ $$? -ne 0 ]; then \ cp $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME).tmp $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME); \ rm $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME).tmp; \ fi; \ fi \ else if [ ! -f $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME) ]; then \ $(Q)mkdir -p $(CONFIG_HEADER_PATH); \ $(Q)$(DBUILD_ROOT).dbuild/scripts/mkconfig/mkconfig$(OS_EXT) $(PROJECT_DIR)/ > $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME); \ else \ $(DBUILD_ROOT).dbuild/scripts/mkconfig/mkconfig$(OS_EXT) $(PROJECT_DIR)/ > $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME).tmp; \ diff $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME) $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME).tmp &>/dev/null; \ if [ $$? -ne 0 ]; then \ cp $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME).tmp $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME); \ rm $(CONFIG_HEADER_PATH)/$(CONFIG_HEADER_NAME).tmp; \ fi; \ fi \ endif
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V853/V851s 增加 OpenCV, FFmpeg 编译包发布在 V Series
opencv.tar.gz
ffmpeg.tar.gz
解压放到openwrt/package文件夹即可
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T113 Tina Linux 禁用 OPTEE 启动发布在 其它全志芯片讨论区
- 在 device/config/chips/t113/configs/<aaa>/ 新建一个 boot_package.cfg
写入以下内容
[package] item=u-boot, u-boot.fex item=dtb, sunxi.fex- 找到 lichee/linux-5.4/arch/arm/boot/dts/sun8iw20p1.dtsi 中的 psci 节点把他删了
psci { compatible = "arm,psci-1.0"; method = "smc"; };- 打开 lichee/linux-5.4/arch/arm/mach-sunxi/platsmp.c 文件，在末尾加入下列内容
static int sun8i_t113_smp_boot_secondary(unsigned int cpu, struct task_struct *idle) { u32 reg; void __iomem *cpucfg_membase = ioremap(0x09010000, 0x10); void __iomem *cpuexec_membase[] = {ioremap(0x070005C4, 0x10),ioremap(0x070005C8, 0x10)}; if (cpu != 1) return 0; spin_lock(&cpu_lock); writel(__pa_symbol(secondary_startup), cpuexec_membase[cpu]); reg = readl(cpucfg_membase); writel(reg | BIT(cpu), cpucfg_membase); spin_unlock(&cpu_lock); return 0; } static const struct smp_operations sun8i_t113_smp_ops __initconst = { .smp_boot_secondary = sun8i_t113_smp_boot_secondary, }; CPU_METHOD_OF_DECLARE(sun8i_t113_smp, "allwinner,sun8iw20p1", &sun8i_t113_smp_ops);
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V853 + AXP2101 上电 6s 后自动关机问题解决方法发布在 V Series
一个老坑，AXP2101上电6s自动关机。在系统重启之后，开始加载内核，加载到一半突然没有任何log看起来像系统卡死，并在再按reset按键没有反应。
RST键是连接到PWROK的，手册也说可以做rst来用。
问了下工程师，才知道AXP2101的保护机制是进行Restart时，PMU在各路输出使能有效6s内检测PWROK Pin是否拉高，如果拉高则结束Restart流程，否则自动关机。
设计的电路并没有这个拉高，所以直接保护关机了
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回复: DongshanPI-D1s 烧录tina linux到spinor存储器后，无法通过xfel在编程了发布在 MR Series
@qinchangzu xfel的bug，有兴趣可以帮忙修复下
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R128 S2 单天线是否需要软件配置为单天线发布在 A Series
R128 PCB 绘制仅使用 ANT0，将ANT1浮空处理了。测试射频性能非常差，发热功耗较大。请问是否需要软件配置RF输出，使用单天线方案
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R128 FreeRTOS 0.6 SDK 无法正常 mrtos_menuconfig发布在 A Series
问题情况
mrtos_menuconfig 之后上下左右移动光标出现 coredump 段错误
原因
RTOS 的编译系统使用的是dbuild编译系统（https://github.com/jameswalmsley/bitthunder）
dbuild系统使用的是预编译的kconfig（https://github.com/jameswalmsley/bitthunder/tree/master/scripts/kconfig-linux64） 版本过于古老，在Ubuntu 20.04 系统上出现段错误。
解决方法
自行安装
sudo apt install kconfig-frontends编辑lichee/rtos/.dbuild/dbuild.mk使用自行安装的kconfig
建议官方的sdk更新下kconfig版本，或者参照xr806的sdk让sdk自行编译kconfig
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R128-S2 中的 APP-LDO 可以作为 1.2V常驻供电吗？不使用外挂dcdc了发布在 A Series
R128-S2 中的 APP-LDO 可以作为 1.2V常驻供电吗？不使用外挂dcdc了
电路图表示需要单独的dcdc，但是成本考虑以及不需要低功耗，可以省略这部分电路吗？使用内置LDO供电VDD-DSP和VDD-SYS
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V85x E907 小核开发与使用发布在 V Series
v85x 平台包括了
V853,V853s,V851s,V851se。s后缀代表芯片内封了DDR内存，e后缀代表芯片内封ephy。拥有Cortex-A7 core@900MHz,RISC-V@600MHz和一个 0.5TOPS（VIP9000PICO_PID0XEE,567MACS,576 x 348M x 2 ≈ 500GOPS） 的 NPU。其中的 RISC-V 小核心为 平头哥玄铁E907E907 平台
玄铁E907 是一款完全可综合的高端 MCU 处理器。它兼容 RV32IMAC 指令集，提供可观的整型性能提升以及高能效的浮点性能。E907 的主要特性包括：单双精度浮点单元，以及快速中断响应。
在V85x平台中使用的E907为RV32IMAC，不包括 P 指令集。
V85x 平台框图
V851s
芯片架构图
相关内存分布
E907 子系统框图
具体的寄存器配置项这里就不过多介绍了，具体可以参考数据手册《V851S&V851SE_Datasheet_V1.0.pdf》
V853 的异构系统通讯在硬件上使用的是 MSGBOX，在软件层面上使用的是 AMP 与 RPMsg 通讯协议。其中 A7 上基于 Linux 标准的 RPMsg 驱动框架，E907基于 OpenAMP 异构通信框架。
AMP 与 RPMsg
V853 所带有的 A7 主核心与 E907 辅助核心是完全不同的两个核心，为了最大限度的发挥他们的性能，协同完成某一任务，所以在不同的核心上面运行的系统也各不相同。这些不同架构的核心以及他们上面所运行的软件组合在一起，就成了 AMP 系统 （Asymmetric Multiprocessing System, 异构多处理系统）。
由于两个核心存在的目的是协同的处理，因此在异构多处理系统中往往会形成 Master - Remote 结构。主核心启动后启动从核心。当两个核心上的系统都启动完成后，他们之间就通过 IPC（Inter Processor Communication）方式进行通信，而 RPMsg 就是 IPC 中的一种。
在AMP系统中，两个核心通过共享内存的方式进行通信。两个核心通过 AMP 中断来传递讯息。内存的管理由主核负责。
软件适配
这部分使用BSP开发包即可，配置设备树如下：
reserved-memory { // 配置预留内存区间 e907_dram: riscv_memserve { // riscv 核心使用的内存 reg = <0x0 0x43c00000 0x0 0x00400000>; // 起始地址 0x43c00000 长度 4MB no-map; }; vdev0buffer: vdev0buffer@0x43000000 { // vdev设备buffer预留内存 compatible = "shared-dma-pool"; reg = <0x0 0x43000000 0x0 0x40000>; no-map; }; vdev0vring0: vdev0vring0@0x43040000 { // 通讯使用的vring设备0 reg = <0x0 0x43040000 0x0 0x20000>; no-map; }; vdev0vring1: vdev0vring1@0x43060000 { // 通讯使用的vring设备1 reg = <0x0 0x43060000 0x0 0x20000>; no-map; }; }; e907_rproc: e907_rproc@0 { // rproc相关配置 compatible = "allwinner,sun8iw21p1-e907-rproc"; clock-frequency = <600000000>; memory-region = <&e907_dram>, <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>; mboxes = <&msgbox 0>; mbox-names = "mbox-chan"; iommus = <&mmu_aw 5 1>; memory-mappings = /* DA len PA */ /* DDR for e907 */ < 0x43c00000 0x00400000 0x43c00000 >; core-name = "sun8iw21p1-e907"; firmware-name = "melis-elf"; status = "okay"; }; rpbuf_controller0: rpbuf_controller@0 { // rpbuf配置 compatible = "allwinner,rpbuf-controller"; remoteproc = <&e907_rproc>; ctrl_id = <0>; /* index of /dev/rpbuf_ctrl */ iommus = <&mmu_aw 5 1>; status = "okay"; }; rpbuf_sample: rpbuf_sample@0 { compatible = "allwinner,rpbuf-sample"; rpbuf = <&rpbuf_controller0>; status = "okay"; }; msgbox: msgbox@3003000 { // msgbox配置 compatible = "allwinner,sunxi-msgbox"; #mbox-cells = <1>; reg = <0x0 0x03003000 0x0 0x1000>, <0x0 0x06020000 0x0 0x1000>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_msgbox0>; clock-names = "msgbox0"; local_id = <0>; status = "okay"; }; e907_standby: e907_standby@0 { compatible = "allwinner,sunxi-e907-standby"; firmware = "riscv.fex"; mboxes = <&msgbox 1>; mbox-names = "mbox-chan"; power-domains = <&pd V853_PD_E907>; status = "okay"; };内存划分
在设备树配置小核心使用的内存，包括小核自己使用的内存，设备通信内存，回环内存等等，这里E907 运行在 DRAM 内。内存起始地址可以在数据手册查到。
通常来说我们把内存地址设置到末尾，例如这里使用的 V851s，拥有 64MByte 内存，则内存范围为
0x40000000 - 0x44000000，这里配置到0x43c00000即可。对于 V853s 拥有 128M 内存则可以设置到0x47C00000，以此类推。对于交换区内存则可以配置在附近。reserved-memory { // 配置预留内存区间 e907_dram: riscv_memserve { // riscv 核心使用的内存 reg = <0x0 0x43c00000 0x0 0x00400000>; // 起始地址 0x43c00000 长度 4MB no-map; }; vdev0buffer: vdev0buffer@0x43000000 { // vdev设备buffer预留内存 compatible = "shared-dma-pool"; reg = <0x0 0x43000000 0x0 0x40000>; no-map; }; vdev0vring0: vdev0vring0@0x43040000 { // 通讯使用的vring设备0 reg = <0x0 0x43040000 0x0 0x20000>; no-map; }; vdev0vring1: vdev0vring1@0x43060000 { // 通讯使用的vring设备1 reg = <0x0 0x43060000 0x0 0x20000>; no-map; }; };然后需要配置下
e907的链接脚本，找到e907_rtos/rtos/source/projects/v851-e907-lizard/kernel.lds将ORIGIN配置为上面预留的内存。MEMORY { /*DRAM_KERNEL: 4M */ DRAM_SEG_KRN (rwx) : ORIGIN = 0x43c00000, LENGTH = 0x00400000 }然后配置小核的
defconfig位于e907_rtos/rtos/source/projects/v851-e907-lizard/configs/defconfig配置与其对应即可。CONFIG_DRAM_PHYBASE=0x43c00000 CONFIG_DRAM_VIRTBASE=0x43c00000 CONFIG_DRAM_SIZE=0x0400000配置启动小核
配置启动小核的流程如下，这里只讨论使用 linux 启动小核的情况，不讨论快启相关。
- 加载固件
- 调用
firmware接口获取文件系统中的固件 - 解析固件的
resource_table段，该段有如下内容- 声明需要的内存（
Linux为其分配，设备树配置） - 声明使用的
vdev（固定为一个） - 声明使用的
vring（固定为两个）
- 声明需要的内存（
- 将固件加载到指定地址
- 调用
- 注册
rpmsg virtio设备- 提供
vdev->ops（基于virtio接口实现的） - 与
rpmsg_bus驱动匹配，完成rpmsg初始化
- 提供
- 启动小核
- 调用
rproc->ops->start
- 调用
1. 加载固件
驱动位于
kernel/linux-4.9/drivers/remoteproc/sunxi_rproc_firmware.c首先调用
sunxi_request_firmware函数int sunxi_request_firmware(const struct firmware **fw, const char *name, struct device *dev) { int ret, index; struct firmware *fw_p = NULL; u32 img_addr, img_len; ret = sunxi_find_firmware_storage(); if (ret < 0) { dev_warn(dev, "Can't finded boot_package head\n"); return -ENODEV; } index = ret; ret = sunxi_firmware_get_info(dev, index, name, &img_addr, &img_len); if (ret < 0) { dev_warn(dev, "failed to read boot_package item\n"); ret = -EFAULT; goto out; } ret = sunxi_firmware_get_data(dev, index, img_addr, img_len, &fw_p); if (ret < 0) { dev_err(dev, "failed to read Firmware\n"); ret = -ENOMEM; goto out; } *fw = fw_p; out: return ret; }驱动会从固件的特定位置读取，使用函数
sunxi_find_firmware_storage，这里会去固定的位置查找固件，位置包括lib/firmware，/dev/mtd0./dev/mtd1,/dev/mmcblk0等位置。对于Linux启动我们只需要放置于lib/firmware即可。static int sunxi_find_firmware_storage(void) { struct firmware_head_info *head; int i, len, ret; loff_t pos; const char *path; u32 flag; len = sizeof(*head); head = kmalloc(len, GFP_KERNEL); if (!head) return -ENOMEM; ret = sunxi_get_storage_type(); for (i = 0; i < ARRAY_SIZE(firmware_storages); i++) { path = firmware_storages[i].path; pos = firmware_storages[i].head_off; flag = firmware_storages[i].flag; if (flag != ret) continue; pr_debug("try to open %s\n", path); ret = sunxi_firmware_read(path, head, len, &pos, flag); if (ret < 0) pr_err("open %s failed,ret=%d\n", path, ret); if (ret != len) continue; if (head->magic == FIRMWARE_MAGIC) { kfree(head); return i; } } kfree(head); return -ENODEV; }2. 配置时钟
配置
clk与小核的boot选项，驱动位于kernel/linux-4.9/drivers/remoteproc/sunxi_rproc_boot.c可以自行参考struct sunxi_core *sunxi_remote_core_find(const char *name); int sunxi_core_init(struct sunxi_core *core); void sunxi_core_deinit(struct sunxi_core *core); int sunxi_core_start(struct sunxi_core *core); int sunxi_core_is_start(struct sunxi_core *core); int sunxi_core_stop(struct sunxi_core *core); void sunxi_core_set_start_addr(struct sunxi_core *core, u32 addr); void sunxi_core_set_freq(struct sunxi_core *core, u32 freq);使用 debugfs 加载固件
由于已经对外注册了接口，这里只需要使用命令即可启动小核心。假设小核的
elf名字叫e907.elf并且已经放置进lib/firmware文件夹echo e907.elf > /sys/kernel/debug/remoteproc/remoteproc0/firmware echo start > /sys/kernel/debug/remoteproc/remoteproc0/stateE907 小核开发
这里提供了一个
RTOS以供开发使用，此RTOS基于 RTT 内核。地址 https://github.com/YuzukiHD/Yuzukilizard/tree/master/Software/BSP/e907_rtos同时，
docker镜像内也已包含此开发包，可以直接使用。搭建开发环境
使用 docker
直接拉取
gloomyghost/yuzukilizard即可docker pull gloomyghost/yuzukilizard
独立搭建开发环境
使用 git 命令下载（不可以直接到 Github 下载 zip，会破坏超链接与文件属性）
git clone --depth=1 https://github.com/YuzukiHD/Yuzukilizard.git
然后复制到当前目录下
cp -rf Yuzukilizard/Software/BSP/e907_rtos/ . && cd e907_rtos下载编译工具链到指定目录
cd rtos/tools/xcompiler/on_linux/compiler/ && wget https://github.com/YuzukiHD/Yuzukilizard/releases/download/Compiler.0.0.1/riscv64-elf-x86_64-20201104.tar.gz && cd -
编译第一个 elf 系统
进入
rtos/source文件夹cd rtos/source/
应用环境变量并加载方案
source melis-env.sh;lunch
然后直接编译即可，他会自动解压配置工具链。编译完成后可以在
ekernel/melis30.elf找到固件。make -j
配置小核系统
小核的编译框架与
kernel类似，使用kconfig作为配置项。使用make menuconfig进入配置页。
其余使用与标准
menuconfig相同这里不过多赘述。小核使用
小核使用 UART 输出 console
首先配置小核的
PINMUX编辑文件e907_rtos/rtos/source/projects/v851-e907-lizard/configs/sys_config.fex这里使用UART3, 引脚为PE12,PE13,mux为 7[uart3] uart_tx = port:PE12<7><1><default><default> uart_rx = port:PE13<7><1><default><default>然后配置使用
uart3作为输出，运行make menuconfig居进入配置Kernel Setup ---> Drivers Setup ---> Melis Source Support ---> [*] Support Serial Driver SoC HAL Drivers ---> Common Option ---> [*] enable sysconfig // 启用读取解析 sys_config.fex 功能 UART Devices ---> [*] enable uart driver // 启用驱动 [*] support uart3 device // 使用 uart3 (3) cli uart port number // cli 配置到 uart3 Subsystem support ---> devicetree support ---> [*] support traditional fex configuration method parser. // 启用 sys_config.fex 解析器到
linux中配置设备树，将设备树配置相应的引脚与mux
如果设备树不做配置引脚和
mux，kernel会很贴心的帮你把没使用的 Pin 设置io_disable。由于使用的是iommu操作UART设备，会导致io不可使用。如下所示。
此外，还需要将
uart3的节点配置disable，否则kernel会优先占用此设备。&uart3 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pins_active>; pinctrl-1 = <&uart3_pins_sleep>; status = "disabled"; };如果配置
okay会出现以下提示。uart: create mailbox fail uart: irq for uart3 already enabled uart: create mailbox fail启动小核固件后就可以看到输出了
核心通讯
建立通讯节点
启动小核后，使用
eptdev_bind test 2建立两个通讯节点的监听，可以用rpmsg_list_listen命令查看监听节点。
然后在
Linux内创建通讯节点，由于我们上面启用了两个监听所以这里也开两个节点echo test > /sys/class/rpmsg/rpmsg_ctrl0/open echo test > /sys/class/rpmsg/rpmsg_ctrl0/open
然后就可以在
/dev/下看到通讯节点/dev/rpmsg0，/dev/rpmsg1
也可以在小核控制台看到节点的建立
核心通讯
Linux -> e907
可以直接操作 Linux 端的节点，使用
echo写入数据echo "Linux Message 0" > /dev/rpmsg0 echo "Linux Message 0" > /dev/rpmsg1
小核即可收到数据
e907 -> Linux
使用命令
eptdev_send用法eptdev_send <id> <data>eptdev_send 0 "E907 Message" eptdev_send 1 "E907 Message"
在 Linux 侧直接可以读取出来
cat /dev/rpmsg0 cat /dev/rpmsg1
可以一直监听，例如多次发送数据
Linux 侧获得的数据也会增加
关闭通讯
Linux 侧关闭，操作控制节点，
echo <id>给节点即可echo 0 > /sys/class/rpmsg/rpmsg_ctrl0/close echo 1 > /sys/class/rpmsg/rpmsg_ctrl0/close
同时 E907 也会打印链接关闭
rpmsg 需知
- 端点是
rpmsg通信的基础；每个端点都有自己的src和dst地址，范围（1 - 1023，除了
0x35） rpmsg每次发送数据最大为512 -16 字节；（数据块大小为 512，头部占用 16 字节）rpmsg使用name server机制，当E907创建的端点名，和linux注册的rpmsg驱动名一
样的时候，rpmsg bus总线会调用其probe接口。所以如果需要Linux端主动发起创建端
点并通知e907，则需要借助上面提到的rpmsg_ctrl驱动。rpmsg是串行调用回调的，故建议rpmsg_driver的回调中不要调用耗时长的函数，避免影
响其他rpmsg驱动的运行
自定义小核 APP
小核的程序入口位于
e907_rtos/rtos/source/projects/v851-e907-lizard/src/main.c#include <stdio.h> #include <openamp/sunxi_helper/openamp.h> int app_entry(void *param) { return 0; }可以自定义小核所运行的程序。
自定义小核命令
SDK 提供了
FINSH_FUNCTION_EXPORT_ALIAS绑定方法，具体为FINSH_FUNCTION_EXPORT_ALIAS(<函数名称>, <命令>, <命令的描述>)例如编写一个 hello 命令，功能是输出
Hello World，描述为Show Hello Worldint hello_cmd(int argc, const char **argv) { printf("Hello World\n"); } FINSH_FUNCTION_EXPORT_ALIAS(hello_cmd, hello, Show Hello World)即可在小核找到命令与输出。
- 加载固件
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回复: 量化模型如何输出 FLOAT16 格式？发布在 V Series
pegasus inference --model lenet.json --model-data lenet.data --batch-size 1 --dtype float32 --device CPU --with-input-meta lenet-inputmeta.yml --postprocess-file lenet-postprocess-file.yml --iterations 10 pegasus export ovxlib --model lenet.json --model-data lenet.data --dtype float32 --batch-size 1 --save-fused-graph --target-ide-project 'linux64' --with-input-meta lenet-inputmeta.yml --postprocess-file lenet-postprocess-file.yml --output-path ovxlib/lenet/lenet --pack-nbg-unify --optimize "VIP9000PICO_PID0XEE" --viv-sdk ${VIV_SDK}浮点部署直接跳过量化步骤，虽然精度得到保障但是速度相较于定点成数量级下降，不建议使用
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回复: [部分已解决] v853 sdk 编译失败：undefined reference to `sunxi_challenge`发布在 编译和烧写问题专区
docker 的问题，sunxi_challenge是从urandom里出来的一个随机码，Makefile把@删了就可以了
CLEAN_FILES += board/sunxi/sunxi_challenge.c board/sunxi/sunxi_challenge.c: echo " prepare sunxi_challenge..." dd if=/dev/urandom of=sunxi_challenge bs=128 count=1 > /dev/null 2>&1 xxd -c 8 -i sunxi_challenge > board/sunxi/sunxi_challenge.c sed -i '/^unsigned/i __attribute__((__used__))' board/sunxi/sunxi_challenge.c rm sunxi_challenge prepare: board/sunxi/sunxi_challenge.c
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回复: 关于D1的SPI通讯问题发布在 MR Series
请问是怎么测试的，spi_dbi_enable是spi lcd显示屏专用的驱动，配置两个逻辑不太一样
配置lcd屏幕需要单独写lcd的配置&lcd_fb0 { lcd_used = <1>; lcd_driver_name = "kld2844b"; lcd_if = <1>; lcd_dbi_if = <4>; lcd_data_speed = <60>; lcd_spi_bus_num = <1>; lcd_x = <240>; lcd_y = <320>; lcd_width = <60>; lcd_height = <95>; lcd_pwm_used = <1>; lcd_pwm_ch = <7>; lcd_pwm_freq = <5000>; lcd_pwm_pol = <0>; lcd_pixel_fmt = <0>; lcd_dbi_fmt = <3>; lcd_rgb_order = <0>; lcd_frm = <1>; lcd_gamma_en = <1>; fb_buffer_num = <2>; lcd_backlight = <100>; lcd_dbi_te = <1>; lcd_fps = <60>; lcd_gpio_0 = <&pio PC 0 GPIO_ACTIVE_HIGH>; // reset status = "okay"; };另外检查一下，spi-rx-bus-width=<0x04>;是四线spi驱动，需要确认从机是4bit SPI <D0 D1 D2 D3 CLK CS>，否则请改成 spi-rx-bus-width=<0x01>;
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回复: 请教各位大佬，D1的start.s __start部分是参考哪里怎么实现的？ 还有dram.c又是从那里得到的这些数据，最后的mksunxi 也是搞不懂依据在哪发布在 MR Series
D1的start.s __start部分是参考哪里怎么实现的？
首先是 eGON.BT0，这个Magic是BROM读取的，所以要在头部插入eGON.BT0
还有dram.c又是从那里得到的这些数据
这是使用mctl_hal.S和自己写的一个小裸机编译出的bin，mctl_hal.S全志的sdk里开源了，这个小裸机源码如下 6ee6e31c-72ef-47f5-b69f-0976197bb46a-d1-ddr.zip
最后的mksunxi 也是搞不懂依据在哪
这个是对齐后重新计算校验码的，然后填充在固定的位置让BROM读取，全志系列的老传统了，你看_start那里的checksum只是一个占位符0x12345678，mksunxi就是会对齐块设备然后计算校验填入然后修改长度
https://github.com/YuzukiHD/TinyKasKit/blob/master/sunxiboot/src/bootpack.cpp
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回复: yolo v5 使用--batch-size 大于1时量化报错发布在 V Series
固定为1就行了，这个batch_size是模型定的。如果原始网络使用固定的batch_size，请使用固定的batch_size，如果原始网络使用可变batch_size，请将此参数设置为1
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回复: V853适配MIPI屏背光不亮发布在 V Series
@null037
是不是开了动态背光但是没配置背光亮度？lcd_bl_0_percent = <0>; lcd_bl_40_percent = <23>; lcd_bl_100_percent = <100>; lcd_backlight = <150>;或者直接写死试试
lcd_bl_en = <&pio PD 22 1 0 3 1>
