@willok 发表一个回复就是LV2了
A
awwwwa 发布的最佳帖子
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R128-S2 驱动 1024x600 RGB 显示屏 并运行 LVGL发布在 A Series
由于屏幕较大首先精简系统内存，关闭DSP核心，并将 RV 核心移到 HSPSRAM 上提高带宽。配置 LV_COLOR_DEPTH 16 提高帧率降低内存占用
patch 如下，增加了新方案r128-devkit-rgb：161ca91b-f759-4108-8bfc-85114394da0c-r128-devkit-rgb.tar.gz
编译打包即可
700ms启动 LVGL：
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回复: 搭建开发环境，出现问了了，总是报fatal: cannot obtain manifest https://sdk.aw-ol.com/git_repo/V853Tina_Open/manifest.git发布在 V Series
- 执行命令设置全局保存密码
git config --global credential.helper store- 执行命令输入密码
git clone https://sdk.aw-ol.com/git_repo/V853Tina_Open/manifest.git- 使用repo拉取sdk
repo init -u https://sdk.aw-ol.com/git_repo/V853Tina_Open/manifest.git -b master -m tina-v853-open.xml由于repo更新，目前不支持通过repo输入密码，请先使用git命令输入保存密码
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回复: 有R128点亮百问网7寸RGB屏的DEMO吗？发布在 A Series
R128-S2 驱动 1024x600 RGB 显示屏 并运行 LVGL
https://bbs.aw-ol.com/topic/4316/share/1 -
回复: 寻求tina的display 官方文档说明，感谢发布在 V Series
disp init configuration disp_mode (0:screen0<screen0,fb0>) screenx_output_type (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo) screenx_output_mode (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50) (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60) screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420) screenx_output_bits (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit) screenx_output_eotf (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG) screenx_output_cs (for hdmi, 0:undefined 257:BT709 260:BT601 263:BT2020) screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode) screen0_output_range (for hdmi, 0:default 1:full 2:limited) screen0_output_scan (for hdmi, 0:no data 1:overscan 2:underscan) screen0_output_aspect_ratio (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9) fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444) fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA) fb0_scaler_mode_enable(scaler mode enable, used FE) fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0) lcdx_backlight (lcd init backlight,the range:[0,256],default:197 lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50) lcd0_contrast (LCD contrast, 0~100) lcd0_saturation (LCD saturation, 0~100) lcd0_hue (LCD hue, 0~100) framebuffer software rotation setting: disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y, set fbX_height to lcd_x) degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree) degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree) devX_output_type : config output type in bootGUI framework in UBOOT-2018. (0:none; 1:lcd; 2:tv; 4:hdmi;) devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018 devX_screen_id : config display index of bootGUI framework in UBOOT-2018 devX_do_hpd : whether do hpd detectation or not in UBOOT-2018 chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6 channel, 1:dual display with 4 channel in main display and 2 channel in second display, 2:dual display with 3 channel in main display and 3 channel in second in display. -
回复: R128 打包失败 merge_full_rtos_img_failed发布在 MR Series
@cai_yp 分区参数错误，只打包了UDISK分区，但是UDISK是自动生成的分区
32356+0 records in 32356+0 records out 8283136 bytes (8.3 MB) copied, 0.0394041 s, 210 MB/s this is not a partition key update mbr file ok ----------------mbr convert to gpt start--------------------- out: sunxi_gpt_nor.fex source: sunxi_mbr_nor.fex input_logic_offset: 256 input_flash_size: 16M gpt partition entry crc32 = 0x618ebc8 gpt header crc32 = 0x4fdf09e2 GPT----part num 10--- gpt_entry: 128 gpt_header: 92 GPT:env : 120 127 GPT:env-redund : 128 12f GPT:arm-lpsram : 130 a8f GPT:rv-lpsram : a90 1a2f GPT:dsp-hpsram : 1a30 206f GPT:rtos-xip : 2070 33f7 GPT:arm-b : 33f8 3d57 GPT:config : 3d58 3d77 GPT:settings : 3d78 3db7 GPT:UDISK : 3db8 7fff update gpt file ok ----------------mbr convert to gpt end--------------------- boot0: boot0_spinor.fex redund boot0: boot0_spinor.fex mbr: sunxi_gpt_nor.fex partition: sys_partition_nor.bin UDISK_partition_size: 16968 sector outfile: rtos_16Mnor.bin logic_start: 128K total_image_size: 16M load file: boot0_spinor.fex ok load file: sunxi_gpt_nor.fex ok load file: boot0_spinor.fex ok support redund boot0 at 0x10000 load file: sys_partition_nor.bin ok part name=env file name:env.fex part size:8 sector load file: env.fex ok part name=env-redund file name:env.fex part size:8 sector load file: env.fex ok part name=arm-lpsram file name:rtos_arm.fex part size:2400 sector load file: rtos_arm.fex ok part name=rv-lpsram file name:rtos_riscv.fex part size:4000 sector load file: rtos_riscv.fex ok part name=dsp-hpsram file name:rtos_dsp.fex part size:1600 sector load file: rtos_dsp.fex ok part name=rtos-xip file name:rtos_xip_rv.fex part size:5000 sector load file: rtos_xip_rv.fex ok part name=arm-b file name:etf.fex part size:2400 sector load file: etf.fex ok part name=config file name:config.fex part size:32 sector load file: config.fex ok part name=settings part size:64 sector part name=UDISK file name:data_udisk.fex load file: data_udisk.fex ok partname: UDISK this is not a partition key merge_package ok -
回复: MR536 SDK MR536_V1.1直接编译和打包后烧录全志MR536 evk(黄色)，报错如下： Unable to handle kernel paging request at virtual address 0000000000040008发布在 MR Series
Unable to handle kernel paging request at virtual address 0000000000040008
看看内核代码rb_next附近，有非法地址访问
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回复: V851S tina linux ov5647 驱动程序没有 dmesg发布在 V Series
ov5647 这个型号的摄像头并没有适配，SDK也没有支持。
请参考V85x的摄像头支持手册选择适配的摄像头。这里推荐已经量产的产品使用的GC2063，GC2083，GC4663这三款摄像头，已经经过严格的测试与调试，可以达到最佳画质和分辨率
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回复: V853 的 CPU1（E907）启动流程发布在 RTOS
参考Linux端代码即可，本质上为：
- 加载固件
- 调用 firmware 接口获取文件系统中的固件
- 解析固件的 resource_table 段，该段有如下内容
- 声明需要的内存（Linux 为其分配）
- 声明使用的 vdev（固定为一个）
- 声明使用的 vring（固定为两个）
- 将固件加载到指定地址
- 注册 rpmsg virtio 设备
- 提供 vdev->ops（基于 virtio 接口实现的）
- 与 rpmsg_bus 驱动匹配，完成 rpmsg 初始化
- 启动小核
- 调用 rproc->ops->start
- 加载固件
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回复: V851s使用spi nand启动不了 VFS: Cannot open root device "ubi0_4" or unknown-block(0,0): error -2发布在 V Series
重点：rootfstype=squashfs
v851s/configs/xxx/env.cfg
#kernel command arguments earlyprintk=sunxi-uart,0x02500000 initcall_debug=0 console=ttyS0,115200 nand_root=/dev/ubiblock0_4 mmc_root=/dev/mmcblk0p4 nor_root=/dev/mtdblock3 init=/init rdinit=/rdinit loglevel=8 coherent_pool=32K #reserve_list=30M@64M,78M@128M,200M@512M mac= wifi_mac= bt_mac= specialstr= root_partition=rootfs mtd_name=sys rootfstype=squashfs #set kernel cmdline if boot.img or recovery.img has no cmdline we will use this setargs_nor=setenv bootargs earlyprintk=${earlyprintk} clk_ignore_unused initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${nor_root} rootwait init=${init} rdinit=${rdinit} partitions=${partitions} cma=${cma} coherent_pool=${coherent_pool} ion_carveout_list=${reserve_list} setargs_nand=setenv bootargs earlyprintk=${earlyprintk} clk_ignore_unused initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} ubi.mtd=${mtd_name} root=${nand_root} rootfstype=${rootfstype} rootwait init=${init} rdinit=${rdinit} partitions=${partitions} cma=${cma} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} selinux=${selinux} specialstr=${specialstr} coherent_pool=${coherent_pool} ion_carveout_list=${reserve_list} setargs_nand_ubi=setenv bootargs ubi.mtd=${mtd_name} ubi.block=0,${root_partition} earlyprintk=${earlyprintk} clk_ignore_unused initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${nand_root} rootfstype=${rootfstype} init=${init} partitions=${partitions} cma=${cma} snum=${snum} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} specialstr=${specialstr} gpt=1 setargs_mmc=setenv bootargs earlyprintk=${earlyprintk} clk_ignore_unused initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${mmc_root} rootwait init=${init} partitions=${partitions} cma=${cma} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} selinux=${selinux} specialstr=${specialstr} coherent_pool=${coherent_pool} ion_carveout_list=${reserve_list} #nand command syntax: sunxi_flash read address partition_name read_bytes #0x4007f800 = 0x40080000(kernel entry) - 0x800(boot.img header 2k) boot_partition=boot boot_normal=sunxi_flash read 44800000 ${boot_partition};bootm 44800000 boot_recovery=sunxi_flash read 44800000 extend;bootm 44800000 boot_fastboot=fastboot #recovery key recovery_key_value_max=0x13 recovery_key_value_min=0x10 #fastboot key fastboot_key_value_max=0x8 fastboot_key_value_min=0x2 #uboot system env config bootdelay=1 #default bootcmd, will change at runtime according to key press #default nand boot bootcmd=run setargs_nand boot_normal #verify the kernel verify=N -
回复: 个人开发者如何获取D1、D1s的 SDK？需要签NDA吗？发布在 代码下载问题专区
@damiaa 现在是新版本平台了，直接拿awol账号下载，免去再注册一个平台的麻烦：https://d1.docs.aw-ol.com/study/study_3getsdktoc/
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回复: SyterKit 启动 T527 失败发布在 T Series
修改设备树，增加memory和chosen
/* * Allwinner Technology CO., Ltd. */ /dts-v1/; #include "sun55iw3p1.dtsi" /{ board = "T527", "T527-LM4B"; compatible = "allwinner,t527", "arm,sun55iw3p1"; chosen { bootargs = "earlycon=uart8250,mmio32,0x02500000 clk_ignore_unused initcall_debug=0 console=ttyAS0,115200 loglevel=8 init=/init cma=64M"; }; memory@40000000 { device_type = "memory"; reg = <0x00000000 0x40000000 0x00000000 0x20000000>; }; aliases { pmu0 = &pmu0; serial0 = &uart0; hdmi = &hdmi; reg-axp1530 = ®_ext_axp1530_dcdc1; axp1530 = &axp1530; cpu-ext = &cpu4; standby-param = &standby_param; arisc-config = &arisc_config; cir_param = &cir_param; }; reg_usb0_vbus: usb0-vbus { compatible = "regulator-fixed"; regulator-name = "usb0-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-enable-ramp-delay = <1000>; gpio = <&pio PB 12 GPIO_ACTIVE_HIGH>; enable-active-high; }; reg_usb1_vbus: usb1-vbus { compatible = "regulator-fixed"; regulator-name = "usb1-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-enable-ramp-delay = <1000>; gpio = <&pio PB 3 GPIO_ACTIVE_HIGH>; enable-active-high; }; standby_param: standby_param { vdd-cpu = <0x00000001>; vdd-cpub = <0x00000001>; vdd-sys = <0x00000002>; vcc-pll = <0x00000080>; vcc-io = <0x00004000>; osc24m-on = <0x0>; }; cir_param: cir_param { gpio_group = <1>; /* 0:PL 1:PM */ gpio_pin = <11>; gpio_function = <2>; count = <15>; ir_power_key_code0 = <0x40>; ir_addr_code0 = <0xfe01>; ir_power_key_code1 = <0x1a>; ir_addr_code1 = <0xfb04>; ir_power_key_code2 = <0xf2>; ir_addr_code2 = <0x2992>; ir_power_key_code3 = <0x57>; ir_addr_code3 = <0x9f00>; ir_power_key_code4 = <0xdc>; ir_addr_code4 = <0x4cb3>; ir_power_key_code5 = <0x18>; ir_addr_code5 = <0xff00>; ir_power_key_code6 = <0xdc>; ir_addr_code6 = <0xdd22>; ir_power_key_code7 = <0x0d>; ir_addr_code7 = <0xbc00>; ir_power_key_code8 = <0x4d>; ir_addr_code8 = <0x4040>; ir_power_key_code9 = <0x08>; ir_addr_code9 = <0xfb04>; ir_power_key_code10 = <0x00>; ir_addr_code10 = <0xfc03>; ir_power_key_code11 = <0x00>; ir_addr_code11 = <0xbf00>; ir_power_key_code12 = <0xea>; ir_addr_code12 = <0xfb04>; ir_power_key_code13 = <0x42>; ir_addr_code13 = <0xbf00>; ir_power_key_code14 = <0x0f>; ir_addr_code14 = <0xff00>; }; arisc_config: arisc_config { s_uart_config { pins = "PL2", "PL3"; function = <2>, <2>; status = "disabled"; }; }; edp_panel_backlight: edp_backlight { compatible = "pwm-backlight"; status = "disabled"; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>; default-brightness-level = <200>; enable-gpios = <&pio PI 5 GPIO_ACTIVE_HIGH>; /* power-supply = <®_backlight_12v>; */ pwms = <&pwm0 5 5000000 0>; }; edp_panel: edp_panel { compatible = "edp-general-panel"; status = "okay"; power0-supply = <®_dcdc4>; backlight = <&edp_panel_backlight>; panel-timing { clock-frequency = <348577920>; /* pixel clock */ hactive = <2560>; hback-porch = <120>; hfront-porch = <88>; hsync-len = <32>; vactive = <1600>; vback-porch = <71>; vfront-porch = <28>; vsync-len = <5>; /* hor_sync_polarity */ hsync-active = <1>; /* ver_sync_polarity */ vsync-active = <1>; // unused now /* de-active = <1>; pixelclk-active = <1>; syncclk-active = <0>; interlaced; doublescan; doubleclk; */ }; ports { #address-cells = <1>; #size-cells = <0>; panel_in: port@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; edp_panel_in: endpoint@0 { reg = <0>; remote-endpoint = <&edp_panel_out>; }; }; }; }; lvds_panel0_backlight: backlight0 { compatible = "pwm-backlight"; status = "okay"; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>; default-brightness-level = <200>; enable-gpios = <&pio PI 2 GPIO_ACTIVE_HIGH>; pwms = <&pwm0 4 50000 0>; }; lvds_panel0: panel@0 { compatible = "BP101WX1"; status = "okay"; reg = <0>; power0-supply = <®_cldo3>; power1-supply = <®_dcdc4>; power2-supply = <®_cldo1>; backlight = <&lvds_panel0_backlight>; lcd_if = <3>; lcd_width = <150>; lcd_height = <94>; pinctrl-0 = <&lvds0_pins_a>; pinctrl-1 = <&lvds0_pins_b>; pinctrl-names = "active","sleep"; panel-timing { clock-frequency = <74871600>; /* pixel clock */ hback-porch = <88>; hactive = <1280>; hfront-porch = <83>; hsync-len = <18>; vback-porch = <23>; vactive = <800>; vfront-porch = <37>; vsync-len = <10>; // unused now /* hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; */ }; ports { #address-cells = <1>; #size-cells = <0>; lvds_panel0_in: port@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; lvds_panel0_in_lcd0: endpoint@0 { reg = <0>; remote-endpoint = <&tcon0_out_panel>; }; }; }; }; lvds_panel1: panel@1 { compatible = "BP101WX1"; status = "disabled"; reg = <1>; power0-supply = <®_cldo3>; power1-supply = <®_dcdc4>; backlight = <&lvds_panel1_backlight>; lcd_if = <3>; lcd_width = <150>; lcd_height = <94>; pinctrl-0 = <&lvds2_pins_a>; pinctrl-1 = <&lvds2_pins_b>; pinctrl-names = "active","sleep"; panel-timing { clock-frequency = <74871600>; /* pixel clock */ hback-porch = <88>; hactive = <1280>; hfront-porch = <83>; hsync-len = <18>; vback-porch = <23>; vactive = <800>; vfront-porch = <37>; vsync-len = <10>; // unused now /* hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; */ }; ports { #address-cells = <1>; #size-cells = <0>; lvds_panel1_in: port@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; lvds_panel1_in_lcd2: endpoint@0 { reg = <0>; remote-endpoint = <&tcon4_out_panel>; }; }; }; }; lvds_panel1_backlight: backlight1 { compatible = "pwm-backlight"; status = "disabled"; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>; default-brightness-level = <200>; enable-gpios = <&pio PI 5 GPIO_ACTIVE_HIGH>; pwms = <&pwm0 5 5000000 0>; }; }; &de { chn_cfg_mode = <3>; status = "okay"; }; &vo0 { status = "okay"; }; &vo1 { status = "okay"; }; &tv0 { status = "okay"; }; &dlcd0 { status = "okay"; panel = <&lvds_panel0>; ports { tcon0_out: port@1 { tcon0_out_panel: endpoint@2 { reg = <2>; remote-endpoint = <&lvds_panel0_in_lcd0>; }; }; }; }; &dlcd2 { status = "disabled"; panel = <&lvds_panel1>; ports { tcon4_out: port@1 { tcon4_out_panel: endpoint@0 { reg = <0>; remote-endpoint = <&lvds_panel1_in_lcd2>; }; }; }; }; &dsi0combophy { status = "okay"; }; &dsi1combophy { status = "okay"; }; &drm_edp { status = "disabled"; edp_ssc_en = <0>; edp_ssc_mode = <0>; edp_psr_support = <0>; edp_colordepth = <8>; /* 6/8/10/12/16 */ edp_color_fmt = <0>; /* 0:RGB 1: YUV444 2: YUV422 */ lane1_sw = <0>; lane1_pre = <0>; lane2_sw = <0>; lane2_pre = <0>; lane3_sw = <0>; lane3_pre = <0>; efficient_training = <0>; sink_capacity_prefer = <1>; edid_timings_prefer = <1>; timings_fixed = <1>; vcc-edp-supply = <®_bldo3>; vdd-edp-supply = <®_dcdc2>; panel = <&edp_panel>; ports { edp_out: port@1 { edp_panel_out: endpoint@0 { reg = <0>; remote-endpoint = <&edp_panel_in>; }; }; }; }; &r_pio { uart8_pins_a: uart8_pins@0 { pins = "PL2", "PL3"; function = "s_uart0"; }; uart8_pins_b: uart8_pins@1 { pins = "PL2", "PL3"; function = "gpio_in"; }; uart9_pins_a: uart9_pins@0 { pins = "PM0", "PM1"; function = "s_uart1"; }; uart9_pins_b: uart9_pins@1 { pins = "PM0", "PM1"; function = "gpio_in"; }; s_twi0_pins_default: s_twi0@0 { pins = "PL0", "PL1"; function = "s_twi0"; drive-strength = <10>; bias-pull-up; }; s_twi0_pins_sleep: s_twi0@1 { pins = "PL0", "PL1"; function = "gpio_in"; }; s_twi1_pins_default: s_twi1@0 { pins = "PL8", "PL9"; function = "s_twi1"; drive-strength = <10>; bias-pull-up; }; s_twi1_pins_sleep: s_twi1@1 { pins = "PL8", "PL9"; function = "gpio_in"; }; s_twi2_pins_default: s_twi2@0 { pins = "PL12", "PL13"; function = "s_twi2"; drive-strength = <10>; bias-pull-up; }; s_twi2_pins_sleep: s_twi2@1 { pins = "PL12", "PL13"; function = "gpio_in"; }; s_irrx_pins_default: s_irrx@0 { pins = "PL11"; function = "s_cir"; }; s_irrx_pins_sleep: s_irrx@1 { pins = "PL11"; function = "gpio_in"; }; }; &pio { vcc-pg-supply = <®_pio1_8>; vcc-pf-supply = <®_pio1_8>; vcc-pfo-supply = <®_pio3_3>; vcc-pd-supply = <®_dcdc4>; vcc-pe-supply = <®_pio1_8>; vcc-pi-supply = <®_dcdc4>; vcc-pj-supply = <®_dcdc4>; vcc-pk-supply = <®_dcdc4>; uart0_pins_a: uart0_pins@0 { pins = "", ""; function = "uart0"; }; uart0_pins_b: uart0_pins@1 { pins = "", ""; function = "gpio_in"; }; uart2_pins_a: uart2_pins@0 { pins = "PB0", "PB1"; function = "uart2"; }; uart2_pins_b: uart2_pins@1 { pins = "PB0", "PB1"; function = "gpio_in"; }; uart3_pins_a: uart3_pins@0 { pins = "PD14", "PD15"; function = "uart3"; }; uart3_pins_b: uart3_pins@1 { pins = "PD14", "PD15"; function = "gpio_in"; }; uart4_pins_a: uart4_pins@0 { pins = "PD18", "PD19"; function = "uart4"; }; uart4_pins_b: uart4_pins@1 { pins = "PD18", "PD19"; function = "gpio_in"; }; uart5_pins_a: uart5_pins@0 { pins = "PE11", "PE12"; function = "uart5"; }; uart5_pins_b: uart5_pins@1 { pins = "PE11", "PE12"; function = "gpio_in"; }; uart6_pins_a: uart6_pins@0 { pins = "PI6", "PI7"; function = "uart6"; }; uart6_pins_b: uart6_pins@1 { pins = "PI6", "PI7"; function = "gpio_in"; }; uart7_pins_a: uart7_pins@0 { pins = "PB11", "PB12"; function = "uart7"; }; uart7_pins_b: uart7_pins@1 { pins = "PB11", "PB12"; function = "gpio_in"; }; pwm0_0_pin_active: pwm0_0@0 { pins = "PD23"; function = "pwm0_0"; }; pwm0_0_pin_sleep: pwm0_0@1 { pins = "PD23"; function = "gpio_in"; bias-pull-down; }; pwm0_1_pin_active: pwm0_1@0 { pins = "PD22"; function = "pwm0_1"; }; pwm0_1_pin_sleep: pwm0_1@1 { pins = "PD22"; function = "gpio_in"; bias-pull-down; }; pwm0_2_pin_active: pwm0_2@0 { pins = "PB11"; function = "pwm0_2"; }; pwm0_2_pin_sleep: pwm0_2@1 { pins = "PB11"; function = "gpio_in"; bias-pull-down; }; pwm0_3_pin_active: pwm0_3@0 { pins = "PB12"; function = "pwm0_3"; }; pwm0_3_pin_sleep: pwm0_3@1 { pins = "PB12"; function = "gpio_in"; bias-pull-down; }; pwm0_4_pin_active: pwm0_4@0 { pins = "PI3"; function = "pwm0_4"; }; pwm0_4_pin_sleep: pwm0_4@1 { pins = "PI3"; function = "gpio_in"; bias-pull-down; }; pwm0_5_pin_active: pwm0_5@0 { pins = "PI4"; function = "pwm0_5"; }; pwm0_5_pin_sleep: pwm0_5@1 { pins = "PI4"; function = "gpio_in"; bias-pull-down; }; ledc_pins_a: ledc@0 { pins = "PG0"; function = "ledc"; drive-strength = <10>; }; ledc_pins_b: ledc@1 { pins = "PG0"; function = "gpio_in"; }; irrx_pins_default: irrx@0 { pins = "PI8"; function = "cir"; }; irrx_pins_sleep: irrx@1 { pins = "PI8"; function = "gpio_in"; }; irtx_pins_default: irtx@0 { pins = "PH18"; function = "cir"; }; irtx_pins_sleep: irtx@1 { pins = "PH18"; function = "gpio_in"; }; twi0_pins_default: twi0@0 { pins = "PD22", "PD23"; function = "twi0"; drive-strength = <10>; bias-pull-up; }; twi0_pins_sleep: twi0@1 { pins = "PD22", "PD23"; function = "gpio_in"; }; twi1_pins_default: twi1@0 { pins = "PH2", "PH3"; function = "twi1"; drive-strength = <10>; bias-pull-up; }; twi1_pins_sleep: twi1@1 { pins = "PH2", "PH3"; function = "gpio_in"; }; twi2_pins_default: twi2@0 { pins = "PE1", "PE2"; function = "twi2"; drive-strength = <20>; bias-pull-up; }; twi2_pins_sleep: twi2@1 { pins = "PE1", "PE2"; function = "gpio_in"; }; twi3_pins_default: twi3@0 { pins = "PE3", "PE4"; function = "twi3"; drive-strength = <20>; bias-pull-up; }; twi3_pins_sleep: twi3@1 { pins = "PE3", "PE4"; function = "gpio_in"; }; twi4_pins_default: twi4@0 { pins = "PE13", "PE14"; function = "twi4"; drive-strength = <10>; bias-pull-up; }; twi4_pins_sleep: twi4@1 { pins = "PE13", "PE14"; function = "gpio_in"; }; twi5_pins_default: twi5@0 { pins = "PI8", "PI9"; function = "twi5"; drive-strength = <10>; bias-pull-up; }; twi5_pins_sleep: twi5@1 { pins = "PI8", "PI9"; function = "gpio_in"; }; owa_pins_a: owa@0 { pins = "PI10"; function = "owa"; drive-strength = <20>; bias-disable; }; owa_pins_b: owa@1 { pins = "PI10"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s0_pins_a: i2s0@0 { pins = "PB4", "PB5", "PB6"; function = "i2s0"; drive-strength = <20>; bias-disable; }; i2s0_pins_b: i2s0@1 { pins = "PB4", "PB5", "PB6", "PB7", "PB8"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s0_pins_c: i2s0@2 { pins = "PB7"; function = "i2s0_dout"; drive-strength = <20>; bias-disable; }; i2s0_pins_d: i2s0@3 { pins = "PB8"; function = "i2s0_din"; drive-strength = <20>; bias-disable; }; i2s1_pins_a: i2s1@0 { pins = "PG10", "PG11", "PG12"; function = "i2s1"; drive-strength = <20>; bias-disable; }; i2s1_pins_b: i2s1@1 { pins = "PG10", "PG11", "PG12", "PG13", "PG14"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s1_pins_c: i2s1@2 { pins = "PG13"; function = "i2s1_dout"; drive-strength = <20>; bias-disable; }; i2s1_pins_d: i2s1@3 { pins = "PG14"; function = "i2s1_din"; drive-strength = <20>; bias-disable; }; i2s2_pins_a: i2s2@0 { pins = "PH9", "PH10"; function = "i2s2"; drive-strength = <20>; bias-disable; }; i2s2_pins_b: i2s2@1 { pins = "PH2", "PH3", "PH8", "PH9", "PH10", "PH11", "PH12"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s2_pins_c: i2s2@2 { pins = "PH2", "PH3", "PH12"; function = "i2s2_din"; drive-strength = <20>; bias-disable; }; i2s2_pins_d: i2s2@3 { pins = "PH11"; function = "i2s2_dout"; drive-strength = <20>; bias-disable; }; i2s2_pins_e: i2s2@4 { pins = "PH8"; function = "i2s2_mclk"; drive-strength = <20>; bias-disable; }; i2s3_pins_a: i2s3@0 { pins = "PF3", "PF5", "PF6"; function = "i2s3"; drive-strength = <20>; bias-disable; }; i2s3_pins_b: i2s3@1 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5", "PF6"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; i2s3_pins_c: i2s3@2 { pins = "PF0", "PF2", "PF4"; function = "i2s3_din"; drive-strength = <20>; bias-disable; }; i2s3_pins_d: i2s3@3 { pins = "PF1"; function = "i2s3_dout"; drive-strength = <20>; bias-disable; }; rgb24_pins_a: rgb24@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ "PD20", "PD21", "PD22","PD23","PD24","PD25","PD26","PD27"; function = "dpss"; drive-strength = <30>; }; rgb24_pins_b: rgb24@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ "PD20", "PD21", "PD22", "PD23","PD24","PD25","PD26","PD27"; function = "gpio_in"; }; lvds0_pins_a: lvds0@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "lvds0"; drive-strength = <30>; }; lvds0_pins_b: lvds0@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "gpio_in"; }; nand0_pins_default: nand0@0 { pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; function = "nand0"; drive-strength = <30>; }; nand0_pins_rb: nand0@1 { pins = "PC4", "PC6", "PC3", "PC7"; function = "nand0"; drive-strength = <30>; bias-pull-up; /* only RB&CE should be pulled up */ }; nand0_pins_sleep: nand0@2 { pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; function = "io_disabled"; drive-strength = <10>; }; gmac0_pins_default: gmac0@0 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10","PH13","PH14", "PH15","PH16","PH17","PH18"; drive-strength = <40>; function = "gmac0"; bias-pull-up; }; gmac0_pins_sleep: gmac0@1 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10","PH13","PH14", "PH15","PH16","PH17","PH18"; function = "gpio_in"; }; gmac1_pins_default: gmac1@0 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12","PJ13", "PJ14", "PJ15"; drive-strength = <40>; function = "gmac1"; bias-pull-up; }; gmac1_pins_sleep: gmac1@1 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12","PJ13", "PJ14", "PJ15"; function = "gpio_in"; }; }; &soc { auto_print@54321 { reg = <0x0 0x54321 0x0 0x0>; device_type = "auto_print"; status = "okay"; }; gpio_leds { compatible = "allwinner,sunxi-gpio-leds"; supply-num = <1>; gpio1-supply = <®_bldo1>; gpio-pins = <&pio PG 10 GPIO_ACTIVE_LOW>, <&pio PC 7 GPIO_ACTIVE_LOW>; pin-names = "normal_led", "standby_led"; init-status = <GPIO_ACTIVE_HIGH>, <GPIO_ACTIVE_LOW>; status = "okay"; }; }; &uart0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pins_a>; pinctrl-1 = <&uart0_pins_b>; uart-supply = <®_cldo3>; status = "okay"; }; &uart1 { status = "okay"; }; &uart2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart2_pins_a>; pinctrl-1 = <&uart2_pins_b>; status = "disabled"; }; &uart3 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pins_a>; pinctrl-1 = <&uart3_pins_b>; status = "disabled"; }; &uart4 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart4_pins_a>; pinctrl-1 = <&uart4_pins_b>; status = "disabled"; }; &uart5 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart5_pins_a>; pinctrl-1 = <&uart5_pins_b>; status = "disabled"; }; &uart6 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart6_pins_a>; pinctrl-1 = <&uart6_pins_b>; status = "okay"; }; &uart7 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart7_pins_a>; pinctrl-1 = <&uart7_pins_b>; status = "disabled"; }; &uart8 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart8_pins_a>; pinctrl-1 = <&uart8_pins_b>; status = "disabled"; }; &uart9 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart9_pins_a>; pinctrl-1 = <&uart9_pins_b>; status = "disabled"; }; &lradc { key_cnt = <5>; key0 = <210 0x73>; key1 = <410 0x72>; key2 = <590 0x8B>; key3 = <750 0x1c>; key4 = <880 0x66>; key_debounce; debounce_value = <50>; status = "disabled"; }; &irrx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&irrx_pins_default>; pinctrl-1 = <&irrx_pins_sleep>; status = "disabled"; }; &s_irrx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&s_irrx_pins_default>; pinctrl-1 = <&s_irrx_pins_sleep>; status = "okay"; }; &irtx { pinctrl-names = "default", "sleep"; pinctrl-0 = <&irtx_pins_default>; pinctrl-1 = <&irtx_pins_sleep>; status = "disabled"; }; &gpadc0 { channel_num = <2>; channel_select = <3>; channel_data_select = <3>; channel_compare_select = <3>; channel_cld_select = <3>; channel_chd_select = <3>; channel0_compare_lowdata = <1700000>; channel0_compare_higdata = <1200000>; channel1_compare_lowdata = <460000>; channel1_compare_higdata = <1200000>; status = "disabled"; }; &gpadc1 { channel_num = <2>; channel_select = <3>; channel_data_select = <3>; channel_compare_select = <3>; channel_cld_select = <3>; channel_chd_select = <3>; channel0_compare_lowdata = <1700000>; channel0_compare_higdata = <1200000>; channel1_compare_lowdata = <460000>; channel1_compare_higdata = <1200000>; status = "disabled"; }; &pwm0_0 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_0_pin_active>; pinctrl-1 = <&pwm0_0_pin_sleep>; status = "okay"; }; &pwm0_1 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_1_pin_active>; pinctrl-1 = <&pwm0_1_pin_sleep>; status = "disabled"; }; &pwm0_2 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_2_pin_active>; pinctrl-1 = <&pwm0_2_pin_sleep>; status = "disabled"; }; &pwm0_3 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_3_pin_active>; pinctrl-1 = <&pwm0_3_pin_sleep>; status = "disabled"; }; &pwm0_4 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_4_pin_active>; pinctrl-1 = <&pwm0_4_pin_sleep>; status = "okay"; }; &pwm0_5 { pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_5_pin_active>; pinctrl-1 = <&pwm0_5_pin_sleep>; status = "okay"; }; &ledc { pinctrl-names = "default", "sleep"; pinctrl-0 = <&ledc_pins_a>; pinctrl-1 = <&ledc_pins_b>; led_count = <34>; output_mode = "GRB"; reset_ns = <84>; t1h_ns = <800>; t1l_ns = <320>; t0h_ns = <300>; t0l_ns = <800>; wait_time0_ns = <84>; wait_time1_ns = <84>; wait_data_time_ns = <600000>; status = "disabled"; }; &twi0 { clock-frequency = <400000>; pinctrl-0 = <&twi0_pins_default>; pinctrl-1 = <&twi0_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "disabled"; eeprom@50 { compatible = "atmel,24c16"; reg = <0x50>; status = "okay"; }; pcie_usb_phy@74 { compatible = "combphy,phy74"; reg = <0x74>; status = "disabled"; }; pcie_usb_phy@75 { compatible = "combphy,phy75"; reg = <0x75>; status = "disabled"; }; ctp { compatible = "allwinner,goodix"; reg = <0x5d>; device_type = "ctp"; status = "disabled"; ctp_name = "gt9xxnew_ts"; ctp_twi_id = <0x0>; ctp_twi_addr = <0x5d>; ctp_screen_max_x = <0x320>; ctp_screen_max_y = <0x500>; ctp_revert_x_flag = <0x1>; ctp_revert_y_flag = <0x1>; ctp_exchange_x_y_flag = <0x0>; ctp_int_port = <&pio PH 9 GPIO_ACTIVE_LOW>; ctp_wakeup = <&pio PH 10 GPIO_ACTIVE_LOW>; ctp-supply = <®_cldo2>; ctp_power_ldo_vol = <3300>; }; gt9xx { compatible = "goodix,gt9xx"; reg = <0x5d>; status = "okay"; irq-gpios = <&pio PD 20 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PD 21 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ B4 00 05 20 03 0A 3D 00 01 0A 28 0F 50 32 03 05 00 00 00 00 00 00 06 17 19 1F 14 8E 2E 99 2D 2F 35 11 00 00 00 1A 03 10 00 00 00 00 00 00 00 00 00 00 00 32 50 94 D5 02 07 00 00 04 8E 48 00 8A 4D 00 86 53 00 83 59 00 80 60 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 05 06 07 08 09 0C 0D 0E 0F 10 11 14 15 16 17 FF FF FF FF FF FF FF FF FF FF FF FF 28 27 26 25 24 23 22 21 20 1F 1E 1C 1B 19 13 12 11 10 0F 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF AB 01 ]; }; }; &twi1 { clock-frequency = <400000>; pinctrl-0 = <&twi1_pins_default>; pinctrl-1 = <&twi1_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; status = "disabled"; mir3da { compatible = "allwinner,mir3da"; reg = <0x26>; device_type = "gsensor"; status = "disabled"; gsensor_twi_id = <0x1>; gsensor_twi_addr = <0x26>; gsensor_int1 = <&pio PH 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; gsensor-supply = <®_cldo3>; gsensor_vcc_io_val = <3300>; }; }; &twi2 { clock-frequency = <400000>; pinctrl-0 = <&twi2_pins_default>; pinctrl-1 = <&twi2_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; }; &twi3 { clock-frequency = <400000>; pinctrl-0 = <&twi3_pins_default>; pinctrl-1 = <&twi3_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; }; &twi4 { clock-frequency = <400000>; pinctrl-0 = <&twi4_pins_default>; pinctrl-1 = <&twi4_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "okay"; }; &twi5 { clock-frequency = <400000>; pinctrl-0 = <&twi5_pins_default>; pinctrl-1 = <&twi5_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_dcdc4>; status = "disabled"; gt9xx_secondary { compatible = "goodix,gt9xx_secondary"; reg = <0x5d>; status = "okay"; irq-gpios = <&pio PI 13 GPIO_ACTIVE_LOW>; irq-flags = <2>; reset-gpios = <&pio PI 14 GPIO_ACTIVE_LOW>; vdd_ana-supply = <®_dcdc4>; touchscreen-max-id = <11>; touchscreen-size-x = <1280>; touchscreen-size-y = <800>; touchscreen-max-w = <512>; touchscreen-max-p = <512>; //touchscreen-key-map = <172>, <158>; /*KEY_HOMEPAGE=172, KEY_BACK=158，KEY_MENU=139*/ goodix,slide-wakeup = <0>; goodix,type-a-report = <1>; goodix,driver-send-cfg = <0>; goodix,send-cfg-id = <0>; goodix,resume-in-workqueue = <0>; goodix,int-sync = <1>; goodix,revert_x = <0>; goodix,revert_y = <0>; goodix,swap-x2y = <0>; goodix,tp_idle_support = <1>; goodix,esd-protect = <1>; goodix,auto-update-cfg = <0>; goodix,power-off-sleep = <1>; goodix,pen-suppress-finger = <0>; /* GT9271_Config_20221222_v67.cfg*/ goodix,cfg-group0 = [ 43 B0 04 80 07 0A 35 00 01 08 28 0F 50 32 03 05 00 00 00 00 00 00 00 17 19 1B 14 90 2B 99 2F 31 8E 12 00 00 00 DA 03 10 00 00 00 00 00 00 00 00 00 11 00 29 4B 94 C5 02 07 00 00 04 85 2B 00 7D 31 00 77 37 00 72 3E 00 6F 46 00 6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 C0 00 00 00 00 00 00 00 17 16 15 14 11 10 0F 0E 0D 0C 09 08 07 06 05 04 01 00 FF FF FF FF FF FF 00 00 00 00 00 00 25 24 23 22 21 20 1F 1E 1C 1B 19 14 13 12 11 10 0F 0E 0D 0C 0A 08 07 06 04 02 00 FF FF FF FF FF 00 00 00 00 00 00 00 00 00 00 73 01 ]; }; }; &csi_mclk3_pins_a { pins = "PK13"; function = "ncsi"; }; &csi_mclk3_pins_b { pins = "PK13"; }; &mipib_4lane_pins_a { pins = "PK6", "PK7", "PK8", "PK9"; }; &mipib_4lane_pins_b { pins = "PK6", "PK7", "PK8", "PK9"; }; &vind0 { csi_top = <360000000>; csi_isp = <300000000>; vind_mclkpin-supply = <®_bldo3>; /* vcc-pe */ vind_mclkpin_vol = <1800000>; vind_mcsipin-supply = <®_bldo3>; /* vcc-pk */ vind_mcsipin_vol = <1800000>; vind_mipipin-supply = <®_bldo3>; /* vcc-mcsi */ vind_mipipin_vol = <1800000>; status = "okay"; csi3:csi@5823000 { pinctrl-names = "default","sleep"; pinctrl-0 = <&ncsi_bt1120_pins_a>; pinctrl-1 = <&ncsi_bt1120_pins_b>; status = "okay"; }; tdm0:tdm@5908000 { work_mode = <0>; }; isp00:isp@5900000 { work_mode = <0>; }; isp01:isp@58ffffc { status = "disabled"; }; isp02:isp@58ffff8 { status = "disabled"; }; isp03:isp@58ffff4 { status = "disabled"; }; isp10:isp@4 { status = "okay"; }; isp20:isp@5 { status = "okay"; }; scaler00:scaler@5910000 { work_mode = <0>; }; scaler01:scaler@590fffc { status = "disabled"; }; scaler02:scaler@590fff8 { status = "disabled"; }; scaler03:scaler@590fff4 { status = "disabled"; }; scaler10:scaler@5910400 { work_mode = <0>; }; scaler11:scaler@59103fc { status = "disabled"; }; scaler12:scaler@59103f8 { status = "disabled"; }; scaler13:scaler@59103f4 { status = "disabled"; }; scaler20:scaler@5910800 { work_mode = <0>; }; scaler21:scaler@59107fc { status = "disabled"; }; scaler22:scaler@59107f8 { status = "disabled"; }; scaler23:scaler@59107f4 { status = "disabled"; }; scaler30:scaler@5910c00 { work_mode = <0>; }; scaler31:scaler@5910bfc { status = "disabled"; }; scaler32:scaler@5910bf8 { status = "disabled"; }; scaler33:scaler@5910bf4 { status = "disabled"; }; scaler40:scaler@16 { status = "okay"; }; scaler50:scaler@17 { status = "okay"; }; actuator0: actuator@2108180 { device_type = "actuator0"; actuator0_name = "dw9714_act"; actuator0_slave = <0x18>; actuator0_af_pwdn = <>; actuator0_afvdd = "afvcc-csi"; actuator0_afvdd_vol = <2800000>; status = "disabled"; }; flash0: flash@2108190 { device_type = "flash0"; flash0_type = <2>; flash0_en = <&r_pio PL 11 GPIO_ACTIVE_LOW>; flash0_mode = <>; flash0_flvdd = ""; flash0_flvdd_vol = <>; device_id = <0>; status = "disabled"; }; sensor0:sensor@5812000 { device_type = "sensor0"; sensor0_mname = "tp2815_mipi"; sensor0_twi_cci_id = <2>; sensor0_twi_addr = <0x88>; sensor0_mclk_id = <0>; sensor0_pos = "rear"; sensor0_isp_used = <0>; sensor0_fmt = <0>; sensor0_stby_mode = <0>; sensor0_vflip = <0>; sensor0_hflip = <0>; sensor0_cameravdd-supply = <>; sensor0_cameravdd_vol = <>; sensor0_iovdd-supply = <>; sensor0_iovdd_vol = <>; sensor0_avdd-supply = <>; sensor0_avdd_vol = <>; sensor0_dvdd-supply = <>; sensor0_dvdd_vol = <>; sensor0_power_en = <>; sensor0_reset = <&pio PK 11 GPIO_ACTIVE_LOW>; sensor0_pwdn = <>; status = "okay"; }; sensor1:sensor@5812010 { device_type = "sensor1"; sensor1_mname = "nvp6158"; sensor1_twi_cci_id = <3>; sensor1_twi_addr = <0x64>; sensor1_mclk_id = <3>; sensor1_pos = "front"; sensor1_isp_used = <0>; sensor1_fmt = <0>; sensor1_stby_mode = <0>; sensor1_vflip = <0>; sensor1_hflip = <0>; sensor1_iovdd-supply = <>; sensor1_iovdd_vol = <>; sensor1_avdd-supply = <>; sensor1_avdd_vol = <>; sensor1_dvdd-supply = <>; sensor1_dvdd_vol = <>; sensor1_power_en = <>; sensor1_reset = <&pio PK 10 GPIO_ACTIVE_LOW>; sensor1_pwdn = <>; status = "okay"; }; vinc00:vinc@5830000 { vinc0_csi_sel = <0>; vinc0_mipi_sel = <0>; vinc0_isp_sel = <4>; vinc0_isp_tx_ch = <0>; vinc0_tdm_rx_sel = <0>; vinc0_rear_sensor_sel = <0>; vinc0_front_sensor_sel = <0>; vinc0_sensor_list = <0>; device_id = <0>; work_mode = <0x0>; status = "okay"; }; vinc01:vinc@582fffc { vinc1_csi_sel = <1>; vinc1_mipi_sel = <2>; vinc1_isp_sel = <1>; vinc1_isp_tx_ch = <0>; vinc1_tdm_rx_sel = <1>; vinc1_rear_sensor_sel = <1>; vinc1_front_sensor_sel = <1>; vinc1_sensor_list = <0>; device_id = <1>; status = "disabled"; }; vinc02:vinc@582fff8 { vinc2_csi_sel = <2>; vinc2_mipi_sel = <0xff>; vinc2_isp_sel = <2>; vinc2_isp_tx_ch = <2>; vinc2_tdm_rx_sel = <2>; vinc2_rear_sensor_sel = <0>; vinc2_front_sensor_sel = <0>; vinc2_sensor_list = <0>; device_id = <2>; status = "disabled"; }; vinc03:vinc@582fff4 { vinc3_csi_sel = <0>; vinc3_mipi_sel = <0xff>; vinc3_isp_sel = <0>; vinc3_isp_tx_ch = <0>; vinc3_tdm_rx_sel = <0>; vinc3_rear_sensor_sel = <1>; vinc3_front_sensor_sel = <1>; vinc3_sensor_list = <0>; device_id = <3>; status = "disabled"; }; vinc10:vinc@5831000 { vinc4_csi_sel = <0>; vinc4_mipi_sel = <0>; vinc4_isp_sel = <4>; vinc4_isp_tx_ch = <1>; vinc4_tdm_rx_sel = <0>; vinc4_rear_sensor_sel = <0>; vinc4_front_sensor_sel = <0>; vinc4_sensor_list = <0>; device_id = <4>; work_mode = <0x0>; status = "okay"; }; vinc11:vinc@5830ffc { vinc5_csi_sel = <2>; vinc5_mipi_sel = <0xff>; vinc5_isp_sel = <1>; vinc5_isp_tx_ch = <1>; vinc5_tdm_rx_sel = <1>; vinc5_rear_sensor_sel = <0>; vinc5_front_sensor_sel = <0>; vinc5_sensor_list = <0>; device_id = <5>; status = "disabled"; }; vinc12:vinc@5830ff8 { vinc6_csi_sel = <2>; vinc6_mipi_sel = <0xff>; vinc6_isp_sel = <0>; vinc6_isp_tx_ch = <0>; vinc6_tdm_rx_sel = <0>; vinc6_rear_sensor_sel = <0>; vinc6_front_sensor_sel = <0>; vinc6_sensor_list = <0>; device_id = <6>; status = "disabled"; }; vinc13:vinc@5830ff4 { vinc7_csi_sel = <2>; vinc7_mipi_sel = <0xff>; vinc7_isp_sel = <0>; vinc7_isp_tx_ch = <0>; vinc7_tdm_rx_sel = <0>; vinc7_rear_sensor_sel = <0>; vinc7_front_sensor_sel = <0>; vinc7_sensor_list = <0>; device_id = <7>; status = "disabled"; }; vinc20:vinc@5832000 { vinc8_csi_sel = <0>; vinc8_mipi_sel = <0>; vinc8_isp_sel = <4>; vinc8_isp_tx_ch = <2>; vinc8_tdm_rx_sel = <0>; vinc8_rear_sensor_sel = <0>; vinc8_front_sensor_sel = <0>; vinc8_sensor_list = <0>; device_id = <8>; work_mode = <0x0>; status = "okay"; }; vinc21:vinc@5831ffc { vinc9_csi_sel = <2>; vinc9_mipi_sel = <0xff>; vinc9_isp_sel = <0>; vinc9_isp_tx_ch = <0>; vinc9_tdm_rx_sel = <0>; vinc9_rear_sensor_sel = <0>; vinc9_front_sensor_sel = <0>; vinc9_sensor_list = <0>; device_id = <9>; status = "disabled"; }; vinc22:vinc@5831ff8 { vinc10_csi_sel = <2>; vinc10_mipi_sel = <0xff>; vinc10_isp_sel = <0>; vinc10_isp_tx_ch = <0>; vinc10_tdm_rx_sel = <0>; vinc10_rear_sensor_sel = <0>; vinc10_front_sensor_sel = <0>; vinc10_sensor_list = <0>; device_id = <10>; status = "disabled"; }; vinc23:vinc@5831ff4 { vinc11_csi_sel = <2>; vinc11_mipi_sel = <0xff>; vinc11_isp_sel = <0>; vinc11_isp_tx_ch = <0>; vinc11_tdm_rx_sel = <0>; vinc11_rear_sensor_sel = <0>; vinc11_front_sensor_sel = <0>; vinc11_sensor_list = <0>; device_id = <11>; status = "disabled"; }; vinc30:vinc@5833000 { vinc12_csi_sel = <0>; vinc12_mipi_sel = <0>; vinc12_isp_sel = <4>; vinc12_isp_tx_ch = <3>; vinc12_tdm_rx_sel = <0>; vinc12_rear_sensor_sel = <0>; vinc12_front_sensor_sel = <0>; vinc12_sensor_list = <0>; device_id = <12>; work_mode = <0x0>; status = "okay"; }; vinc31:vinc@5832ffc { vinc13_csi_sel = <2>; vinc13_mipi_sel = <0xff>; vinc13_isp_sel = <0>; vinc13_isp_tx_ch = <0>; vinc13_tdm_rx_sel = <0>; vinc13_rear_sensor_sel = <0>; vinc13_front_sensor_sel = <0>; vinc13_sensor_list = <0>; device_id = <13>; status = "disabled"; }; vinc32:vinc@5832ff8 { vinc14_csi_sel = <2>; vinc14_mipi_sel = <0xff>; vinc14_isp_sel = <0>; vinc14_isp_tx_ch = <0>; vinc14_tdm_rx_sel = <0>; vinc14_rear_sensor_sel = <0>; vinc14_front_sensor_sel = <0>; vinc14_sensor_list = <0>; device_id = <14>; status = "disabled"; }; vinc33:vinc@5832ff4 { vinc15_csi_sel = <2>; vinc15_mipi_sel = <0xff>; vinc15_isp_sel = <0>; vinc15_isp_tx_ch = <0>; vinc15_tdm_rx_sel = <0>; vinc15_rear_sensor_sel = <0>; vinc15_front_sensor_sel = <0>; vinc15_sensor_list = <0>; device_id = <15>; status = "disabled"; }; vinc40:vinc@5834000 { vinc16_csi_sel = <3>; vinc16_mipi_sel = <0xff>; vinc16_isp_sel = <5>; vinc16_isp_tx_ch = <0>; vinc16_tdm_rx_sel = <0>; vinc16_rear_sensor_sel = <1>; vinc16_front_sensor_sel = <1>; vinc16_sensor_list = <0>; device_id = <16>; status = "okay"; }; vinc50:vinc@5835000 { vinc17_csi_sel = <3>; vinc17_mipi_sel = <0xff>; vinc17_isp_sel = <5>; vinc17_isp_tx_ch = <1>; vinc17_tdm_rx_sel = <0>; vinc17_rear_sensor_sel = <1>; vinc17_front_sensor_sel = <1>; vinc17_sensor_list = <0>; device_id = <17>; status = "okay"; }; }; &twi6 { clock-frequency = <400000>; pinctrl-0 = <&s_twi0_pins_default>; pinctrl-1 = <&s_twi0_pins_sleep>; pinctrl-names = "default", "sleep"; device_type = "twi6"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; no_suspend = <1>; status = "okay"; tcs0: tcs@41 { compatible = "ext,tcs4838"; reg = <0x41>; status = "disabled"; tcs4838_delay = <0>; regulator1: regulators@1 { reg_tcs0: dcdc0 { regulator-name = "tcs4838-dcdc0"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_tcs1: dcdc1 { regulator-name = "tcs4838-dcdc1"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; }; }; virtual-ext-dcdc0 { compatible = "xpower-vregulator,ext-dcdc0"; dcdc0-supply = <®_tcs0>; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_tcs1>; }; }; sy0: sy@60 { compatible = "ext,sy8827g"; reg = <0x60>; status = "disabled"; sy8827g_delay = <0>; regulator2: regulators@2 { reg_sy0: dcdc0 { regulator-name = "sy8827g-dcdc0"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_sy1: dcdc1 { regulator-name = "sy8827g-dcdc1"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <520>; regulator-enable-ramp-delay = <1000>; }; }; virtual-ext-dcdc0 { compatible = "xpower-vregulator,ext-dcdc0"; dcdc0-supply = <®_sy0>; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_sy1>; }; }; axp1530: axp1530@36{ compatible = "ext,axp1530"; status = "okay"; reg = <0x36>; wakeup-source; regulators{ reg_ext_axp1530_dcdc1: dcdc1 { regulator-name = "axp1530-dcdc1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3400000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-always-on; }; reg_ext_axp1530_dcdc2: dcdc2 { regulator-name = "axp1530-dcdc2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1540000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-ramp-delay = <200>; /* FIXME */ regulator-always-on; }; reg_ext_axp1530_dcdc3: dcdc3 { regulator-name = "axp1530-dcdc3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1840000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; regulator-always-on; }; reg_ext_axp1530_aldo1: ldo1 { regulator-name = "axp1530-aldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; }; reg_ext_axp1530_dldo1: ldo2 { regulator-name = "axp1530-dldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-step-delay-us = <25>; regulator-final-delay-us = <50>; }; }; virtual-ext-dcdc1 { compatible = "xpower-vregulator,ext-dcdc1"; dcdc1-supply = <®_ext_axp1530_dcdc1>; }; virtual-ext-dcdc2 { compatible = "xpower-vregulator,ext-dcdc2"; dcdc2-supply = <®_ext_axp1530_dcdc2>; }; virtual-ext-dcdc3 { compatible = "xpower-vregulator,ext-dcdc3"; dcdc3-supply = <®_ext_axp1530_dcdc3>; }; virtual-ext-aldo1 { compatible = "xpower-vregulator,ext-aldo1"; aldo1-supply = <®_ext_axp1530_aldo1>; }; virtual-ext-dldo1 { compatible = "xpower-vregulator,ext-dldo1"; dldo1-supply = <®_ext_axp1530_dldo1>; }; }; pmu0: pmu@34 { compatible = "x-powers,axp2202"; reg = <0x34>; status = "okay"; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&nmi_intc>; x-powers,drive-vbus-en; pmu_reset = <0>; pmu_irq_wakeup = <1>; pmu_hot_shutdown = <1>; wakeup-source; usb_power_supply: usb_power_supply { compatible = "x-powers,axp2202-usb-power-supply"; status = "okay"; pmu_usbpc_vol = <4600>; pmu_usbpc_cur = <500>; pmu_usbad_vol = <4000>; pmu_usbad_cur = <2500>; pmu_usb_typec_used = <1>; wakeup_usb_in; wakeup_usb_out; det_acin_supply = <&gpio_power_supply>; pmu_acin_usbid_drv = <&pio PH 12 GPIO_ACTIVE_LOW>; pmu_vbus_det_gpio = <&pio PH 13 GPIO_ACTIVE_LOW>; }; gpio_power_supply: gpio_power_supply { compatible = "x-powers,gpio-supply"; status = "disabled"; pmu_acin_det_gpio = <&pio PH 14 GPIO_ACTIVE_LOW>; det_usb_supply = <&usb_power_supply>; }; bat_power_supply: bat-power-supply { compatible = "x-powers,axp2202-bat-power-supply"; param = <&axp2202_parameter>; status = "disabled"; pmu_chg_ic_temp = <0>; pmu_battery_rdc= <170>; pmu_battery_cap = <5000>; pmu_runtime_chgcur = <1000>; pmu_suspend_chgcur = <1500>; pmu_shutdown_chgcur = <1500>; pmu_init_chgvol = <4350>; pmu_battery_warning_level1 = <15>; pmu_battery_warning_level2 = <0>; pmu_chgled_func = <0>; pmu_chgled_type = <0>; pmu_bat_para1 = <0>; pmu_bat_para2 = <0>; pmu_bat_para3 = <0>; pmu_bat_para4 = <0>; pmu_bat_para5 = <0>; pmu_bat_para6 = <0>; pmu_bat_para7 = <2>; pmu_bat_para8 = <3>; pmu_bat_para9 = <4>; pmu_bat_para10 = <6>; pmu_bat_para11 = <9>; pmu_bat_para12 = <14>; pmu_bat_para13 = <26>; pmu_bat_para14 = <38>; pmu_bat_para15 = <49>; pmu_bat_para16 = <52>; pmu_bat_para17 = <56>; pmu_bat_para18 = <60>; pmu_bat_para19 = <64>; pmu_bat_para20 = <70>; pmu_bat_para21 = <77>; pmu_bat_para22 = <83>; pmu_bat_para23 = <87>; pmu_bat_para24 = <90>; pmu_bat_para25 = <95>; pmu_bat_para26 = <99>; pmu_bat_para27 = <99>; pmu_bat_para28 = <100>; pmu_bat_para29 = <100>; pmu_bat_para30 = <100>; pmu_bat_para31 = <100>; pmu_bat_para32 = <100>; pmu_bat_temp_enable = <1>; pmu_jetia_en = <1>; pmu_bat_charge_ltf = <1695>; //-5 pmu_bat_charge_htf = <151>; //60 pmu_bat_shutdown_ltf = <2125>; //-10 pmu_bat_shutdown_htf = <131>; //65 pmu_jetia_cool = <1361>; //0 pmu_jetia_warm = <208>; //50 pmu_jcool_ifall = <0>;//100% pmu_jwarm_ifall = <0>;//100% pmu_bat_temp_para1 = <4378>; //Murata -25 pmu_bat_temp_para2 = <2682>; //-15 pmu_bat_temp_para3 = <2125>; //-10 pmu_bat_temp_para4 = <1695>; //-5 pmu_bat_temp_para5 = <1361>;//0 pmu_bat_temp_para6 = <1101>; //5 pmu_bat_temp_para7 = <896>; //10 pmu_bat_temp_para8 = <604>; //20 pmu_bat_temp_para9 = <416>; //30 pmu_bat_temp_para10 = <292>; //40 pmu_bat_temp_para11 = <246>; //45 pmu_bat_temp_para12 = <208>; //50 pmu_bat_temp_para13 = <177>; //55 pmu_bat_temp_para14 = <151>; //60 pmu_bat_temp_para15 = <111>; //70 pmu_bat_temp_para16 = <83>; //80 wakeup_bat_out; wakeup_new_soc; /* wakeup_bat_in; */ /* wakeup_bat_charging; */ /* wakeup_bat_charge_over; */ /* wakeup_low_warning1; */ /* wakeup_low_warning2; */ wakeup_bat_untemp_work; wakeup_bat_ovtemp_work; /* wakeup_bat_untemp_chg; */ /* wakeup_bat_ovtemp_chg; */ }; powerkey0: powerkey@0 { status = "okay"; compatible = "x-powers,axp2101-pek"; pmu_powkey_off_time = <6000>; pmu_powkey_off_func = <0>; pmu_powkey_off_en = <1>; pmu_powkey_long_time = <1500>; pmu_powkey_on_time = <512>; wakeup_rising; wakeup_falling; }; regulator0: regulators@0 { reg_dcdc1: dcdc1 { regulator-name = "axp2202-dcdc1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1540000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_dcdc2: dcdc2 { regulator-name = "axp2202-dcdc2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3400000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_dcdc3: dcdc3 { regulator-name = "axp2202-dcdc3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1840000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; regulator-always-on; }; reg_dcdc4: dcdc4 { regulator-name = "axp2202-dcdc4"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3700000>; regulator-ramp-delay = <250>; regulator-enable-ramp-delay = <1000>; }; reg_rtcldo: rtcldo { /* RTC_LDO is a fixed, always-on regulator */ regulator-name = "axp2202-rtcldo"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_aldo1: aldo1 { regulator-name = "axp2202-aldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_aldo2: aldo2 { regulator-name = "axp2202-aldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_aldo3: aldo3 { regulator-name = "axp2202-aldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_aldo4: aldo4 { regulator-name = "axp2202-aldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; }; reg_bldo1: bldo1 { regulator-name = "axp2202-bldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_bldo2: bldo2 { regulator-name = "axp2202-bldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_bldo3: bldo3 { regulator-name = "axp2202-bldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_bldo4: bldo4 { regulator-name = "axp2202-bldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo1: cldo1 { regulator-name = "axp2202-cldo1"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo2: cldo2 { regulator-name = "axp2202-cldo2"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; }; reg_cldo3: cldo3 { regulator-name = "axp2202-cldo3"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-ramp-delay = <2500>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_cldo4: cldo4 { regulator-name = "axp2202-cldo4"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <3500000>; regulator-enable-ramp-delay = <1000>; regulator-boot-on; regulator-always-on; }; reg_cpusldo: cpusldo { /* cpus */ regulator-name = "axp2202-cpusldo"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1400000>; regulator-boot-on; regulator-always-on; }; reg_vmid: vmid { regulator-name = "axp2202-vmid"; regulator-enable-ramp-delay = <1000>; }; reg_drivevbus: drivevbus { regulator-name = "axp2202-drivevbus"; regulator-enable-ramp-delay = <1000>; drivevbusin-supply = <®_vmid>; }; }; virtual-dcdc1 { compatible = "xpower-vregulator,dcdc1"; dcdc1-supply = <®_dcdc1>; }; virtual-dcdc2 { compatible = "xpower-vregulator,dcdc2"; dcdc2-supply = <®_dcdc2>; }; virtual-dcdc3 { compatible = "xpower-vregulator,dcdc3"; dcdc3-supply = <®_dcdc3>; }; virtual-dcdc4 { compatible = "xpower-vregulator,dcdc4"; dcdc4-supply = <®_dcdc4>; }; virtual-rtcldo { compatible = "xpower-vregulator,rtcldo"; rtcldo-supply = <®_rtcldo>; }; virtual-aldo1 { compatible = "xpower-vregulator,aldo1"; aldo1-supply = <®_aldo1>; }; virtual-aldo2 { compatible = "xpower-vregulator,aldo2"; aldo2-supply = <®_aldo2>; }; virtual-aldo3 { compatible = "xpower-vregulator,aldo3"; aldo3-supply = <®_aldo3>; }; virtual-aldo4 { compatible = "xpower-vregulator,aldo4"; aldo4-supply = <®_aldo4>; }; virtual-bldo1 { compatible = "xpower-vregulator,bldo1"; bldo1-supply = <®_bldo1>; }; virtual-bldo2 { compatible = "xpower-vregulator,bldo2"; bldo2-supply = <®_bldo2>; }; virtual-bldo3 { compatible = "xpower-vregulator,bldo3"; bldo3-supply = <®_bldo3>; }; virtual-bldo4 { compatible = "xpower-vregulator,bldo4"; bldo4-supply = <®_bldo4>; }; virtual-cldo1 { compatible = "xpower-vregulator,cldo1"; cldo1-supply = <®_cldo1>; }; virtual-cldo2 { compatible = "xpower-vregulator,cldo2"; cldo2-supply = <®_cldo2>; }; virtual-cldo3 { compatible = "xpower-vregulator,cldo3"; cldo3-supply = <®_cldo3>; }; virtual-cldo4 { compatible = "xpower-vregulator,cldo4"; cldo4-supply = <®_cldo4>; }; virtual-cpusldo { compatible = "xpower-vregulator,cpusldo"; cpusldo-supply = <®_cpusldo>; }; virtual-drivevbus { compatible = "xpower-vregulator,drivevbus"; drivevbus-supply = <®_drivevbus>; }; axp_gpio0: axp_gpio@0 { gpio-controller; #size-cells = <0>; #gpio-cells = <6>; status = "okay"; }; }; }; /{ axp2202_parameter:axp2202-parameter { select = "battery-model"; battery-model { parameter = /bits/ 8 <0x01 0xf5 0x40 0x00 0x1b 0x1e 0x28 0x0f 0x0c 0x1e 0x32 0x02 0x14 0x05 0x0a 0x04 0x74 0xfb 0xc8 0x0d 0x43 0x10 0xcc 0xfb 0x46 0x01 0xea 0x14 0x10 0x06 0xcc 0x06 0x9d 0x0b 0x63 0x0f 0xf4 0x0f 0x94 0x0a 0x4f 0x0e 0xf4 0x0e 0xeb 0x04 0xdd 0x04 0xd1 0x09 0xc7 0x0e 0xb9 0x0e 0xb6 0x09 0xae 0x0e 0x97 0x0e 0x97 0x04 0x86 0x04 0x73 0x09 0x69 0x0e 0x60 0x0e 0x1e 0x08 0x21 0x58 0x28 0x22 0x18 0x06 0x0d 0x01 0xc5 0x98 0x7e 0x66 0x4e 0x44 0x38 0x1a 0x12 0x0a 0xf6 0x00 0x00 0xf6 0x00 0xf6 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xf6 0x00 0x00 0xf6 0x00 0xf6 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xfb 0x00 0x00 0xf6 0x00 0x00 0xf6 0x00 0xf6>; }; }; }; &twi7 { clock-frequency = <400000>; pinctrl-0 = <&s_twi1_pins_default>; pinctrl-1 = <&s_twi1_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_aldo3>; status = "disabled"; ac107: ac107@36 { #sound-dai-cells = <0>; compatible = "allwinner,sunxi-ac107"; reg = <0x36>; pllclk-src = "MCLK"; sysclk-src = "MCLK"; pcm-bit-first = "MSB"; frame-sync-width = <1>; rx-chmap = <0xaaaa>; ch1-dig-vol = <160>; ch2-dig-vol = <160>; ch1-pga-gain = <26>; ch2-pga-gain = <26>; status = "disabled"; }; }; &twi8 { clock-frequency = <400000>; pinctrl-0 = <&s_twi2_pins_default>; pinctrl-1 = <&s_twi2_pins_sleep>; pinctrl-names = "default", "sleep"; /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ twi_drv_used = <1>; twi-supply = <®_aldo3>; status = "disabled"; }; &sdc2 { non-removable; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; no-sdio; no-sd; ctl-spec-caps = <0x308>; cap-mmc-highspeed; sunxi-power-save-mode; sunxi-dis-signal-vol-sw; mmc-bootpart-noacc; /*cap-hsq;*/ cqe-on; ctl-cmdq-md = <0x2>; max-frequency = <150000000>; vmmc-supply = <®_cldo3>; /*emmc io vol 3.3v*/ /*vqmmc-supply = <®_aldo1>;*/ /*emmc io vol 1.8v*/ vqmmc-supply = <®_cldo1>; status = "disabled"; }; &sdc0 { bus-width = <4>; cd-gpios = <&pio PF 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /*non-removable;*/ /*broken-cd;*/ /*cd-inverted*/ /*data3-detect;*/ /*card-pwr-gpios = <&pio PH 14 1 1 2 0xffffffff>;*/ cd-used-24M; cd-set-debounce = <0x1>; cap-sd-highspeed; sd-uhs-sdr50; sd-uhs-ddr50; sd-uhs-sdr104; no-sdio; no-mmc; sunxi-power-save-mode; /*sunxi-dis-signal-vol-sw;*/ max-frequency = <150000000>; ctl-spec-caps = <0x408>; sunxi-dly-208M = <0xff 1 0xff 0xff 0xff 0xff>; vmmc-supply = <®_cldo3>; vqmmc33sw-supply = <®_cldo3>; vdmmc33sw-supply = <®_cldo3>; vqmmc18sw-supply = <®_bldo3>; vdmmc18sw-supply = <®_bldo3>; status = "okay"; }; &sdc1 { bus-width = <4>; no-mmc; no-sd; cap-sd-highspeed; /*sd-uhs-sdr12*/ sd-uhs-sdr25; sd-uhs-sdr50; sd-uhs-ddr50; sd-uhs-sdr104; /*sunxi-power-save-mode;*/ sunxi-dis-signal-vol-sw; cap-sdio-irq; keep-power-in-suspend; ignore-pm-notify; max-frequency = <150000000>; ctl-spec-caps = <0x408>; status = "okay"; }; &nand0 { compatible = "allwinner,sun55iw3-nand"; device_type = "nand0"; //reg = <0x0 0x04011000 0x0 0x1000>;/* nand0 */ pinctrl-names = "default", "sleep"; pinctrl-0 = <&nand0_pins_default &nand0_pins_rb>; pinctrl-1 = <&nand0_pins_sleep>; nand0_regulator1 = "vcc-nand"; nand0_regulator2 = "none"; nand0_cache_level = <0x55aaaa55>; nand0_flush_cache_num = <0x55aaaa55>; nand0_capacity_level = <0x55aaaa55>; nand0_id_number_ctl = <0x55aaaa55>; nand0_print_level = <0x55aaaa55>; nand0_p0 = <0x55aaaa55>; nand0_p1 = <0x55aaaa55>; nand0_p2 = <0x55aaaa55>; nand0_p3 = <0x55aaaa55>; chip_code = "sun55iw3"; status = "disabled"; }; &rfkill { compatible = "allwinner,sunxi-rfkill"; chip_en; power_en; pinctrl-0; pinctrl-names; status = "okay"; /* wlan session */ wlan { compatible = "allwinner,sunxi-wlan"; clocks; clock-names; wlan_power = "axp2202-aldo3", "axp2202-bldo1"; /* vcc-pl/vcc-pg/vcc-pm */ wlan_power_vol= <3300000>, <1800000>; wlan_busnum = <0x1>; wlan_regon = <&r_pio PM 1 GPIO_ACTIVE_HIGH>; wlan_hostwake = <&r_pio PM 0 GPIO_ACTIVE_HIGH>; wakeup-source; }; /* bt session */ bt { compatible = "allwinner,sunxi-bt"; clocks; clock-names; bt_power = "axp2202-aldo3", "axp2202-bldo1"; /* vcc-pl/vcc-pg/vcc-pm */ bt_power_vol= <3300000>, <1800000>; bt_rst_n = <&r_pio PM 2 GPIO_ACTIVE_LOW>; }; }; &addr_mgt { compatible = "allwinner,sunxi-addr_mgt"; type_addr_wifi = <0x0>; type_addr_bt = <0x0>; type_addr_eth = <0x0>; status = "okay"; }; &btlpm { compatible = "allwinner,sunxi-btlpm"; uart_index = <0x1>; bt_wake = <&r_pio PM 3 GPIO_ACTIVE_HIGH>; bt_hostwake = <&r_pio PM 4 GPIO_ACTIVE_HIGH>; wakeup-source; status = "okay"; }; /* *usb_port_type: usb mode. 0-device, 1-host, 2-otg. *usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-id/dpdm detect. *usb_detect_mode: 0-thread scan, 1-id gpio interrupt. *usb_id_gpio: gpio for id detect. *usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl"; *usb_wakeup_suspend：0-SUPER_STANDBY, 1-USB_STANDBY. */ &usbc0 { device_type = "usbc0"; usb_port_type = <0x2>; usb_detect_type = <0x1>; usb_detect_mode = <0x0>; usb_id_gpio = <&r_pio PL 10 GPIO_ACTIVE_HIGH>; enable-active-high; usb_det_vbus_gpio = <&r_pio PM 5 GPIO_ACTIVE_HIGH>; enable-active-high; detvbus_io-supply = <®_bldo1>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; usb_luns = <3>; usb_serial_unique = <0>; usb_serial_number = "20080411"; rndis_wceis = <1>; status = "okay"; }; &udc { det_vbus_supply = <&usb_power_supply>; phy_range = <0x153>; status = "okay"; }; &ehci0 { drvvbus-supply = <®_usb0_vbus>; phy_range = <0x153>; status = "okay"; }; &ohci0 { drvvbus-supply = <®_usb0_vbus>; phy_range = <0x153>; status = "okay"; }; &usbc1 { device_type = "usbc1"; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "okay"; }; &ehci1 { drvvbus-supply = <®_usb1_vbus>; phy_range = <0x153>; status = "okay"; }; &ohci1 { drvvbus-supply = <®_usb1_vbus>; phy_range = <0x153>; status = "okay"; }; &usbc2 { device_type = "usbc2"; drvvbus-supply = <®_usb1_vbus>; status = "okay"; }; &xhci2 { dr_mode = "host"; status = "okay"; }; &u2phy { status = "okay"; }; &combophy { resets = <&ccu RST_BUS_PCIE_USB3>; phy_use_sel = <1>; /* 0:PCIE; 1:USB3 */ status = "okay"; }; &gpu { gpu_idle = <1>; dvfs_status = <1>; mali-supply = <®_dcdc2>; }; /*---------------------------------------------------------------------------------- disp init configuration disp_mode (0:screen0<screen0,fb0>) screenx_output_type (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo) screenx_output_mode (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50) (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60) screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420) screenx_output_bits (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit) screenx_output_eotf (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG) screenx_output_cs (for hdmi, 0:undefined 257:BT709 260:BT601 263:BT2020) screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode) screen0_output_range (for hdmi, 0:default 1:full 2:limited) screen0_output_scan (for hdmi, 0:no data 1:overscan 2:underscan) screen0_output_aspect_ratio (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9) fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444) fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA) fb0_scaler_mode_enable(scaler mode enable, used FE) fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0) lcdx_backlight (lcd init backlight,the range:[0,256],default:197 lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50) lcd0_contrast (LCD contrast, 0~100) lcd0_saturation (LCD saturation, 0~100) lcd0_hue (LCD hue, 0~100) framebuffer software rotation setting: disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y, set fbX_height to lcd_x) degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree) degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree) devX_output_type : config output type in bootGUI framework in UBOOT-2018. (0:none; 1:lcd; 2:tv; 4:hdmi;) devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018 devX_screen_id : config display index of bootGUI framework in UBOOT-2018 devX_do_hpd : whether do hpd detectation or not in UBOOT-2018 chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6 channel, 1:dual display with 4 channel in main display and 2 channel in second display, 2:dual display with 3 channel in main display and 3 channel in second in display. ----------------------------------------------------------------------------------*/ &disp { disp_init_enable = <1>; disp_mode = <0>; screen0_output_type = <1>; screen0_output_mode = <4>; screen0_to_lcd_index = <0>; screen1_output_type = <3>; screen1_output_mode = <5>; screen1_to_lcd_index = <2>; screen1_output_format = <0>; screen1_output_bits = <0>; screen1_output_eotf = <4>; screen1_output_cs = <257>; screen1_output_dvi_hdmi = <2>; screen1_output_range = <2>; screen1_output_scan = <0>; screen1_output_aspect_ratio = <8>; dev0_output_type = <1>; dev0_output_mode = <4>; dev0_screen_id = <0>; dev0_do_hpd = <0>; dev1_output_type = <4>; dev1_output_mode = <10>; dev1_screen_id = <1>; dev1_do_hpd = <1>; def_output_dev = <0>; hdmi_mode_check = <1>; display_device_num = <3>; primary_display_type = "LCD"; primary_de_id = <0>; primary_framebuffer_width = <1280>; primary_framebuffer_height = <800>; primary_dpix = <213>; primary_dpiy = <213>; extend0_display_type = "HDMI"; extend0_de_id = <1>; extend0_framebuffer_width = <1920>; extend0_framebuffer_height = <1080>; extend0_dpix = <160>; extend0_dpiy = <160>; extend1_display_type = "DP"; extend1_de_id = <1>; extend1_framebuffer_width = <1920>; extend1_framebuffer_height = <1080>; extend1_dpix = <160>; extend1_dpiy = <160>; fb_format = <0>; fb_num = <2>; /*<disp channel layer zorder>*/ fb0_map = <0 1 0 16>; fb0_width = <1280>; fb0_height = <800>; /*<disp channel layer zorder>*/ fb1_map = <1 1 0 16>; fb1_width = <1920>; fb1_height = <1080>; /*<disp channel layer zorder>*/ fb2_map = <1 0 0 16>; fb2_width = <1280>; fb2_height = <720>; /*<disp channel layer zorder>*/ fb3_map = <1 1 0 16>; fb3_width = <300>; fb3_height = <300>; chn_cfg_mode = <3>; disp_para_zone = <1>; /* dual display clock constraints: 1. two tcons cannot share a parent clock. 2. when dsi uses ccu clock, combphy and corresponding tcon use the same parent clock. */ assigned-clocks = <&ccu CLK_DE>, <&ccu CLK_VO0_TCONLCD0>, <&ccu CLK_VO0_TCONLCD1>, <&ccu CLK_VO1_TCONLCD0>, <&ccu CLK_TCONTV>, <&ccu CLK_TCONTV1>, <&ccu CLK_COMBPHY0>, <&ccu CLK_COMBPHY1>, <&ccu CLK_DSI0>, <&ccu CLK_DSI1>, <&ccu CLK_EDP>; assigned-clock-parents = <&ccu CLK_PLL_VIDEO3_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_VIDEO0_4X>, <&ccu CLK_PLL_VIDEO1_4X>, <&ccu CLK_PLL_PERI0_150M>, <&ccu CLK_PLL_PERI0_150M>, <&ccu CLK_PLL_VIDEO1_4X>; assigned-clock-rates = <600000000>; cldo3-supply = <®_cldo3>; dcdc4-supply = <®_dcdc4>; cldo1-supply = <®_cldo1>; pwms = <&pwm0 4 5000000 0>, <&pwm0 5 5000000 0>; pwm-names = "lvds0_backlight", "lvds2_backlight"; power-domains = <&pd1 A523_PCK_DE>, <&pd1 A523_PCK_VO0>, <&pd1 A523_PCK_VO1>; power-domain-names = "pd_de", "pd_vo0", "pd_vo1"; pinctrl-names = "active", "sleep"; pinctrl-0 = <&pwm0_0_pin_active>; pinctrl-1 = <&pwm0_0_pin_sleep>; }; #if 1 &lcd0 { lcd_used = <1>; lcd_driver_name = "bp101wx1"; lcd_backlight = <50>; lcd_if = <3>; lcd_x = <1280>; lcd_y = <800>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <75>; lcd_pwm_used = <1>; lcd_pwm_ch = <4>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_pwm_name = "lvds0_backlight"; lcd_hbp = <88>; lcd_ht = <1451>; lcd_hspw = <18>; lcd_vbp = <23>; lcd_vt = <860>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <0>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_fsync_en = <0>; lcd_fsync_act_time = <1000>; lcd_fsync_dis_time = <1000>; lcd_fsync_pol = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_pin_power = "cldo3"; lcd_power = "dcdc4"; lcd_power1 = "cldo1"; lcd_gpio_0 = <&pio PI 2 GPIO_ACTIVE_HIGH>; //reset lcd_bl_en = <&pio PI 2 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&lvds0_pins_a>; pinctrl-1 = <&lvds0_pins_b>; lvds0_pinctrl-0 = <&lvds0_pins_a>; lvds0_pinctrl-1 = <&lvds0_pins_b>; lvds1_pinctrl-0 = <&lvds1_pins_a>; lvds1_pinctrl-1 = <&lvds1_pins_b>; dsi0_pinctrl-0 = <&dsi0_4lane_pins_a>; dsi0_pinctrl-1 = <&dsi0_4lane_pins_b>; dual_dsi_pinctrl-0 = <&dsi0_4lane_pins_a>, <&dsi1_4lane_pins_a>; dual_dsi_pinctrl-1 = <&dsi0_4lane_pins_b>, <&dsi1_4lane_pins_b>; dual_lvds0_pinctrl-0 = <&lvds0_pins_a>, <&lvds1_pins_a>; dual_lvds0_pinctrl-1 = <&lvds0_pins_b>, <&lvds1_pins_b>; }; #else &lcd0 { /* dual-lvds */ lcd_used = <1>; status = "okay"; lcd_driver_name = "default_lcd"; lcd_backlight = <50>; lcd_if = <3>; lcd_x = <1920>; lcd_y = <1080>; lcd_width = <476>; lcd_height = <268>; lcd_dclk_freq = <149>; lcd_pwm_used = <1>; lcd_pwm_ch = <4>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_pwm_name = "lvds0_backlight"; lcd_hbp = <148>; lcd_ht = <2200>; lcd_hspw = <44>; lcd_vbp = <36>; lcd_vt = <1125>; lcd_vspw = <5>; lcd_lvds_if = <1>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <0>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_fsync_en = <0>; lcd_fsync_act_time = <1000>; lcd_fsync_dis_time = <1000>; lcd_fsync_pol = <0>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_power = "dcdc4"; lcd_power1 = "cldo1"; lcd_bl_en = <&pio PI 2 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&lvds0_pins_a>, <&lvds1_pins_a>; pinctrl-1 = <&lvds0_pins_b>, <&lvds1_pins_b>; }; #endif #if 1 &lcd1 { lcd_used = <1>; status = "okay"; lcd_driver_name = "SQ101D_Q5DI404_84H501"; lcd_backlight = <200>; lcd_if = <4>; lcd_x = <1200>; lcd_y = <1920>; lcd_width = <136>; lcd_height = <217>; lcd_dclk_freq = <157>; lcd_pwm_used = <1>; lcd_pwm_ch = <0>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_hbp = <50>; lcd_ht = <1330>; lcd_hspw = <10>; lcd_vbp = <20>; lcd_vt = <1960>; lcd_vspw = <4>; lcd_frm = <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_dsi_if = <0>; lcd_dsi_lane = <4>; lcd_dsi_format = <0>; lcd_dsi_te = <0>; lcd_dsi_eotp = <0>; lcd_power1 = "cldo4"; lcd_power2 = "cldo1"; // lcd_gpio_2 = <&pio PD 22 GPIO_ACTIVE_HIGH>; //reset pinctrl-0 = <&dsi1_4lane_pins_a>; pinctrl-1 = <&dsi1_4lane_pins_b>; // lcd_bl_en = <&pio PH 16 GPIO_ACTIVE_HIGH>; lcd_bl_0_percent = <5>; }; #else &lcd1 { lcd_used = <1>; lcd_driver_name = "default_lcd"; lcd_backlight = <50>; lcd_if = <0>; lcd_x = <800>; lcd_y = <480>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <48>; lcd_pwm_used = <1>; lcd_pwm_ch = <7>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_hbp = <55>; lcd_ht = <1240>; lcd_hspw = <20>; lcd_vbp = <35>; lcd_vt = <650>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <1>; lcd_lvds_mode = <0>; lcd_frm = <1>; lcd_io_phase = <0x0000>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; }; #endif &lcd2 { lcd_used = <0>; lcd_driver_name = "bp101wx1"; lcd_backlight = <50>; lcd_if = <3>; lcd_x = <1280>; lcd_y = <800>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <75>; lcd_pwm_used = <1>; lcd_pwm_ch = <5>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <0>; lcd_pwm_max_limit = <255>; lcd_pwm_name = "lvds2_backlight"; lcd_hbp = <88>; lcd_ht = <1451>; lcd_hspw = <18>; lcd_vbp = <23>; lcd_vt = <860>; lcd_vspw = <10>; lcd_lvds_if = <0>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <0>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; lcd_fsync_en = <0>; lcd_fsync_pol = <0>; lcd_start_delay = <5>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; lcd_pin_power = "cldo3"; lcd_power = "dcdc4"; /* lvds_power & other interface power */ lcd_bl_en = <&pio PI 5 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&lvds2_pins_a>; pinctrl-1 = <&lvds2_pins_b>; lvds2_pinctrl-0 = <&lvds2_pins_a>; lvds2_pinctrl-1 = <&lvds2_pins_b>; lvds3_pinctrl-0 = <&lvds3_pins_a>; lvds3_pinctrl-1 = <&lvds3_pins_b>; dual_lvds1_pinctrl-0 = <&lvds2_pins_a>, <&lvds3_pins_a>; dual_lvds1_pinctrl-1 = <&lvds2_pins_b>, <&lvds3_pins_b>; }; &edp0 { // use if hardware reset pin is need /* edp_hw_reset_pin = <&pio PH XX GPIO_ACTIVE_LOW>; */ edp_ssc_en = <0>; edp_ssc_mode = <0>; edp_psr_support = <0>; edp_colordepth = <8>; /* 6/8/10/12/16 */ edp_color_fmt = <0>; /* 0:RGB 1: YUV444 2: YUV422 */ lane0_sw = <0>; lane0_pre = <0>; lane1_sw = <0>; lane1_pre = <0>; lane2_sw = <0>; lane2_pre = <0>; lane3_sw = <0>; lane3_pre = <0>; efficient_training = <0>; sink_capacity_prefer = <1>; edid_timings_prefer = <1>; timings_fixed = <1>; edp_panel_used = <1>; edp_panel_driver = "general_panel"; edp_bl_en = <&pio PI 5 GPIO_ACTIVE_HIGH>; edp_pwm_used = <1>; edp_pwm_ch = <5>; edp_pwm_freq = <50000>; edp_pwm_pol = <0>; edp_default_backlight = <200>; edp_panel_power_0 = "edp-panel"; vcc-edp-supply = <®_bldo3>; vdd-edp-supply = <®_dcdc2>; edp-panel-supply = <®_dcdc4>; status = "disabled"; }; &ve { ve-supply = <®_dcdc2>; enable_setup_ve_freq = <0>; /* default disable */ ve_freq_value = <624>; /* setup to 624MHz */ }; /* audio dirver module -> audio codec */ &codec { tx-hub-en; rx-sync-en; dac-vol = <63>; /* default value:63 range:0->63 */ dacl-vol = <160>; /* default value:160 range:0->255 */ dacr-vol = <160>; /* default value:160 range:0->255 */ adc1-vol = <160>; /* default value:160 range:0->255 */ adc2-vol = <160>; /* default value:160 range:0->255 */ adc3-vol = <160>; /* default value:160 range:0->255 */ lineout-gain = <31>; /* default value:31 range:0->31 */ hpout-gain = <7>; /* default value:7 range:0->7 */ adc1-gain = <31>; /* default value:31 range:0->31 */ adc2-gain = <31>; /* default value:31 range:0->31 */ adc3-gain = <31>; /* default value:31 range:0->31 */ /* to do: avcc-1.8 vdd33-3.3 cpvin-1.8 */ avcc-external; avcc-supply = <®_aldo4>; avcc-vol = <1800000>; vdd-external; vdd-supply = <®_cldo3>; vdd-vol = <3300000>; cpvin-external; cpvin-supply = <®_bldo3>; cpvin-vol = <1800000>; pa-pin-max = <1>; pa-pin-0 = <&r_pio PL 7 GPIO_ACTIVE_HIGH>; pa-pin-level-0 = <1>; pa-pin-msleep-0 = <0>; jack-det-level = <0>; jack-det-threshold = <8>; jack-det-debouce-time = <250>; /* extcon = <&usb_power_supply>; * jack-swpin-mic-sel = <&pio PH 8 GPIO_ACTIVE_HIGH>; * jack-swpin-hp-en = <&pio PH 15 GPIO_ACTIVE_HIGH>; * jack-swpin-hp-sel = <&pio PH 11 GPIO_ACTIVE_HIGH>; * jack-swmode-hp-off = <0x00>; * jack-swmode-hp-usb = <0x11>; * jack-swmode-hp-audio = <0x10>; * jack-det-level = <1>; * jack-det-threshold = <8>; * jack-det-debouce-time = <250>; */ status = "okay"; }; &codec_plat { status = "okay"; }; &codec_mach { soundcard-mach,jack-support = <1>; status = "okay"; soundcard-mach,cpu { sound-dai = <&codec_plat>; }; soundcard-mach,codec { sound-dai = <&codec>; }; }; &hdmi_codec { extcon = <&hdmi>; status = "okay"; }; &edp_codec { status = "disabled"; }; /* audio dirver module -> owa */ &owa_plat { pinctrl-used; pinctrl-names = "default","sleep"; pinctrl-0 = <&owa_pins_a>; pinctrl-1 = <&owa_pins_b>; tx-hub-en; status = "okay"; }; &owa_mach { status = "okay"; soundcard-mach,cpu { sound-dai = <&owa_plat>; }; soundcard-mach,codec { }; }; /* audio dirver module -> DMIC */ &dmic_plat { rx-chmap = <0x76543210>; data-vol = <0xB0>; rxdelaytime = <0>; /* pinctrl-used; */ /* pinctrl-names = "default","sleep"; */ /* pinctrl-0 = <&dmic_pins_a>; */ /* pinctrl-1 = <&dmic_pins_b>; */ rx-sync-en; status = "disabled"; }; &dmic_mach { status = "disabled"; soundcard-mach,cpu { sound-dai = <&dmic_plat>; }; soundcard-mach,codec { }; }; /* audio dirver module -> I2S/PCM */ &i2s0_plat { tdm-num = <0>; tx-pin = <0>; rx-pin = <0>; pinctrl-used; pinctrl-names = "default","sleep"; pinctrl-0 = <&i2s0_pins_a &i2s0_pins_c &i2s0_pins_d>; pinctrl-1 = <&i2s0_pins_b>; tx-hub-en; rx-sync-en; status = "okay"; }; &i2s0_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s0_cpu>; soundcard-mach,bitclock-master = <&i2s0_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; soundcard-mach,capture-only; status = "okay"; i2s0_cpu: soundcard-mach,cpu { sound-dai = <&i2s0_plat>; /* note: pll freq = 24.576M or 22.5792M * pll-fs */ soundcard-mach,pll-fs = <1>; /* note: * mclk freq = mclk-fs * 12.288M or 11.2896M (when mclk-fp ture) * mclk freq = mclk-fs * pcm rate (when mclk-fp false) */ soundcard-mach,mclk-fp; soundcard-mach,mclk-fs = <1>; }; i2s0_codec: soundcard-mach,codec { sound-dai = <&ac107>; soundcard-mach,pll-fs = <1>; }; }; &i2s1_plat { tdm-num = <1>; tx-pin = <0>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s1_pins_a &i2s1_pins_c &i2s1_pins_d>; */ /* pinctrl-1 = <&i2s1_pins_b>; */ tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s1_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s1_cpu>; soundcard-mach,bitclock-master = <&i2s1_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; i2s1_cpu: soundcard-mach,cpu { sound-dai = <&i2s1_plat>; soundcard-mach,pll-fs = <1>; soundcard-mach,mclk-fs = <0>; }; i2s1_codec: soundcard-mach,codec { }; }; &i2s2_plat { tdm-num = <2>; tx-pin = <0 1 2 3>; /* e.g. * tx-pin0-map0 = <0xFEDC3210> -> tx_pin_map[0][0] (Dout0-slot[7:0] map channel[15:12, 3:0]) * tx-pin0-map1 = <0x3210FEDC> -> tx_pin_map[0][1] (Dout0-slot[15:8] map channel[3:0, 15:12]) * tx-pin1-map0 = <0x76543210> -> tx_pin_map[1][0] (Dout1-slot[7:0] map channel[7:0]) */ tx-pin0-map0 = <0x76543210>; tx-pin0-map1 = <0xFEDCBA98>; tx-pin1-map0 = <0x76543210>; tx-pin1-map1 = <0xFEDCBA98>; tx-pin2-map0 = <0x76543210>; tx-pin2-map1 = <0xFEDCBA98>; tx-pin3-map0 = <0x76543210>; tx-pin3-map1 = <0xFEDCBA98>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s2_pins_a &i2s2_pins_c &i2s2_pins_d &i2s2_pins_e>; */ /* pinctrl-1 = <&i2s2_pins_b>; */ tx-hub-en; rx-sync-en; /* edp not need dai-type */ dai-type = "hdmi"; status = "okay"; }; &i2s2_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s2_cpu>; soundcard-mach,bitclock-master = <&i2s2_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; soundcard-mach,playback-only; status = "okay"; i2s2_cpu: soundcard-mach,cpu { sound-dai = <&i2s2_plat>; soundcard-mach,pll-fs = <1>; /* edp mclk: 512fs */ soundcard-mach,mclk-fs = <0>; }; i2s2_codec: soundcard-mach,codec { sound-dai = <&hdmi_codec>; }; }; &i2s3_plat { tdm-num = <3>; tx-pin = <0>; rx-pin = <0>; /* pinctrl-used; */ /* pinctrl-names= "default","sleep"; */ /* pinctrl-0 = <&i2s3_pins_a &i2s3_pins_c &i2s3_pins_d>; */ /* pinctrl-1 = <&i2s3_pins_b>; */ tx-hub-en; rx-sync-en; status = "disabled"; }; &i2s3_mach { soundcard-mach,format = "i2s"; soundcard-mach,frame-master = <&i2s3_cpu>; soundcard-mach,bitclock-master = <&i2s3_cpu>; /* soundcard-mach,frame-inversion; */ /* soundcard-mach,bitclock-inversion; */ soundcard-mach,slot-num = <2>; soundcard-mach,slot-width = <32>; status = "disabled"; i2s3_cpu: soundcard-mach,cpu { sound-dai = <&i2s3_plat>; soundcard-mach,pll-fs = <1>; soundcard-mach,mclk-fs = <0>; }; i2s3_codec: soundcard-mach,codec { }; }; &hdmi { hdmi_used = <1>; bldo3-supply = <®_bldo3>; hdmi_power0 = "bldo3"; hdmi_power_cnt = <1>; hdmi_hdcp_enable = <1>; hdmi_hdcp22_enable = <0>; hdmi_cts_compatibility = <0>; hdmi_cec_support = <1>; hdmi_cec_super_standby = <1>; hdmi_skip_bootedid = <1>; ddc_en_io_ctrl = <0>; power_io_ctrl = <0>; status = "okay"; }; &cpu0 { cpu-supply = <®_dcdc1>; }; &dsufreq { dsu-supply = <®_dcdc1>; }; &mdio0 { status = "okay"; gmac0_phy0: ethernet-phy@1 { reset-gpios = <&pio PH 8 GPIO_ACTIVE_LOW>; }; }; &gmac0 { phy-mode = "rgmii"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&gmac0_pins_default>; pinctrl-1 = <&gmac0_pins_sleep>; sunxi,phy-clk-type = <0>; tx-delay = <3>; rx-delay = <4>; gmac3v3-supply = <®_cldo4>; status = "okay"; }; &gmac1 { phy-mode = "rgmii"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&gmac1_pins_default>; pinctrl-1 = <&gmac1_pins_sleep>; aw,soc-phy25m; tx-delay = <3>; rx-delay = <4>; dwmac3v3-supply = <®_cldo4>; status = "okay"; mdio1: mdio1@1 { gmac1_phy0: ethernet-phy@1 { reset-gpios = <&pio PI 5 GPIO_ACTIVE_LOW>; }; }; }; &npu { npu-supply = <®_ext_axp1530_dcdc3>; status = "okay"; }; &dram { dram_para00 = <0x00000000>; dram_para01 = <0x00000000>; dram_para02 = <0x00000000>; dram_para03 = <0x00000000>; dram_para04 = <0x00000000>; dram_para05 = <0x00000000>; dram_para06 = <0x00000000>; dram_para07 = <0x00000000>; dram_para08 = <0x00000000>; dram_para09 = <0x00000000>; dram_para10 = <0x00000000>; dram_para11 = <0x00000000>; dram_para12 = <0x00000000>; dram_para13 = <0x00000000>; dram_para14 = <0x00000000>; dram_para15 = <0x00000000>; dram_para16 = <0x00000000>; dram_para17 = <0x00000000>; dram_para18 = <0x00000000>; dram_para19 = <0x00000000>; dram_para20 = <0x00000000>; dram_para21 = <0x00000000>; dram_para22 = <0x00000000>; dram_para23 = <0x00000000>; dram_para24 = <0x00000000>; dram_para25 = <0x00000000>; dram_para26 = <0x00000000>; dram_para27 = <0x00000000>; dram_para28 = <0x00000000>; dram_para29 = <0x00000000>; dram_para30 = <0x00000000>; dram_para31 = <0x00000000>; dram_para32 = <0x00000000>; dram_para33 = <0x00000000>; dram_para34 = <0x00000000>; dram_para35 = <0x00000000>; dram_para36 = <0x00000000>; dram_para37 = <0x00000000>; dram_para38 = <0x00000000>; dram_para39 = <0x00000000>; dram_para40 = <0x00000000>; dram_para41 = <0x00000000>; dram_para42 = <0x00000000>; dram_para43 = <0x00000000>; dram_para44 = <0x00000000>; dram_para45 = <0x00000000>; dram_para46 = <0x00000000>; dram_para47 = <0x00000000>; dram_para48 = <0x00000000>; dram_para49 = <0x00000000>; dram_para50 = <0x00000000>; dram_para51 = <0x00000000>; dram_para52 = <0x00000000>; dram_para53 = <0x00000000>; dram_para54 = <0x00000000>; dram_para55 = <0x00000000>; dram_para56 = <0x00000000>; dram_para57 = <0x00000000>; dram_para58 = <0x00000000>; dram_para59 = <0x00000000>; dram_para60 = <0x00000000>; dram_para61 = <0x00000000>; dram_para62 = <0x00000000>; dram_para63 = <0x00000000>; dram_para64 = <0x00000000>; dram_para65 = <0x00000000>; dram_para66 = <0x00000000>; dram_para67 = <0x00000000>; dram_para68 = <0x00000000>; dram_para69 = <0x00000000>; dram_para70 = <0x00000000>; dram_para71 = <0x00000000>; dram_para72 = <0x00000000>; dram_para73 = <0x00000000>; dram_para74 = <0x00000000>; dram_para75 = <0x00000000>; dram_para76 = <0x00000000>; dram_para77 = <0x00000000>; dram_para78 = <0x00000000>; dram_para79 = <0x00000000>; dram_para80 = <0x00000000>; dram_para81 = <0x00000000>; dram_para82 = <0x00000000>; dram_para83 = <0x00000000>; dram_para84 = <0x00000000>; dram_para85 = <0x00000000>; dram_para86 = <0x00000000>; dram_para87 = <0x00000000>; dram_para88 = <0x00000000>; dram_para89 = <0x00000000>; dram_para90 = <0x00000000>; dram_para91 = <0x00000000>; dram_para92 = <0x00000000>; dram_para93 = <0x00000000>; dram_para94 = <0x00000000>; dram_para95 = <0x00000000>; }; &cpul_thermal_zone { cpul_trips: trips { cpul_crit: cpu_crit@0 { temperature = <115000>; type = "critical"; hysteresis = <0>; }; }; }; &cpub_thermal_zone { cpub_trips: trips { cpub_crit: cpu_crit@0 { temperature = <115000>; type = "critical"; hysteresis = <0>; }; }; }; &gpu_thermal_zone { gpu_trips: trips { gpu_crit: gpu_crit@0 { temperature = <115000>; type = "critical"; hysteresis = <0>; }; }; }; -
回复: R128-S2 驱动 1024x600 RGB 显示屏 并运行 LVGL发布在 A Series
屏参改一下
lcd_driver_name = "default_lcd" lcd_backlight = 150 lcd_if = 0 lcd_x = 1024 lcd_y = 600 lcd_width = 150 lcd_height = 94 lcd_rb_swap = 0 lcd_dclk_freq = 48 lcd_pwm_used = 1 lcd_pwm_ch = 7 lcd_pwm_freq = 500000 lcd_pwm_pol = 1 lcd_hbp = 160 lcd_ht = 1344 lcd_hspw = 20 lcd_vbp = 20 lcd_vt = 635 lcd_vspw = 3 lcd_lvds_if = 0 lcd_lvds_colordepth = 1 lcd_lvds_mode = 0 lcd_frm = 0 lcd_io_phase = 0x0000 lcd_gamma_en = 0 lcd_bright_curve_en = 0 lcd_cmap_en = 0 -
回复: T113S3双路 dual lvds驱动不起来发布在 T Series
uboot和dtsi里面添加dual link IO的配置
demo: lvds2link_pins_a: lvds2link@0 { allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17"; allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17"; allwinner,function = "lvds1"; allwinner,muxsel = <3>; allwinner,drive = <3>; allwinner,pull = <0>; }; lvds2link_pins_b: lvds2link@1 { allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17"; allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", \ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17"; allwinner,function = "lvds1_suspend"; allwinner,muxsel = <7>; allwinner,drive = <3>; allwinner,pull = <0>; };dts中 修改为lvds dual link模式，并引用dtsi里配好的dual link IO
&lcd0{ ... lcd_lvds_if = <1>; ... ... pinctrl-0 = <&lvds2link_pins_a>; pinctrl-1 = <&lvds2link_pins_b>; ... }其他和single link的配置方法无异，如果点不亮请检查时序
这里看到dclk配置是80
但是手册需求的是54
这里提供一套1920x720的时序作为参考
&lcd0 { lcd_used = <1>; lcd_driver_name = "default_lcd"; lcd_backlight = <50>; lcd_if = <3>; lcd_x = <1920>; lcd_y = <720>; lcd_width = <150>; lcd_height = <94>; lcd_dclk_freq = <94>; lcd_pwm_used = <1>; lcd_pwm_ch = <3>; lcd_pwm_freq = <50000>; lcd_pwm_pol = <1>; lcd_pwm_max_limit = <255>; lcd_hbp = <64>; lcd_ht = <2064>; lcd_hspw = <20>; lcd_vbp = <30>; lcd_vt = <760>; lcd_vspw = <10>; lcd_lvds_if = <1>; lcd_lvds_colordepth = <0>; lcd_lvds_mode = <0>; lcd_frm = <1>; lcd_hv_clk_phase = <0>; lcd_hv_sync_polarity= <0>; lcd_gamma_en = <0>; lcd_bright_curve_en = <0>; lcd_cmap_en = <0>; deu_mode = <0>; lcdgamma4iep = <22>; smart_color = <90>; pinctrl-0 = <&lvds2link_pins_a>; pinctrl-1 = <&lvds2link_pins_b>; }; -
回复: V851s buildroot openwrt 编译GCC失败发布在 编译和烧写问题专区
@kanken6174 不建议编译gcc进入固件，首先这个gcc没有适配平台，其次v851s的64M内存也无法支持gcc的使用
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回复: adb找不到设备发布在 MR Series
目前板子处于烧录下载模式，显示 USB Device (VID_xxxx_PID_xxxx)，需要进入系统后才是adb模式，显示 Tina ADB
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回复: LVGL 与 SPI TFT GUI案例报错发布在 A Series
https://r128.docs.aw-ol.com/others/faq/#_3
建议 删除 PMU 相关配置
[pmu] pmu_irq_pin = port:PA14<14><0><default><default> pmu_irq_wakeup = 2 pmu_hot_shutdown = 1 pmu_bat_unused = 0 pmu_usbad_vol = 4600 pmu_usbad_cur = 1500 pmu_usbpc_vol = 4600 pmu_usbpc_cur = 500 pmu_chg_ic_temp = 0 pmu_battery_rdc = 100 pmu_battery_cap = 3568 pmu_runtime_chgcur = 900 pmu_suspend_chgcur = 1200 pmu_shutdown_chgcur = 1200 pmu_init_chgvol = 4200 pmu_init_chg_pretime = 50 pmu_init_chg_csttime = 1200 pmu_chgled_type = 0 pmu_init_bc_en = 1 pmu_bat_temp_enable = 0 pmu_bat_charge_ltf = 2261 pmu_bat_charge_htf = 388 pmu_bat_shutdown_ltf = 3200 pmu_bat_shutdown_htf = 237 pmu_bat_para[0] = 0 pmu_bat_para[1] = 0 pmu_bat_para[2] = 0 pmu_bat_para[3] = 0 pmu_bat_para[4] = 0 pmu_bat_para[5] = 0 pmu_bat_para[6] = 1 pmu_bat_para[7] = 1 pmu_bat_para[8] = 2 pmu_bat_para[9] = 4 pmu_bat_para[10] = 5 pmu_bat_para[11] = 12 pmu_bat_para[12] = 19 pmu_bat_para[13] = 32 pmu_bat_para[14] = 41 pmu_bat_para[15] = 45 pmu_bat_para[16] = 48 pmu_bat_para[17] = 51 pmu_bat_para[18] = 54 pmu_bat_para[19] = 59 pmu_bat_para[20] = 63 pmu_bat_para[21] = 68 pmu_bat_para[22] = 71 pmu_bat_para[23] = 74 pmu_bat_para[24] = 78 pmu_bat_para[25] = 81 pmu_bat_para[26] = 82 pmu_bat_para[27] = 84 pmu_bat_para[28] = 88 pmu_bat_para[29] = 92 pmu_bat_para[30] = 96 pmu_bat_para[31] = 100 pmu_bat_temp_para[0] = 7466 pmu_bat_temp_para[1] = 4480 pmu_bat_temp_para[2] = 3518 pmu_bat_temp_para[3] = 2786 pmu_bat_temp_para[4] = 2223 pmu_bat_temp_para[5] = 1788 pmu_bat_temp_para[6] = 1448 pmu_bat_temp_para[7] = 969 pmu_bat_temp_para[8] = 664 pmu_bat_temp_para[9] = 466 pmu_bat_temp_para[10] = 393 pmu_bat_temp_para[11] = 333 pmu_bat_temp_para[12] = 283 pmu_bat_temp_para[13] = 242 pmu_bat_temp_para[14] = 179 pmu_bat_temp_para[15] = 134 -
回复: 如何将Libuvc编译到tina系统中发布在 V Series
参照opencv的编写使用cmake的makefile
include $(TOPDIR)/rules.mk PKG_NAME:=opencv PKG_VERSION:=4.1.1 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/opencv/opencv PKG_SOURCE_VERSION:=$(PKG_VERSION) PKG_MIRROR_HASH:=c8587820421d2f22acdafe4712d068ae490897dc445bdb4aa128ecaa8e65d3a1 PKG_MAINTAINER:= PKG_LICENSE:=BSD-3-Clause PKG_LICENSE_FILES:=LICENSE CMAKE_INSTALL:=1 CMAKE_BINARY_SUBDIR:=build PKG_BUILD_PARALLEL:=1 PKG_USE_MIPS16:=0 include $(INCLUDE_DIR)/package.mk include $(INCLUDE_DIR)/cmake.mk define Package/opencv/Default/description OpenCV (Open Source Computer Vision Library) is an open source computer vision and machine learning software library. OpenCV was built to provide a common infrastructure for computer vision applications and to accelerate the use of machine perception in the commercial products. Being a BSD-licensed product, OpenCV makes it easy for businesses to utilize and modify the code. endef define Package/opencv SECTION:=libs CATEGORY:=Libraries TITLE:=OpenCV URL:=https://opencv.org/ DEPENDS:=+libpthread +librt +libatomic +libstdcpp +zlib +libjpeg +python3 +python3-numpy endef CMAKE_OPTIONS += \ -DBUILD_opencv_gpu:BOOL=OFF \ -DWITH_1394:BOOL=OFF -DBUILD_opencv_stitching:BOOL=OFF \ -DBUILD_opencv_superres:BOOL=OFF -DBUILD_opencv_ts:BOOL=OFF \ -DBUILD_opencv_highgui:BOOL=ON \ -DBUILD_opencv_videostab:BOOL=OFF \ -DWITH_FFMPEG:BOOL=OFF \ -DWITH_GSTREAMER:BOOL=OFF \ -DWITH_LIBV4L:BOOL=ON \ -DWITH_PNG:BOOL=OFF \ -DWITH_GTK:BOOL=OFF \ -DWITH_TIFF:BOOL=OFF \ -DCMAKE_VERBOSE:BOOL=OFF \ -DENABLE_PRECOMPILED_HEADERS=OFF \ -DPYTHON3_INCLUDE_PATH=$(STAGING_DIR)/usr/include/python3.9 \ -DPYTHON3_LIBRARIES=$(STAGING_DIR)/usr/lib/libpython3.9.so \ -DPYTHON3_NUMPY_INCLUDE_DIRS=$(TARGET_ROOTFS_DIR)/pypi/numpy-1.20.1/ipkg-install/usr/lib/python3.9/site-packages/numpy/core/include \ -DBUILD_OPENCV_PYTHON3:BOOL=ON TARGET_LDFLAGS += -latomic define Package/opencv/install $(INSTALL_DIR) $(1)/usr/lib $(CP) $(PKG_INSTALL_DIR)/usr/lib/* $(1)/usr/lib/ endef $(eval $(call BuildPackage,opencv)) -
回复: 烧录识别不了usb提示：module awusb:gnu.linkonce.this module section size must match the kernel's built struct module size at run time发布在 编译和烧写问题专区
内核版本不匹配，请更换Ubuntu内核版本到5.15.y，目前你是6.5
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Tina Linux 使用 adb dump、修改设备的 rootfs发布在 MR Series
adb 可用时可以直接读取 /dev/by-name/rootfs 将rootfs导出来
adb pull /dev/by-name/rootfs rootfs.img也可以push到tmp文件夹然后dd写入
adb push rootfs.img /tmp dd if=/tmp/rootfs.img of=/dev/by-name/rootfs -
回复: V853 DDR原理图问题发布在 V Series
AW平台的DRAM控制器支持地址线REMAP，可以通过REMAP简化外部不同种类的DRAM的连接。
这个REAMP是固定在芯片里的不能自己修改，在电路原理图可以看到REMAP的引脚。
如图，如果需要挂DDR3内存，需要接DDR3的REAMP，如果需要接DDR2，可以接默认的REMAP
举个其他平台的例子：
这里接的是 LPDDR4，使用LPDDR4的REMAP
这里接的是DDR4，使用DDR4的REMAP
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回复: OpenixCard - 在 Linux 系统刷写全志镜像到 SD 卡发布在 编译和烧写问题专区
@yunyisa 自制的固件无法打包成全志的镜像，只能由SDK生成，全志镜像有专有的封装格式，不仅仅是地址偏移
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回复: 求助 r128 dsp发布在 A Series
RI-2020.5-linux 编译器需要向购买开发板的商家/代理提交申请，需要提供自己的HIFI5 DSP Xtensa Xplorer的证明
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回复: V851S SPI2 死机发布在 V Series
对照手册：
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SPI2 地址 0x04027000， 没问题
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SPI2 中断号 49，配置时需要减掉SIG和PPI的数量32，也就是17
中断号配置错误，应该为17不是18
spi2: spi@04027000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun8i-spi"; device_type = "spi2"; reg = <0x0 0x04027000 0x0 0x1000>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_pll_periph0300m>, <&clk_spi2>; status = "disabled"; }; -
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回复: T113基于Longan在LVGL中如何播放视屏，通过tplayer发布在 GUI
static lv_style_t style_scr_act; if (style_scr_act.prop_cnt == 0) { lv_style_init(&style_scr_act); lv_style_set_bg_opa(&style_scr_act, LV_OPA_COVER); lv_obj_add_style(lv_scr_act(), &style_scr_act, 0); } lv_disp_get_default()->driver->screen_transp = 1; lv_disp_set_bg_opa(lv_disp_get_default(), LV_OPA_TRANSP); /* Empty the buffer, not emptying will cause the UI to be opaque */ lv_memset_00(lv_disp_get_default()->driver->draw_buf->buf_act, lv_disp_get_default()->driver->draw_buf->size * sizeof(lv_color32_t)); lv_style_set_bg_opa(&style_scr_act, LV_OPA_TRANSP); lv_obj_report_style_change(&style_scr_act);设置透明层
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回复: 为什么添加Gstreamer后会报这个错误发布在 MR Series
@uccccc 在 为什么添加Gstreamer后会报这个错误 中说：
@awwwwa 麻烦问一下这个应该怎麼添加，有没有相关的资料亚
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回复: V853使用MIPI CSI接口是否只支持RAW格式像素？发布在 V Series
@xjy_5 一般来说配置sensor0_isp_used = <0>; 就不会调用ISP，虽然会配置但是不会处理。需要再跟踪一下调用
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回复: T113 nand flash 启动失败发布在 MR Series
@cwj1986521 内核没有配置UBIFS
CONFIG_UBIFS_FS=y CONFIG_UBIFS_FS_ADVANCED_COMPR=y # CONFIG_UBIFS_FS_LZO is not set # CONFIG_UBIFS_FS_ZLIB is not set # CONFIG_UBIFS_FS_ZSTD is not set # CONFIG_UBIFS_ATIME_SUPPORT is not set CONFIG_UBIFS_FS_XATTR=y CONFIG_UBIFS_FS_SECURITY=y -
回复: T113 nand flash 启动失败发布在 MR Series
@cwj1986521 需要用 make kernel_menuconfig，如果使用的是build.sh 需要 ./build.sh menuconfig
内核配置文件会被SDK覆盖，进入内核文件夹修改的均无效
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回复: V853 SDK : PMU TWI发布在 V Series
@alb702 在 V853 SDK : PMU TWI 中说：
[267]ic cant match axp, please check...
V853 和 V853s 的芯片安全系统验证不一样，SDK不能通用，这行输出表示芯片型号验证失败，跳过初始化DRAM
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busybox init 简介发布在 Linux
一、简介
tina 使用busybox init方式启动，首先调用执行pseudo_init（挂载文件系统，如/proc、/tmp、/sys /etc、/usr），接着会调用/sbin/init进程，而init进程调用的第一个启动脚本为/etc/init.d/rcS。
二、平台的自定义
不同的平台文件系统具有其共性与特殊性。tina/packge/busybox-init-base-files/files下提供了所有平台的基础文件。而在tina/target/allwinner/XXX/busybox-init-base-files下存放的是平台特性文件，其优先级高于前者,即当前者目录和后者存在有相同文件时，以后者为准。如有以下两个文件:A：tina/target/allwinner/r11-R11_pref1/busybox-init-base-files/etc/banner
B：tina/package/busybox-init-base-files/files/etc/banner最终拷贝到文件系统中的为A。
三、pseudo_init与rcS
pseudo_init与rcS文件中存在很多平台共性的代码，避免系统充斥大量冗余代码,以及方便基础文件的维护和开发。所以不允许在特定平台下自定义pseudo_init、rcS文件（必须使用tina/packge/busybox-init-base-files/files下的pseudo_init、rcS）。
如果需要添加平台特定配置（pseudo_init，rcS没有配置），可将其写到rc.preboot,rc.final中，参考第四节。
四、rcS脚本
1.功能描述
（1）执行/etc/init.d/rc.preboot。
为了满足开机快速启动的需求，提供了用户可自定义rc.preboot文件，即在tina/target/allwinner/XXX/busybox-init-base-files/etc/init.d/目录下创建rc.preboot脚本文件，将会被rcS最先调用执行。
（2）配置打印级别，主机名称。
（3）执行/etc/init.d/rc.log，配置系统log信息。
系统默认使用的是tina/package/busybox-init-base-files/files/etc/init.d/rc.log脚本进行配置系统log信息。用户可在tina/target/allwinner/XXX/busybox-init-base-files/etc/init.d/下创建rc.log，自定义rc.log。
如果需要使用默认rc.log，需要在make menuconfig配置。Base system ---> busybox-init-base-files......................... Busybox init base system ---> [*] Use the rc.log（4）挂载UDISK。
（5）执行/etc/init.d/rc.modules，加载内核模块。
系统默认使用的是tina/package/busybox-init-base-files/files/etc/init.d/rc.modules脚本进行内核模块自加载，用户可在tina/target/allwinner/XXX/busybox-init-base-files/etc/init.d/下创建rc.modules，自定义rc.modules。
如果需要使用默认rc.modules，需要在make menuconfig配置如下。Base system ---> busybox-init-base-files......................... Busybox init base system ---> [*] Use the rc.modules（6）启动/etc/rc.d下的脚本。
关于执行rc.d下的启动脚本，目的为兼容procd式的应用脚本。/etc/rc.d下的脚本是链接到/etc/init.d/下，默认情况下只执行adbd,如果需要执行其他脚本，需要在tina/target/allwinner/XXX/busybox-init-base-files/etc/init.d/下，自定义load_script.conf文件，文件内容中写上要启动的应用，如adbd（注意，每一个应用占一行）。可参考：tina/packge/busybox-init-base-files/files/etc/init.d/load_script.conf。如果需要执行rc.d下的启动脚本，需要在make menuconfig做如下配置。 Base system ---> busybox-init-base-files......................... Busybox init base system ---> [*] Auto load the script in /etc/rc.d（7）ota初始化。
（8）执行/etc/init.d/rc.final,用户自定义启动脚本。
用户可在tina/packge/busybox-init-base-files/files/etc/init.d/下创建一个rc.final脚本，自定义启动应用程序,该脚本将会被rcS最后调用执行。2.rc.preboot与rc.final的区别？
rc.preboot比rc.final先运行，在执行rc.preboot脚本的时候，系统的一些初始化操作还没完成，如挂载UDISK、内核模块自加载、ota等等操作。而rc.final执行的时候，以上的初始化操作已经完成。五.如何写应用的启动脚本
example：开机自启动smartlinkd（tina/package/allwinner/smartlinkd/files/smartlinkd.init）
1.方法一（特定格式要求）详细的格式参考：
https://wiki.openwrt.org/inbox/procd-init-scripts
https://wiki.openwrt.org/doc/techref/initscripts（1）procd式
#!/bin/sh /etc/rc.common #本质为script脚本,以#!开头, 之后执行/etc/rc.common START=98 #开机启动优先级(序列) [数值越小, 越先启动] STOP=98 #关机停止优先级(序列) [数值越小, 越先关闭] USE_PROCD=1 PROG=smartlinkd start_service() { #启动函数 procd_open_instance procd_set_param command $PROG -d procd_close_instance } shutdown() { echo shutdown }（2）Sys式
#!/bin/sh /etc/rc.common START=98 STOP=98 PROG=smartlinkd start() { smartlinkd -d & }使用上述procd式和sys式脚本，既能兼容procd init启动和busybox init的启动方式。
另外如果使用的是busybox init的启动方式，还需要在load_script.conf文件中换行添加内容：smartlinkd2.方法二（无特定格式要求）
创建rc.preboot或者rc.final脚本，添加启动smartlinkd的内容。 -
T113 busybox init 配置 overlayfs 为 UDISK 分区而不是 rootfs_data发布在 Linux
- 先确定挂载overlayfs
查看 pseudo_init 中 MOUNT_OVERLAY 是不是 1，如果不是配置为 1
package/busybox-init-base-files/files/pseudo_init
- 修改挂载分区
找到文件末尾，吧 rootfs_data 改成UDISK
-
回复: D1s DMA驱动Ledc 问题发布在 MR Series
// SPDX-License-Identifier: GPL-2.0-only /* * drivers/leds/leds-sunxi.c - Allwinner RGB LED Driver * * Copyright (C) 2018 Allwinner Technology Limited. All rights reserved. * http://www.allwinnertech.com * *Author : Albert Yu <yuxyun@allwinnertech.com> * Lewis <liuyu@allwinnertech.com> * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * */ #include <linux/module.h> #include <linux/delay.h> #include <linux/leds.h> #include <linux/io.h> #include <linux/of.h> #include <linux/slab.h> #include <linux/clk.h> #include <linux/dmaengine.h> #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/pinctrl/consumer.h> #include <linux/dma-mapping.h> #include <linux/debugfs.h> #include <linux/uaccess.h> #include <linux/delay.h> #include <linux/regulator/consumer.h> #include <linux/reset.h> #if IS_ENABLED(CONFIG_PM) #include <linux/pm.h> #endif #include "leds-sunxi.h" /* For debug */ #define LED_ERR(fmt, arg...) pr_err("%s()%d - "fmt, __func__, __LINE__, ##arg) #define dprintk(level_mask, fmt, arg...) \ do { \ if (unlikely(debug_mask & level_mask)) \ pr_warn("%s()%d - "fmt, __func__, __LINE__, ##arg); \ } while (0) static u32 debug_mask = 1; static struct sunxi_led *sunxi_led_global; static struct class *led_class; #define sunxi_slave_id(d, s) (((d)<<16) | (s)) /*For Driver */ static void led_dump_reg(struct sunxi_led *led, u32 offset, u32 len) { u32 i; u8 buf[64], cnt = 0; for (i = 0; i < len; i = i + REG_INTERVAL) { if (i%HEXADECIMAL == 0) cnt += sprintf(buf + cnt, "0x%08x: ", (u32)(led->res->start + offset + i)); cnt += sprintf(buf + cnt, "%08x ", readl(led->iomem_reg_base + offset + i)); if (i%HEXADECIMAL == REG_CL) { pr_warn("%s\n", buf); cnt = 0; } } } static void sunxi_clk_get(struct sunxi_led *led) { struct device *dev = led->dev; struct device_node *np = dev->of_node; led->clk_ledc = of_clk_get(np, 0); if (IS_ERR(led->clk_ledc)) LED_ERR("failed to get clk_ledc!\n"); led->clk_cpuapb = of_clk_get(np, 1); if (IS_ERR(led->clk_cpuapb)) LED_ERR("failed to get clk_cpuapb!\n"); } static void sunxi_clk_put(struct sunxi_led *led) { clk_put(led->clk_ledc); clk_put(led->clk_cpuapb); led->clk_ledc = NULL; led->clk_cpuapb = NULL; } static void sunxi_clk_enable(struct sunxi_led *led) { clk_prepare_enable(led->clk_ledc); clk_prepare_enable(led->clk_cpuapb); } static void sunxi_clk_disable(struct sunxi_led *led) { clk_disable_unprepare(led->clk_ledc); } static void sunxi_clk_init(struct sunxi_led *led) { sunxi_clk_get(led); sunxi_clk_enable(led); } static void sunxi_clk_deinit(struct sunxi_led *led) { sunxi_clk_disable(led); sunxi_clk_put(led); } static u32 sunxi_get_reg(int offset) { struct sunxi_led *led = sunxi_led_global; u32 value = ioread32(((u8 *)led->iomem_reg_base) + offset); return value; } static void sunxi_set_reg(int offset, u32 value) { struct sunxi_led *led = sunxi_led_global; iowrite32(value, ((u8 *)led->iomem_reg_base) + offset); } static inline void sunxi_set_reset_ns(struct sunxi_led *led) { u32 n, reg_val; u32 mask = 0x1FFF; u32 min = SUNXI_RESET_TIME_MIN_NS; u32 max = SUNXI_RESET_TIME_MAX_NS; if (led->reset_ns < min || led->reset_ns > max) { LED_ERR("invalid parameter, reset_ns should be %u-%u!\n", min, max); return; } n = (led->reset_ns - 42) / 42; reg_val = sunxi_get_reg(LED_RESET_TIMING_CTRL_REG_OFFSET); reg_val &= ~(mask << 16); reg_val |= (n << 16); sunxi_set_reg(LED_RESET_TIMING_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_set_t1h_ns(struct sunxi_led *led) { u32 n, reg_val; u32 mask = 0x3F; u32 shift = 21; u32 min = SUNXI_T1H_MIN_NS; u32 max = SUNXI_T1H_MAX_NS; if (led->t1h_ns < min || led->t1h_ns > max) { LED_ERR("invalid parameter, t1h_ns should be %u-%u!\n", min, max); return; } n = (led->t1h_ns - 42) / 42; reg_val = sunxi_get_reg(LED_T01_TIMING_CTRL_REG_OFFSET); reg_val &= ~(mask << shift); reg_val |= n << shift; sunxi_set_reg(LED_T01_TIMING_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_set_t1l_ns(struct sunxi_led *led) { u32 n, reg_val; u32 mask = 0x1F; u32 shift = 16; u32 min = SUNXI_T1L_MIN_NS; u32 max = SUNXI_T1L_MAX_NS; if (led->t1l_ns < min || led->t1l_ns > max) { LED_ERR("invalid parameter, t1l_ns should be %u-%u!\n", min, max); return; } n = (led->t1l_ns - 42) / 42; reg_val = sunxi_get_reg(LED_T01_TIMING_CTRL_REG_OFFSET); reg_val &= ~(mask << shift); reg_val |= n << shift; sunxi_set_reg(LED_T01_TIMING_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_set_t0h_ns(struct sunxi_led *led) { u32 n, reg_val; u32 mask = 0x1F; u32 shift = 6; u32 min = SUNXI_T0H_MIN_NS; u32 max = SUNXI_T0H_MAX_NS; if (led->t0h_ns < min || led->t0h_ns > max) { LED_ERR("invalid parameter, t0h_ns should be %u-%u!\n", min, max); return; } n = (led->t0h_ns - 42) / 42; reg_val = sunxi_get_reg(LED_T01_TIMING_CTRL_REG_OFFSET); reg_val &= ~(mask << shift); reg_val |= n << shift; sunxi_set_reg(LED_T01_TIMING_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_set_t0l_ns(struct sunxi_led *led) { u32 n, reg_val; u32 min = SUNXI_T0L_MIN_NS; u32 max = SUNXI_T0L_MAX_NS; if (led->t0l_ns < min || led->t0l_ns > max) { LED_ERR("invalid parameter, t0l_ns should be %u-%u!\n", min, max); return; } n = (led->t0l_ns - 42) / 42; reg_val = sunxi_get_reg(LED_T01_TIMING_CTRL_REG_OFFSET); reg_val &= ~0x3F; reg_val |= n; sunxi_set_reg(LED_T01_TIMING_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_set_wait_time0_ns(struct sunxi_led *led) { u32 n, reg_val; u32 min = SUNXI_WAIT_TIME0_MIN_NS; u32 max = SUNXI_WAIT_TIME0_MAX_NS; if (led->wait_time0_ns < min || led->wait_time0_ns > max) { LED_ERR("invalid parameter, wait_time0_ns should be %u-%u!\n", min, max); return; } n = (led->wait_time0_ns - 42) / 42; reg_val = (1 << 8) | n; sunxi_set_reg(LEDC_WAIT_TIME0_CTRL_REG, reg_val); } static inline void sunxi_set_wait_time1_ns(struct sunxi_led *led) { unsigned long long tmp, max = SUNXI_WAIT_TIME1_MAX_NS; u32 min = SUNXI_WAIT_TIME1_MIN_NS; u32 n, reg_val; if (led->wait_time1_ns < min || led->wait_time1_ns > max) { LED_ERR("invalid parameter, wait_time1_ns should be %u-%llu!\n", min, max); return; } tmp = led->wait_time1_ns; n = div_u64(tmp, 42); n -= 1; reg_val = (1 << 31) | n; sunxi_set_reg(LEDC_WAIT_TIME1_CTRL_REG, reg_val); } static inline void sunxi_set_wait_data_time_ns(struct sunxi_led *led) { u32 min, max; #ifndef SUNXI_FPGA_LEDC u32 mask = 0x1FFF, shift = 16, reg_val = 0, n; #endif min = SUNXI_WAIT_DATA_TIME_MIN_NS; #ifdef SUNXI_FPGA_LEDC /* * For FPGA platforms, it is easy to meet wait data timeout for * the obvious latency of task which is because of less cpu cores * and lower cpu frequency compared with IC platforms, so here we * permit long enough time latency. */ max = SUNXI_WAIT_DATA_TIME_MAX_NS_FPGA; #else /* SUNXI_FPGA_LEDC */ max = SUNXI_WAIT_DATA_TIME_MAX_NS_IC; #endif /* SUNXI_FPGA_LEDC */ if (led->wait_data_time_ns < min || led->wait_data_time_ns > max) { LED_ERR("invalid parameter, wait_data_time_ns should be %u-%u!\n", min, max); return; } #ifndef SUNXI_FPGA_LEDC n = (led->wait_data_time_ns - 42) / 42; reg_val &= ~(mask << shift); reg_val |= (n << shift); sunxi_set_reg(LEDC_DATA_FINISH_CNT_REG_OFFSET, reg_val); #endif /* SUNXI_FPGA_LEDC */ } static void sunxi_ledc_set_time(struct sunxi_led *led) { sunxi_set_reset_ns(led); sunxi_set_t1h_ns(led); sunxi_set_t1l_ns(led); sunxi_set_t0h_ns(led); sunxi_set_t0l_ns(led); sunxi_set_wait_time0_ns(led); sunxi_set_wait_time1_ns(led); sunxi_set_wait_data_time_ns(led); } static void sunxi_ledc_set_length(struct sunxi_led *led) { u32 reg_val; u32 length = led->length; if (length == 0) return; if (length > led->led_count) return; reg_val = sunxi_get_reg(LEDC_CTRL_REG_OFFSET); reg_val &= ~(0x1FFF << 16); reg_val |= length << 16; sunxi_set_reg(LEDC_CTRL_REG_OFFSET, reg_val); reg_val = sunxi_get_reg(LED_RESET_TIMING_CTRL_REG_OFFSET); reg_val &= ~0x3FF; reg_val |= length - 1; sunxi_set_reg(LED_RESET_TIMING_CTRL_REG_OFFSET, reg_val); } static void sunxi_ledc_set_output_mode(struct sunxi_led *led, const char *str) { u32 val; u32 mask = 0x7; u32 shift = 6; u32 reg_val = sunxi_get_reg(LEDC_CTRL_REG_OFFSET); if (str != NULL) { if (!strncmp(str, "GRB", 3)) val = SUNXI_OUTPUT_GRB; else if (!strncmp(str, "GBR", 3)) val = SUNXI_OUTPUT_GBR; else if (!strncmp(str, "RGB", 3)) val = SUNXI_OUTPUT_RGB; else if (!strncmp(str, "RBG", 3)) val = SUNXI_OUTPUT_RBG; else if (!strncmp(str, "BGR", 3)) val = SUNXI_OUTPUT_BGR; else if (!strncmp(str, "BRG", 3)) val = SUNXI_OUTPUT_BRG; else return; } else { val = led->output_mode.val; } reg_val &= ~(mask << shift); reg_val |= val; sunxi_set_reg(LEDC_CTRL_REG_OFFSET, reg_val); if (str != NULL) { if (strncmp(str, led->output_mode.str, 3)) memcpy(led->output_mode.str, str, 3); } if (val != led->output_mode.val) led->output_mode.val = val; } static void sunxi_ledc_enable_irq(u32 mask) { u32 reg_val = 0; reg_val |= mask; sunxi_set_reg(LEDC_INT_CTRL_REG_OFFSET, reg_val); } static void sunxi_ledc_disable_irq(u32 mask) { u32 reg_val = 0; reg_val = sunxi_get_reg(LEDC_INT_CTRL_REG_OFFSET); reg_val &= ~mask; sunxi_set_reg(LEDC_INT_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_ledc_enable(struct sunxi_led *led) { u32 reg_val; reg_val = sunxi_get_reg(LEDC_CTRL_REG_OFFSET); reg_val |= 1; sunxi_set_reg(LEDC_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_ledc_reset(struct sunxi_led *led) { u32 reg_val = sunxi_get_reg(LEDC_CTRL_REG_OFFSET); sunxi_ledc_disable_irq(LEDC_TRANS_FINISH_INT_EN | LEDC_FIFO_CPUREQ_INT_EN | LEDC_WAITDATA_TIMEOUT_INT_EN | LEDC_FIFO_OVERFLOW_INT_EN | LEDC_GLOBAL_INT_EN); if (debug_mask & DEBUG_INFO2) { dprintk(DEBUG_INFO2, "dump reg:\n"); led_dump_reg(led, 0, 0x30); } reg_val |= 1 << 1; sunxi_set_reg(LEDC_CTRL_REG_OFFSET, reg_val); } #ifdef CONFIG_DEBUG_FS static ssize_t reset_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_RESET_TIME_MIN_NS; max = SUNXI_RESET_TIME_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->reset_ns = val; sunxi_set_reset_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, reset_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t reset_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->reset_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations reset_ns_fops = { .owner = THIS_MODULE, .write = reset_ns_write, .read = reset_ns_read, }; static ssize_t t1h_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_T1H_MIN_NS; max = SUNXI_T1H_MAX_NS; if (count >= sizeof(buffer)) return -EINVAL; if (copy_from_user(buffer, buf, count)) return -EFAULT; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) return -EINVAL; if (val < min || val > max) goto err_out; led->t1h_ns = val; sunxi_set_t1h_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, t1h_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t t1h_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->t1h_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations t1h_ns_fops = { .owner = THIS_MODULE, .write = t1h_ns_write, .read = t1h_ns_read, }; static ssize_t t1l_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_T1L_MIN_NS; max = SUNXI_T1L_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->t1l_ns = val; sunxi_set_t1l_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, t1l_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t t1l_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->t1l_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations t1l_ns_fops = { .owner = THIS_MODULE, .write = t1l_ns_write, .read = t1l_ns_read, }; static ssize_t t0h_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_T0H_MIN_NS; max = SUNXI_T0H_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->t0h_ns = val; sunxi_set_t0h_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, t0h_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t t0h_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->t0h_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations t0h_ns_fops = { .owner = THIS_MODULE, .write = t0h_ns_write, .read = t0h_ns_read, }; static ssize_t t0l_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_T0L_MIN_NS; max = SUNXI_T0L_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->t0l_ns = val; sunxi_set_t0l_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, t0l_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t t0l_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->t0l_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations t0l_ns_fops = { .owner = THIS_MODULE, .write = t0l_ns_write, .read = t0l_ns_read, }; static ssize_t wait_time0_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_WAIT_TIME0_MIN_NS; max = SUNXI_WAIT_TIME0_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->wait_time0_ns = val; sunxi_set_wait_time0_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, wait_time0_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t wait_time0_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->wait_time0_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations wait_time0_ns_fops = { .owner = THIS_MODULE, .write = wait_time0_ns_write, .read = wait_time0_ns_read, }; static ssize_t wait_time1_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min; unsigned long long max; unsigned long long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_WAIT_TIME1_MIN_NS; max = SUNXI_WAIT_TIME1_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoull(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->wait_time1_ns = val; sunxi_set_wait_time1_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, wait_time1_ns should be %u-%lld!\n", min, max); return -EINVAL; } static ssize_t wait_time1_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%lld\n", led->wait_time1_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations wait_time1_ns_fops = { .owner = THIS_MODULE, .write = wait_time1_ns_write, .read = wait_time1_ns_read, }; static ssize_t wait_data_time_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_WAIT_DATA_TIME_MIN_NS; #ifdef SUNXI_FPGA_LEDC max = SUNXI_WAIT_DATA_TIME_MAX_NS_FPGA; #else max = SUNXI_WAIT_DATA_TIME_MAX_NS_IC; #endif if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->wait_data_time_ns = val; sunxi_set_wait_data_time_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, wait_data_time_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t wait_data_time_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->wait_data_time_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations wait_data_time_ns_fops = { .owner = THIS_MODULE, .write = wait_data_time_ns_write, .read = wait_data_time_ns_read, }; static int data_show(struct seq_file *s, void *data) { int i; struct sunxi_led *led = sunxi_led_global; for (i = 0; i < led->led_count; i++) { if (!(i % 4)) { if (i + 4 <= led->led_count) seq_printf(s, "%04d-%04d", i, i + 4); else seq_printf(s, "%04d-%04d", i, led->led_count); } seq_printf(s, " 0x%08x", led->data[i]); if (((i % 4) == 3) || (i == led->led_count - 1)) seq_puts(s, "\n"); } return 0; } static int data_open(struct inode *inode, struct file *file) { return single_open(file, data_show, inode->i_private); } static const struct file_operations data_fops = { .owner = THIS_MODULE, .open = data_open, .read = seq_read, .llseek = seq_lseek, .release = single_release, }; static ssize_t output_mode_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { char buffer[64]; struct sunxi_led *led = sunxi_led_global; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; sunxi_ledc_set_output_mode(led, buffer); *offp += count; return count; err_out: LED_ERR("invalid parameter!\n"); return -EINVAL; } static ssize_t output_mode_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%s\n", led->output_mode.str); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations output_mode_fops = { .owner = THIS_MODULE, .write = output_mode_write, .read = output_mode_read, }; static ssize_t hwversion_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; u32 reg_val, major_ver, minor_ver; reg_val = sunxi_get_reg(LEDC_VER_NUM_REG); major_ver = reg_val >> 16; minor_ver = reg_val & 0xF; r = snprintf(buffer, 64, "r%up%u\n", major_ver, minor_ver); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations hwversion_fops = { .owner = THIS_MODULE, .read = hwversion_read, }; static void sunxi_led_create_debugfs(struct sunxi_led *led) { struct dentry *debugfs_dir, *debugfs_file; debugfs_dir = debugfs_create_dir("sunxi_leds", NULL); if (IS_ERR_OR_NULL(debugfs_dir)) { LED_ERR("debugfs_create_dir failed!\n"); return; } led->debugfs_dir = debugfs_dir; debugfs_file = debugfs_create_file("reset_ns", 0660, debugfs_dir, NULL, &reset_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for reset_ns failed!\n"); debugfs_file = debugfs_create_file("t1h_ns", 0660, debugfs_dir, NULL, &t1h_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for t1h_ns failed!\n"); debugfs_file = debugfs_create_file("t1l_ns", 0660, debugfs_dir, NULL, &t1l_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for t1l_ns failed!\n"); debugfs_file = debugfs_create_file("t0h_ns", 0660, debugfs_dir, NULL, &t0h_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for t0h_ns failed!\n"); debugfs_file = debugfs_create_file("t0l_ns", 0660, debugfs_dir, NULL, &t0l_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for t0l_ns failed!\n"); debugfs_file = debugfs_create_file("wait_time0_ns", 0660, debugfs_dir, NULL, &wait_time0_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for wait_time0_ns failed!\n"); debugfs_file = debugfs_create_file("wait_time1_ns", 0660, debugfs_dir, NULL, &wait_time1_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for wait_time1_ns failed!\n"); debugfs_file = debugfs_create_file("wait_data_time_ns", 0660, debugfs_dir, NULL, &wait_data_time_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for wait_data_time_ns failed!\n"); debugfs_file = debugfs_create_file("data", 0440, debugfs_dir, NULL, &data_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for data failed!\n"); debugfs_file = debugfs_create_file("output_mode", 0660, debugfs_dir, NULL, &output_mode_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for output_mode failed!\n"); if (!debugfs_file) LED_ERR("debugfs_create_file for trans_mode failed!\n"); debugfs_file = debugfs_create_file("hwversion", 0440, debugfs_dir, NULL, &hwversion_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for hwversion failed!\n"); } static void sunxi_led_remove_debugfs(struct sunxi_led *led) { debugfs_remove_recursive(led->debugfs_dir); } #endif /* CONFIG_DEBUG_FS */ static void sunxi_ledc_set_dma_mode(struct sunxi_led *led) { u32 reg_val = 0; reg_val |= 1 << 5; sunxi_set_reg(LEDC_DMA_CTRL_REG, reg_val); sunxi_ledc_disable_irq(LEDC_FIFO_CPUREQ_INT_EN); } static void sunxi_ledc_set_cpu_mode(struct sunxi_led *led) { u32 reg_val = 0; reg_val &= ~(1 << 5); sunxi_set_reg(LEDC_DMA_CTRL_REG, reg_val); sunxi_ledc_enable_irq(LEDC_FIFO_CPUREQ_INT_EN); } static void sunxi_ledc_dma_callback(void *param) { dprintk(DEBUG_INFO, "finish\n"); } static void sunxi_ledc_trans_data(struct sunxi_led *led) { int i, err; size_t size; unsigned long flags; phys_addr_t dst_addr; struct dma_slave_config slave_config; struct device *dev = led->dev; struct dma_async_tx_descriptor *dma_desc; /* less than 32 lights use cpu transmission. */ /* more than 32 lights use dma transmission. */ if (led->length <= SUNXI_LEDC_FIFO_DEPTH) { dprintk(DEBUG_INFO, "cpu xfer\n"); ktime_get_coarse_real_ts64(&(led->start_time)); sunxi_ledc_set_time(led); sunxi_ledc_set_output_mode(led, led->output_mode.str); sunxi_ledc_set_cpu_mode(led); sunxi_ledc_set_length(led); sunxi_ledc_enable_irq(LEDC_TRANS_FINISH_INT_EN | LEDC_WAITDATA_TIMEOUT_INT_EN | LEDC_FIFO_OVERFLOW_INT_EN | LEDC_GLOBAL_INT_EN); sunxi_ledc_enable(led); for (i = 0; i < led->length; i++) sunxi_set_reg(LEDC_DATA_REG_OFFSET, led->data[i]); } else { dprintk(DEBUG_INFO, "dma xfer\n"); size = led->length * 4; led->src_dma = dma_map_single(dev, led->data, size, DMA_TO_DEVICE); dst_addr = led->res->start + LEDC_DATA_REG_OFFSET; flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK; slave_config.direction = DMA_MEM_TO_DEV; slave_config.src_addr = led->src_dma; slave_config.dst_addr = dst_addr; slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; slave_config.src_maxburst = 4; slave_config.dst_maxburst = 4; err = dmaengine_slave_config(led->dma_chan, &slave_config); if (err < 0) { LED_ERR("dmaengine_slave_config failed!\n"); return; } dma_desc = dmaengine_prep_slave_single(led->dma_chan, led->src_dma, size, DMA_MEM_TO_DEV, flags); if (!dma_desc) { LED_ERR("dmaengine_prep_slave_single failed!\n"); return; } dma_desc->callback = sunxi_ledc_dma_callback; dmaengine_submit(dma_desc); dma_async_issue_pending(led->dma_chan); ktime_get_coarse_real_ts64(&(led->start_time)); sunxi_ledc_set_time(led); sunxi_ledc_set_output_mode(led, led->output_mode.str); sunxi_ledc_set_dma_mode(led); sunxi_ledc_set_length(led); sunxi_ledc_enable_irq(LEDC_TRANS_FINISH_INT_EN | LEDC_WAITDATA_TIMEOUT_INT_EN | LEDC_FIFO_OVERFLOW_INT_EN | LEDC_GLOBAL_INT_EN); sunxi_ledc_enable(led); } } static inline void sunxi_ledc_clear_all_irq(void) { u32 reg_val = sunxi_get_reg(LEDC_INT_STS_REG_OFFSET); reg_val &= ~0x1F; sunxi_set_reg(LEDC_INT_STS_REG_OFFSET, reg_val); } static inline void sunxi_ledc_clear_irq(enum sunxi_ledc_irq_status_reg irq) { u32 reg_val = sunxi_get_reg(LEDC_INT_STS_REG_OFFSET); reg_val &= ~irq; sunxi_set_reg(LEDC_INT_STS_REG_OFFSET, reg_val); } static int sunxi_ledc_complete(struct sunxi_led *led) { unsigned long flags = 0; unsigned long timeout = 0; u32 reg_val; /*wait_event_timeout return 0 : timeout *wait_event_timeout return > 0 : thr left time * */ timeout = wait_event_timeout(led->wait, led->result, 5*HZ); if (timeout == 0) { reg_val = sunxi_get_reg(LEDC_INT_STS_REG_OFFSET); pr_err("LEDC INTERRUPT STATUS REG IS %x", reg_val); LED_ERR("led xfer timeout\n"); reg_val = sunxi_get_reg(LEDC_INT_STS_REG_OFFSET); pr_err("LEDC INTERRUPT STATUS REG IS %x", reg_val); return -ETIME; } else if (led->result == RESULT_ERR) { return -ECOMM; } dprintk(DEBUG_INFO, "xfer complete\n"); spin_lock_irqsave(&led->lock, flags); led->result = 0; spin_unlock_irqrestore(&led->lock, flags); return 0; } static irqreturn_t sunxi_ledc_irq_handler(int irq, void *dev_id) { long delta_time_ns; u32 irq_status, max_ns; struct sunxi_led *led = sunxi_led_global; struct device *dev = led->dev; struct timespec64 current_time; spin_lock(&led->lock); irq_status = sunxi_get_reg(LEDC_INT_STS_REG_OFFSET); sunxi_ledc_clear_all_irq(); if (irq_status & LEDC_TRANS_FINISH_INT) { sunxi_ledc_reset(led); led->result = RESULT_COMPLETE; goto out; } if (irq_status & LEDC_WAITDATA_TIMEOUT_INT) { ktime_get_coarse_real_ts64(¤t_time); delta_time_ns = current_time.tv_sec - led->start_time.tv_sec; delta_time_ns *= 1000 * 1000 * 1000; delta_time_ns += current_time.tv_nsec - led->start_time.tv_nsec; max_ns = led->wait_data_time_ns; if (delta_time_ns <= max_ns) { spin_unlock(&led->lock); return IRQ_HANDLED; } sunxi_ledc_reset(led); if (delta_time_ns <= max_ns * 2) { sunxi_ledc_trans_data(led); } else { LED_ERR("wait time is more than %d ns," "going to reset ledc and drop this operation!\n", max_ns); led->result = RESULT_ERR; } goto out; } if (irq_status & LEDC_FIFO_OVERFLOW_INT) { LED_ERR("there exists fifo overflow issue, irq_status=0x%x!\n", irq_status); sunxi_ledc_reset(led); led->result = RESULT_ERR; goto out; } out: if (led->dma_chan) dma_unmap_single(dev, led->src_dma, led->length * 4, DMA_TO_DEVICE); wake_up(&led->wait); led->length = 0; spin_unlock(&led->lock); return IRQ_HANDLED; } static int sunxi_ledc_irq_init(struct sunxi_led *led) { int err; struct device *dev = led->dev; unsigned long flags = 0; const char *name = "ledcirq"; struct platform_device *pdev; pdev = container_of(dev, struct platform_device, dev); spin_lock_init(&led->lock); led->irqnum = platform_get_irq(pdev, 0); if (led->irqnum < 0) LED_ERR("failed to get ledc irq!\n"); err = request_irq(led->irqnum, sunxi_ledc_irq_handler, flags, name, dev); if (err) { LED_ERR("failed to install IRQ handler for irqnum %d\n", led->irqnum); return -EPERM; } return 0; } static void sunxi_ledc_irq_deinit(struct sunxi_led *led) { free_irq(led->irqnum, led->dev); sunxi_ledc_disable_irq(LEDC_TRANS_FINISH_INT_EN | LEDC_FIFO_CPUREQ_INT_EN | LEDC_WAITDATA_TIMEOUT_INT_EN | LEDC_FIFO_OVERFLOW_INT_EN | LEDC_GLOBAL_INT_EN); } static void sunxi_ledc_pinctrl_init(struct sunxi_led *led) { struct device *dev = led->dev; struct pinctrl *pinctrl = devm_pinctrl_get_select_default(dev); led->pctrl = pinctrl; if (IS_ERR(pinctrl)) LED_ERR("devm_pinctrl_get_select_default failed!\n"); } static int led_regulator_request(struct sunxi_led *led) { struct regulator *regu = NULL; /* Consider "n*" as nocare. Support "none", "nocare", "null", "" etc. */ if ((led->regulator_id[0] == 'n') || (led->regulator_id[0] == 0)) return 0; regu = regulator_get(NULL, led->regulator_id); if (IS_ERR(regu)) { LED_ERR("get regulator %s failed!\n", led->regulator_id); return -1; } led->regulator = regu; return 0; } static int led_regulator_release(struct sunxi_led *led) { if (led->regulator == NULL) return 0; regulator_put(led->regulator); led->regulator = NULL; return 1; } static int sunxi_ledc_dma_get(struct sunxi_led *led) { if (led->dma_chan == NULL) { led->dma_chan = dma_request_chan(led->dev, "tx"); if (IS_ERR(led->dma_chan)) { LED_ERR("failed to get the DMA channel!\n"); return -EFAULT; } } return 0; } static int sunxi_set_led_brightness(struct led_classdev *led_cdev, enum led_brightness value) { unsigned long flags; u32 r, g, b, shift, old_data, new_data, length; struct sunxi_led_info *pinfo; struct sunxi_led_classdev_group *pcdev_group; struct sunxi_led *led = sunxi_led_global; int err; pinfo = container_of(led_cdev, struct sunxi_led_info, cdev); switch (pinfo->type) { case LED_TYPE_G: pcdev_group = container_of(pinfo, struct sunxi_led_classdev_group, g); g = value; shift = 16; break; case LED_TYPE_R: pcdev_group = container_of(pinfo, struct sunxi_led_classdev_group, r); r = value; shift = 8; break; case LED_TYPE_B: pcdev_group = container_of(pinfo, struct sunxi_led_classdev_group, b); b = value; shift = 0; break; } old_data = led->data[pcdev_group->led_num]; if (((old_data >> shift) & 0xFF) == value) return 0; if (pinfo->type != LED_TYPE_R) r = pcdev_group->r.cdev.brightness; if (pinfo->type != LED_TYPE_G) g = pcdev_group->g.cdev.brightness; if (pinfo->type != LED_TYPE_B) b = pcdev_group->b.cdev.brightness; /* LEDC treats input data as GRB by default */ new_data = (g << 16) | (r << 8) | b; length = pcdev_group->led_num + 1; spin_lock_irqsave(&led->lock, flags); led->data[pcdev_group->led_num] = new_data; led->length = length; spin_unlock_irqrestore(&led->lock, flags); /* prepare for dma xfer, dynamic apply dma channel */ if (led->length > SUNXI_LEDC_FIFO_DEPTH) { err = sunxi_ledc_dma_get(led); if (err) return err; } sunxi_ledc_trans_data(led); if (debug_mask & DEBUG_INFO2) { dprintk(DEBUG_INFO2, "dump reg:\n"); led_dump_reg(led, 0, 0x30); } sunxi_ledc_complete(led); if (debug_mask & DEBUG_INFO1) pr_warn("num = %03u\n", length); return 0; } static int sunxi_register_led_classdev(struct sunxi_led *led) { int i, err; size_t size; struct device *dev = led->dev; struct led_classdev *pcdev_RGB; dprintk(DEBUG_INIT, "led_classdev start\n"); if (!led->led_count) led->led_count = SUNXI_DEFAULT_LED_COUNT; size = sizeof(struct sunxi_led_classdev_group) * led->led_count; led->pcdev_group = devm_kzalloc(dev, size, GFP_KERNEL); if (!led->pcdev_group) return -ENOMEM; for (i = 0; i < led->led_count; i++) { led->pcdev_group[i].r.type = LED_TYPE_R; pcdev_RGB = &led->pcdev_group[i].r.cdev; pcdev_RGB->name = devm_kzalloc(dev, 16, GFP_KERNEL); if (!pcdev_RGB->name) return -ENOMEM; sprintf((char *)pcdev_RGB->name, "sunxi_led%dr", i); pcdev_RGB->brightness = LED_OFF; pcdev_RGB->brightness_set_blocking = sunxi_set_led_brightness; pcdev_RGB->dev = dev; err = led_classdev_register(dev, pcdev_RGB); if (err < 0) { LED_ERR("led_classdev_register %s failed!\n", pcdev_RGB->name); return err; } led->pcdev_group[i].g.type = LED_TYPE_G; pcdev_RGB = &led->pcdev_group[i].g.cdev; pcdev_RGB->name = devm_kzalloc(dev, 16, GFP_KERNEL); if (!pcdev_RGB->name) return -ENOMEM; sprintf((char *)pcdev_RGB->name, "sunxi_led%dg", i); pcdev_RGB->brightness = LED_OFF; pcdev_RGB->brightness_set_blocking = sunxi_set_led_brightness; pcdev_RGB->dev = dev; err = led_classdev_register(dev, pcdev_RGB); if (err < 0) { LED_ERR("led_classdev_register %s failed!\n", pcdev_RGB->name); return err; } led->pcdev_group[i].b.type = LED_TYPE_B; pcdev_RGB = &led->pcdev_group[i].b.cdev; pcdev_RGB->name = devm_kzalloc(dev, 16, GFP_KERNEL); if (!pcdev_RGB->name) return -ENOMEM; sprintf((char *)pcdev_RGB->name, "sunxi_led%db", i); pcdev_RGB->brightness = LED_OFF; pcdev_RGB->brightness_set_blocking = sunxi_set_led_brightness; pcdev_RGB->dev = dev; err = led_classdev_register(dev, pcdev_RGB); if (err < 0) { LED_ERR("led_classdev_register %s failed!\n", pcdev_RGB->name); return err; } led->pcdev_group[i].led_num = i; } size = sizeof(u32) * led->led_count; led->data = devm_kzalloc(dev, size, GFP_KERNEL); if (!led->data) return -ENOMEM; return 0; } static void sunxi_unregister_led_classdev(struct sunxi_led *led) { int i; for (i = 0; i < led->led_count; i++) { kfree(led->pcdev_group[i].b.cdev.name); led->pcdev_group[i].b.cdev.name = NULL; kfree(led->pcdev_group[i].g.cdev.name); led->pcdev_group[i].g.cdev.name = NULL; kfree(led->pcdev_group[i].r.cdev.name); led->pcdev_group[i].r.cdev.name = NULL; led_classdev_unregister(&led->pcdev_group[i].b.cdev); led_classdev_unregister(&led->pcdev_group[i].g.cdev); led_classdev_unregister(&led->pcdev_group[i].r.cdev); } kfree(led->data); led->data = NULL; kfree(led->pcdev_group); led->pcdev_group = NULL; } static inline int sunxi_get_u32_of_property(const char *propname, int *val) { int err; struct sunxi_led *led = sunxi_led_global; struct device *dev = led->dev; struct device_node *np = dev->of_node; err = of_property_read_u32(np, propname, val); if (err < 0) LED_ERR("failed to get the value of propname %s!\n", propname); return err; } static inline int sunxi_get_str_of_property(const char *propname, const char **out_string) { int err; struct sunxi_led *led = sunxi_led_global; struct device *dev = led->dev; struct device_node *np = dev->of_node; err = of_property_read_string(np, propname, out_string); if (err < 0) LED_ERR("failed to get the string of propname %s!\n", propname); return err; } static void sunxi_get_para_of_property(struct sunxi_led *led) { int err; u32 val; const char *str; err = sunxi_get_u32_of_property("led_count", &val); if (!err) led->led_count = val; memcpy(led->output_mode.str, "GRB", 3); led->output_mode.val = SUNXI_OUTPUT_GRB; err = sunxi_get_str_of_property("output_mode", &str); if (!err) if (!strncmp(str, "BRG", 3) || !strncmp(str, "GBR", 3) || !strncmp(str, "RGB", 3) || !strncmp(str, "RBG", 3) || !strncmp(str, "BGR", 3)) memcpy(led->output_mode.str, str, 3); err = sunxi_get_str_of_property("led_regulator", &str); if (!err) { if (strlen(str) >= sizeof(led->regulator_id)) LED_ERR("illegal regulator id\n"); else { strcpy(led->regulator_id, str); pr_info("led_regulator: %s\n", led->regulator_id); } } err = sunxi_get_u32_of_property("reset_ns", &val); if (!err) led->reset_ns = val; err = sunxi_get_u32_of_property("t1h_ns", &val); if (!err) led->t1h_ns = val; err = sunxi_get_u32_of_property("t1l_ns", &val); if (!err) led->t1l_ns = val; err = sunxi_get_u32_of_property("t0h_ns", &val); if (!err) led->t0h_ns = val; err = sunxi_get_u32_of_property("t0l_ns", &val); if (!err) led->t0l_ns = val; err = sunxi_get_u32_of_property("wait_time0_ns", &val); if (!err) led->wait_time0_ns = val; err = sunxi_get_u32_of_property("wait_time1_ns", &val); if (!err) led->wait_time1_ns = val; err = sunxi_get_u32_of_property("wait_data_time_ns", &val); if (!err) led->wait_data_time_ns = val; } static void sunxi_led_set_all(struct sunxi_led *led, u8 channel, enum led_brightness value) { u32 i; struct led_classdev *led_cdev; if (channel%3 == 0) { for (i = 0; i < led->led_count; i++) { led_cdev = &led->pcdev_group[i].r.cdev; mutex_lock(&led_cdev->led_access); sunxi_set_led_brightness(led_cdev, value); mutex_unlock(&led_cdev->led_access); } } else if (channel%3 == 1) { for (i = 0; i < led->led_count; i++) { led_cdev = &led->pcdev_group[i].g.cdev; mutex_lock(&led_cdev->led_access); sunxi_set_led_brightness(led_cdev, value); mutex_unlock(&led_cdev->led_access); } } else { for (i = 0; i < led->led_count; i++) { led_cdev = &led->pcdev_group[i].b.cdev; mutex_lock(&led_cdev->led_access); sunxi_set_led_brightness(led_cdev, value); mutex_unlock(&led_cdev->led_access); } } } static ssize_t led_show(struct class *class, struct class_attribute *attr, char *buf) { struct sunxi_led *led = sunxi_led_global; sunxi_led_set_all(led, 0, 0); sunxi_led_set_all(led, 1, 0); sunxi_led_set_all(led, 2, 0); sunxi_led_set_all(led, 0, 20); msleep(500); sunxi_led_set_all(led, 1, 20); msleep(500); sunxi_led_set_all(led, 2, 20); msleep(500); sunxi_led_set_all(led, 0, 0); sunxi_led_set_all(led, 1, 0); sunxi_led_set_all(led, 2, 0); return 0; } static struct class_attribute led_class_attrs[] = { __ATTR(light, 0644, led_show, NULL), //__ATTR_NULL, }; static void led_node_init(void) { int i; int err; /* sys/class/led/xxx */ for (i = 0; i < ARRAY_SIZE(led_class_attrs); i++) { err = class_create_file(led_class, &led_class_attrs[i]); if (err) { LED_ERR("class_create_file() failed!\n"); while (i--) class_remove_file(led_class, &led_class_attrs[i]); class_destroy(led_class); led_class = NULL; } } } static int sunxi_led_probe(struct platform_device *pdev) { int err; struct sunxi_led *led; struct device *dev = &pdev->dev; struct resource *mem_res = NULL; int ret; dprintk(DEBUG_INIT, "start\n"); led = devm_kzalloc(dev, sizeof(struct sunxi_led), GFP_KERNEL); if (!led) return -ENOMEM; sunxi_led_global = led; platform_set_drvdata(pdev, led); led->dev = dev; mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (mem_res == NULL) { LED_ERR("failed to get MEM res\n"); ret = -ENXIO; goto emem; } if (!request_mem_region(mem_res->start, resource_size(mem_res), mem_res->name)) { LED_ERR("failed to request mem region\n"); ret = -EINVAL; goto emem; } led->iomem_reg_base = ioremap(mem_res->start, resource_size(mem_res)); if (!led->iomem_reg_base) { ret = -EIO; goto eiomap; } led->res = mem_res; led->output_mode.str = devm_kzalloc(dev, 3, GFP_KERNEL); if (!led->output_mode.str) { ret = -ENOMEM; goto ezalloc_str; } sunxi_get_para_of_property(led); err = led_regulator_request(led); if (err < 0) { LED_ERR("request regulator failed!\n"); ret = err; goto eregulator; } err = sunxi_register_led_classdev(led); if (err) { LED_ERR("failed to register led classdev\n"); ret = err; goto eclassdev; } sunxi_ledc_set_time(led); led->reset = devm_reset_control_get(&pdev->dev, NULL); if (IS_ERR(led->reset)) { LED_ERR("get reset clk error\n"); return -EINVAL; } ret = reset_control_deassert(led->reset); if (ret) { LED_ERR("deassert clk error, ret:%d\n", ret); return ret; } sunxi_clk_init(led); init_waitqueue_head(&led->wait); err = sunxi_ledc_irq_init(led); if (err) { LED_ERR("failed to init irq\n"); ret = err; goto eirq; } sunxi_ledc_pinctrl_init(led); #ifdef CONFIG_DEBUG_FS sunxi_led_create_debugfs(led); #endif /* CONFIG_DEBUG_FS */ led_class = class_create(THIS_MODULE, "led"); if (IS_ERR(led_class)) { LED_ERR("class_register err\n"); class_destroy(led_class); ret = -EFAULT; goto eclass; } led_node_init(); dprintk(DEBUG_INIT, "finish\n"); return 0; eclass: #ifdef CONFIG_DEBUG_FS sunxi_led_remove_debugfs(led); #endif /* CONFIG_DEBUG_FS */ sunxi_ledc_irq_deinit(led); eirq: sunxi_unregister_led_classdev(led); sunxi_clk_deinit(led); eclassdev: led_regulator_release(led); eregulator: kfree(led->output_mode.str); ezalloc_str: iounmap(led->iomem_reg_base); led->iomem_reg_base = NULL; eiomap: release_mem_region(mem_res->start, resource_size(mem_res)); emem: kfree(led); return ret; } static int sunxi_led_remove(struct platform_device *pdev) { struct sunxi_led *led = platform_get_drvdata(pdev); class_destroy(led_class); #ifdef CONFIG_DEBUG_FS sunxi_led_remove_debugfs(led); #endif /* CONFIG_DEBUG_FS */ if (led->dma_chan) { dmaengine_terminate_all(led->dma_chan); dma_release_channel(led->dma_chan); led->dma_chan = NULL; } sunxi_ledc_irq_deinit(led); sunxi_unregister_led_classdev(led); sunxi_clk_deinit(led); led_regulator_release(led); kfree(led->output_mode.str); led->output_mode.str = NULL; iounmap(led->iomem_reg_base); led->iomem_reg_base = NULL; release_mem_region(led->res->start, resource_size(led->res)); kfree(led); led = NULL; dprintk(DEBUG_INIT, "finish\n"); return 0; } #if IS_ENABLED(CONFIG_PM) static inline void sunxi_led_save_regs(struct sunxi_led *led) { int i; for (i = 0; i < ARRAY_SIZE(sunxi_led_regs_offset); i++) led->regs_backup[i] = readl(led->iomem_reg_base + sunxi_led_regs_offset[i]); } static inline void sunxi_led_restore_regs(struct sunxi_led *led) { int i; for (i = 0; i < ARRAY_SIZE(sunxi_led_regs_offset); i++) writel(led->regs_backup[i], led->iomem_reg_base + sunxi_led_regs_offset[i]); } static void sunxi_led_enable_irq(struct sunxi_led *led) { enable_irq(led->irqnum); } static void sunxi_led_disable_irq(struct sunxi_led *led) { disable_irq_nosync(led->irqnum); } static int sunxi_led_gpio_state_select(struct sunxi_led *led, char *name) { int err; struct pinctrl_state *pctrl_state; pctrl_state = pinctrl_lookup_state(led->pctrl, name); if (IS_ERR(pctrl_state)) { dev_err(led->dev, "pinctrl_lookup_state(%s) failed! return %p\n", name, pctrl_state); return PTR_ERR(pctrl_state); } err = pinctrl_select_state(led->pctrl, pctrl_state); if (err < 0) { dev_err(led->dev, "pinctrl_select_state(%s) failed! return %d\n", name, err); return err; } return 0; } static void sunxi_led_enable_clk(struct sunxi_led *led) { clk_prepare_enable(led->clk_ledc); clk_prepare_enable(led->clk_cpuapb); } static void sunxi_led_disable_clk(struct sunxi_led *led) { clk_disable_unprepare(led->clk_cpuapb); clk_disable_unprepare(led->clk_ledc); } static int sunxi_led_power_on(struct sunxi_led *led) { int err; if (led->regulator == NULL) return 0; err = regulator_enable(led->regulator); if (err) { dev_err(led->dev, "enable regulator %s failed!\n", led->regulator_id); return err; } return 0; } static int sunxi_led_power_off(struct sunxi_led *led) { int err; if (led->regulator == NULL) return 0; err = regulator_disable(led->regulator); if (err) { dev_err(led->dev, "disable regulator %s failed!\n", led->regulator_id); return err; } return 0; } static int sunxi_led_suspend(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct sunxi_led *led = platform_get_drvdata(pdev); dev_dbg(led->dev, "[%s] enter standby\n", __func__); sunxi_led_disable_irq(led); sunxi_led_save_regs(led); sunxi_led_gpio_state_select(led, PINCTRL_STATE_SLEEP); sunxi_led_disable_clk(led); reset_control_assert(led->reset); sunxi_led_power_off(led); return 0; } static int sunxi_led_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct sunxi_led *led = platform_get_drvdata(pdev); dev_dbg(led->dev, "[%s] return from standby\n", __func__); sunxi_led_power_on(led); reset_control_deassert(led->reset); sunxi_led_enable_clk(led); sunxi_led_gpio_state_select(led, PINCTRL_STATE_DEFAULT); sunxi_led_restore_regs(led); sunxi_led_enable_irq(led); return 0; } static const struct dev_pm_ops sunxi_led_pm_ops = { .suspend = sunxi_led_suspend, .resume = sunxi_led_resume, }; #define SUNXI_LED_PM_OPS (&sunxi_led_pm_ops) #endif static const struct of_device_id sunxi_led_dt_ids[] = { {.compatible = "allwinner,sunxi-leds"}, {}, }; static struct platform_driver sunxi_led_driver = { .probe = sunxi_led_probe, .remove = sunxi_led_remove, .driver = { .name = "sunxi-leds", .owner = THIS_MODULE, #if IS_ENABLED(CONFIG_PM) .pm = SUNXI_LED_PM_OPS, #endif .of_match_table = sunxi_led_dt_ids, }, }; module_platform_driver(sunxi_led_driver); module_param_named(debug, debug_mask, int, 0664); MODULE_ALIAS("sunxi leds dirver"); MODULE_ALIAS("platform : leds dirver"); MODULE_LICENSE("GPL v2"); MODULE_VERSION("1.2.3"); MODULE_AUTHOR("Albert Yu <yuxyun@allwinnertech.com>"); MODULE_AUTHOR("liuyu <SWCliuyus@allwinnertech.com>"); MODULE_DESCRIPTION("Allwinner ledc-controller driver");请更新
leds-sunxi.c修复了 LEDC DMA相关功能 -
回复: 测试编译不过发布在 V Series
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helloworld_fel 使用了 VFP 寄存器参数，但是某个库文件(libgcc.a(_udivmoddi4.o))却不支持。
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缺少 .note.GNU-stack 段，暗示可执行栈缺失。
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对于具有 RWX 权限的 LOAD 段，给出了警告。
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在链接时，出现了对 raise 函数的未定义引用。
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回复: t113使用sd卡启动卡住了发布在 Linux
@xingxing8 在 t113使用sd卡启动卡住了 中说：
先看这行
VFS: Cannot open root device "mmcblk0p5" or unknown-block(0,0): error -6
这行表示没有挂载上mmc设备
再往上找
[ 4.002919] sunxi-mmc 4020000.sdmmc: Got CD GPIO
[ 4.008458] sunxi-mmc 4020000.sdmmc: set cd-gpios as 24M fail
[ 4.018859] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 0Hz bm PP pm UP vdd 21 width 1 timing LEGACY(SDR12) dt BCD卡检测GPIO检测不到卡，关闭MMC驱动
Linux中的驱动为了省电会根据CD引脚检测卡是否存在，不存在则关闭MMC驱动，U-boot驱动没有这个逻辑
解决方法：
- 正向解决法
- 根据实物硬件查看CD引脚配置，上下拉状态是否正常，是否反转CD
- 软件规避法
- 直接关闭CD检测功能，取消注释
broken-cd;
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回复: D1s ledc驱动代码bug，DMA模式无法使用发布在 MR Series
@leomini5 我这边没有D1s的板卡，在T113上测试通过，测试1024颗灯，这个可能是RV才有的bug？
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回复: v853 vin通路配置发布在 V Series
（1）在线模式：四个vipp和dma实体，最大缩小比例为16*16，每路最多可支持16个orl
（2）离线模式：每个vipp和dma可分时复用为4个vipp和dma虚拟体，四个vipp和dma实体相互独立，在线模式和离线模式开关也是相互独立的；
（3）VIPP和DAM的分时复用（离线模式）与isp和tdm的分时复用（离线模式）是绑定关系，即tdm和isp开启了离线模式，vipp和dma的输入端如果是isp，那么vipp和dma也需要开启离线模式；
（4）只有VIPP0和dma0实体支持VE在线编码，而vipp0在线，如果vipp00的输入端为isp，那么tdm和isp也只能配置在线模式，而isp在线，那么四个vipp和dma实体都只能配置在线模式；online 和 offline 配 置 方 式 在 board.dts ， 所 以 需 要 在 对 应 版 型 的 board.dts 中 找 到 vind0 节 点 配 置 列 表 ， 对 应 关 系 为 tdm 对 应 节 点 ， isp 对 应 isp00 节 点 ， vipp 对 应 scaler00 、 scaler10 、 scaler20 和 scaler30 节 点 ， dma 对 ， 应 vinc00 、 vinc10 、 vinc20 和 vinc30 节 点 。
- 在线模式，单路3输出
- 离线模式，2路8输出
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回复: Tina-T113 openWrt 新增软件包，选中menuconfig后，编译报错，makefile完全就是按照sdk里QT对应的makefile来写的发布在 MR Series
Makefile:68: *** missing separator. Stop.
这个错误通常表示在 Makefile 的第 68 行或附近存在语法错误。Makefile 中使用的规则必须遵循严格的缩进规范，通常是使用 Tab 键进行缩进，而不是空格。
请检查 Makefile 第 68 行附近的代码，确保每个规则的命令部分都以 Tab 键开头，并且规则名称和命令之间使用冒号（:）分隔。此外，还需要确认 Makefile 的每一行都是使用相同的缩进方式，要么都是 Tab，要么都是空格，不要混用。
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回复: 关于打印启动日志到/dev/fb0的问题发布在 V Series
找到 env.cfg
#kernel command arguments earlyprintk=sunxi-uart,0x02500000 initcall_debug=0 console=ttyS0,115200 consolefb=tty0 nand_root=ubi0_4 mmc_root=/dev/mmcblk0p4 nor_root=/dev/mtdblock1 init=/init loglevel=8 coherent_pool=16K #reserve_list=30M@64M,78M@128M,200M@512M mac= wifi_mac= bt_mac= specialstr= root_partition=rootfs mtd_name=sys rootfstype=ubifs, rw #set kernel cmdline if boot.img or recovery.img has no cmdline we will use this setargs_nor=setenv bootargs earlyprintk=${earlyprintk} clk_ignore_unused initcall_debug=${initcall_debug} console=${console} console=${console—fb} loglevel=${loglevel} root=${nor_root} rootwait init=${init} rdinit=${rdinit} partitions=${partitions} cma=${cma} coherent_pool=${coherent_pool} ion_carveout_list=${reserve_list} setargs_nand=setenv bootargs earlyprintk=${earlyprintk} clk_ignore_unused initcall_debug=${initcall_debug} console=${console} console=${console—fb} loglevel=${loglevel} ubi.mtd=${mtd_name} root=${nand_root} rootfstype=${rootfstype} rootwait init=${init} rdinit=${rdinit} partitions=${partitions} cma=${cma} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} selinux=${selinux} specialstr=${specialstr} coherent_pool=${coherent_pool} ion_carveout_list=${reserve_list} setargs_nand_ubi=setenv bootargs ubi.mtd=${mtd_name} earlyprintk=${earlyprintk} clk_ignore_unused initcall_debug=${initcall_debug} console=${console} console=${console—fb} loglevel=${loglevel} root=${nand_root} rootfstype=${rootfstype} init=${init} partitions=${partitions} cma=${cma} snum=${snum} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} specialstr=${specialstr} gpt=1 setargs_mmc=setenv bootargs earlyprintk=${earlyprintk} clk_ignore_unused initcall_debug=${initcall_debug} console=${console} console=${console—fb} loglevel=${loglevel} root=${mmc_root} rootwait init=${init} partitions=${partitions} cma=${cma} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} selinux=${selinux} specialstr=${specialstr} coherent_pool=${coherent_pool} ion_carveout_list=${reserve_list} #nand command syntax: sunxi_flash read address partition_name read_bytes #0x4007f800 = 0x40080000(kernel entry) - 0x800(boot.img header 2k) boot_partition=boot boot_normal=sunxi_flash read 44800000 ${boot_partition};bootm 44800000 boot_recovery=sunxi_flash read 44800000 extend;bootm 44800000 boot_fastboot=fastboot #recovery key recovery_key_value_max=0x13 recovery_key_value_min=0x10 #fastboot key fastboot_key_value_max=0x8 fastboot_key_value_min=0x2 #uboot system env config bootdelay=1 #default bootcmd, will change at runtime according to key press bootcmd=run setargs_nand boot_normal#default nand boot #verify the kernel verify=N -
回复: 请教如何排查 linux kernel 启动卡主的问题发布在 Linux
@xsyr1024 在 请教如何排查 linux kernel 启动卡主的问题 中说：
[ 0.969253] 000: printk: console [ttyS0] enabled
[ 0.973945] 000: printk: bootconsole [earlycon0] disabled看着是earlycon0作为串口输出驱动正常，但是切换到ttyS0作为串口输出的时候ttyS0没有输出，先检查uart部分
另外这个是LinuxRT内核吗
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回复: D1-H哪吒开发板HDMI默认可以使用吗发布在 MR Series
默认HDMI不开，需要命令开启
cd /sys/kernel/debug/dispdbg echo disp0 > name; echo switch1 > command; echo 4 10 0 0 0x4 0x101 0 0 0 8 > param; echo 1 > start; -
回复: 全志提供的交叉编译环境头文件的问题发布在 Linux
obj-m := hello.o KERNEL := ../lichee/linux-5.4/ PWD := $(shell pwd) modules : $(MAKE) -C $(KERNEL) M=$(PWD) modules .PHONEY:clean clean : rm -f *.o *.ko这是一个基本的内核模块Makefile。下面是各个变量和命令的含义：
obj-m := hello.o定义要编译的内核模块的目标文件名为
hello.o。这里使用了obj-m变量，它是一个特殊的变量，用于编译内核模块。KERNEL := ../lichee/linux-5.4/定义内核源代码目录的位置，这里是
../lichee/linux-5.4/。根据实际情况修改该路径。PWD := $(shell pwd)定义当前目录的路径为
PWD。这里使用了shell命令来获取当前目录的路径。modules : $(MAKE) -C $(KERNEL) M=$(PWD) modules定义一个名为
modules的伪目标，它的依赖关系为空。执行该目标时，会进入内核源代码目录$(KERNEL)，并使用M=$(PWD)选项告诉内核Makefile，模块源代码在当前目录中。最后执行modules目标，编译内核模块。.PHONEY:clean clean : rm -f *.o *.ko定义一个伪目标
clean，它的依赖关系为空。执行该目标时，会删除当前目录下的所有.o和.ko文件。如果需要编译多个内核模块，可以将
obj-m变量中的目标文件名替换为多个目标文件名，如obj-m := hello.o world.o another.o。此外，还可以在Makefile中定义其他命令，比如安装、卸载等命令，以更方便地管理内核模块。编译指令如下：
make ARCH=arm CROSS_COMPILE=$(pwd)/../prebuilt/gcc/linux-x86/arm/toolchain-sunxi-glibc/toolchain/bin/arm-openwrt-linux-gnueabi-这是一个编译ARM架构的程序的Makefile命令。下面是各个参数的含义：
ARCH=arm指定目标架构为ARM。
CROSS_COMPILE=$(pwd)/../prebuilt/gcc/linux-x86/arm/toolchain-sunxi-glibc/toolchain/bin/arm-openwrt-linux-gnueabi-指定交叉编译器的路径及前缀。这里使用了
$(pwd)变量获取当前工作目录的路径，并拼接上交叉编译器的路径及前缀。根据实际情况修改该路径。使用交叉编译器可以在x86主机上编译ARM平台的程序。
arm-openwrt-linux-gnueabi-是交叉编译器的前缀，表示编译出来的可执行文件适用于OpenWrt系统。在执行该命令之前，需要确保已经安装了相应的交叉编译工具链，并将其加入环境变量中。如果没有安装，请参考相关文档进行安装。
