@karmastone 如果需要使用ssl，请升级openssl到1.1.1版本，方法是前往openwrt仓库查找1.1.1版本openssl的makefile
如果mqtt不需要ssl，直接使用不带ssl的即可
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awwwwa 发布的帖子
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回复: TinaLinux openssl 升级1.1.1发布在 MR Series
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回复: D1s DMA驱动Ledc 问题发布在 MR Series
// SPDX-License-Identifier: GPL-2.0-only /* * drivers/leds/leds-sunxi.c - Allwinner RGB LED Driver * * Copyright (C) 2018 Allwinner Technology Limited. All rights reserved. * http://www.allwinnertech.com * *Author : Albert Yu <yuxyun@allwinnertech.com> * Lewis <liuyu@allwinnertech.com> * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * */ #include <linux/module.h> #include <linux/delay.h> #include <linux/leds.h> #include <linux/io.h> #include <linux/of.h> #include <linux/slab.h> #include <linux/clk.h> #include <linux/dmaengine.h> #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/pinctrl/consumer.h> #include <linux/dma-mapping.h> #include <linux/debugfs.h> #include <linux/uaccess.h> #include <linux/delay.h> #include <linux/regulator/consumer.h> #include <linux/reset.h> #if IS_ENABLED(CONFIG_PM) #include <linux/pm.h> #endif #include "leds-sunxi.h" /* For debug */ #define LED_ERR(fmt, arg...) pr_err("%s()%d - "fmt, __func__, __LINE__, ##arg) #define dprintk(level_mask, fmt, arg...) \ do { \ if (unlikely(debug_mask & level_mask)) \ pr_warn("%s()%d - "fmt, __func__, __LINE__, ##arg); \ } while (0) static u32 debug_mask = 1; static struct sunxi_led *sunxi_led_global; static struct class *led_class; #define sunxi_slave_id(d, s) (((d)<<16) | (s)) /*For Driver */ static void led_dump_reg(struct sunxi_led *led, u32 offset, u32 len) { u32 i; u8 buf[64], cnt = 0; for (i = 0; i < len; i = i + REG_INTERVAL) { if (i%HEXADECIMAL == 0) cnt += sprintf(buf + cnt, "0x%08x: ", (u32)(led->res->start + offset + i)); cnt += sprintf(buf + cnt, "%08x ", readl(led->iomem_reg_base + offset + i)); if (i%HEXADECIMAL == REG_CL) { pr_warn("%s\n", buf); cnt = 0; } } } static void sunxi_clk_get(struct sunxi_led *led) { struct device *dev = led->dev; struct device_node *np = dev->of_node; led->clk_ledc = of_clk_get(np, 0); if (IS_ERR(led->clk_ledc)) LED_ERR("failed to get clk_ledc!\n"); led->clk_cpuapb = of_clk_get(np, 1); if (IS_ERR(led->clk_cpuapb)) LED_ERR("failed to get clk_cpuapb!\n"); } static void sunxi_clk_put(struct sunxi_led *led) { clk_put(led->clk_ledc); clk_put(led->clk_cpuapb); led->clk_ledc = NULL; led->clk_cpuapb = NULL; } static void sunxi_clk_enable(struct sunxi_led *led) { clk_prepare_enable(led->clk_ledc); clk_prepare_enable(led->clk_cpuapb); } static void sunxi_clk_disable(struct sunxi_led *led) { clk_disable_unprepare(led->clk_ledc); } static void sunxi_clk_init(struct sunxi_led *led) { sunxi_clk_get(led); sunxi_clk_enable(led); } static void sunxi_clk_deinit(struct sunxi_led *led) { sunxi_clk_disable(led); sunxi_clk_put(led); } static u32 sunxi_get_reg(int offset) { struct sunxi_led *led = sunxi_led_global; u32 value = ioread32(((u8 *)led->iomem_reg_base) + offset); return value; } static void sunxi_set_reg(int offset, u32 value) { struct sunxi_led *led = sunxi_led_global; iowrite32(value, ((u8 *)led->iomem_reg_base) + offset); } static inline void sunxi_set_reset_ns(struct sunxi_led *led) { u32 n, reg_val; u32 mask = 0x1FFF; u32 min = SUNXI_RESET_TIME_MIN_NS; u32 max = SUNXI_RESET_TIME_MAX_NS; if (led->reset_ns < min || led->reset_ns > max) { LED_ERR("invalid parameter, reset_ns should be %u-%u!\n", min, max); return; } n = (led->reset_ns - 42) / 42; reg_val = sunxi_get_reg(LED_RESET_TIMING_CTRL_REG_OFFSET); reg_val &= ~(mask << 16); reg_val |= (n << 16); sunxi_set_reg(LED_RESET_TIMING_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_set_t1h_ns(struct sunxi_led *led) { u32 n, reg_val; u32 mask = 0x3F; u32 shift = 21; u32 min = SUNXI_T1H_MIN_NS; u32 max = SUNXI_T1H_MAX_NS; if (led->t1h_ns < min || led->t1h_ns > max) { LED_ERR("invalid parameter, t1h_ns should be %u-%u!\n", min, max); return; } n = (led->t1h_ns - 42) / 42; reg_val = sunxi_get_reg(LED_T01_TIMING_CTRL_REG_OFFSET); reg_val &= ~(mask << shift); reg_val |= n << shift; sunxi_set_reg(LED_T01_TIMING_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_set_t1l_ns(struct sunxi_led *led) { u32 n, reg_val; u32 mask = 0x1F; u32 shift = 16; u32 min = SUNXI_T1L_MIN_NS; u32 max = SUNXI_T1L_MAX_NS; if (led->t1l_ns < min || led->t1l_ns > max) { LED_ERR("invalid parameter, t1l_ns should be %u-%u!\n", min, max); return; } n = (led->t1l_ns - 42) / 42; reg_val = sunxi_get_reg(LED_T01_TIMING_CTRL_REG_OFFSET); reg_val &= ~(mask << shift); reg_val |= n << shift; sunxi_set_reg(LED_T01_TIMING_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_set_t0h_ns(struct sunxi_led *led) { u32 n, reg_val; u32 mask = 0x1F; u32 shift = 6; u32 min = SUNXI_T0H_MIN_NS; u32 max = SUNXI_T0H_MAX_NS; if (led->t0h_ns < min || led->t0h_ns > max) { LED_ERR("invalid parameter, t0h_ns should be %u-%u!\n", min, max); return; } n = (led->t0h_ns - 42) / 42; reg_val = sunxi_get_reg(LED_T01_TIMING_CTRL_REG_OFFSET); reg_val &= ~(mask << shift); reg_val |= n << shift; sunxi_set_reg(LED_T01_TIMING_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_set_t0l_ns(struct sunxi_led *led) { u32 n, reg_val; u32 min = SUNXI_T0L_MIN_NS; u32 max = SUNXI_T0L_MAX_NS; if (led->t0l_ns < min || led->t0l_ns > max) { LED_ERR("invalid parameter, t0l_ns should be %u-%u!\n", min, max); return; } n = (led->t0l_ns - 42) / 42; reg_val = sunxi_get_reg(LED_T01_TIMING_CTRL_REG_OFFSET); reg_val &= ~0x3F; reg_val |= n; sunxi_set_reg(LED_T01_TIMING_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_set_wait_time0_ns(struct sunxi_led *led) { u32 n, reg_val; u32 min = SUNXI_WAIT_TIME0_MIN_NS; u32 max = SUNXI_WAIT_TIME0_MAX_NS; if (led->wait_time0_ns < min || led->wait_time0_ns > max) { LED_ERR("invalid parameter, wait_time0_ns should be %u-%u!\n", min, max); return; } n = (led->wait_time0_ns - 42) / 42; reg_val = (1 << 8) | n; sunxi_set_reg(LEDC_WAIT_TIME0_CTRL_REG, reg_val); } static inline void sunxi_set_wait_time1_ns(struct sunxi_led *led) { unsigned long long tmp, max = SUNXI_WAIT_TIME1_MAX_NS; u32 min = SUNXI_WAIT_TIME1_MIN_NS; u32 n, reg_val; if (led->wait_time1_ns < min || led->wait_time1_ns > max) { LED_ERR("invalid parameter, wait_time1_ns should be %u-%llu!\n", min, max); return; } tmp = led->wait_time1_ns; n = div_u64(tmp, 42); n -= 1; reg_val = (1 << 31) | n; sunxi_set_reg(LEDC_WAIT_TIME1_CTRL_REG, reg_val); } static inline void sunxi_set_wait_data_time_ns(struct sunxi_led *led) { u32 min, max; #ifndef SUNXI_FPGA_LEDC u32 mask = 0x1FFF, shift = 16, reg_val = 0, n; #endif min = SUNXI_WAIT_DATA_TIME_MIN_NS; #ifdef SUNXI_FPGA_LEDC /* * For FPGA platforms, it is easy to meet wait data timeout for * the obvious latency of task which is because of less cpu cores * and lower cpu frequency compared with IC platforms, so here we * permit long enough time latency. */ max = SUNXI_WAIT_DATA_TIME_MAX_NS_FPGA; #else /* SUNXI_FPGA_LEDC */ max = SUNXI_WAIT_DATA_TIME_MAX_NS_IC; #endif /* SUNXI_FPGA_LEDC */ if (led->wait_data_time_ns < min || led->wait_data_time_ns > max) { LED_ERR("invalid parameter, wait_data_time_ns should be %u-%u!\n", min, max); return; } #ifndef SUNXI_FPGA_LEDC n = (led->wait_data_time_ns - 42) / 42; reg_val &= ~(mask << shift); reg_val |= (n << shift); sunxi_set_reg(LEDC_DATA_FINISH_CNT_REG_OFFSET, reg_val); #endif /* SUNXI_FPGA_LEDC */ } static void sunxi_ledc_set_time(struct sunxi_led *led) { sunxi_set_reset_ns(led); sunxi_set_t1h_ns(led); sunxi_set_t1l_ns(led); sunxi_set_t0h_ns(led); sunxi_set_t0l_ns(led); sunxi_set_wait_time0_ns(led); sunxi_set_wait_time1_ns(led); sunxi_set_wait_data_time_ns(led); } static void sunxi_ledc_set_length(struct sunxi_led *led) { u32 reg_val; u32 length = led->length; if (length == 0) return; if (length > led->led_count) return; reg_val = sunxi_get_reg(LEDC_CTRL_REG_OFFSET); reg_val &= ~(0x1FFF << 16); reg_val |= length << 16; sunxi_set_reg(LEDC_CTRL_REG_OFFSET, reg_val); reg_val = sunxi_get_reg(LED_RESET_TIMING_CTRL_REG_OFFSET); reg_val &= ~0x3FF; reg_val |= length - 1; sunxi_set_reg(LED_RESET_TIMING_CTRL_REG_OFFSET, reg_val); } static void sunxi_ledc_set_output_mode(struct sunxi_led *led, const char *str) { u32 val; u32 mask = 0x7; u32 shift = 6; u32 reg_val = sunxi_get_reg(LEDC_CTRL_REG_OFFSET); if (str != NULL) { if (!strncmp(str, "GRB", 3)) val = SUNXI_OUTPUT_GRB; else if (!strncmp(str, "GBR", 3)) val = SUNXI_OUTPUT_GBR; else if (!strncmp(str, "RGB", 3)) val = SUNXI_OUTPUT_RGB; else if (!strncmp(str, "RBG", 3)) val = SUNXI_OUTPUT_RBG; else if (!strncmp(str, "BGR", 3)) val = SUNXI_OUTPUT_BGR; else if (!strncmp(str, "BRG", 3)) val = SUNXI_OUTPUT_BRG; else return; } else { val = led->output_mode.val; } reg_val &= ~(mask << shift); reg_val |= val; sunxi_set_reg(LEDC_CTRL_REG_OFFSET, reg_val); if (str != NULL) { if (strncmp(str, led->output_mode.str, 3)) memcpy(led->output_mode.str, str, 3); } if (val != led->output_mode.val) led->output_mode.val = val; } static void sunxi_ledc_enable_irq(u32 mask) { u32 reg_val = 0; reg_val |= mask; sunxi_set_reg(LEDC_INT_CTRL_REG_OFFSET, reg_val); } static void sunxi_ledc_disable_irq(u32 mask) { u32 reg_val = 0; reg_val = sunxi_get_reg(LEDC_INT_CTRL_REG_OFFSET); reg_val &= ~mask; sunxi_set_reg(LEDC_INT_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_ledc_enable(struct sunxi_led *led) { u32 reg_val; reg_val = sunxi_get_reg(LEDC_CTRL_REG_OFFSET); reg_val |= 1; sunxi_set_reg(LEDC_CTRL_REG_OFFSET, reg_val); } static inline void sunxi_ledc_reset(struct sunxi_led *led) { u32 reg_val = sunxi_get_reg(LEDC_CTRL_REG_OFFSET); sunxi_ledc_disable_irq(LEDC_TRANS_FINISH_INT_EN | LEDC_FIFO_CPUREQ_INT_EN | LEDC_WAITDATA_TIMEOUT_INT_EN | LEDC_FIFO_OVERFLOW_INT_EN | LEDC_GLOBAL_INT_EN); if (debug_mask & DEBUG_INFO2) { dprintk(DEBUG_INFO2, "dump reg:\n"); led_dump_reg(led, 0, 0x30); } reg_val |= 1 << 1; sunxi_set_reg(LEDC_CTRL_REG_OFFSET, reg_val); } #ifdef CONFIG_DEBUG_FS static ssize_t reset_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_RESET_TIME_MIN_NS; max = SUNXI_RESET_TIME_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->reset_ns = val; sunxi_set_reset_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, reset_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t reset_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->reset_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations reset_ns_fops = { .owner = THIS_MODULE, .write = reset_ns_write, .read = reset_ns_read, }; static ssize_t t1h_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_T1H_MIN_NS; max = SUNXI_T1H_MAX_NS; if (count >= sizeof(buffer)) return -EINVAL; if (copy_from_user(buffer, buf, count)) return -EFAULT; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) return -EINVAL; if (val < min || val > max) goto err_out; led->t1h_ns = val; sunxi_set_t1h_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, t1h_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t t1h_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->t1h_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations t1h_ns_fops = { .owner = THIS_MODULE, .write = t1h_ns_write, .read = t1h_ns_read, }; static ssize_t t1l_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_T1L_MIN_NS; max = SUNXI_T1L_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->t1l_ns = val; sunxi_set_t1l_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, t1l_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t t1l_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->t1l_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations t1l_ns_fops = { .owner = THIS_MODULE, .write = t1l_ns_write, .read = t1l_ns_read, }; static ssize_t t0h_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_T0H_MIN_NS; max = SUNXI_T0H_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->t0h_ns = val; sunxi_set_t0h_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, t0h_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t t0h_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->t0h_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations t0h_ns_fops = { .owner = THIS_MODULE, .write = t0h_ns_write, .read = t0h_ns_read, }; static ssize_t t0l_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_T0L_MIN_NS; max = SUNXI_T0L_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->t0l_ns = val; sunxi_set_t0l_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, t0l_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t t0l_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->t0l_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations t0l_ns_fops = { .owner = THIS_MODULE, .write = t0l_ns_write, .read = t0l_ns_read, }; static ssize_t wait_time0_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_WAIT_TIME0_MIN_NS; max = SUNXI_WAIT_TIME0_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->wait_time0_ns = val; sunxi_set_wait_time0_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, wait_time0_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t wait_time0_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->wait_time0_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations wait_time0_ns_fops = { .owner = THIS_MODULE, .write = wait_time0_ns_write, .read = wait_time0_ns_read, }; static ssize_t wait_time1_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min; unsigned long long max; unsigned long long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_WAIT_TIME1_MIN_NS; max = SUNXI_WAIT_TIME1_MAX_NS; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoull(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->wait_time1_ns = val; sunxi_set_wait_time1_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, wait_time1_ns should be %u-%lld!\n", min, max); return -EINVAL; } static ssize_t wait_time1_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%lld\n", led->wait_time1_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations wait_time1_ns_fops = { .owner = THIS_MODULE, .write = wait_time1_ns_write, .read = wait_time1_ns_read, }; static ssize_t wait_data_time_ns_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { int err; char buffer[64]; u32 min, max; unsigned long val; struct sunxi_led *led = sunxi_led_global; min = SUNXI_WAIT_DATA_TIME_MIN_NS; #ifdef SUNXI_FPGA_LEDC max = SUNXI_WAIT_DATA_TIME_MAX_NS_FPGA; #else max = SUNXI_WAIT_DATA_TIME_MAX_NS_IC; #endif if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; err = kstrtoul(buffer, 10, &val); if (err) goto err_out; if (val < min || val > max) goto err_out; led->wait_data_time_ns = val; sunxi_set_wait_data_time_ns(led); *offp += count; return count; err_out: LED_ERR("invalid parameter, wait_data_time_ns should be %u-%u!\n", min, max); return -EINVAL; } static ssize_t wait_data_time_ns_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%u\n", led->wait_data_time_ns); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations wait_data_time_ns_fops = { .owner = THIS_MODULE, .write = wait_data_time_ns_write, .read = wait_data_time_ns_read, }; static int data_show(struct seq_file *s, void *data) { int i; struct sunxi_led *led = sunxi_led_global; for (i = 0; i < led->led_count; i++) { if (!(i % 4)) { if (i + 4 <= led->led_count) seq_printf(s, "%04d-%04d", i, i + 4); else seq_printf(s, "%04d-%04d", i, led->led_count); } seq_printf(s, " 0x%08x", led->data[i]); if (((i % 4) == 3) || (i == led->led_count - 1)) seq_puts(s, "\n"); } return 0; } static int data_open(struct inode *inode, struct file *file) { return single_open(file, data_show, inode->i_private); } static const struct file_operations data_fops = { .owner = THIS_MODULE, .open = data_open, .read = seq_read, .llseek = seq_lseek, .release = single_release, }; static ssize_t output_mode_write(struct file *filp, const char __user *buf, size_t count, loff_t *offp) { char buffer[64]; struct sunxi_led *led = sunxi_led_global; if (count >= sizeof(buffer)) goto err_out; if (copy_from_user(buffer, buf, count)) goto err_out; buffer[count] = '\0'; sunxi_ledc_set_output_mode(led, buffer); *offp += count; return count; err_out: LED_ERR("invalid parameter!\n"); return -EINVAL; } static ssize_t output_mode_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; struct sunxi_led *led = sunxi_led_global; r = snprintf(buffer, 64, "%s\n", led->output_mode.str); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations output_mode_fops = { .owner = THIS_MODULE, .write = output_mode_write, .read = output_mode_read, }; static ssize_t hwversion_read(struct file *filp, char __user *buf, size_t count, loff_t *offp) { int r; char buffer[64]; u32 reg_val, major_ver, minor_ver; reg_val = sunxi_get_reg(LEDC_VER_NUM_REG); major_ver = reg_val >> 16; minor_ver = reg_val & 0xF; r = snprintf(buffer, 64, "r%up%u\n", major_ver, minor_ver); return simple_read_from_buffer(buf, count, offp, buffer, r); } static const struct file_operations hwversion_fops = { .owner = THIS_MODULE, .read = hwversion_read, }; static void sunxi_led_create_debugfs(struct sunxi_led *led) { struct dentry *debugfs_dir, *debugfs_file; debugfs_dir = debugfs_create_dir("sunxi_leds", NULL); if (IS_ERR_OR_NULL(debugfs_dir)) { LED_ERR("debugfs_create_dir failed!\n"); return; } led->debugfs_dir = debugfs_dir; debugfs_file = debugfs_create_file("reset_ns", 0660, debugfs_dir, NULL, &reset_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for reset_ns failed!\n"); debugfs_file = debugfs_create_file("t1h_ns", 0660, debugfs_dir, NULL, &t1h_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for t1h_ns failed!\n"); debugfs_file = debugfs_create_file("t1l_ns", 0660, debugfs_dir, NULL, &t1l_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for t1l_ns failed!\n"); debugfs_file = debugfs_create_file("t0h_ns", 0660, debugfs_dir, NULL, &t0h_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for t0h_ns failed!\n"); debugfs_file = debugfs_create_file("t0l_ns", 0660, debugfs_dir, NULL, &t0l_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for t0l_ns failed!\n"); debugfs_file = debugfs_create_file("wait_time0_ns", 0660, debugfs_dir, NULL, &wait_time0_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for wait_time0_ns failed!\n"); debugfs_file = debugfs_create_file("wait_time1_ns", 0660, debugfs_dir, NULL, &wait_time1_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for wait_time1_ns failed!\n"); debugfs_file = debugfs_create_file("wait_data_time_ns", 0660, debugfs_dir, NULL, &wait_data_time_ns_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for wait_data_time_ns failed!\n"); debugfs_file = debugfs_create_file("data", 0440, debugfs_dir, NULL, &data_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for data failed!\n"); debugfs_file = debugfs_create_file("output_mode", 0660, debugfs_dir, NULL, &output_mode_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for output_mode failed!\n"); if (!debugfs_file) LED_ERR("debugfs_create_file for trans_mode failed!\n"); debugfs_file = debugfs_create_file("hwversion", 0440, debugfs_dir, NULL, &hwversion_fops); if (!debugfs_file) LED_ERR("debugfs_create_file for hwversion failed!\n"); } static void sunxi_led_remove_debugfs(struct sunxi_led *led) { debugfs_remove_recursive(led->debugfs_dir); } #endif /* CONFIG_DEBUG_FS */ static void sunxi_ledc_set_dma_mode(struct sunxi_led *led) { u32 reg_val = 0; reg_val |= 1 << 5; sunxi_set_reg(LEDC_DMA_CTRL_REG, reg_val); sunxi_ledc_disable_irq(LEDC_FIFO_CPUREQ_INT_EN); } static void sunxi_ledc_set_cpu_mode(struct sunxi_led *led) { u32 reg_val = 0; reg_val &= ~(1 << 5); sunxi_set_reg(LEDC_DMA_CTRL_REG, reg_val); sunxi_ledc_enable_irq(LEDC_FIFO_CPUREQ_INT_EN); } static void sunxi_ledc_dma_callback(void *param) { dprintk(DEBUG_INFO, "finish\n"); } static void sunxi_ledc_trans_data(struct sunxi_led *led) { int i, err; size_t size; unsigned long flags; phys_addr_t dst_addr; struct dma_slave_config slave_config; struct device *dev = led->dev; struct dma_async_tx_descriptor *dma_desc; /* less than 32 lights use cpu transmission. */ /* more than 32 lights use dma transmission. */ if (led->length <= SUNXI_LEDC_FIFO_DEPTH) { dprintk(DEBUG_INFO, "cpu xfer\n"); ktime_get_coarse_real_ts64(&(led->start_time)); sunxi_ledc_set_time(led); sunxi_ledc_set_output_mode(led, led->output_mode.str); sunxi_ledc_set_cpu_mode(led); sunxi_ledc_set_length(led); sunxi_ledc_enable_irq(LEDC_TRANS_FINISH_INT_EN | LEDC_WAITDATA_TIMEOUT_INT_EN | LEDC_FIFO_OVERFLOW_INT_EN | LEDC_GLOBAL_INT_EN); sunxi_ledc_enable(led); for (i = 0; i < led->length; i++) sunxi_set_reg(LEDC_DATA_REG_OFFSET, led->data[i]); } else { dprintk(DEBUG_INFO, "dma xfer\n"); size = led->length * 4; led->src_dma = dma_map_single(dev, led->data, size, DMA_TO_DEVICE); dst_addr = led->res->start + LEDC_DATA_REG_OFFSET; flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK; slave_config.direction = DMA_MEM_TO_DEV; slave_config.src_addr = led->src_dma; slave_config.dst_addr = dst_addr; slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; slave_config.src_maxburst = 4; slave_config.dst_maxburst = 4; err = dmaengine_slave_config(led->dma_chan, &slave_config); if (err < 0) { LED_ERR("dmaengine_slave_config failed!\n"); return; } dma_desc = dmaengine_prep_slave_single(led->dma_chan, led->src_dma, size, DMA_MEM_TO_DEV, flags); if (!dma_desc) { LED_ERR("dmaengine_prep_slave_single failed!\n"); return; } dma_desc->callback = sunxi_ledc_dma_callback; dmaengine_submit(dma_desc); dma_async_issue_pending(led->dma_chan); ktime_get_coarse_real_ts64(&(led->start_time)); sunxi_ledc_set_time(led); sunxi_ledc_set_output_mode(led, led->output_mode.str); sunxi_ledc_set_dma_mode(led); sunxi_ledc_set_length(led); sunxi_ledc_enable_irq(LEDC_TRANS_FINISH_INT_EN | LEDC_WAITDATA_TIMEOUT_INT_EN | LEDC_FIFO_OVERFLOW_INT_EN | LEDC_GLOBAL_INT_EN); sunxi_ledc_enable(led); } } static inline void sunxi_ledc_clear_all_irq(void) { u32 reg_val = sunxi_get_reg(LEDC_INT_STS_REG_OFFSET); reg_val &= ~0x1F; sunxi_set_reg(LEDC_INT_STS_REG_OFFSET, reg_val); } static inline void sunxi_ledc_clear_irq(enum sunxi_ledc_irq_status_reg irq) { u32 reg_val = sunxi_get_reg(LEDC_INT_STS_REG_OFFSET); reg_val &= ~irq; sunxi_set_reg(LEDC_INT_STS_REG_OFFSET, reg_val); } static int sunxi_ledc_complete(struct sunxi_led *led) { unsigned long flags = 0; unsigned long timeout = 0; u32 reg_val; /*wait_event_timeout return 0 : timeout *wait_event_timeout return > 0 : thr left time * */ timeout = wait_event_timeout(led->wait, led->result, 5*HZ); if (timeout == 0) { reg_val = sunxi_get_reg(LEDC_INT_STS_REG_OFFSET); pr_err("LEDC INTERRUPT STATUS REG IS %x", reg_val); LED_ERR("led xfer timeout\n"); reg_val = sunxi_get_reg(LEDC_INT_STS_REG_OFFSET); pr_err("LEDC INTERRUPT STATUS REG IS %x", reg_val); return -ETIME; } else if (led->result == RESULT_ERR) { return -ECOMM; } dprintk(DEBUG_INFO, "xfer complete\n"); spin_lock_irqsave(&led->lock, flags); led->result = 0; spin_unlock_irqrestore(&led->lock, flags); return 0; } static irqreturn_t sunxi_ledc_irq_handler(int irq, void *dev_id) { long delta_time_ns; u32 irq_status, max_ns; struct sunxi_led *led = sunxi_led_global; struct device *dev = led->dev; struct timespec64 current_time; spin_lock(&led->lock); irq_status = sunxi_get_reg(LEDC_INT_STS_REG_OFFSET); sunxi_ledc_clear_all_irq(); if (irq_status & LEDC_TRANS_FINISH_INT) { sunxi_ledc_reset(led); led->result = RESULT_COMPLETE; goto out; } if (irq_status & LEDC_WAITDATA_TIMEOUT_INT) { ktime_get_coarse_real_ts64(¤t_time); delta_time_ns = current_time.tv_sec - led->start_time.tv_sec; delta_time_ns *= 1000 * 1000 * 1000; delta_time_ns += current_time.tv_nsec - led->start_time.tv_nsec; max_ns = led->wait_data_time_ns; if (delta_time_ns <= max_ns) { spin_unlock(&led->lock); return IRQ_HANDLED; } sunxi_ledc_reset(led); if (delta_time_ns <= max_ns * 2) { sunxi_ledc_trans_data(led); } else { LED_ERR("wait time is more than %d ns," "going to reset ledc and drop this operation!\n", max_ns); led->result = RESULT_ERR; } goto out; } if (irq_status & LEDC_FIFO_OVERFLOW_INT) { LED_ERR("there exists fifo overflow issue, irq_status=0x%x!\n", irq_status); sunxi_ledc_reset(led); led->result = RESULT_ERR; goto out; } out: if (led->dma_chan) dma_unmap_single(dev, led->src_dma, led->length * 4, DMA_TO_DEVICE); wake_up(&led->wait); led->length = 0; spin_unlock(&led->lock); return IRQ_HANDLED; } static int sunxi_ledc_irq_init(struct sunxi_led *led) { int err; struct device *dev = led->dev; unsigned long flags = 0; const char *name = "ledcirq"; struct platform_device *pdev; pdev = container_of(dev, struct platform_device, dev); spin_lock_init(&led->lock); led->irqnum = platform_get_irq(pdev, 0); if (led->irqnum < 0) LED_ERR("failed to get ledc irq!\n"); err = request_irq(led->irqnum, sunxi_ledc_irq_handler, flags, name, dev); if (err) { LED_ERR("failed to install IRQ handler for irqnum %d\n", led->irqnum); return -EPERM; } return 0; } static void sunxi_ledc_irq_deinit(struct sunxi_led *led) { free_irq(led->irqnum, led->dev); sunxi_ledc_disable_irq(LEDC_TRANS_FINISH_INT_EN | LEDC_FIFO_CPUREQ_INT_EN | LEDC_WAITDATA_TIMEOUT_INT_EN | LEDC_FIFO_OVERFLOW_INT_EN | LEDC_GLOBAL_INT_EN); } static void sunxi_ledc_pinctrl_init(struct sunxi_led *led) { struct device *dev = led->dev; struct pinctrl *pinctrl = devm_pinctrl_get_select_default(dev); led->pctrl = pinctrl; if (IS_ERR(pinctrl)) LED_ERR("devm_pinctrl_get_select_default failed!\n"); } static int led_regulator_request(struct sunxi_led *led) { struct regulator *regu = NULL; /* Consider "n*" as nocare. Support "none", "nocare", "null", "" etc. */ if ((led->regulator_id[0] == 'n') || (led->regulator_id[0] == 0)) return 0; regu = regulator_get(NULL, led->regulator_id); if (IS_ERR(regu)) { LED_ERR("get regulator %s failed!\n", led->regulator_id); return -1; } led->regulator = regu; return 0; } static int led_regulator_release(struct sunxi_led *led) { if (led->regulator == NULL) return 0; regulator_put(led->regulator); led->regulator = NULL; return 1; } static int sunxi_ledc_dma_get(struct sunxi_led *led) { if (led->dma_chan == NULL) { led->dma_chan = dma_request_chan(led->dev, "tx"); if (IS_ERR(led->dma_chan)) { LED_ERR("failed to get the DMA channel!\n"); return -EFAULT; } } return 0; } static int sunxi_set_led_brightness(struct led_classdev *led_cdev, enum led_brightness value) { unsigned long flags; u32 r, g, b, shift, old_data, new_data, length; struct sunxi_led_info *pinfo; struct sunxi_led_classdev_group *pcdev_group; struct sunxi_led *led = sunxi_led_global; int err; pinfo = container_of(led_cdev, struct sunxi_led_info, cdev); switch (pinfo->type) { case LED_TYPE_G: pcdev_group = container_of(pinfo, struct sunxi_led_classdev_group, g); g = value; shift = 16; break; case LED_TYPE_R: pcdev_group = container_of(pinfo, struct sunxi_led_classdev_group, r); r = value; shift = 8; break; case LED_TYPE_B: pcdev_group = container_of(pinfo, struct sunxi_led_classdev_group, b); b = value; shift = 0; break; } old_data = led->data[pcdev_group->led_num]; if (((old_data >> shift) & 0xFF) == value) return 0; if (pinfo->type != LED_TYPE_R) r = pcdev_group->r.cdev.brightness; if (pinfo->type != LED_TYPE_G) g = pcdev_group->g.cdev.brightness; if (pinfo->type != LED_TYPE_B) b = pcdev_group->b.cdev.brightness; /* LEDC treats input data as GRB by default */ new_data = (g << 16) | (r << 8) | b; length = pcdev_group->led_num + 1; spin_lock_irqsave(&led->lock, flags); led->data[pcdev_group->led_num] = new_data; led->length = length; spin_unlock_irqrestore(&led->lock, flags); /* prepare for dma xfer, dynamic apply dma channel */ if (led->length > SUNXI_LEDC_FIFO_DEPTH) { err = sunxi_ledc_dma_get(led); if (err) return err; } sunxi_ledc_trans_data(led); if (debug_mask & DEBUG_INFO2) { dprintk(DEBUG_INFO2, "dump reg:\n"); led_dump_reg(led, 0, 0x30); } sunxi_ledc_complete(led); if (debug_mask & DEBUG_INFO1) pr_warn("num = %03u\n", length); return 0; } static int sunxi_register_led_classdev(struct sunxi_led *led) { int i, err; size_t size; struct device *dev = led->dev; struct led_classdev *pcdev_RGB; dprintk(DEBUG_INIT, "led_classdev start\n"); if (!led->led_count) led->led_count = SUNXI_DEFAULT_LED_COUNT; size = sizeof(struct sunxi_led_classdev_group) * led->led_count; led->pcdev_group = devm_kzalloc(dev, size, GFP_KERNEL); if (!led->pcdev_group) return -ENOMEM; for (i = 0; i < led->led_count; i++) { led->pcdev_group[i].r.type = LED_TYPE_R; pcdev_RGB = &led->pcdev_group[i].r.cdev; pcdev_RGB->name = devm_kzalloc(dev, 16, GFP_KERNEL); if (!pcdev_RGB->name) return -ENOMEM; sprintf((char *)pcdev_RGB->name, "sunxi_led%dr", i); pcdev_RGB->brightness = LED_OFF; pcdev_RGB->brightness_set_blocking = sunxi_set_led_brightness; pcdev_RGB->dev = dev; err = led_classdev_register(dev, pcdev_RGB); if (err < 0) { LED_ERR("led_classdev_register %s failed!\n", pcdev_RGB->name); return err; } led->pcdev_group[i].g.type = LED_TYPE_G; pcdev_RGB = &led->pcdev_group[i].g.cdev; pcdev_RGB->name = devm_kzalloc(dev, 16, GFP_KERNEL); if (!pcdev_RGB->name) return -ENOMEM; sprintf((char *)pcdev_RGB->name, "sunxi_led%dg", i); pcdev_RGB->brightness = LED_OFF; pcdev_RGB->brightness_set_blocking = sunxi_set_led_brightness; pcdev_RGB->dev = dev; err = led_classdev_register(dev, pcdev_RGB); if (err < 0) { LED_ERR("led_classdev_register %s failed!\n", pcdev_RGB->name); return err; } led->pcdev_group[i].b.type = LED_TYPE_B; pcdev_RGB = &led->pcdev_group[i].b.cdev; pcdev_RGB->name = devm_kzalloc(dev, 16, GFP_KERNEL); if (!pcdev_RGB->name) return -ENOMEM; sprintf((char *)pcdev_RGB->name, "sunxi_led%db", i); pcdev_RGB->brightness = LED_OFF; pcdev_RGB->brightness_set_blocking = sunxi_set_led_brightness; pcdev_RGB->dev = dev; err = led_classdev_register(dev, pcdev_RGB); if (err < 0) { LED_ERR("led_classdev_register %s failed!\n", pcdev_RGB->name); return err; } led->pcdev_group[i].led_num = i; } size = sizeof(u32) * led->led_count; led->data = devm_kzalloc(dev, size, GFP_KERNEL); if (!led->data) return -ENOMEM; return 0; } static void sunxi_unregister_led_classdev(struct sunxi_led *led) { int i; for (i = 0; i < led->led_count; i++) { kfree(led->pcdev_group[i].b.cdev.name); led->pcdev_group[i].b.cdev.name = NULL; kfree(led->pcdev_group[i].g.cdev.name); led->pcdev_group[i].g.cdev.name = NULL; kfree(led->pcdev_group[i].r.cdev.name); led->pcdev_group[i].r.cdev.name = NULL; led_classdev_unregister(&led->pcdev_group[i].b.cdev); led_classdev_unregister(&led->pcdev_group[i].g.cdev); led_classdev_unregister(&led->pcdev_group[i].r.cdev); } kfree(led->data); led->data = NULL; kfree(led->pcdev_group); led->pcdev_group = NULL; } static inline int sunxi_get_u32_of_property(const char *propname, int *val) { int err; struct sunxi_led *led = sunxi_led_global; struct device *dev = led->dev; struct device_node *np = dev->of_node; err = of_property_read_u32(np, propname, val); if (err < 0) LED_ERR("failed to get the value of propname %s!\n", propname); return err; } static inline int sunxi_get_str_of_property(const char *propname, const char **out_string) { int err; struct sunxi_led *led = sunxi_led_global; struct device *dev = led->dev; struct device_node *np = dev->of_node; err = of_property_read_string(np, propname, out_string); if (err < 0) LED_ERR("failed to get the string of propname %s!\n", propname); return err; } static void sunxi_get_para_of_property(struct sunxi_led *led) { int err; u32 val; const char *str; err = sunxi_get_u32_of_property("led_count", &val); if (!err) led->led_count = val; memcpy(led->output_mode.str, "GRB", 3); led->output_mode.val = SUNXI_OUTPUT_GRB; err = sunxi_get_str_of_property("output_mode", &str); if (!err) if (!strncmp(str, "BRG", 3) || !strncmp(str, "GBR", 3) || !strncmp(str, "RGB", 3) || !strncmp(str, "RBG", 3) || !strncmp(str, "BGR", 3)) memcpy(led->output_mode.str, str, 3); err = sunxi_get_str_of_property("led_regulator", &str); if (!err) { if (strlen(str) >= sizeof(led->regulator_id)) LED_ERR("illegal regulator id\n"); else { strcpy(led->regulator_id, str); pr_info("led_regulator: %s\n", led->regulator_id); } } err = sunxi_get_u32_of_property("reset_ns", &val); if (!err) led->reset_ns = val; err = sunxi_get_u32_of_property("t1h_ns", &val); if (!err) led->t1h_ns = val; err = sunxi_get_u32_of_property("t1l_ns", &val); if (!err) led->t1l_ns = val; err = sunxi_get_u32_of_property("t0h_ns", &val); if (!err) led->t0h_ns = val; err = sunxi_get_u32_of_property("t0l_ns", &val); if (!err) led->t0l_ns = val; err = sunxi_get_u32_of_property("wait_time0_ns", &val); if (!err) led->wait_time0_ns = val; err = sunxi_get_u32_of_property("wait_time1_ns", &val); if (!err) led->wait_time1_ns = val; err = sunxi_get_u32_of_property("wait_data_time_ns", &val); if (!err) led->wait_data_time_ns = val; } static void sunxi_led_set_all(struct sunxi_led *led, u8 channel, enum led_brightness value) { u32 i; struct led_classdev *led_cdev; if (channel%3 == 0) { for (i = 0; i < led->led_count; i++) { led_cdev = &led->pcdev_group[i].r.cdev; mutex_lock(&led_cdev->led_access); sunxi_set_led_brightness(led_cdev, value); mutex_unlock(&led_cdev->led_access); } } else if (channel%3 == 1) { for (i = 0; i < led->led_count; i++) { led_cdev = &led->pcdev_group[i].g.cdev; mutex_lock(&led_cdev->led_access); sunxi_set_led_brightness(led_cdev, value); mutex_unlock(&led_cdev->led_access); } } else { for (i = 0; i < led->led_count; i++) { led_cdev = &led->pcdev_group[i].b.cdev; mutex_lock(&led_cdev->led_access); sunxi_set_led_brightness(led_cdev, value); mutex_unlock(&led_cdev->led_access); } } } static ssize_t led_show(struct class *class, struct class_attribute *attr, char *buf) { struct sunxi_led *led = sunxi_led_global; sunxi_led_set_all(led, 0, 0); sunxi_led_set_all(led, 1, 0); sunxi_led_set_all(led, 2, 0); sunxi_led_set_all(led, 0, 20); msleep(500); sunxi_led_set_all(led, 1, 20); msleep(500); sunxi_led_set_all(led, 2, 20); msleep(500); sunxi_led_set_all(led, 0, 0); sunxi_led_set_all(led, 1, 0); sunxi_led_set_all(led, 2, 0); return 0; } static struct class_attribute led_class_attrs[] = { __ATTR(light, 0644, led_show, NULL), //__ATTR_NULL, }; static void led_node_init(void) { int i; int err; /* sys/class/led/xxx */ for (i = 0; i < ARRAY_SIZE(led_class_attrs); i++) { err = class_create_file(led_class, &led_class_attrs[i]); if (err) { LED_ERR("class_create_file() failed!\n"); while (i--) class_remove_file(led_class, &led_class_attrs[i]); class_destroy(led_class); led_class = NULL; } } } static int sunxi_led_probe(struct platform_device *pdev) { int err; struct sunxi_led *led; struct device *dev = &pdev->dev; struct resource *mem_res = NULL; int ret; dprintk(DEBUG_INIT, "start\n"); led = devm_kzalloc(dev, sizeof(struct sunxi_led), GFP_KERNEL); if (!led) return -ENOMEM; sunxi_led_global = led; platform_set_drvdata(pdev, led); led->dev = dev; mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (mem_res == NULL) { LED_ERR("failed to get MEM res\n"); ret = -ENXIO; goto emem; } if (!request_mem_region(mem_res->start, resource_size(mem_res), mem_res->name)) { LED_ERR("failed to request mem region\n"); ret = -EINVAL; goto emem; } led->iomem_reg_base = ioremap(mem_res->start, resource_size(mem_res)); if (!led->iomem_reg_base) { ret = -EIO; goto eiomap; } led->res = mem_res; led->output_mode.str = devm_kzalloc(dev, 3, GFP_KERNEL); if (!led->output_mode.str) { ret = -ENOMEM; goto ezalloc_str; } sunxi_get_para_of_property(led); err = led_regulator_request(led); if (err < 0) { LED_ERR("request regulator failed!\n"); ret = err; goto eregulator; } err = sunxi_register_led_classdev(led); if (err) { LED_ERR("failed to register led classdev\n"); ret = err; goto eclassdev; } sunxi_ledc_set_time(led); led->reset = devm_reset_control_get(&pdev->dev, NULL); if (IS_ERR(led->reset)) { LED_ERR("get reset clk error\n"); return -EINVAL; } ret = reset_control_deassert(led->reset); if (ret) { LED_ERR("deassert clk error, ret:%d\n", ret); return ret; } sunxi_clk_init(led); init_waitqueue_head(&led->wait); err = sunxi_ledc_irq_init(led); if (err) { LED_ERR("failed to init irq\n"); ret = err; goto eirq; } sunxi_ledc_pinctrl_init(led); #ifdef CONFIG_DEBUG_FS sunxi_led_create_debugfs(led); #endif /* CONFIG_DEBUG_FS */ led_class = class_create(THIS_MODULE, "led"); if (IS_ERR(led_class)) { LED_ERR("class_register err\n"); class_destroy(led_class); ret = -EFAULT; goto eclass; } led_node_init(); dprintk(DEBUG_INIT, "finish\n"); return 0; eclass: #ifdef CONFIG_DEBUG_FS sunxi_led_remove_debugfs(led); #endif /* CONFIG_DEBUG_FS */ sunxi_ledc_irq_deinit(led); eirq: sunxi_unregister_led_classdev(led); sunxi_clk_deinit(led); eclassdev: led_regulator_release(led); eregulator: kfree(led->output_mode.str); ezalloc_str: iounmap(led->iomem_reg_base); led->iomem_reg_base = NULL; eiomap: release_mem_region(mem_res->start, resource_size(mem_res)); emem: kfree(led); return ret; } static int sunxi_led_remove(struct platform_device *pdev) { struct sunxi_led *led = platform_get_drvdata(pdev); class_destroy(led_class); #ifdef CONFIG_DEBUG_FS sunxi_led_remove_debugfs(led); #endif /* CONFIG_DEBUG_FS */ if (led->dma_chan) { dmaengine_terminate_all(led->dma_chan); dma_release_channel(led->dma_chan); led->dma_chan = NULL; } sunxi_ledc_irq_deinit(led); sunxi_unregister_led_classdev(led); sunxi_clk_deinit(led); led_regulator_release(led); kfree(led->output_mode.str); led->output_mode.str = NULL; iounmap(led->iomem_reg_base); led->iomem_reg_base = NULL; release_mem_region(led->res->start, resource_size(led->res)); kfree(led); led = NULL; dprintk(DEBUG_INIT, "finish\n"); return 0; } #if IS_ENABLED(CONFIG_PM) static inline void sunxi_led_save_regs(struct sunxi_led *led) { int i; for (i = 0; i < ARRAY_SIZE(sunxi_led_regs_offset); i++) led->regs_backup[i] = readl(led->iomem_reg_base + sunxi_led_regs_offset[i]); } static inline void sunxi_led_restore_regs(struct sunxi_led *led) { int i; for (i = 0; i < ARRAY_SIZE(sunxi_led_regs_offset); i++) writel(led->regs_backup[i], led->iomem_reg_base + sunxi_led_regs_offset[i]); } static void sunxi_led_enable_irq(struct sunxi_led *led) { enable_irq(led->irqnum); } static void sunxi_led_disable_irq(struct sunxi_led *led) { disable_irq_nosync(led->irqnum); } static int sunxi_led_gpio_state_select(struct sunxi_led *led, char *name) { int err; struct pinctrl_state *pctrl_state; pctrl_state = pinctrl_lookup_state(led->pctrl, name); if (IS_ERR(pctrl_state)) { dev_err(led->dev, "pinctrl_lookup_state(%s) failed! return %p\n", name, pctrl_state); return PTR_ERR(pctrl_state); } err = pinctrl_select_state(led->pctrl, pctrl_state); if (err < 0) { dev_err(led->dev, "pinctrl_select_state(%s) failed! return %d\n", name, err); return err; } return 0; } static void sunxi_led_enable_clk(struct sunxi_led *led) { clk_prepare_enable(led->clk_ledc); clk_prepare_enable(led->clk_cpuapb); } static void sunxi_led_disable_clk(struct sunxi_led *led) { clk_disable_unprepare(led->clk_cpuapb); clk_disable_unprepare(led->clk_ledc); } static int sunxi_led_power_on(struct sunxi_led *led) { int err; if (led->regulator == NULL) return 0; err = regulator_enable(led->regulator); if (err) { dev_err(led->dev, "enable regulator %s failed!\n", led->regulator_id); return err; } return 0; } static int sunxi_led_power_off(struct sunxi_led *led) { int err; if (led->regulator == NULL) return 0; err = regulator_disable(led->regulator); if (err) { dev_err(led->dev, "disable regulator %s failed!\n", led->regulator_id); return err; } return 0; } static int sunxi_led_suspend(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct sunxi_led *led = platform_get_drvdata(pdev); dev_dbg(led->dev, "[%s] enter standby\n", __func__); sunxi_led_disable_irq(led); sunxi_led_save_regs(led); sunxi_led_gpio_state_select(led, PINCTRL_STATE_SLEEP); sunxi_led_disable_clk(led); reset_control_assert(led->reset); sunxi_led_power_off(led); return 0; } static int sunxi_led_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct sunxi_led *led = platform_get_drvdata(pdev); dev_dbg(led->dev, "[%s] return from standby\n", __func__); sunxi_led_power_on(led); reset_control_deassert(led->reset); sunxi_led_enable_clk(led); sunxi_led_gpio_state_select(led, PINCTRL_STATE_DEFAULT); sunxi_led_restore_regs(led); sunxi_led_enable_irq(led); return 0; } static const struct dev_pm_ops sunxi_led_pm_ops = { .suspend = sunxi_led_suspend, .resume = sunxi_led_resume, }; #define SUNXI_LED_PM_OPS (&sunxi_led_pm_ops) #endif static const struct of_device_id sunxi_led_dt_ids[] = { {.compatible = "allwinner,sunxi-leds"}, {}, }; static struct platform_driver sunxi_led_driver = { .probe = sunxi_led_probe, .remove = sunxi_led_remove, .driver = { .name = "sunxi-leds", .owner = THIS_MODULE, #if IS_ENABLED(CONFIG_PM) .pm = SUNXI_LED_PM_OPS, #endif .of_match_table = sunxi_led_dt_ids, }, }; module_platform_driver(sunxi_led_driver); module_param_named(debug, debug_mask, int, 0664); MODULE_ALIAS("sunxi leds dirver"); MODULE_ALIAS("platform : leds dirver"); MODULE_LICENSE("GPL v2"); MODULE_VERSION("1.2.3"); MODULE_AUTHOR("Albert Yu <yuxyun@allwinnertech.com>"); MODULE_AUTHOR("liuyu <SWCliuyus@allwinnertech.com>"); MODULE_DESCRIPTION("Allwinner ledc-controller driver");请更新
leds-sunxi.c修复了 LEDC DMA相关功能 -
回复: V851S tina linux ov5647 驱动程序没有 dmesg发布在 V Series
使用 V3s SDK 提供VFE框架的驱动移植到VIN框架下抓图成功。但是图像非常暗，并且撕裂，抓raw数据查看也是一样，考虑可能mclk不同步导致。
sensor0:sensor@0 { device_type = "sensor0"; sensor0_mname = "ov5648_mipi"; sensor0_twi_cci_id = <0>; sensor0_twi_addr = <0x6c>; sensor0_mclk_id = <0>; sensor0_pos = "rear"; sensor0_isp_used = <1>; sensor0_fmt = <1>; sensor0_stby_mode = <0>; sensor0_vflip = <0>; sensor0_hflip = <0>; sensor0_iovdd-supply = <>; sensor0_iovdd_vol = <1800000>; sensor0_avdd-supply = <>; sensor0_avdd_vol = <2800000>; sensor0_dvdd-supply = <>; sensor0_dvdd_vol = <1200000>; sensor0_power_en = <>; sensor0_reset = <&pio PA 18 1 0 1 0>; sensor0_pwdn = <&pio PA 19 1 0 1 0>; sensor0_sm_hs = <>; sensor0_sm_vs = <>; flash_handle = <>; act_handle = <>; status = "okay"; };/* * A V4L2 driver for ov5647 Raw cameras. * * Copyright (c) 2022 by YuzukiTsuru <gloomyghost@gloomyghost.com> * Copyright (c) 2018 by Allwinnertech Co., Ltd. http://www.allwinnertech.com * * Authors: Zheng ZeQun <zequnzheng@allwinnertech.com> * Liang WeiJie <liangweijie@allwinnertech.com> * YuzukiTsuru <gloomyghost@gloomyghost.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/init.h> #include <linux/module.h> #include <linux/slab.h> #include <linux/i2c.h> #include <linux/delay.h> #include <linux/videodev2.h> #include <linux/clk.h> #include <media/v4l2-device.h> #include <media/v4l2-mediabus.h> #include <linux/io.h> #include "camera.h" #include "sensor_helper.h" MODULE_AUTHOR("YuzukiTsuru"); MODULE_DESCRIPTION("A low-level driver for ov5647 sensors"); MODULE_LICENSE("GPL"); #define MCLK (24*1000*1000) #define V4L2_IDENT_SENSOR 0x5648 /* * Our nominal (default) frame rate. */ #define SENSOR_FRAME_RATE 30 /* * The GC0310 i2c address */ #define I2C_ADDR 0x6c #define SENSOR_NAME "ov5648_mipi" /* * The default register settings */ static struct regval_list sensor_default_regs[] = { //Slave_ID=0x6c; {0x0100, 0x00},// ; software standby {0x0103, 0x01},// ; software reset {REG_DLY, 0x25}, {0x370c, 0x03},// ; analog control {0x5000, 0x06},// ; lens off, bpc on, wpc on {0x5003, 0x08},// ; buf_en {0x5a00, 0x08},// {0x3000, 0xff},// ; D[9:8] output {0x3001, 0xff},// ; D[7:0] output {0x3002, 0xff},// ; Vsync, Href, PCLK, Frex, Strobe, SDA, GPIO1, GPIO0 output {0x301d, 0xf0},// {0x3a18, 0x00},// ; gain ceiling = 15.5x {0x3a19, 0xf8},// ; gain ceiling {0x3c01, 0x80},// ; band detection manual mode {0x3b07, 0x0c},// ; strobe frex mode //; analog control {0x3630, 0x2e}, {0x3632, 0xe2}, {0x3633, 0x23}, {0x3634, 0x44}, {0x3620, 0x64}, {0x3621, 0xe0}, {0x3600, 0x37}, {0x3704, 0xa0}, {0x3703, 0x5a}, {0x3715, 0x78}, {0x3717, 0x01}, {0x3731, 0x02}, {0x370b, 0x60}, {0x3705, 0x1a}, {0x3f05, 0x02}, {0x3f06, 0x10}, {0x3f01, 0x0a}, //; AG/AE target {0x3a0f, 0x58},// ; stable in high {0x3a10, 0x50},// ; stable in low {0x3a1b, 0x58},// ; stable out high {0x3a1e, 0x50},// ; stable out low {0x3a11, 0x60},// ; fast zone high {0x3a1f, 0x28},// ; fast zone low {0x4001, 0x02},// ; BLC start line {0x4000, 0x09},// ; BLC enable {0x3000, 0x00},// ; D[9:8] input {0x3001, 0x00},// ; D[7:0] input {0x3002, 0x00},// ; Vsync, Href, PCLK, Frex, Strobe, SDA, GPIO1, GPIO0 input {0x3017, 0xe0},// ; MIPI PHY {0x301c, 0xfc},// {0x3636, 0x06},// ; analog control {0x3016, 0x08},// ; MIPI pad enable {0x3827, 0xec},// {0x3018, 0x44},// ; MIPI 2 lane, MIPI enable {0x3035, 0x21},// ; PLL {0x3106, 0xf5},// ; PLL {0x3034, 0x1a},// ; PLL {0x301c, 0xf8},// {0x3503, 0x03},// ; Gain has no latch delay, AGC manual, AEC {0x3501, 0x10},// ; exposure[15:8] {0x3502, 0x80},// ; exposure[7:0] {0x350a, 0x00},// ; gain[9:8] {0x350b, 0x7f},// ; gain[7:0] {0x5001, 0x01},// ; AWB on {0x5180, 0x08},// ; AWB manual gain enable {0x5186, 0x04},// ; manual red gain high {0x5187, 0x00},// ; manual red gain low {0x5188, 0x04},// ; manual green gain high {0x5189, 0x00},// ; manual green gain low {0x518a, 0x04},// ; manual blue gain high {0x518b, 0x00},// ; manual blue gain low {0x5000, 0x06},// ; lenc off, bpc on, wpc on }; static struct regval_list sensor_qsxga_regs[] = { //qsxga: 2592*1936@15fps {0x0100, 0x00},// ; software standby {0x3035, 0x21},// ; PLL {0x3036, 0x66},// ; PLL {0x303c, 0x11},// ; PLL {0x3821, 0x06},// ; ISP mirror on, Sensor mirror on {0x3820, 0x00},// ; ISP flip off, Sensor flip off {0x3612, 0x5b},// ; analog control {0x3618, 0x04},// ; analog control {0x380c, 0x0a},// ; HTS = 2752 {0x380d, 0xc0},// ; HTS {0x380e, 0x07},// ; VTS = 1974 {0x380f, 0xb6},// ; VTS {0x3814, 0x11},// ; X INC {0x3815, 0x11},// ; X INC {0x3708, 0x64},// ; analog control {0x3709, 0x12},// ; analog control {0x3808, 0x0a},// ; X OUTPUT SIZE = 2592 {0x3809, 0x20},// ; X OUTPUT SIZE {0x380a, 0x07},// ; Y OUTPUT SIZE = 1944 {0x380b, 0x98},// ; Y OUTPUT SIZE {0x3800, 0x00},// ; X Start {0x3801, 0x0c},// ; X Start {0x3802, 0x00},// ; Y Start {0x3803, 0x02},// ; Y Start {0x3804, 0x0a},// ; X End {0x3805, 0x33},// ; X End {0x3806, 0x07},// ; Y End {0x3807, 0xa1},// ; Y End ///////////; Banding filter {0x3a08, 0x01},// ; B50 {0x3a09, 0x28},// ; B50 {0x3a0a, 0x00},// ; B60 {0x3a0b, 0xf6},// ; B60 {0x3a0d, 0x07},// ; B60 max {0x3a0e, 0x06},// ; B50 max {0x4004, 0x04},// ; black line number {0x4837, 0x19},// ; MIPI pclk period {0x0100, 0x01},// ; wake up from software standby }; static struct regval_list sensor_720p_regs[] = { //720: 1280*720@30fps {0x0100, 0x00},// ; software standby {0x3035, 0x21},// ; PLL {0x3036, 0x46},// ; PLL {0x303c, 0x11},// ; PLL {0x3821, 0x07},// ; ISP mirror on, Sensor mirror on, bin on {0x3820, 0x41},// ; ISP flip off, Sensor flip off, bin on {0x3612, 0x59},// ; analog control {0x3618, 0x00},// ; analog control {0x380c, 0x07},// ; HTS = 1896 {0x380d, 0x68},// ; HTS {0x380e, 0x03},// ; VTS = 984 {0x380f, 0xd8},// ; VTS {0x3814, 0x31},// ; X INC {0x3815, 0x31},// ; Y INC {0x3708, 0x64},// ; analog control {0x3709, 0x52},// ; analog control {0x3808, 0x05},// ; X OUTPUT SIZE = 1280 {0x3809, 0x00},// ; X OUTPUT SIZE {0x380a, 0x03},// ; Y OUTPUT SIZE = 960 {0x380b, 0xc0},// ; Y OUTPUT SIZE {0x3800, 0x00},// ; X Start {0x3801, 0x18},// ; X Start {0x3802, 0x00},// ; Y Start {0x3803, 0x0e},// ; Y Start {0x3804, 0x0a},// ; X End {0x3805, 0x27},// ; X End {0x3806, 0x07},// ; Y End {0x3807, 0x95},// ; Y End // banding filter {0x3a08, 0x01},// ; B50 {0x3a09, 0x27},// ; B50 {0x3a0a, 0x00},// ; B60 {0x3a0b, 0xf6},// ; B60 {0x3a0d, 0x04},// ; B50 max {0x3a0e, 0x03},// ; B60 max {0x4004, 0x02},// ; black line number {0x4837, 0x24},// ; MIPI pclk period {0x0100, 0x01},// ; wake up from software standby }; static struct regval_list sensor_fmt_raw[] = { }; /* * Code for dealing with controls. * fill with different sensor module * different sensor module has different settings here * if not support the follow function ,retrun -EINVAL */ static int sensor_g_exp(struct v4l2_subdev *sd, __s32 *value) { struct sensor_info *info = to_state(sd); *value = info->exp; sensor_print("sensor_get_exposure = %d\n", info->exp); return 0; } static int sensor_s_exp(struct v4l2_subdev *sd, unsigned int exp_val) { unsigned char explow, expmid, exphigh; struct sensor_info *info = to_state(sd); if(exp_val>0xfffff) exp_val=0xfffff; sensor_write(sd, 0x3208, 0x00);//enter group write sensor_write(sd, 0x3503, 0x13); exphigh = (unsigned char) ( (0x0f0000&exp_val)>>16); expmid = (unsigned char) ( (0x00ff00&exp_val)>>8); explow = (unsigned char) ( (0x0000ff&exp_val) ); //sensor_write(sd, 0x3208, 0x00);//enter group write sensor_write(sd, 0x3502, explow); sensor_write(sd, 0x3501, expmid); sensor_write(sd, 0x3500, exphigh); sensor_write(sd, 0x3208, 0x10);//end group write sensor_write(sd, 0x3208, 0xa0);//init group write sensor_print("ov5647_mipi sensor_set_exp = %d, Done!\n", exp_val); info->exp = exp_val; return 0; } static int sensor_g_gain(struct v4l2_subdev *sd, __s32 *value) { struct sensor_info *info = to_state(sd); *value = info->gain; sensor_print("sensor_get_gain = %d\n", info->gain); return 0; } static int sensor_s_gain(struct v4l2_subdev *sd, unsigned int gain_val) { struct sensor_info *info = to_state(sd); unsigned char gainlow=0; unsigned char gainhigh=0; if(gain_val<1*16) gain_val=16; if(gain_val>64*16-1) gain_val=64*16-1; gainlow=(unsigned char)(gain_val&0xff); gainhigh=(unsigned char)((gain_val>>8)&0x3); sensor_write(sd, 0x3208, 0x00);//enter group write sensor_write(sd, 0x3503, 0x13); sensor_write(sd, 0x350b, gainlow); sensor_write(sd, 0x350a, gainhigh); sensor_write(sd, 0x3208, 0x10);//end group write sensor_write(sd, 0x3208, 0xa0);//init group write //printk("ov5647_mipi sensor_set_gain = %d, Done!\n", gain_val); info->gain = gain_val; return 0; } static int ov5648_sensor_vts; static int sensor_s_exp_gain(struct v4l2_subdev *sd, struct sensor_exp_gain *exp_gain) { int exp_val, gain_val,frame_length,shutter; unsigned char explow=0,expmid=0,exphigh=0; unsigned char gainlow=0,gainhigh=0; struct sensor_info *info = to_state(sd); exp_val = exp_gain->exp_val; gain_val = exp_gain->gain_val; if(gain_val<1*16) gain_val=16; if(gain_val>64*16-1) gain_val=64*16-1; if(exp_val>0xfffff) exp_val=0xfffff; gainlow=(unsigned char)(gain_val&0xff); gainhigh=(unsigned char)((gain_val>>8)&0x3); exphigh = (unsigned char) ( (0x0f0000&exp_val)>>16); expmid = (unsigned char) ( (0x00ff00&exp_val)>>8); explow = (unsigned char) ( (0x0000ff&exp_val) ); shutter = exp_val/16; sensor_print("ov5648_sensor_vts = %d\n",ov5648_sensor_vts); if(shutter > ov5648_sensor_vts- 4) frame_length = shutter + 4; else frame_length = ov5648_sensor_vts; sensor_write(sd, 0x3503, 0x07); sensor_write(sd, 0x380f, (frame_length & 0xff)); sensor_write(sd, 0x380e, (frame_length >> 8)); sensor_print("exp_val = %d,gain_val = %d\n",exp_val,gain_val); sensor_write(sd, 0x3208, 0x00);//enter group write sensor_write(sd, 0x350b, gainlow); sensor_write(sd, 0x350a, gainhigh); sensor_write(sd, 0x3502, explow); sensor_write(sd, 0x3501, expmid); sensor_write(sd, 0x3500, exphigh); sensor_write(sd, 0x3208, 0x10);//end group write sensor_write(sd, 0x3208, 0xa0);//init group write info->exp = exp_val; info->gain = gain_val; return 0; } static void sensor_s_sw_stby(struct v4l2_subdev *sd, int on_off) { int ret = 0; return ret; } /* * Stuff that knows about the sensor. */ static int sensor_power(struct v4l2_subdev *sd, int on) { int ret = 0; sensor_print("ov5648 sensor_power\n"); switch (on) { case STBY_ON: sensor_print("STBY_ON!\n"); cci_lock(sd); sensor_s_sw_stby(sd, STBY_ON); usleep_range(1000, 1200); cci_unlock(sd); break; case STBY_OFF: sensor_print("STBY_OFF!\n"); cci_lock(sd); usleep_range(1000, 1200); sensor_s_sw_stby(sd, STBY_OFF); cci_unlock(sd); break; case PWR_ON: sensor_print("PWR_ON!100\n"); cci_lock(sd); vin_gpio_set_status(sd, PWDN, 1); vin_gpio_write(sd, RESET, CSI_GPIO_HIGH); vin_gpio_set_status(sd, POWER_EN, 1); vin_gpio_write(sd, PWDN, CSI_GPIO_LOW); vin_gpio_write(sd, RESET, CSI_GPIO_LOW); vin_gpio_write(sd, POWER_EN, CSI_GPIO_HIGH); usleep_range(7000, 8000); vin_set_pmu_channel(sd, IOVDD, ON); usleep_range(7000, 8000); vin_set_pmu_channel(sd, AVDD, ON); vin_set_pmu_channel(sd, AFVDD, ON); usleep_range(7000, 8000); vin_set_pmu_channel(sd, DVDD, ON); usleep_range(7000, 8000); vin_set_mclk_freq(sd, MCLK); vin_set_mclk(sd, ON); usleep_range(10000, 12000); vin_gpio_write(sd, RESET, CSI_GPIO_HIGH); vin_gpio_write(sd, PWDN, CSI_GPIO_HIGH); vin_set_pmu_channel(sd, CAMERAVDD, ON);/*AFVCC ON*/ usleep_range(10000, 12000); cci_unlock(sd); break; case PWR_OFF: sensor_print("PWR_OFF!\n"); cci_lock(sd); vin_gpio_write(sd, PWDN, CSI_GPIO_HIGH); vin_gpio_write(sd, RESET, CSI_GPIO_HIGH); vin_set_mclk(sd, OFF); usleep_range(7000, 8000); vin_set_pmu_channel(sd, DVDD, OFF); vin_gpio_write(sd, PWDN, CSI_GPIO_LOW); vin_gpio_write(sd, RESET, CSI_GPIO_LOW); vin_gpio_write(sd, POWER_EN, CSI_GPIO_LOW); vin_set_pmu_channel(sd, AVDD, OFF); vin_set_pmu_channel(sd, IOVDD, OFF); vin_set_pmu_channel(sd, AFVDD, OFF); vin_set_pmu_channel(sd, CAMERAVDD, OFF);/*AFVCC ON*/ cci_unlock(sd); break; default: return -EINVAL; } return 0; } static int sensor_reset(struct v4l2_subdev *sd, u32 val) { switch (val) { case 0: vin_gpio_write(sd, RESET, CSI_GPIO_HIGH); usleep_range(10000,12000); break; case 1: vin_gpio_write(sd, RESET, CSI_GPIO_LOW); usleep_range(10000,12000); break; default: return -EINVAL; } return 0; } static int sensor_detect(struct v4l2_subdev *sd) { data_type rdval; unsigned int SENSOR_ID = 0; sensor_read(sd, 0x300A, &rdval); SENSOR_ID |= rdval; SENSOR_ID |= (rdval << 8); sensor_read(sd, 0x300B, &rdval); SENSOR_ID |= (rdval); sensor_print("V4L2_IDENT_SENSOR = 0x%x\n", SENSOR_ID); if (SENSOR_ID != V4L2_IDENT_SENSOR) { sensor_print("ov5648 %s error, chip found is not an target chip", __func__); //return -ENODEV; } return 0; } static int sensor_init(struct v4l2_subdev *sd, u32 val) { int ret; struct sensor_info *info = to_state(sd); sensor_print("sensor_init\n"); /*Make sure it is a target sensor */ ret = sensor_detect(sd); if (ret) { sensor_err("chip found is not an target chip.\n"); return ret; } info->focus_status = 0; info->low_speed = 0; info->width = QSXGA_WIDTH; info->height = QSXGA_HEIGHT; info->hflip = 0; info->vflip = 0; info->gain = 0; info->tpf.numerator = 1; info->tpf.denominator = 30; /* 30fps */ info->preview_first_flag = 1; return 0; } static long sensor_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) { int ret = 0; struct sensor_info *info = to_state(sd); switch (cmd) { case GET_CURRENT_WIN_CFG: if (info->current_wins != NULL) { memcpy(arg, info->current_wins, sizeof(struct sensor_win_size)); ret = 0; } else { sensor_err("empty wins!\n"); ret = -1; } break; case SET_FPS: ret = 0; break; case VIDIOC_VIN_SENSOR_EXP_GAIN: ret = sensor_s_exp_gain(sd, (struct sensor_exp_gain *)arg); break; case VIDIOC_VIN_SENSOR_CFG_REQ: sensor_cfg_req(sd, (struct sensor_config *)arg); break; case VIDIOC_VIN_ACT_INIT: ret = actuator_init(sd, (struct actuator_para *)arg); break; case VIDIOC_VIN_ACT_SET_CODE: ret = actuator_set_code(sd, (struct actuator_ctrl *)arg); break; default: return -EINVAL; } return ret; } /* * Store information about the video data format. */ static struct sensor_format_struct sensor_formats[] = { { .desc = "Raw RGB Bayer", .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, .regs = sensor_fmt_raw, .regs_size = ARRAY_SIZE(sensor_fmt_raw), .bpp = 1 }, }; #define N_FMTS ARRAY_SIZE(sensor_formats) /* * Then there is the issue of window sizes. Try to capture the info here. */ static struct sensor_win_size sensor_win_sizes[] = { { .width = QSXGA_WIDTH, .height = QSXGA_HEIGHT, .hoffset = 0, .voffset = 4, .hts = 2752, .vts = 1974, .pclk = 81486720, .mipi_bps = 408*1000*1000, .fps_fixed = 2, .bin_factor = 1, .intg_min = 1, .intg_max = (1974)<<4, .gain_min = 1<<4, .gain_max = 12<<4, .regs = sensor_qsxga_regs, .regs_size = ARRAY_SIZE(sensor_qsxga_regs), .set_size = NULL, }, { .width = HD720_WIDTH, .height = HD720_HEIGHT, .hoffset = 0, .voffset = 120, .hts = 1896, .vts = 984, .pclk = 56*1000*1000, .mipi_bps = 280*1000*1000, .fps_fixed = 1, .bin_factor = 1, .intg_min = 1, .intg_max = 984<<4, .gain_min = 1<<4, .gain_max = 12<<4, .regs = sensor_720p_regs,// .regs_size = ARRAY_SIZE(sensor_720p_regs),// .set_size = NULL, }, }; #define N_WIN_SIZES (ARRAY_SIZE(sensor_win_sizes)) static int sensor_reg_init(struct sensor_info *info) { int ret; struct v4l2_subdev *sd = &info->sd; struct sensor_format_struct *sensor_fmt = info->fmt; struct sensor_win_size *wsize = info->current_wins; ret = sensor_write_array(sd, sensor_default_regs, ARRAY_SIZE(sensor_default_regs)); if (ret < 0) { sensor_err("write sensor_default_regs error\n"); return ret; } sensor_print("sensor_reg_init\n"); sensor_write_array(sd, sensor_fmt->regs, sensor_fmt->regs_size); if (wsize->regs) sensor_write_array(sd, wsize->regs, wsize->regs_size); if (wsize->set_size) wsize->set_size(sd); info->width = wsize->width; info->height = wsize->height; info->exp = 0; info->gain = 0; ov5648_sensor_vts = wsize->vts; sensor_print("s_fmt set width = %d, height = %d\n", wsize->width, wsize->height); return 0; } static int sensor_s_stream(struct v4l2_subdev *sd, int enable) { struct sensor_info *info = to_state(sd); sensor_print("%s on = %d, %d*%d fps: %d code: %x\n", __func__, enable, info->current_wins->width, info->current_wins->height, info->current_wins->fps_fixed, info->fmt->mbus_code); if (!enable) return 0; return sensor_reg_init(info); } static int sensor_g_mbus_config(struct v4l2_subdev *sd, struct v4l2_mbus_config *cfg) { cfg->type = V4L2_MBUS_CSI2; cfg->flags = 0 | V4L2_MBUS_CSI2_2_LANE | V4L2_MBUS_CSI2_CHANNEL_0; return 0; } static int sensor_g_ctrl(struct v4l2_ctrl *ctrl) { struct sensor_info *info = container_of(ctrl->handler, struct sensor_info, handler); struct v4l2_subdev *sd = &info->sd; switch (ctrl->id) { case V4L2_CID_GAIN: return sensor_g_gain(sd, &ctrl->val); case V4L2_CID_EXPOSURE: return sensor_g_exp(sd, &ctrl->val); } return -EINVAL; } static int sensor_s_ctrl(struct v4l2_ctrl *ctrl) { struct sensor_info *info = container_of(ctrl->handler, struct sensor_info, handler); struct v4l2_subdev *sd = &info->sd; switch (ctrl->id) { case V4L2_CID_GAIN: return sensor_s_gain(sd, ctrl->val); case V4L2_CID_EXPOSURE: return sensor_s_exp(sd, ctrl->val); } return -EINVAL; } /* ----------------------------------------------------------------------- */ static const struct v4l2_ctrl_ops sensor_ctrl_ops = { .g_volatile_ctrl = sensor_g_ctrl, .s_ctrl = sensor_s_ctrl, }; static const struct v4l2_subdev_core_ops sensor_core_ops = { .reset = sensor_reset, .init = sensor_init, .s_power = sensor_power, .ioctl = sensor_ioctl, #ifdef CONFIG_COMPAT .compat_ioctl32 = sensor_compat_ioctl32, #endif }; static const struct v4l2_subdev_video_ops sensor_video_ops = { .s_parm = sensor_s_parm, .g_parm = sensor_g_parm, .s_stream = sensor_s_stream, .g_mbus_config = sensor_g_mbus_config, }; static const struct v4l2_subdev_pad_ops sensor_pad_ops = { .enum_mbus_code = sensor_enum_mbus_code, .enum_frame_size = sensor_enum_frame_size, .get_fmt = sensor_get_fmt, .set_fmt = sensor_set_fmt, }; static const struct v4l2_subdev_ops sensor_ops = { .core = &sensor_core_ops, .video = &sensor_video_ops, .pad = &sensor_pad_ops, }; /* ----------------------------------------------------------------------- */ static struct cci_driver cci_drv = { .name = SENSOR_NAME, .addr_width = CCI_BITS_16, .data_width = CCI_BITS_8, }; static const struct v4l2_ctrl_config sensor_custom_ctrls[] = { { .ops = &sensor_ctrl_ops, .id = V4L2_CID_FRAME_RATE, .name = "frame rate", .type = V4L2_CTRL_TYPE_INTEGER, .min = 15, .max = 120, .step = 1, .def = 120, }, }; static int sensor_init_controls(struct v4l2_subdev *sd, const struct v4l2_ctrl_ops *ops) { struct sensor_info *info = to_state(sd); struct v4l2_ctrl_handler *handler = &info->handler; struct v4l2_ctrl *ctrl; int i; int ret = 0; v4l2_ctrl_handler_init(handler, 2 + ARRAY_SIZE(sensor_custom_ctrls)); v4l2_ctrl_new_std(handler, ops, V4L2_CID_GAIN, 1 * 1600, 256 * 1600, 1, 1 * 1600); ctrl = v4l2_ctrl_new_std(handler, ops, V4L2_CID_EXPOSURE, 0, 65536 * 16, 1, 0); if (ctrl != NULL) ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; for (i = 0; i < ARRAY_SIZE(sensor_custom_ctrls); i++) v4l2_ctrl_new_custom(handler, &sensor_custom_ctrls[i], NULL); if (handler->error) { ret = handler->error; v4l2_ctrl_handler_free(handler); } sd->ctrl_handler = handler; return ret; } static int sensor_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct v4l2_subdev *sd; struct sensor_info *info; info = kzalloc(sizeof(struct sensor_info), GFP_KERNEL); if (info == NULL) return -ENOMEM; sd = &info->sd; cci_dev_probe_helper(sd, client, &sensor_ops, &cci_drv); sensor_init_controls(sd, &sensor_ctrl_ops); mutex_init(&info->lock); #ifdef CONFIG_SAME_I2C info->sensor_i2c_addr = I2C_ADDR >> 1; #endif info->fmt = &sensor_formats[0]; info->fmt_pt = &sensor_formats[0]; info->win_pt = &sensor_win_sizes[0]; info->fmt_num = N_FMTS; info->win_size_num = N_WIN_SIZES; info->sensor_field = V4L2_FIELD_NONE; info->stream_seq = MIPI_BEFORE_SENSOR; info->af_first_flag = 1; info->exp = 0; info->gain = 0; return 0; } static int sensor_remove(struct i2c_client *client) { struct v4l2_subdev *sd; sd = cci_dev_remove_helper(client, &cci_drv); kfree(to_state(sd)); return 0; } static const struct i2c_device_id sensor_id[] = { {SENSOR_NAME, 0}, {} }; MODULE_DEVICE_TABLE(i2c, sensor_id); static struct i2c_driver sensor_driver = { .driver = { .owner = THIS_MODULE, .name = SENSOR_NAME, }, .probe = sensor_probe, .remove = sensor_remove, .id_table = sensor_id, }; static __init int init_sensor(void) { return cci_dev_init_helper(&sensor_driver); } static __exit void exit_sensor(void) { cci_dev_exit_helper(&sensor_driver); } module_init(init_sensor); module_exit(exit_sensor);另外建议使用支持列表中的摄像头，例如gc2053，gc2063，这些摄像头已经适配量产完成并且调整ISP后画质更佳，也支持aiisp实现低照度全彩画质，树莓派的摄像头不推荐使用，因为他是外挂mclk的会引起芯片处于错误的模式，另外原厂也没有相应的支持（2017年前的芯片才有这个支持）
IMX219 同样可以使用，但是请注意4lane的摄像头不可适配2lane的数据
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回复: LVGL 与 SPI TFT GUI案例报错发布在 A Series
https://r128.docs.aw-ol.com/others/faq/#_3
建议 删除 PMU 相关配置
[pmu] pmu_irq_pin = port:PA14<14><0><default><default> pmu_irq_wakeup = 2 pmu_hot_shutdown = 1 pmu_bat_unused = 0 pmu_usbad_vol = 4600 pmu_usbad_cur = 1500 pmu_usbpc_vol = 4600 pmu_usbpc_cur = 500 pmu_chg_ic_temp = 0 pmu_battery_rdc = 100 pmu_battery_cap = 3568 pmu_runtime_chgcur = 900 pmu_suspend_chgcur = 1200 pmu_shutdown_chgcur = 1200 pmu_init_chgvol = 4200 pmu_init_chg_pretime = 50 pmu_init_chg_csttime = 1200 pmu_chgled_type = 0 pmu_init_bc_en = 1 pmu_bat_temp_enable = 0 pmu_bat_charge_ltf = 2261 pmu_bat_charge_htf = 388 pmu_bat_shutdown_ltf = 3200 pmu_bat_shutdown_htf = 237 pmu_bat_para[0] = 0 pmu_bat_para[1] = 0 pmu_bat_para[2] = 0 pmu_bat_para[3] = 0 pmu_bat_para[4] = 0 pmu_bat_para[5] = 0 pmu_bat_para[6] = 1 pmu_bat_para[7] = 1 pmu_bat_para[8] = 2 pmu_bat_para[9] = 4 pmu_bat_para[10] = 5 pmu_bat_para[11] = 12 pmu_bat_para[12] = 19 pmu_bat_para[13] = 32 pmu_bat_para[14] = 41 pmu_bat_para[15] = 45 pmu_bat_para[16] = 48 pmu_bat_para[17] = 51 pmu_bat_para[18] = 54 pmu_bat_para[19] = 59 pmu_bat_para[20] = 63 pmu_bat_para[21] = 68 pmu_bat_para[22] = 71 pmu_bat_para[23] = 74 pmu_bat_para[24] = 78 pmu_bat_para[25] = 81 pmu_bat_para[26] = 82 pmu_bat_para[27] = 84 pmu_bat_para[28] = 88 pmu_bat_para[29] = 92 pmu_bat_para[30] = 96 pmu_bat_para[31] = 100 pmu_bat_temp_para[0] = 7466 pmu_bat_temp_para[1] = 4480 pmu_bat_temp_para[2] = 3518 pmu_bat_temp_para[3] = 2786 pmu_bat_temp_para[4] = 2223 pmu_bat_temp_para[5] = 1788 pmu_bat_temp_para[6] = 1448 pmu_bat_temp_para[7] = 969 pmu_bat_temp_para[8] = 664 pmu_bat_temp_para[9] = 466 pmu_bat_temp_para[10] = 393 pmu_bat_temp_para[11] = 333 pmu_bat_temp_para[12] = 283 pmu_bat_temp_para[13] = 242 pmu_bat_temp_para[14] = 179 pmu_bat_temp_para[15] = 134 -
回复: T113-S3 RTS时序问题发布在 Linux
初级485功能介绍
初级485功能是选定一个外部gpio脚，用于TTL->485转换芯片的发送使能功能
但此gpio具体要接在转换芯片的哪一个管脚上，以及高低电平代表的含义，以转换芯片的使用手册为准
典型MAX3485电路链接：
https://www.elecfans.com/dianzichangshi/20180118618448.htmlDE和RO为使能管脚。DE为低电平、RE为低电平时为接收；DE为高电平、RE为高电平时为发送；RO和DI为数据管脚。RO为接收，DI为发送；因此我们经常将DE和RE直接连接，用一个IO口控制。
dts配置
需要添加以下三个成员：
- sunxi,uart-rs485
- 0：485模式关闭
- 1：485模式使能
- sunxi,uart-485fl
- 0：485 gpio管脚数值为0时表示发送状态
- 1：485 gpio管脚数值为1时表示发送状态
- sunxi,uart-485oe-gpios
- 用于外部转换芯片使能信号的gpio引脚，GPIO_ACTIVE_HIGH含义为默认为高电平
示例：
uart1: uart@2500400 { ... status = "okay"; //添加以下三行 sunxi,uart-rs485 = <1>; sunxi,uart-485fl = <1>; sunxi,uart-485oe-gpios = <&pio PG 8 GPIO_ACTIVE_HIGH>; }; - sunxi,uart-rs485
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回复: M模式切换发布在 MR Series
从 User Mode 切换到 Machine Mode 只能通过异常、响应中断或者 NMI 的方式发生，手动把用户模式的程序跑飞跳回机器模式，一般不会这样操作
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回复: T113 nand flash 启动失败发布在 MR Series
@cwj1986521 需要用 make kernel_menuconfig，如果使用的是build.sh 需要 ./build.sh menuconfig
内核配置文件会被SDK覆盖，进入内核文件夹修改的均无效
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回复: 全志D1如何获取芯片运行的频率呢？发布在 MR Series
勾选上面的驱动后就可以了
SDK用的是：https://bbs.aw-ol.com/topic/3947/share/1
# # Automatically generated file; DO NOT EDIT. # Linux/riscv 5.4.61 Kernel Configuration # CONFIG_CC_VERSION_TEXT="riscv64-unknown-linux-gnu-gcc (C-SKY RISCV Tools V1.8.4 B20200702) 8.1.0" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=80100 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_IRQ_WORK=y CONFIG_THREAD_INFO_IN_TASK=y # # General setup # CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 # CONFIG_COMPILE_TEST is not set CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_BUILD_SALT="" CONFIG_DEFAULT_HOSTNAME="(none)" # CONFIG_SWAP is not set CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y # CONFIG_POSIX_MQUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y # CONFIG_USELIB is not set # CONFIG_AUDIT is not set CONFIG_HAVE_ARCH_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_SHOW=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_MSI_IOMMU=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set # end of IRQ subsystem CONFIG_GENERIC_IRQ_MULTI_HANDLER=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y # # Timers subsystem # CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set CONFIG_NO_HZ_IDLE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y # end of Timers subsystem # CONFIG_PREEMPT_NONE is not set # CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y CONFIG_PREEMPT_COUNT=y CONFIG_PREEMPTION=y # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y # CONFIG_TASKSTATS is not set # CONFIG_PSI is not set # end of CPU/Task time and stats accounting # # RCU Subsystem # CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y # end of RCU Subsystem CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y # CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=14 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_GENERIC_SCHED_CLOCK=y # # Scheduler features # # end of Scheduler features CONFIG_ARCH_SUPPORTS_INT128=y # CONFIG_CGROUPS is not set # CONFIG_NAMESPACES is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_SCHED_AUTOGROUP is not set # CONFIG_SYSFS_DEPRECATED is not set # CONFIG_RELAY is not set # CONFIG_BLK_DEV_INITRD is not set CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_BPF=y CONFIG_EXPERT=y CONFIG_MULTIUSER=y # CONFIG_SGETMASK_SYSCALL is not set CONFIG_SYSFS_SYSCALL=y # CONFIG_SYSCTL_SYSCALL is not set CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_HAVE_FUTEX_CMPXCHG=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set CONFIG_KALLSYMS_BASE_RELATIVE=y # CONFIG_BPF_SYSCALL is not set # CONFIG_USERFAULTFD is not set # CONFIG_EMBEDDED is not set CONFIG_HAVE_PERF_EVENTS=y # CONFIG_PC104 is not set # # Kernel Performance Events And Counters # # CONFIG_PERF_EVENTS is not set # end of Kernel Performance Events And Counters CONFIG_VM_EVENT_COUNTERS=y # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLOB is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y # end of General setup CONFIG_64BIT=y CONFIG_RISCV=y CONFIG_ARCH_MMAP_RND_BITS_MIN=18 CONFIG_ARCH_MMAP_RND_BITS_MAX=24 CONFIG_MMU=y CONFIG_ZONE_DMA32=y CONFIG_VA_BITS=39 CONFIG_PA_BITS=56 CONFIG_PAGE_OFFSET=0xffffffe000000000 CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_SYS_SUPPORTS_HUGETLBFS=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CSUM=y CONFIG_GENERIC_HWEIGHT=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_PGTABLE_LEVELS=3 CONFIG_SUNXI_SOC_NAME="sun20iw1" # # SoC selection # # CONFIG_SOC_SIFIVE is not set CONFIG_RISCV_SUNXI=y CONFIG_ARCH_SUNXI=y # CONFIG_FPGA_V4_PLATFORM is not set # CONFIG_FPGA_V7_PLATFORM is not set CONFIG_EVB_PLATFORM=y CONFIG_ARCH_SUN20I=y CONFIG_ARCH_SUN20IW1=y CONFIG_ARCH_SUN20IW1P1=y # end of SoC selection # # Platform type # # CONFIG_ARCH_RV32I is not set CONFIG_ARCH_RV64I=y # CONFIG_CMODEL_MEDLOW is not set CONFIG_CMODEL_MEDANY=y CONFIG_MODULE_SECTIONS=y # CONFIG_MAXPHYSMEM_2GB is not set CONFIG_MAXPHYSMEM_128GB=y # CONFIG_SMP is not set CONFIG_TUNE_GENERIC=y CONFIG_RISCV_ISA_C=y CONFIG_FPU=y CONFIG_VECTOR=y # end of Platform type # # Kernel features # CONFIG_HZ_100=y # CONFIG_HZ_250 is not set # CONFIG_HZ_300 is not set # CONFIG_HZ_1000 is not set CONFIG_HZ=100 CONFIG_SCHED_HRTICK=y # CONFIG_KEXEC is not set # CONFIG_CRASH_DUMP is not set # end of Kernel features # # Boot options # CONFIG_CMDLINE="" # end of Boot options # # CPU Power Management # # # CPU Idle # CONFIG_CPU_IDLE=y # CONFIG_CPU_IDLE_GOV_LADDER is not set CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_CPU_IDLE_GOV_TEO is not set # # RISCV CPU Idle Drivers # # CONFIG_RISCV_CPUIDLE is not set # end of RISCV CPU Idle Drivers # end of CPU Idle # # CPU Frequency scaling # # CONFIG_CPU_FREQ is not set # end of CPU Frequency scaling # end of CPU Power Management # # Power management options # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y # CONFIG_SUSPEND_SKIP_SYNC is not set CONFIG_PM_SLEEP=y # CONFIG_PM_AUTOSLEEP is not set # CONFIG_PM_WAKELOCKS is not set CONFIG_PM=y CONFIG_PM_DEBUG=y # CONFIG_PM_ADVANCED_DEBUG is not set # CONFIG_PM_TEST_SUSPEND is not set CONFIG_PM_SLEEP_DEBUG=y CONFIG_PM_CLK=y # CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set CONFIG_CPU_PM=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y # end of Power management options # # General architecture-dependent options # CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_CLK=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_CC_HAS_STACKPROTECTOR_NONE=y CONFIG_LTO_NONE=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_HAVE_COPY_THREAD_TLS=y CONFIG_CLONE_BACKWARDS=y CONFIG_64BIT_TIME=y # CONFIG_REFCOUNT_FULL is not set # CONFIG_LOCK_EVENT_COUNTS is not set # # GCOV-based kernel profiling # # CONFIG_GCOV_KERNEL is not set # end of GCOV-based kernel profiling CONFIG_PLUGIN_HOSTCC="" # end of General architecture-dependent options CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set # CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_BLOCK=y CONFIG_BLK_SCSI_REQUEST=y CONFIG_BLK_DEV_BSG=y # CONFIG_BLK_DEV_BSGLIB is not set # CONFIG_BLK_DEV_INTEGRITY is not set # CONFIG_BLK_DEV_ZONED is not set # CONFIG_BLK_CMDLINE_PARSER is not set # CONFIG_BLK_WBT is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set # CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y CONFIG_EFI_PARTITION=y # end of Partition Types CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLK_PM=y # # IO Schedulers # CONFIG_MQ_IOSCHED_DEADLINE=y CONFIG_MQ_IOSCHED_KYBER=y # CONFIG_IOSCHED_BFQ is not set # end of IO Schedulers CONFIG_ASN1=y CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_ARCH_HAS_MMIOWB=y # CONFIG_GKI_HIDDEN_DRM_CONFIGS is not set # CONFIG_GKI_HIDDEN_REGMAP_CONFIGS is not set # CONFIG_GKI_HIDDEN_CRYPTO_CONFIGS is not set # CONFIG_GKI_HIDDEN_SND_CONFIGS is not set # CONFIG_GKI_HIDDEN_SND_SOC_CONFIGS is not set # CONFIG_GKI_HIDDEN_MMC_CONFIGS is not set # CONFIG_GKI_HIDDEN_GPIO_CONFIGS is not set # CONFIG_GKI_HIDDEN_QCOM_CONFIGS is not set # CONFIG_GKI_HIDDEN_MEDIA_CONFIGS is not set # CONFIG_GKI_HIDDEN_VIRTUAL_CONFIGS is not set # CONFIG_GKI_LEGACY_WEXT_ALLCONFIG is not set # CONFIG_GKI_HIDDEN_USB_CONFIGS is not set # CONFIG_GKI_HIDDEN_SOC_BUS_CONFIGS is not set # CONFIG_GKI_HIDDEN_RPMSG_CONFIGS is not set # CONFIG_GKI_HIDDEN_GPU_CONFIGS is not set # CONFIG_GKI_HIDDEN_IRQ_CONFIGS is not set # CONFIG_GKI_HIDDEN_HYPERVISOR_CONFIGS is not set # CONFIG_GKI_HACKS_TO_FIX is not set # CONFIG_GKI_OPT_FEATURES is not set CONFIG_FREEZER=y # # Executable file formats # CONFIG_BINFMT_ELF=y CONFIG_ELFCORE=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_BINFMT_SCRIPT=y CONFIG_ARCH_HAS_BINFMT_FLAT=y # CONFIG_BINFMT_FLAT is not set # CONFIG_BINFMT_MISC is not set CONFIG_COREDUMP=y # end of Executable file formats # # Memory Management options # CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_HAVE_MEMBLOCK_NODE_MAP=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_COMPACTION=y CONFIG_MIGRATION=y CONFIG_CONTIG_ALLOC=y CONFIG_PHYS_ADDR_T_64BIT=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_NEED_PER_CPU_KM=y # CONFIG_CLEANCACHE is not set CONFIG_CMA=y # CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set CONFIG_CMA_AREAS=7 # CONFIG_ZPOOL is not set # CONFIG_ZBUD is not set # CONFIG_ZSMALLOC is not set # CONFIG_IDLE_PAGE_TRACKING is not set # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_BENCHMARK is not set CONFIG_ARCH_HAS_PTE_SPECIAL=y # end of Memory Management options CONFIG_NET=y # # Networking options # CONFIG_PACKET=y CONFIG_PACKET_DIAG=y CONFIG_UNIX=y CONFIG_UNIX_SCM=y CONFIG_UNIX_DIAG=y # CONFIG_TLS is not set # CONFIG_XFRM_USER is not set # CONFIG_NET_KEY is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y CONFIG_IP_FIB_TRIE_STATS=y CONFIG_IP_MULTIPLE_TABLES=y # CONFIG_IP_ROUTE_MULTIPATH is not set # CONFIG_IP_ROUTE_VERBOSE is not set # CONFIG_IP_PNP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE_DEMUX is not set CONFIG_NET_IP_TUNNEL=y # CONFIG_IP_MROUTE is not set # CONFIG_SYN_COOKIES is not set # CONFIG_NET_IPVTI is not set # CONFIG_NET_FOU is not set # CONFIG_NET_FOU_IP_TUNNELS is not set # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set CONFIG_INET_TUNNEL=y CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_INET_UDP_DIAG is not set # CONFIG_INET_RAW_DIAG is not set # CONFIG_INET_DIAG_DESTROY is not set # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=y # CONFIG_IPV6_ROUTER_PREF is not set # CONFIG_IPV6_OPTIMISTIC_DAD is not set # CONFIG_INET6_AH is not set # CONFIG_INET6_ESP is not set # CONFIG_INET6_IPCOMP is not set # CONFIG_IPV6_MIP6 is not set # CONFIG_IPV6_ILA is not set # CONFIG_IPV6_VTI is not set CONFIG_IPV6_SIT=y # CONFIG_IPV6_SIT_6RD is not set CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set # CONFIG_IPV6_MULTIPLE_TABLES is not set # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set # CONFIG_NETWORK_SECMARK is not set # CONFIG_NETWORK_PHY_TIMESTAMPING is not set CONFIG_NETFILTER=y CONFIG_NETFILTER_ADVANCED=y # CONFIG_BRIDGE_NETFILTER is not set # # Core Netfilter Configuration # # CONFIG_NETFILTER_INGRESS is not set CONFIG_NETFILTER_NETLINK=y # CONFIG_NETFILTER_NETLINK_ACCT is not set # CONFIG_NETFILTER_NETLINK_QUEUE is not set # CONFIG_NETFILTER_NETLINK_LOG is not set # CONFIG_NETFILTER_NETLINK_OSF is not set CONFIG_NF_CONNTRACK=y # CONFIG_NF_LOG_NETDEV is not set CONFIG_NF_CONNTRACK_MARK=y # CONFIG_NF_CONNTRACK_ZONES is not set CONFIG_NF_CONNTRACK_PROCFS=y CONFIG_NF_CONNTRACK_EVENTS=y CONFIG_NF_CONNTRACK_TIMEOUT=y CONFIG_NF_CONNTRACK_TIMESTAMP=y # CONFIG_NF_CONNTRACK_LABELS is not set # CONFIG_NF_CT_PROTO_DCCP is not set # CONFIG_NF_CT_PROTO_SCTP is not set # CONFIG_NF_CT_PROTO_UDPLITE is not set # CONFIG_NF_CONNTRACK_AMANDA is not set # CONFIG_NF_CONNTRACK_FTP is not set # CONFIG_NF_CONNTRACK_H323 is not set # CONFIG_NF_CONNTRACK_IRC is not set # CONFIG_NF_CONNTRACK_NETBIOS_NS is not set # CONFIG_NF_CONNTRACK_SNMP is not set # CONFIG_NF_CONNTRACK_PPTP is not set # CONFIG_NF_CONNTRACK_SANE is not set # CONFIG_NF_CONNTRACK_SIP is not set # CONFIG_NF_CONNTRACK_TFTP is not set CONFIG_NF_CT_NETLINK=y CONFIG_NF_CT_NETLINK_TIMEOUT=y CONFIG_NF_NAT=y CONFIG_NF_NAT_REDIRECT=y # CONFIG_NF_TABLES is not set CONFIG_NETFILTER_XTABLES=y # # Xtables combined modules # # CONFIG_NETFILTER_XT_MARK is not set CONFIG_NETFILTER_XT_CONNMARK=y # # Xtables targets # # CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set # CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set # CONFIG_NETFILTER_XT_TARGET_LED is not set # CONFIG_NETFILTER_XT_TARGET_LOG is not set # CONFIG_NETFILTER_XT_TARGET_MARK is not set # CONFIG_NETFILTER_XT_NAT is not set CONFIG_NETFILTER_XT_TARGET_NETMAP=y # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=y # CONFIG_NETFILTER_XT_TARGET_MASQUERADE is not set # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set # # Xtables matches # # CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set # CONFIG_NETFILTER_XT_MATCH_BPF is not set # CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set # CONFIG_NETFILTER_XT_MATCH_COMMENT is not set # CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set # CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set # CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set CONFIG_NETFILTER_XT_MATCH_CONNMARK=y CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y # CONFIG_NETFILTER_XT_MATCH_CPU is not set # CONFIG_NETFILTER_XT_MATCH_DCCP is not set # CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set # CONFIG_NETFILTER_XT_MATCH_DSCP is not set # CONFIG_NETFILTER_XT_MATCH_ECN is not set # CONFIG_NETFILTER_XT_MATCH_ESP is not set # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set # CONFIG_NETFILTER_XT_MATCH_HELPER is not set # CONFIG_NETFILTER_XT_MATCH_HL is not set # CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set # CONFIG_NETFILTER_XT_MATCH_L2TP is not set # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set # CONFIG_NETFILTER_XT_MATCH_LIMIT is not set # CONFIG_NETFILTER_XT_MATCH_MAC is not set # CONFIG_NETFILTER_XT_MATCH_MARK is not set # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set # CONFIG_NETFILTER_XT_MATCH_NFACCT is not set # CONFIG_NETFILTER_XT_MATCH_OSF is not set # CONFIG_NETFILTER_XT_MATCH_OWNER is not set # CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set # CONFIG_NETFILTER_XT_MATCH_QUOTA2 is not set # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set # CONFIG_NETFILTER_XT_MATCH_REALM is not set # CONFIG_NETFILTER_XT_MATCH_RECENT is not set # CONFIG_NETFILTER_XT_MATCH_SCTP is not set # CONFIG_NETFILTER_XT_MATCH_SOCKET is not set CONFIG_NETFILTER_XT_MATCH_STATE=y # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set # CONFIG_NETFILTER_XT_MATCH_STRING is not set # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set # CONFIG_NETFILTER_XT_MATCH_TIME is not set # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration # CONFIG_IP_SET is not set # CONFIG_IP_VS is not set # # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=y # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set # CONFIG_NF_LOG_ARP is not set # CONFIG_NF_LOG_IPV4 is not set CONFIG_NF_REJECT_IPV4=y CONFIG_IP_NF_IPTABLES=y # CONFIG_IP_NF_MATCH_AH is not set # CONFIG_IP_NF_MATCH_ECN is not set # CONFIG_IP_NF_MATCH_RPFILTER is not set # CONFIG_IP_NF_MATCH_TTL is not set # CONFIG_IP_NF_FILTER is not set # CONFIG_IP_NF_TARGET_SYNPROXY is not set # CONFIG_IP_NF_NAT is not set CONFIG_IP_NF_MANGLE=y # CONFIG_IP_NF_TARGET_CLUSTERIP is not set # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set # CONFIG_IP_NF_RAW is not set # CONFIG_IP_NF_ARPTABLES is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set # CONFIG_NF_REJECT_IPV6 is not set # CONFIG_NF_LOG_IPV6 is not set # CONFIG_IP6_NF_IPTABLES is not set # end of IPv6: Netfilter Configuration CONFIG_NF_DEFRAG_IPV6=y # CONFIG_NF_CONNTRACK_BRIDGE is not set # CONFIG_BRIDGE_NF_EBTABLES is not set # CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_L2TP is not set CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set CONFIG_LLC=y # CONFIG_LLC2 is not set # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set # CONFIG_PHONET is not set # CONFIG_6LOWPAN is not set # CONFIG_IEEE802154 is not set # CONFIG_NET_SCHED is not set # CONFIG_DCB is not set # CONFIG_DNS_RESOLVER is not set # CONFIG_BATMAN_ADV is not set # CONFIG_OPENVSWITCH is not set # CONFIG_VSOCKETS is not set # CONFIG_NETLINK_DIAG is not set # CONFIG_MPLS is not set # CONFIG_NET_NSH is not set # CONFIG_HSR is not set # CONFIG_NET_SWITCHDEV is not set # CONFIG_NET_L3_MASTER_DEV is not set # CONFIG_NET_NCSI is not set CONFIG_NET_RX_BUSY_POLL=y CONFIG_BQL=y # CONFIG_BPF_JIT is not set # # Network testing # # CONFIG_NET_PKTGEN is not set # end of Network testing # end of Networking options # CONFIG_HAMRADIO is not set # CONFIG_CAN is not set CONFIG_BT=y CONFIG_BT_BREDR=y CONFIG_BT_RFCOMM=y CONFIG_BT_RFCOMM_TTY=y # CONFIG_BT_BNEP is not set # CONFIG_BT_HIDP is not set # CONFIG_BT_HS is not set # CONFIG_BT_LE is not set # CONFIG_BT_LEDS is not set # CONFIG_BT_SELFTEST is not set CONFIG_BT_DEBUGFS=y # # Bluetooth device drivers # # CONFIG_BT_HCIBTUSB is not set # CONFIG_BT_HCIUART_RTL3WIRE is not set # CONFIG_BT_HCIBTSDIO is not set CONFIG_BT_HCIUART=y CONFIG_BT_HCIUART_H4=y CONFIG_BT_HCIUART_BCSP=y # CONFIG_BT_HCIUART_ATH3K is not set # CONFIG_BT_HCIUART_INTEL is not set # CONFIG_BT_HCIUART_AG6XX is not set # CONFIG_BT_HCIBCM203X is not set # CONFIG_BT_HCIBPA10X is not set # CONFIG_BT_HCIBFUSB is not set # CONFIG_BT_HCIVHCI is not set # CONFIG_BCM_BT_LPM is not set # CONFIG_RTL_BT_LPM is not set CONFIG_XR_BT_LPM=y # CONFIG_BT_MRVL is not set # CONFIG_BT_MTKSDIO is not set # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set # CONFIG_AF_KCM is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y CONFIG_CFG80211=y # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set # CONFIG_CFG80211_CERTIFICATION_ONUS is not set CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set CONFIG_CFG80211_CRDA_SUPPORT=y # CONFIG_CFG80211_WEXT is not set CONFIG_MAC80211=y CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set # CONFIG_MAC80211_LEDS is not set # CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 # CONFIG_WIMAX is not set CONFIG_RFKILL=y CONFIG_RFKILL_LEDS=y # CONFIG_RFKILL_INPUT is not set CONFIG_RFKILL_GPIO=y # CONFIG_NET_9P is not set # CONFIG_CAIF is not set # CONFIG_CEPH_LIB is not set # CONFIG_NFC is not set # CONFIG_PSAMPLE is not set # CONFIG_NET_IFE is not set # CONFIG_LWTUNNEL is not set CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y # CONFIG_FAILOVER is not set CONFIG_HAVE_EBPF_JIT=y # # Device Drivers # CONFIG_HAVE_PCI=y # CONFIG_PCI is not set # CONFIG_PCCARD is not set # # Generic Driver Options # # CONFIG_UEVENT_HELPER is not set CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # # Firmware loader # CONFIG_FW_LOADER=y CONFIG_EXTRA_FIRMWARE="" # CONFIG_FW_LOADER_USER_HELPER is not set # CONFIG_FW_LOADER_COMPRESS is not set CONFIG_FW_CACHE=y # end of Firmware loader CONFIG_ALLOW_DEV_COREDUMP=y # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set CONFIG_GENERIC_CPU_DEVICES=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_SPI=y CONFIG_REGMAP_MMIO=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_DMA_FENCE_TRACE is not set # end of Generic Driver Options # # Bus devices # # CONFIG_MOXTET is not set # CONFIG_SIMPLE_PM_BUS is not set # CONFIG_SUN50I_DE2_BUS is not set # CONFIG_SUNXI_RSB is not set CONFIG_SUNXI_MBUS=y # CONFIG_SUNXI_NSI is not set # end of Bus devices # CONFIG_CONNECTOR is not set # CONFIG_GNSS is not set CONFIG_MTD=y # CONFIG_MTD_TESTS is not set # CONFIG_MTD_REDBOOT_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_SUNXI_PARTS is not set # # Partition parsers # # end of Partition parsers # # User Modules And Translation Layers # CONFIG_MTD_BLKDEVS=y # CONFIG_MTD_CHAR is not set CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set # CONFIG_SM_FTL is not set # CONFIG_MTD_OOPS is not set # CONFIG_MTD_PARTITIONED_MASTER is not set # # RAM/ROM/Flash chip drivers # # CONFIG_MTD_CFI is not set # CONFIG_MTD_JEDECPROBE is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y CONFIG_MTD_MAP_BANK_WIDTH_2=y CONFIG_MTD_MAP_BANK_WIDTH_4=y CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set # end of RAM/ROM/Flash chip drivers # # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access # # Self-contained MTD device drivers # # CONFIG_MTD_DATAFLASH is not set # CONFIG_MTD_MCHP23K256 is not set # CONFIG_MTD_SST25L is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_BLOCK2MTD is not set # # Disk-On-Chip Device Drivers # # CONFIG_MTD_DOCG3 is not set # end of Self-contained MTD device drivers # CONFIG_MTD_ONENAND is not set # CONFIG_MTD_RAW_NAND is not set # CONFIG_MTD_SPI_NAND is not set # # sunxi-nand # CONFIG_AW_MTD_SPINAND=y # CONFIG_AW_MTD_RAWNAND is not set CONFIG_AW_SPINAND_PHYSICAL_LAYER=y CONFIG_AW_SPINAND_SECURE_STORAGE=y # CONFIG_AW_SPINAND_PSTORE_MTD_PART is not set # CONFIG_AW_SPINAND_ENABLE_PHY_CRC16 is not set CONFIG_AW_SPINAND_SIMULATE_MULTIPLANE=y # CONFIG_AW_MTD_SPINAND_OOB_RAW_SPARE is not set # end of sunxi-nand # # LPDDR & LPDDR2 PCM memory drivers # # CONFIG_MTD_LPDDR is not set # end of LPDDR & LPDDR2 PCM memory drivers # CONFIG_MTD_SPI_NOR is not set CONFIG_MTD_UBI=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MTD_UBI_BEB_LIMIT=40 # CONFIG_MTD_UBI_FASTMAP is not set # CONFIG_MTD_UBI_GLUEBI is not set CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_BLOCK_MAX_ACTIVE_WORKS=0 # CONFIG_MTD_HYPERBUS is not set CONFIG_DTC=y CONFIG_OF=y # CONFIG_OF_UNITTEST is not set CONFIG_OF_FLATTREE=y CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_KOBJ=y CONFIG_OF_ADDRESS=y CONFIG_OF_IRQ=y CONFIG_OF_NET=y CONFIG_OF_MDIO=y CONFIG_OF_RESERVED_MEM=y # CONFIG_OF_OVERLAY is not set # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_DRBD is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set # CONFIG_VIRTIO_BLK is not set # CONFIG_BLK_DEV_RBD is not set # # NVME Support # # CONFIG_NVME_FC is not set # CONFIG_NVME_TARGET is not set # end of NVME Support # # Misc devices # # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_APDS9802ALS is not set # CONFIG_ISL29003 is not set # CONFIG_ISL29020 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_SENSORS_BH1770 is not set # CONFIG_SENSORS_APDS990X is not set # CONFIG_HMC6352 is not set # CONFIG_DS1682 is not set # CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SRAM is not set # CONFIG_XILINX_SDFEC is not set # CONFIG_PVPANIC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_SUNXI_CPU_COMM is not set # CONFIG_SUNXI_DIRECT_GPIO is not set # CONFIG_C2PORT is not set # # EEPROM support # # CONFIG_EEPROM_AT24 is not set # CONFIG_EEPROM_AT25 is not set # CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set # CONFIG_EEPROM_93CX6 is not set # CONFIG_EEPROM_93XX46 is not set # CONFIG_EEPROM_IDT_89HPESX is not set # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support # # Texas Instruments shared transport line discipline # # CONFIG_TI_ST is not set # end of Texas Instruments shared transport line discipline # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set # # Intel MIC & related support # # # Intel MIC Bus Driver # # # SCIF Bus Driver # # # VOP Bus Driver # # CONFIG_VOP_BUS is not set # # Intel MIC Host Driver # # # Intel MIC Card Driver # # # SCIF Driver # # # Intel MIC Coprocessor State Management (COSM) Drivers # # # VOP Driver # # end of Intel MIC & related support # CONFIG_ECHO is not set # CONFIG_MISC_RTSX_USB is not set CONFIG_SUNXI_RFKILL=y CONFIG_SUNXI_ADDR_MGT=y # CONFIG_SUNXI_BOOTEVENT is not set # # sunxi Gorilla ESL platform # # CONFIG_SUNXI_GORILLA is not set # end of sunxi Gorilla ESL platform # CONFIG_SUNXI_MIPSLOADER is not set # CONFIG_SUNXI_TVUTILS is not set # CONFIG_SUNXI_ARISC_RPM is not set # end of Misc devices # # SCSI device support # CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y CONFIG_SCSI_DMA=y CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set # CONFIG_BLK_DEV_SR is not set # CONFIG_CHR_DEV_SG is not set # CONFIG_CHR_DEV_SCH is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_SCAN_ASYNC is not set # # SCSI Transports # # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set # CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set # CONFIG_SCSI_SRP_ATTRS is not set # end of SCSI Transports CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set # CONFIG_ISCSI_BOOT_SYSFS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_DEBUG is not set # CONFIG_SCSI_VIRTIO is not set # CONFIG_SCSI_DH is not set # end of SCSI device support # CONFIG_ATA is not set # CONFIG_MD is not set # CONFIG_TARGET_CORE is not set CONFIG_NETDEVICES=y CONFIG_MII=y CONFIG_NET_CORE=y # CONFIG_BONDING is not set # CONFIG_DUMMY is not set # CONFIG_EQUALIZER is not set # CONFIG_NET_TEAM is not set # CONFIG_MACVLAN is not set # CONFIG_IPVLAN is not set # CONFIG_VXLAN is not set # CONFIG_GENEVE is not set # CONFIG_GTP is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set # CONFIG_TUN is not set # CONFIG_TUN_VNET_CROSS_LE is not set # CONFIG_VETH is not set # CONFIG_VIRTIO_NET is not set # CONFIG_NLMON is not set # # CAIF transport drivers # # # Distributed Switch Architecture drivers # # end of Distributed Switch Architecture drivers CONFIG_ETHERNET=y CONFIG_NET_VENDOR_ALACRITECH=y CONFIG_NET_VENDOR_ALLWINNER=y # CONFIG_SUN4I_EMAC is not set CONFIG_SUNXI_GMAC=y CONFIG_SUNXI_EXT_PHY=y # CONFIG_ALTERA_TSE is not set CONFIG_NET_VENDOR_AMAZON=y CONFIG_NET_VENDOR_AQUANTIA=y CONFIG_NET_VENDOR_ARC=y CONFIG_NET_VENDOR_AURORA=y # CONFIG_AURORA_NB8800 is not set CONFIG_NET_VENDOR_BROADCOM=y # CONFIG_B44 is not set # CONFIG_BCMGENET is not set # CONFIG_SYSTEMPORT is not set CONFIG_NET_VENDOR_CADENCE=y # CONFIG_MACB is not set CONFIG_NET_VENDOR_CAVIUM=y CONFIG_NET_VENDOR_CORTINA=y # CONFIG_GEMINI_ETHERNET is not set # CONFIG_DNET is not set CONFIG_NET_VENDOR_EZCHIP=y # CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set CONFIG_NET_VENDOR_GOOGLE=y CONFIG_NET_VENDOR_HUAWEI=y CONFIG_NET_VENDOR_I825XX=y CONFIG_NET_VENDOR_INTEL=y CONFIG_NET_VENDOR_MARVELL=y # CONFIG_MVMDIO is not set CONFIG_NET_VENDOR_MELLANOX=y # CONFIG_MLXSW_CORE is not set # CONFIG_MLXFW is not set CONFIG_NET_VENDOR_MICREL=y # CONFIG_KS8842 is not set # CONFIG_KS8851 is not set # CONFIG_KS8851_MLL is not set CONFIG_NET_VENDOR_MICROCHIP=y # CONFIG_ENC28J60 is not set # CONFIG_ENCX24J600 is not set CONFIG_NET_VENDOR_MICROSEMI=y CONFIG_NET_VENDOR_NATSEMI=y CONFIG_NET_VENDOR_NETRONOME=y CONFIG_NET_VENDOR_NI=y # CONFIG_NI_XGE_MANAGEMENT_ENET is not set CONFIG_NET_VENDOR_8390=y # CONFIG_ETHOC is not set CONFIG_NET_VENDOR_PENSANDO=y CONFIG_NET_VENDOR_QUALCOMM=y # CONFIG_QCA7000_SPI is not set # CONFIG_QCOM_EMAC is not set # CONFIG_RMNET is not set CONFIG_NET_VENDOR_RENESAS=y CONFIG_NET_VENDOR_ROCKER=y CONFIG_NET_VENDOR_SAMSUNG=y # CONFIG_SXGBE_ETH is not set CONFIG_NET_VENDOR_SEEQ=y CONFIG_NET_VENDOR_SOLARFLARE=y CONFIG_NET_VENDOR_SOCIONEXT=y CONFIG_NET_VENDOR_STMICRO=y # CONFIG_STMMAC_ETH is not set CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set CONFIG_NET_VENDOR_VIA=y # CONFIG_VIA_RHINE is not set # CONFIG_VIA_VELOCITY is not set CONFIG_NET_VENDOR_WIZNET=y # CONFIG_WIZNET_W5100 is not set # CONFIG_WIZNET_W5300 is not set CONFIG_MDIO_DEVICE=y CONFIG_MDIO_BUS=y # CONFIG_MDIO_BCM_UNIMAC is not set # CONFIG_MDIO_BITBANG is not set # CONFIG_MDIO_BUS_MUX_GPIO is not set # CONFIG_MDIO_BUS_MUX_MMIOREG is not set # CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set # CONFIG_MDIO_HISI_FEMAC is not set # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_OCTEON is not set # CONFIG_MDIO_SUN4I is not set CONFIG_PHYLIB=y CONFIG_SWPHY=y # CONFIG_LED_TRIGGER_PHY is not set # # MII PHY device drivers # # CONFIG_ADIN_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_AQUANTIA_PHY is not set # CONFIG_AX88796B_PHY is not set # CONFIG_AT803X_PHY is not set # CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM87XX_PHY is not set # CONFIG_BROADCOM_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set # CONFIG_DAVICOM_PHY is not set # CONFIG_DP83822_PHY is not set # CONFIG_DP83TC811_PHY is not set # CONFIG_DP83848_PHY is not set # CONFIG_DP83867_PHY is not set CONFIG_FIXED_PHY=y # CONFIG_ICPLUS_PHY is not set # CONFIG_INTEL_XWAY_PHY is not set # CONFIG_LSI_ET1011C_PHY is not set # CONFIG_LXT_PHY is not set # CONFIG_MARVELL_PHY is not set # CONFIG_MARVELL_10G_PHY is not set # CONFIG_MICREL_PHY is not set # CONFIG_MICROCHIP_PHY is not set # CONFIG_MICROCHIP_T1_PHY is not set # CONFIG_MICROSEMI_PHY is not set # CONFIG_NATIONAL_PHY is not set # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_QSEMI_PHY is not set # CONFIG_REALTEK_PHY is not set # CONFIG_RENESAS_PHY is not set # CONFIG_ROCKCHIP_PHY is not set # CONFIG_RTL8363_NB is not set # CONFIG_SMSC_PHY is not set # CONFIG_STE10XP is not set # CONFIG_TERANETICS_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_USB_NET_DRIVERS is not set CONFIG_WLAN=y # CONFIG_WIRELESS_WDS is not set CONFIG_WLAN_VENDOR_ADMTEK=y CONFIG_WLAN_VENDOR_ATH=y # CONFIG_ATH_DEBUG is not set # CONFIG_ATH9K is not set # CONFIG_ATH9K_HTC is not set # CONFIG_CARL9170 is not set # CONFIG_ATH6KL is not set # CONFIG_AR5523 is not set # CONFIG_ATH10K is not set # CONFIG_WCN36XX is not set CONFIG_WLAN_VENDOR_ATMEL=y # CONFIG_AT76C50X_USB is not set CONFIG_WLAN_VENDOR_BROADCOM=y # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set # CONFIG_BRCMSMAC is not set # CONFIG_BRCMFMAC is not set CONFIG_WLAN_VENDOR_CISCO=y CONFIG_WLAN_VENDOR_INTEL=y CONFIG_WLAN_VENDOR_INTERSIL=y # CONFIG_HOSTAP is not set # CONFIG_P54_COMMON is not set CONFIG_WLAN_VENDOR_MARVELL=y # CONFIG_LIBERTAS is not set # CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_MWIFIEX is not set CONFIG_WLAN_VENDOR_MEDIATEK=y # CONFIG_MT7601U is not set # CONFIG_MT76x0U is not set # CONFIG_MT76x2U is not set CONFIG_WLAN_VENDOR_RALINK=y # CONFIG_RT2X00 is not set CONFIG_WLAN_VENDOR_REALTEK=y # CONFIG_RTL8187 is not set # CONFIG_RTL_CARDS is not set # CONFIG_RTL8XXXU is not set # CONFIG_RTW88 is not set CONFIG_WLAN_VENDOR_RSI=y # CONFIG_RSI_91X is not set CONFIG_WLAN_VENDOR_ST=y # CONFIG_CW1200 is not set CONFIG_WLAN_VENDOR_TI=y # CONFIG_WL1251 is not set # CONFIG_WL12XX is not set # CONFIG_WL18XX is not set # CONFIG_WLCORE is not set CONFIG_WLAN_VENDOR_ZYDAS=y # CONFIG_USB_ZD1201 is not set # CONFIG_ZD1211RW is not set CONFIG_WLAN_VENDOR_QUANTENNA=y CONFIG_XR829_WLAN=m # CONFIG_XR819S_WLAN is not set # CONFIG_SPARD_WLAN_SUPPORT is not set # CONFIG_BCMDHD is not set # CONFIG_AIC_WLAN_SUPPORT is not set # CONFIG_MAC80211_HWSIM is not set # CONFIG_USB_NET_RNDIS_WLAN is not set # CONFIG_VIRT_WIFI is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers # # CONFIG_WAN is not set # CONFIG_NETDEVSIM is not set # CONFIG_NET_FAILOVER is not set CONFIG_ISDN=y # CONFIG_ISDN_CAPI is not set # CONFIG_MISDN is not set # CONFIG_NVM is not set # # Input device support # CONFIG_INPUT=y CONFIG_INPUT_LEDS=y # CONFIG_INPUT_FF_MEMLESS is not set # CONFIG_INPUT_POLLDEV is not set # CONFIG_INPUT_SPARSEKMAP is not set # CONFIG_INPUT_MATRIXKMAP is not set # # Userland interfaces # # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set # CONFIG_INPUT_SENSORINIT is not set # # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_ADP5588 is not set # CONFIG_KEYBOARD_ADP5589 is not set CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_QT1050 is not set # CONFIG_KEYBOARD_QT1070 is not set # CONFIG_KEYBOARD_QT2160 is not set # CONFIG_KEYBOARD_DLINK_DIR685 is not set # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_GPIO is not set # CONFIG_KEYBOARD_GPIO_POLLED is not set # CONFIG_KEYBOARD_TCA6416 is not set # CONFIG_KEYBOARD_TCA8418 is not set # CONFIG_KEYBOARD_MATRIX is not set # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set # CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_SAMSUNG is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_SUN4I_LRADC is not set # CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set # CONFIG_KEYBOARD_XTKBD is not set # CONFIG_KEYBOARD_CAP11XX is not set # CONFIG_KEYBOARD_BCM is not set CONFIG_KEYBOARD_SUNXI=y # CONFIG_KEYBOARD_TPKEY is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y # CONFIG_TOUCHSCREEN_ADS7846 is not set # CONFIG_TOUCHSCREEN_AD7877 is not set # CONFIG_TOUCHSCREEN_AD7879 is not set # CONFIG_TOUCHSCREEN_AR1021_I2C is not set # CONFIG_TOUCHSCREEN_ATMEL_MXT is not set # CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set # CONFIG_TOUCHSCREEN_BU21013 is not set # CONFIG_TOUCHSCREEN_BU21029 is not set # CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set # CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set # CONFIG_TOUCHSCREEN_EETI is not set # CONFIG_TOUCHSCREEN_EGALAX is not set # CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set # CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_ILI210X is not set # CONFIG_TOUCHSCREEN_S6SY761 is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_EKTF2127 is not set # CONFIG_TOUCHSCREEN_ELAN is not set # CONFIG_TOUCHSCREEN_ELO is not set # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set # CONFIG_TOUCHSCREEN_WACOM_I2C is not set # CONFIG_TOUCHSCREEN_MAX11801 is not set # CONFIG_TOUCHSCREEN_MCS5000 is not set # CONFIG_TOUCHSCREEN_MMS114 is not set # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set # CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set # CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set # CONFIG_TOUCHSCREEN_PIXCIR is not set # CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_TOUCHSCREEN_TSC_SERIO is not set # CONFIG_TOUCHSCREEN_TSC2004 is not set # CONFIG_TOUCHSCREEN_TSC2005 is not set # CONFIG_TOUCHSCREEN_TSC2007 is not set # CONFIG_TOUCHSCREEN_RM_TS is not set # CONFIG_TOUCHSCREEN_SILEAD is not set # CONFIG_TOUCHSCREEN_SIS_I2C is not set # CONFIG_TOUCHSCREEN_ST1232 is not set # CONFIG_TOUCHSCREEN_STMFTS is not set # CONFIG_TOUCHSCREEN_SUN4I is not set # CONFIG_TOUCHSCREEN_SUNXI is not set # CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set # CONFIG_TOUCHSCREEN_SX8654 is not set # CONFIG_TOUCHSCREEN_TPS6507X is not set # CONFIG_TOUCHSCREEN_ZET6223 is not set # CONFIG_TOUCHSCREEN_ZFORCE is not set # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set # CONFIG_TOUCHSCREEN_IQS5XX is not set # CONFIG_TOUCHSCREEN_GSLX680NEW is not set # CONFIG_TOUCHSCREEN_GT9XXNEW_TS is not set # CONFIG_TOUCHSCREEN_GT9XXNEWDUP_TS is not set # CONFIG_TOUCHSCREEN_FTS is not set # CONFIG_INPUT_MISC is not set # CONFIG_RMI4_CORE is not set CONFIG_INPUT_SENSOR=y # CONFIG_SENSORS_SC7A20 is not set # CONFIG_SENSORS_MIR3DA is not set # CONFIG_STK3X1X is not set # CONFIG_SUNXI_TPADC is not set CONFIG_SUNXI_GPADC=y # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_SERIO_SERPORT=y CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set # CONFIG_SERIO_ARC_PS2 is not set # CONFIG_SERIO_APBPS2 is not set # CONFIG_SERIO_SUN4I_PS2 is not set # CONFIG_SERIO_GPIO_PS2 is not set # CONFIG_USERIO is not set # CONFIG_GAMEPORT is not set # end of Hardware I/O ports # end of Input device support # # Character devices # CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y CONFIG_HW_CONSOLE=y # CONFIG_VT_HW_CONSOLE_BINDING is not set CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_N_GSM is not set # CONFIG_TRACE_SINK is not set # CONFIG_NULL_TTY is not set CONFIG_LDISC_AUTOLOAD=y CONFIG_DEVMEM=y # CONFIG_DEVKMEM is not set # # Serial drivers # CONFIG_SERIAL_EARLYCON=y # CONFIG_SERIAL_8250 is not set # # Non-8250 serial port support # CONFIG_SERIAL_EARLYCON_RISCV_SBI=y # CONFIG_SERIAL_SAMSUNG is not set # CONFIG_SERIAL_MAX3100 is not set # CONFIG_SERIAL_MAX310X is not set # CONFIG_SERIAL_UARTLITE is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_SIFIVE is not set # CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_SC16IS7XX is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_IFX6X60 is not set # CONFIG_SERIAL_XILINX_PS_UART is not set # CONFIG_SERIAL_ARC is not set # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_FSL_LINFLEXUART is not set # CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set # CONFIG_SERIAL_SPRD is not set CONFIG_SERIAL_SUNXI=y # CONFIG_SERIAL_SUNXI_DMA is not set CONFIG_SERIAL_SUNXI_CONSOLE=y # CONFIG_SERIAL_SUNXI_EARLYCON is not set # end of Serial drivers # CONFIG_SERIAL_DEV_BUS is not set # CONFIG_TTY_PRINTK is not set CONFIG_HVC_DRIVER=y # CONFIG_HVC_RISCV_SBI is not set CONFIG_VIRTIO_CONSOLE=m # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set # CONFIG_XILLYBUS is not set # CONFIG_SUNXI_BS83B16C is not set # end of Character devices # CONFIG_RANDOM_TRUST_BOOTLOADER is not set CONFIG_DUMP_REG=y CONFIG_DUMP_REG_MISC=y # CONFIG_SUNXI_G2D is not set # CONFIG_SUNXI_DI is not set CONFIG_SUNXI_SYS_INFO=y # CONFIG_SUNXI_QA_TEST is not set # CONFIG_SUNXI_SMC is not set # # I2C support # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y # # Multiplexer I2C Chip support # # CONFIG_I2C_ARB_GPIO_CHALLENGE is not set # CONFIG_I2C_MUX_GPIO is not set # CONFIG_I2C_MUX_GPMUX is not set # CONFIG_I2C_MUX_LTC4306 is not set # CONFIG_I2C_MUX_PCA9541 is not set # CONFIG_I2C_MUX_PCA954x is not set # CONFIG_I2C_MUX_PINCTRL is not set # CONFIG_I2C_MUX_REG is not set # CONFIG_I2C_DEMUX_PINCTRL is not set # CONFIG_I2C_MUX_MLXCPLD is not set # end of Multiplexer I2C Chip support CONFIG_I2C_HELPER_AUTO=y # # I2C Hardware Bus support # # # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_CBUS_GPIO is not set # CONFIG_I2C_DESIGNWARE_PLATFORM is not set # CONFIG_I2C_EMEV2 is not set # CONFIG_I2C_GPIO is not set # CONFIG_I2C_MV64XXX is not set # CONFIG_I2C_OCORES is not set CONFIG_I2C_SUNXI=y # CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_RK3X is not set # CONFIG_I2C_SIMTEC is not set # CONFIG_I2C_XILINX is not set # # External I2C/SMBus adapter drivers # # CONFIG_I2C_DIOLAN_U2C is not set # CONFIG_I2C_PARPORT_LIGHT is not set # CONFIG_I2C_ROBOTFUZZ_OSIF is not set # CONFIG_I2C_TAOS_EVM is not set # CONFIG_I2C_TINY_USB is not set # # Other I2C/SMBus bus drivers # # end of I2C Hardware Bus support # CONFIG_I2C_STUB is not set # CONFIG_I2C_SLAVE is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # end of I2C support # CONFIG_I3C is not set CONFIG_SPI=y # CONFIG_SPI_DEBUG is not set CONFIG_SPI_MASTER=y # CONFIG_SPI_MEM is not set # # SPI Master Controller Drivers # # CONFIG_SPI_ALTERA is not set # CONFIG_SPI_AXI_SPI_ENGINE is not set # CONFIG_SPI_BITBANG is not set # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_DESIGNWARE is not set # CONFIG_SPI_NXP_FLEXSPI is not set # CONFIG_SPI_GPIO is not set # CONFIG_SPI_FSL_SPI is not set # CONFIG_SPI_OC_TINY is not set # CONFIG_SPI_ROCKCHIP is not set # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_SUN4I is not set # CONFIG_SPI_SUN6I is not set # CONFIG_SPI_MXIC is not set CONFIG_SPI_SUNXI=y # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set # # SPI Protocol Masters # CONFIG_SPI_SPIDEV=y # CONFIG_SPI_LOOPBACK_TEST is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_SPI_SLAVE is not set # CONFIG_SPMI is not set # CONFIG_HSI is not set # CONFIG_PPS is not set # # PTP clock support # # CONFIG_PTP_1588_CLOCK is not set # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # # end of PTP clock support CONFIG_PINCTRL=y CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set # CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_SINGLE is not set # CONFIG_PINCTRL_SX150X is not set # CONFIG_PINCTRL_STMFX is not set # CONFIG_PINCTRL_OCELOT is not set # # Allwinner SOC PINCTRL DRIVER # CONFIG_PINCTRL_SUNXI=y # CONFIG_PINCTRL_SUNXI_DEBUGFS is not set # CONFIG_PINCTRL_SUNXI_TEST is not set # CONFIG_PINCTRL_SUN8IW15P1 is not set # CONFIG_PINCTRL_SUN8IW15P1_R is not set CONFIG_PINCTRL_SUN8IW20=y # CONFIG_PINCTRL_SUN50IW9 is not set # CONFIG_PINCTRL_SUN50IW9_R is not set # CONFIG_PINCTRL_SUN50IW10P1 is not set # CONFIG_PINCTRL_SUN50IW10P1_R is not set # CONFIG_PINCTRL_SUN50IW12 is not set # CONFIG_PINCTRL_SUN50IW12_R is not set # CONFIG_PINCTRL_SUN55IW3 is not set # CONFIG_PINCTRL_SUN55IW3_R is not set # CONFIG_PINCTRL_SUN4I_A10 is not set # CONFIG_PINCTRL_SUN5I is not set # CONFIG_PINCTRL_SUN6I_A31 is not set # CONFIG_PINCTRL_SUN6I_A31_R is not set # CONFIG_PINCTRL_SUN8I_A23 is not set # CONFIG_PINCTRL_SUN8I_A33 is not set # CONFIG_PINCTRL_SUN8I_A83T is not set # CONFIG_PINCTRL_SUN8I_A83T_R is not set # CONFIG_PINCTRL_SUN8I_A23_R is not set # CONFIG_PINCTRL_SUN8I_H3 is not set # CONFIG_PINCTRL_SUN8I_H3_R is not set # CONFIG_PINCTRL_SUN8I_V3S is not set # CONFIG_PINCTRL_SUN9I_A80 is not set # CONFIG_PINCTRL_SUN9I_A80_R is not set # CONFIG_PINCTRL_SUN50I_A64 is not set # CONFIG_PINCTRL_SUN50I_A64_R is not set # CONFIG_PINCTRL_SUN50I_A100 is not set # CONFIG_PINCTRL_SUN50I_A100_R is not set # CONFIG_PINCTRL_SUN50I_H5 is not set # CONFIG_PINCTRL_SUN50I_H6 is not set # CONFIG_PINCTRL_SUN50I_H6_R is not set # end of Allwinner SOC PINCTRL DRIVER CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y CONFIG_GPIOLIB_IRQCHIP=y # CONFIG_DEBUG_GPIO is not set CONFIG_GPIO_SYSFS=y # # Memory mapped GPIO drivers # # CONFIG_GPIO_74XX_MMIO is not set # CONFIG_GPIO_ALTERA is not set # CONFIG_GPIO_SUNXI is not set # CONFIG_GPIO_CADENCE is not set # CONFIG_GPIO_DWAPB is not set # CONFIG_GPIO_FTGPIO010 is not set # CONFIG_GPIO_GENERIC_PLATFORM is not set # CONFIG_GPIO_GRGPIO is not set # CONFIG_GPIO_HLWD is not set # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_XILINX is not set # CONFIG_GPIO_AMD_FCH is not set # end of Memory mapped GPIO drivers # # I2C GPIO expanders # # CONFIG_GPIO_ADP5588 is not set # CONFIG_GPIO_ADNP is not set # CONFIG_GPIO_BS83B16C is not set # CONFIG_GPIO_GW_PLD is not set # CONFIG_GPIO_MAX7300 is not set # CONFIG_GPIO_MAX732X is not set # CONFIG_GPIO_PCA953X is not set CONFIG_GPIO_PCF857X=y # CONFIG_GPIO_TPIC2810 is not set # end of I2C GPIO expanders # # MFD GPIO expanders # # end of MFD GPIO expanders # # SPI GPIO expanders # # CONFIG_GPIO_74X164 is not set # CONFIG_GPIO_MAX3191X is not set # CONFIG_GPIO_MAX7301 is not set # CONFIG_GPIO_MC33880 is not set # CONFIG_GPIO_PISOSR is not set # CONFIG_GPIO_XRA1403 is not set # end of SPI GPIO expanders # # USB GPIO expanders # # end of USB GPIO expanders # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set # CONFIG_POWER_AVS is not set # CONFIG_POWER_RESET is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_PDA_POWER is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set # CONFIG_BATTERY_SBS is not set # CONFIG_CHARGER_SBS is not set # CONFIG_MANAGER_SBS is not set # CONFIG_BATTERY_BQ27XXX is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set # CONFIG_CHARGER_MANAGER is not set # CONFIG_CHARGER_LT3651 is not set # CONFIG_CHARGER_DETECTOR_MAX14656 is not set # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24257 is not set # CONFIG_CHARGER_BQ24735 is not set # CONFIG_CHARGER_BQ25890 is not set # CONFIG_CHARGER_SMB347 is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_UCS1002 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set # # Native drivers # # CONFIG_SENSORS_AD7314 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set # CONFIG_SENSORS_ADT7310 is not set # CONFIG_SENSORS_ADT7410 is not set # CONFIG_SENSORS_ADT7411 is not set # CONFIG_SENSORS_ADT7462 is not set # CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set # CONFIG_SENSORS_ASPEED is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FTSTEUTATES is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set # CONFIG_SENSORS_G762 is not set # CONFIG_SENSORS_GPIO_FAN is not set # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2990 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set # CONFIG_SENSORS_LTC4222 is not set # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX16065 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX1668 is not set # CONFIG_SENSORS_MAX197 is not set # CONFIG_SENSORS_MAX31722 is not set # CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set # CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MAX6697 is not set # CONFIG_SENSORS_MAX31790 is not set # CONFIG_SENSORS_MCP3021 is not set # CONFIG_SENSORS_TC654 is not set # CONFIG_SENSORS_ADCXX is not set # CONFIG_SENSORS_LM63 is not set # CONFIG_SENSORS_LM70 is not set # CONFIG_SENSORS_LM73 is not set # CONFIG_SENSORS_LM75 is not set # CONFIG_SENSORS_LM77 is not set # CONFIG_SENSORS_LM78 is not set # CONFIG_SENSORS_LM80 is not set # CONFIG_SENSORS_LM83 is not set # CONFIG_SENSORS_LM85 is not set # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set # CONFIG_SENSORS_LM93 is not set # CONFIG_SENSORS_LM95234 is not set # CONFIG_SENSORS_LM95241 is not set # CONFIG_SENSORS_LM95245 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set # CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set # CONFIG_SENSORS_PWM_FAN is not set # CONFIG_SENSORS_SHT15 is not set # CONFIG_SENSORS_SHT21 is not set # CONFIG_SENSORS_SHT3x is not set # CONFIG_SENSORS_SHTC1 is not set # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_EMC1403 is not set # CONFIG_SENSORS_EMC2103 is not set # CONFIG_SENSORS_EMC6W201 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set # CONFIG_SENSORS_SCH5627 is not set # CONFIG_SENSORS_SCH5636 is not set # CONFIG_SENSORS_STTS751 is not set # CONFIG_SENSORS_SMM665 is not set # CONFIG_SENSORS_ADC128D818 is not set # CONFIG_SENSORS_ADS7828 is not set # CONFIG_SENSORS_ADS7871 is not set # CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_INA209 is not set # CONFIG_SENSORS_INA2XX is not set # CONFIG_SENSORS_INA3221 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set # CONFIG_SENSORS_TMP103 is not set # CONFIG_SENSORS_TMP108 is not set # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_W83773G is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set # CONFIG_SENSORS_W83793 is not set # CONFIG_SENSORS_W83795 is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83L786NG is not set # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set CONFIG_THERMAL=y CONFIG_THERMAL_STATISTICS=y CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 # CONFIG_THERMAL_HWMON is not set CONFIG_THERMAL_OF=y CONFIG_THERMAL_WRITABLE_TRIPS=y # CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE=y # CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set # CONFIG_THERMAL_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_GOV_STEP_WISE is not set # CONFIG_THERMAL_GOV_BANG_BANG is not set CONFIG_THERMAL_GOV_USER_SPACE=y CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y # CONFIG_THERMAL_EMULATION is not set CONFIG_THERMAL_MMIO=y # CONFIG_QORIQ_THERMAL is not set CONFIG_SUNXI_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y # CONFIG_WATCHDOG_NOWAYOUT is not set CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y CONFIG_WATCHDOG_OPEN_TIMEOUT=0 # CONFIG_WATCHDOG_SYSFS is not set # # Watchdog Pretimeout Governors # # CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set # # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set # CONFIG_GPIO_WATCHDOG is not set # CONFIG_XILINX_WATCHDOG is not set # CONFIG_ZIIRAVE_WATCHDOG is not set # CONFIG_CADENCE_WATCHDOG is not set # CONFIG_DW_WATCHDOG is not set CONFIG_SUNXI_WATCHDOG=y # CONFIG_MAX63XX_WATCHDOG is not set # CONFIG_MEN_A21_WDT is not set # # USB-based Watchdog Cards # # CONFIG_USBPCWATCHDOG is not set CONFIG_SSB_POSSIBLE=y # CONFIG_SSB is not set CONFIG_BCMA_POSSIBLE=y # CONFIG_BCMA is not set # # Multifunction device drivers # CONFIG_MFD_CORE=y # CONFIG_MFD_ACX00 is not set # CONFIG_MFD_ACT8945A is not set # CONFIG_MFD_SUN4I_GPADC is not set # CONFIG_MFD_AS3711 is not set # CONFIG_MFD_AS3722 is not set # CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_AAT2870_CORE is not set # CONFIG_MFD_ATMEL_FLEXCOM is not set # CONFIG_MFD_ATMEL_HLCDC is not set # CONFIG_MFD_BCM590XX is not set # CONFIG_MFD_BD9571MWV is not set # CONFIG_MFD_AXP2101_I2C is not set # CONFIG_MFD_AXP20X_I2C is not set # CONFIG_MFD_MADERA is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_DA9052_SPI is not set # CONFIG_MFD_DA9052_I2C is not set # CONFIG_MFD_DA9055 is not set # CONFIG_MFD_DA9062 is not set # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set # CONFIG_MFD_HI6421_PMIC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77620 is not set # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set # CONFIG_MFD_MAX77693 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_EZX_PCAP is not set # CONFIG_MFD_CPCAP is not set # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_RETU is not set # CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_RT5033 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_RK808 is not set # CONFIG_MFD_RN5T618 is not set # CONFIG_MFD_SEC_CORE is not set # CONFIG_MFD_SI476X_CORE is not set # CONFIG_MFD_SM501 is not set # CONFIG_MFD_SKY81452 is not set # CONFIG_MFD_SMSC is not set # CONFIG_ABX500_CORE is not set # CONFIG_MFD_STMPE is not set CONFIG_MFD_SUN6I_PRCM=y # CONFIG_MFD_SYSCON is not set # CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_MFD_LP3943 is not set # CONFIG_MFD_LP8788 is not set # CONFIG_MFD_TI_LMU is not set # CONFIG_MFD_PALMAS is not set # CONFIG_TPS6105X is not set # CONFIG_TPS65010 is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65086 is not set # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_TPS65217 is not set # CONFIG_MFD_TI_LP873X is not set # CONFIG_MFD_TI_LP87565 is not set # CONFIG_MFD_TPS65218 is not set # CONFIG_MFD_TPS6586X is not set # CONFIG_MFD_TPS65910 is not set # CONFIG_MFD_TPS65912_I2C is not set # CONFIG_MFD_TPS65912_SPI is not set # CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_WL1273_CORE is not set # CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TC3589X is not set # CONFIG_MFD_TQMX86 is not set # CONFIG_MFD_LOCHNAGAR is not set # CONFIG_MFD_ARIZONA_I2C is not set # CONFIG_MFD_ARIZONA_SPI is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X_I2C is not set # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8994 is not set # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD70528 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # end of Multifunction device drivers CONFIG_REGULATOR=y # CONFIG_REGULATOR_DEBUG is not set CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set CONFIG_SUNXI_REGULATOR_PWM=y # CONFIG_REGULATOR_DA9210 is not set # CONFIG_REGULATOR_DA9211 is not set # CONFIG_REGULATOR_FAN53555 is not set # CONFIG_REGULATOR_GPIO is not set # CONFIG_REGULATOR_ISL9305 is not set # CONFIG_REGULATOR_ISL6271A is not set # CONFIG_REGULATOR_LP3971 is not set # CONFIG_REGULATOR_LP3972 is not set # CONFIG_REGULATOR_LP872X is not set # CONFIG_REGULATOR_LP8755 is not set # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8973 is not set # CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set # CONFIG_REGULATOR_PV88080 is not set # CONFIG_REGULATOR_PV88090 is not set # CONFIG_REGULATOR_PWM is not set # CONFIG_REGULATOR_SLG51000 is not set # CONFIG_REGULATOR_SY8106A is not set # CONFIG_REGULATOR_SY8824X is not set # CONFIG_REGULATOR_TPS51632 is not set # CONFIG_REGULATOR_TPS62360 is not set # CONFIG_REGULATOR_TPS65023 is not set # CONFIG_REGULATOR_TPS6507X is not set # CONFIG_REGULATOR_TPS65132 is not set # CONFIG_REGULATOR_TPS6524X is not set # CONFIG_REGULATOR_VCTRL is not set CONFIG_RC_CORE=y CONFIG_RC_MAP=y CONFIG_LIRC=y CONFIG_RC_DECODERS=y CONFIG_IR_NEC_DECODER=y # CONFIG_IR_RC5_DECODER is not set # CONFIG_IR_RC6_DECODER is not set # CONFIG_IR_JVC_DECODER is not set # CONFIG_IR_SONY_DECODER is not set # CONFIG_IR_SANYO_DECODER is not set # CONFIG_IR_SHARP_DECODER is not set # CONFIG_IR_MCE_KBD_DECODER is not set # CONFIG_IR_XMP_DECODER is not set # CONFIG_IR_IMON_DECODER is not set # CONFIG_IR_RCMM_DECODER is not set CONFIG_RC_DEVICES=y # CONFIG_RC_ATI_REMOTE is not set # CONFIG_IR_HIX5HD2 is not set # CONFIG_IR_IMON is not set # CONFIG_IR_IMON_RAW is not set # CONFIG_IR_MCEUSB is not set # CONFIG_IR_REDRAT3 is not set # CONFIG_IR_SPI is not set # CONFIG_IR_STREAMZAP is not set # CONFIG_IR_IGORPLUGUSB is not set # CONFIG_IR_IGUANA is not set # CONFIG_IR_TTUSBIR is not set # CONFIG_RC_LOOPBACK is not set # CONFIG_IR_GPIO_CIR is not set # CONFIG_IR_GPIO_TX is not set # CONFIG_IR_PWM_TX is not set # CONFIG_IR_SUNXI is not set CONFIG_IR_RX_SUNXI=y CONFIG_IR_TX_SUNXI=y # CONFIG_IR_SERIAL is not set # CONFIG_IR_SIR is not set # CONFIG_RC_XBOX_DVD is not set CONFIG_MEDIA_SUPPORT=y # # Multimedia core support # CONFIG_MEDIA_CAMERA_SUPPORT=y # CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set # CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set # CONFIG_MEDIA_RADIO_SUPPORT is not set # CONFIG_MEDIA_SDR_SUPPORT is not set # CONFIG_MEDIA_CEC_SUPPORT is not set CONFIG_MEDIA_CONTROLLER=y CONFIG_VIDEO_DEV=y # CONFIG_VIDEO_V4L2_SUBDEV_API is not set CONFIG_VIDEO_V4L2=y CONFIG_VIDEO_V4L2_I2C=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set # # Media drivers # # CONFIG_MEDIA_USB_SUPPORT is not set CONFIG_V4L_PLATFORM_DRIVERS=y # CONFIG_VIDEO_CADENCE is not set # CONFIG_VIDEO_ASPEED is not set # CONFIG_VIDEO_SUNXI_TVD is not set # CONFIG_SUNXI_PLATFORM_DRIVERS is not set # CONFIG_V4L_MEM2MEM_DRIVERS is not set # CONFIG_V4L_TEST_DRIVERS is not set # # Supported MMC/SDIO adapters # # CONFIG_CYPRESS_FIRMWARE is not set CONFIG_VIDEOBUF2_CORE=y CONFIG_VIDEOBUF2_V4L2=y # # Media ancillary drivers (tuners, sensors, i2c, spi, frontends) # CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # CONFIG_VIDEO_IR_I2C is not set # # I2C Encoders, decoders, sensors and other helper chips # # # Audio decoders, processors and mixers # # CONFIG_VIDEO_TVAUDIO is not set # CONFIG_VIDEO_TDA7432 is not set # CONFIG_VIDEO_TDA9840 is not set # CONFIG_VIDEO_TEA6415C is not set # CONFIG_VIDEO_TEA6420 is not set # CONFIG_VIDEO_MSP3400 is not set # CONFIG_VIDEO_CS3308 is not set # CONFIG_VIDEO_CS5345 is not set # CONFIG_VIDEO_CS53L32A is not set # CONFIG_VIDEO_TLV320AIC23B is not set # CONFIG_VIDEO_UDA1342 is not set # CONFIG_VIDEO_WM8775 is not set # CONFIG_VIDEO_WM8739 is not set # CONFIG_VIDEO_VP27SMPX is not set # CONFIG_VIDEO_SONY_BTF_MPX is not set # # RDS decoders # # CONFIG_VIDEO_SAA6588 is not set # # Video decoders # # CONFIG_VIDEO_ADV7183 is not set # CONFIG_VIDEO_BT819 is not set # CONFIG_VIDEO_BT856 is not set # CONFIG_VIDEO_BT866 is not set # CONFIG_VIDEO_KS0127 is not set # CONFIG_VIDEO_ML86V7667 is not set # CONFIG_VIDEO_SAA7110 is not set # CONFIG_VIDEO_SAA711X is not set # CONFIG_VIDEO_TVP514X is not set # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set # CONFIG_VIDEO_TW2804 is not set # CONFIG_VIDEO_TW9903 is not set # CONFIG_VIDEO_TW9906 is not set # CONFIG_VIDEO_TW9910 is not set # CONFIG_VIDEO_VPX3220 is not set # # Video and audio decoders # # CONFIG_VIDEO_SAA717X is not set # CONFIG_VIDEO_CX25840 is not set # # Video encoders # # CONFIG_VIDEO_SAA7127 is not set # CONFIG_VIDEO_SAA7185 is not set # CONFIG_VIDEO_ADV7170 is not set # CONFIG_VIDEO_ADV7175 is not set # CONFIG_VIDEO_ADV7343 is not set # CONFIG_VIDEO_ADV7393 is not set # CONFIG_VIDEO_AK881X is not set # CONFIG_VIDEO_THS8200 is not set # # Camera sensor devices # # CONFIG_VIDEO_OV2640 is not set # CONFIG_VIDEO_OV2659 is not set # CONFIG_VIDEO_OV2680 is not set # CONFIG_VIDEO_OV2685 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV5695 is not set # CONFIG_VIDEO_OV772X is not set # CONFIG_VIDEO_OV7640 is not set # CONFIG_VIDEO_OV7670 is not set # CONFIG_VIDEO_OV7740 is not set # CONFIG_VIDEO_OV9640 is not set # CONFIG_VIDEO_VS6624 is not set # CONFIG_VIDEO_MT9M111 is not set # CONFIG_VIDEO_MT9T112 is not set # CONFIG_VIDEO_MT9V011 is not set # CONFIG_VIDEO_MT9V111 is not set # CONFIG_VIDEO_SR030PC30 is not set # CONFIG_VIDEO_RJ54N1 is not set # # Lens drivers # # CONFIG_VIDEO_AD5820 is not set # # Flash devices # # CONFIG_VIDEO_ADP1653 is not set # CONFIG_VIDEO_LM3560 is not set # CONFIG_VIDEO_LM3646 is not set # # Video improvement chips # # CONFIG_VIDEO_UPD64031A is not set # CONFIG_VIDEO_UPD64083 is not set # # Audio/Video compression chips # # CONFIG_VIDEO_SAA6752HS is not set # # SDR tuner chips # # # Miscellaneous helper chips # # CONFIG_VIDEO_THS7303 is not set # CONFIG_VIDEO_M52790 is not set # CONFIG_VIDEO_I2C is not set # end of I2C Encoders, decoders, sensors and other helper chips # # SPI helper chips # # end of SPI helper chips # # Media SPI Adapters # # end of Media SPI Adapters # # Customise DVB Frontends # # # Tools to develop new frontends # # end of Customise DVB Frontends CONFIG_VIDEO_ENCODER_DECODER_SUNXI=y # CONFIG_VIDEO_GOOGLE_DECODER_SUNXI is not set # # Graphics support # # CONFIG_DRM is not set # CONFIG_DRM_DP_CEC is not set # # ARM devices # # end of ARM devices # # ACP (Audio CoProcessor) Configuration # # end of ACP (Audio CoProcessor) Configuration # # Frame buffer Devices # CONFIG_FB_CMDLINE=y CONFIG_FB=y # CONFIG_FIRMWARE_EDID is not set # CONFIG_FB_FOREIGN_ENDIAN is not set # CONFIG_FB_MODE_HELPERS is not set # CONFIG_FB_TILEBLITTING is not set # # Frame buffer hardware drivers # # CONFIG_FB_OPENCORES is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_SMSCUFX is not set # CONFIG_FB_UDL is not set # CONFIG_FB_IBM_GXT4500 is not set # CONFIG_FB_VIRTUAL is not set # CONFIG_FB_METRONOME is not set # CONFIG_FB_SIMPLE is not set # CONFIG_FB_SSD1307 is not set # # Video support for sunxi # # CONFIG_FB_CONSOLE_SUNXI is not set CONFIG_DISP2_SUNXI=y CONFIG_SUNXI_DISP2_FB_DISABLE_ROTATE=y # CONFIG_SUNXI_DISP2_FB_ROTATION_SUPPORT is not set # CONFIG_SUNXI_DISP2_FB_DECOMPRESS_LZMA is not set # CONFIG_HDMI_DISP2_SUNXI is not set CONFIG_HDMI2_DISP2_SUNXI=y CONFIG_AW_PHY=y # CONFIG_DEFAULT_PHY is not set # CONFIG_HDMI_EP952_DISP2_SUNXI is not set CONFIG_HDMI2_HDCP_SUNXI=y # CONFIG_HDMI2_HDCP22_SUNXI is not set CONFIG_HDMI2_CEC_SUNXI=y # CONFIG_HDMI2_CEC_USER is not set # CONFIG_HDMI2_FREQ_SPREAD_SPECTRUM is not set # CONFIG_TV_DISP2_SUNXI is not set # CONFIG_VDPO_DISP2_SUNXI is not set # CONFIG_EDP_DISP2_SUNXI is not set # CONFIG_DISP2_SUNXI_BOOT_COLORBAR is not set CONFIG_DISP2_SUNXI_DEBUG=y # CONFIG_DISP2_SUNXI_COMPOSER is not set # CONFIG_DISP2_LCD_ESD_DETECT is not set # CONFIG_LCD_FB is not set # CONFIG_LCD_FB_ENABLE_DEFERRED_IO is not set # # LCD panels select # # CONFIG_LCD_SUPPORT_GG1P4062UTSW is not set # CONFIG_LCD_SUPPORT_DX0960BE40A1 is not set # CONFIG_LCD_SUPPORT_TFT720X1280 is not set # CONFIG_LCD_SUPPORT_FD055HD003S is not set CONFIG_LCD_SUPPORT_HE0801A068=y # CONFIG_LCD_SUPPORT_ILI9341 is not set # CONFIG_LCD_SUPPORT_LH219WQ1 is not set # CONFIG_LCD_SUPPORT_LS029B3SX02 is not set # CONFIG_LCD_SUPPORT_LT070ME05000 is not set # CONFIG_LCD_SUPPORT_S6D7AA0X01 is not set # CONFIG_LCD_SUPPORT_T27P06 is not set # CONFIG_LCD_SUPPORT_TFT720x1280 is not set # CONFIG_LCD_SUPPORT_WTQ05027D01 is not set # CONFIG_LCD_SUPPORT_H245QBN02 is not set # CONFIG_LCD_SUPPORT_ST7789V is not set # CONFIG_LCD_SUPPORT_ST7796S is not set # CONFIG_LCD_SUPPORT_ST7701S is not set # CONFIG_LCD_SUPPORT_T30P106 is not set # CONFIG_LCD_SUPPORT_TO20T20000 is not set # CONFIG_LCD_SUPPORT_FRD450H40014 is not set # CONFIG_LCD_SUPPORT_S2003T46G is not set CONFIG_LCD_SUPPORT_WILLIAMLCD=y CONFIG_LCD_SUPPORT_LQ101R1SX03=y CONFIG_LCD_SUPPORT_INET_DSI_PANEL=y # CONFIG_LCD_SUPPORT_WTL096601G03 is not set # CONFIG_LCD_SUPPORT_RT13QV005D is not set # CONFIG_LCD_SUPPORT_ST7789V_CPU is not set CONFIG_LCD_SUPPORT_CC08021801_310_800X1280=y # CONFIG_LCD_SUPPORT_JD9366AB_3 is not set # CONFIG_LCD_SUPPORT_TFT08006 is not set CONFIG_LCD_SUPPORT_BP101WX1_206=y CONFIG_LCD_SUPPORT_FX070=y CONFIG_LCD_SUPPORT_K101IM2QA04=y CONFIG_LCD_SUPPORT_K101_IM2BYL02_L_800X1280=y CONFIG_LCD_SUPPORT_K080_IM2HYL802R_800X1280=y # CONFIG_LCD_SUPPORT_NT35510_MIPI is not set # CONFIG_LCD_SUPPORT_ST7701S_3SPI is not set # CONFIG_LCD_SUPPORT_D395T9375V0 is not set # end of LCD panels select # # Display engine feature select # CONFIG_DISP2_SUNXI_SUPPORT_SMBL=y CONFIG_DISP2_SUNXI_SUPPORT_ENAHNCE=y CONFIG_DISP2_SUNXI_DEVICE_OFF_ON_RELEASE=y # end of Display engine feature select # end of Video support for sunxi # end of Frame buffer Devices # # Backlight & LCD device support # # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_GENERIC=y # CONFIG_BACKLIGHT_PWM is not set # CONFIG_BACKLIGHT_PM8941_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set # CONFIG_BACKLIGHT_ARCXCNN is not set # end of Backlight & LCD device support # # Console display driver support # CONFIG_VGA_CONSOLE=y # CONFIG_VGACON_SOFT_SCROLLBACK is not set CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 # CONFIG_FRAMEBUFFER_CONSOLE is not set # end of Console display driver support # CONFIG_LOGO is not set # end of Graphics support CONFIG_SOUND=y CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y CONFIG_SND_DMAENGINE_PCM=y CONFIG_SND_HWDEP=y CONFIG_SND_RAWMIDI=y CONFIG_SND_JACK=y CONFIG_SND_JACK_INPUT_DEV=y # CONFIG_SND_MIXER_OSS is not set CONFIG_SND_PCM_TIMER=y CONFIG_SND_HRTIMER=y CONFIG_SND_DYNAMIC_MINORS=y CONFIG_SND_MAX_CARDS=32 # CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set # CONFIG_SND_SEQUENCER is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set # CONFIG_SND_ALOOP is not set # CONFIG_SND_MTPAV is not set # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_MPU401 is not set # # HD-Audio # # end of HD-Audio CONFIG_SND_HDA_PREALLOC_SIZE=64 # CONFIG_SND_SPI is not set CONFIG_SND_USB=y CONFIG_SND_USB_AUDIO=y CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y # CONFIG_SND_USB_UA101 is not set # CONFIG_SND_USB_CAIAQ is not set # CONFIG_SND_USB_6FIRE is not set # CONFIG_SND_USB_HIFACE is not set # CONFIG_SND_BCD2000 is not set # CONFIG_SND_USB_POD is not set # CONFIG_SND_USB_PODHD is not set # CONFIG_SND_USB_TONEPORT is not set # CONFIG_SND_USB_VARIAX is not set CONFIG_SND_SOC=y CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_AMD_ACP is not set # CONFIG_SND_ATMEL_SOC is not set # CONFIG_SND_DESIGNWARE_I2S is not set # # SoC Audio for Freescale CPUs # # # Common SoC Audio options for Freescale CPUs: # # CONFIG_SND_SOC_FSL_ASRC is not set # CONFIG_SND_SOC_FSL_SAI is not set # CONFIG_SND_SOC_FSL_AUDMIX is not set # CONFIG_SND_SOC_FSL_SSI is not set # CONFIG_SND_SOC_FSL_SPDIF is not set # CONFIG_SND_SOC_FSL_ESAI is not set # CONFIG_SND_SOC_FSL_MICFIL is not set # CONFIG_SND_SOC_IMX_AUDMUX is not set # end of SoC Audio for Freescale CPUs # CONFIG_SND_I2S_HI6210_I2S is not set # CONFIG_SND_I2S_HI3660_I2S is not set # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # # STMicroelectronics STM32 SOC audio support # # end of STMicroelectronics STM32 SOC audio support CONFIG_SND_SUNXI_SOC=y CONFIG_SND_SUNXI_SOC_CPUDAI=y CONFIG_SND_SUN20IW1_CODEC=y # # Allwinner SoC Audio support # CONFIG_SND_SUNXI_SOC_SUN20IW1_CODEC=y CONFIG_SND_SUNXI_SOC_SIMPLE_CARD=y CONFIG_SND_SUNXI_SOC_DAUDIO=y # CONFIG_SND_SUNXI_SOC_DAUDIO_ASRC is not set CONFIG_SND_SUNXI_SOC_SUNXI_HDMIAUDIO=y # CONFIG_SND_SUNXI_SOC_SPDIF is not set CONFIG_SND_SUNXI_SOC_DMIC=y # CONFIG_SUNXI_AUDIO_DEBUG is not set # CONFIG_SUNXI_RX_SYNC is not set # end of Allwinner SoC Audio support CONFIG_SND_SUNXI_RPAF=y CONFIG_SND_SUNXI_MISC_HIFI_DSP=y CONFIG_SND_SUNXI_HIFI=y # CONFIG_SND_SUNXI_HIFI_CODEC is not set # CONFIG_SND_SUNXI_HIFI_DAUDIO is not set # CONFIG_SND_SUNXI_HIFI_DMIC is not set # # Allwinner SoC Audio support V2 # # CONFIG_SND_SOC_SUNXI_SPDIF is not set # CONFIG_SND_SOC_SUNXI_DMIC is not set # CONFIG_SND_SOC_SUNXI_DAUDIO is not set # CONFIG_SND_SOC_SUNXI_COMPONENTS is not set # end of Allwinner SoC Audio support V2 # CONFIG_SND_SOC_XILINX_I2S is not set # CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set # CONFIG_SND_SOC_XILINX_SPDIF is not set # CONFIG_SND_SOC_XTFPGA_I2S is not set # CONFIG_ZX_TDM is not set CONFIG_SND_SOC_I2C_AND_SPI=y # # CODEC drivers # # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set # CONFIG_SND_SOC_ADAU7002 is not set # CONFIG_SND_SOC_AK4104 is not set # CONFIG_SND_SOC_AK4118 is not set # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set # CONFIG_SND_SOC_ALC5623 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CS35L32 is not set # CONFIG_SND_SOC_CS35L33 is not set # CONFIG_SND_SOC_CS35L34 is not set # CONFIG_SND_SOC_CS35L35 is not set # CONFIG_SND_SOC_CS35L36 is not set # CONFIG_SND_SOC_CS42L42 is not set # CONFIG_SND_SOC_CS42L51_I2C is not set # CONFIG_SND_SOC_CS42L52 is not set # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set # CONFIG_SND_SOC_CS4271_I2C is not set # CONFIG_SND_SOC_CS4271_SPI is not set # CONFIG_SND_SOC_CS42XX8_I2C is not set # CONFIG_SND_SOC_CS43130 is not set # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set # CONFIG_SND_SOC_CX2072X is not set CONFIG_SND_SOC_DMIC=y # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set # CONFIG_SND_SOC_ES8316 is not set # CONFIG_SND_SOC_ES8328_I2C is not set # CONFIG_SND_SOC_ES8328_SPI is not set # CONFIG_SND_SOC_GTM601 is not set # CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98357A is not set # CONFIG_SND_SOC_MAX98504 is not set # CONFIG_SND_SOC_MAX9867 is not set # CONFIG_SND_SOC_MAX98927 is not set # CONFIG_SND_SOC_MAX98373 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set # CONFIG_SND_SOC_PCM1681 is not set # CONFIG_SND_SOC_PCM1789_I2C is not set # CONFIG_SND_SOC_PCM179X_I2C is not set # CONFIG_SND_SOC_PCM179X_SPI is not set # CONFIG_SND_SOC_PCM186X_I2C is not set # CONFIG_SND_SOC_PCM186X_SPI is not set # CONFIG_SND_SOC_PCM3060_I2C is not set # CONFIG_SND_SOC_PCM3060_SPI is not set # CONFIG_SND_SOC_PCM3168A_I2C is not set # CONFIG_SND_SOC_PCM3168A_SPI is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set # CONFIG_SND_SOC_SPDIF is not set # CONFIG_SND_SOC_SSM2305 is not set # CONFIG_SND_SOC_SSM2602_SPI is not set # CONFIG_SND_SOC_SSM2602_I2C is not set # CONFIG_SND_SOC_SSM4567 is not set # CONFIG_SND_SOC_STA32X is not set # CONFIG_SND_SOC_STA350 is not set # CONFIG_SND_SOC_STI_SAS is not set # CONFIG_SND_SOC_TAS2552 is not set # CONFIG_SND_SOC_TAS5086 is not set # CONFIG_SND_SOC_TAS571X is not set # CONFIG_SND_SOC_TAS5720 is not set # CONFIG_SND_SOC_TAS6424 is not set # CONFIG_SND_SOC_TDA7419 is not set # CONFIG_SND_SOC_TFA9879 is not set # CONFIG_SND_SOC_TLV320AIC23_I2C is not set # CONFIG_SND_SOC_TLV320AIC23_SPI is not set # CONFIG_SND_SOC_TLV320AIC31XX is not set # CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set # CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set # CONFIG_SND_SOC_TLV320AIC3X is not set # CONFIG_SND_SOC_TS3A227E is not set # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set # CONFIG_SND_SOC_WM8580 is not set # CONFIG_SND_SOC_WM8711 is not set # CONFIG_SND_SOC_WM8728 is not set # CONFIG_SND_SOC_WM8731 is not set # CONFIG_SND_SOC_WM8737 is not set # CONFIG_SND_SOC_WM8741 is not set # CONFIG_SND_SOC_WM8750 is not set # CONFIG_SND_SOC_WM8753 is not set # CONFIG_SND_SOC_WM8770 is not set # CONFIG_SND_SOC_WM8776 is not set # CONFIG_SND_SOC_WM8782 is not set # CONFIG_SND_SOC_WM8804_I2C is not set # CONFIG_SND_SOC_WM8804_SPI is not set # CONFIG_SND_SOC_WM8903 is not set # CONFIG_SND_SOC_WM8904 is not set # CONFIG_SND_SOC_WM8960 is not set # CONFIG_SND_SOC_WM8962 is not set # CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_WM8978 is not set # CONFIG_SND_SOC_WM8985 is not set # CONFIG_SND_SOC_ZX_AUD96P22 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_NAU8540 is not set # CONFIG_SND_SOC_NAU8810 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_AC107 is not set # CONFIG_SND_SOC_AC108 is not set # CONFIG_SND_SOC_TD100 is not set # end of CODEC drivers CONFIG_SND_SIMPLE_CARD_UTILS=y # CONFIG_SND_SIMPLE_CARD is not set # CONFIG_SND_AUDIO_GRAPH_CARD is not set # # HID support # CONFIG_HID=y # CONFIG_HID_BATTERY_STRENGTH is not set # CONFIG_HIDRAW is not set # CONFIG_UHID is not set CONFIG_HID_GENERIC=y # # Special HID drivers # # CONFIG_HID_A4TECH is not set # CONFIG_HID_ACCUTOUCH is not set # CONFIG_HID_ACRUX is not set # CONFIG_HID_APPLE is not set # CONFIG_HID_APPLEIR is not set # CONFIG_HID_ASUS is not set # CONFIG_HID_AUREAL is not set # CONFIG_HID_BELKIN is not set # CONFIG_HID_BETOP_FF is not set # CONFIG_HID_BIGBEN_FF is not set # CONFIG_HID_CHERRY is not set # CONFIG_HID_CHICONY is not set # CONFIG_HID_CORSAIR is not set # CONFIG_HID_COUGAR is not set # CONFIG_HID_MACALLY is not set # CONFIG_HID_PRODIKEYS is not set # CONFIG_HID_CMEDIA is not set # CONFIG_HID_CREATIVE_SB0540 is not set # CONFIG_HID_CYPRESS is not set # CONFIG_HID_DRAGONRISE is not set # CONFIG_HID_EMS_FF is not set # CONFIG_HID_ELAN is not set # CONFIG_HID_ELECOM is not set # CONFIG_HID_ELO is not set # CONFIG_HID_EZKEY is not set # CONFIG_HID_GEMBIRD is not set # CONFIG_HID_GFRM is not set # CONFIG_HID_HOLTEK is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set # CONFIG_HID_KYE is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set # CONFIG_HID_GYRATION is not set # CONFIG_HID_ICADE is not set # CONFIG_HID_ITE is not set # CONFIG_HID_JABRA is not set # CONFIG_HID_TWINHAN is not set # CONFIG_HID_KENSINGTON is not set # CONFIG_HID_LCPOWER is not set # CONFIG_HID_LED is not set # CONFIG_HID_LENOVO is not set # CONFIG_HID_LOGITECH is not set # CONFIG_HID_MAGICMOUSE is not set # CONFIG_HID_MALTRON is not set # CONFIG_HID_MAYFLASH is not set # CONFIG_HID_REDRAGON is not set # CONFIG_HID_MICROSOFT is not set # CONFIG_HID_MONTEREY is not set # CONFIG_HID_MULTITOUCH is not set # CONFIG_HID_NINTENDO is not set # CONFIG_HID_NTI is not set # CONFIG_HID_NTRIG is not set # CONFIG_HID_ORTEK is not set # CONFIG_HID_PANTHERLORD is not set # CONFIG_HID_PENMOUNT is not set # CONFIG_HID_PETALYNX is not set # CONFIG_HID_PICOLCD is not set # CONFIG_HID_PLANTRONICS is not set # CONFIG_HID_PRIMAX is not set # CONFIG_HID_RETRODE is not set # CONFIG_HID_ROCCAT is not set # CONFIG_HID_SAITEK is not set # CONFIG_HID_SAMSUNG is not set # CONFIG_HID_SONY is not set # CONFIG_HID_SPEEDLINK is not set # CONFIG_HID_STEAM is not set # CONFIG_HID_STEELSERIES is not set # CONFIG_HID_SUNPLUS is not set # CONFIG_HID_RMI is not set # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set # CONFIG_HID_TIVO is not set # CONFIG_HID_TOPSEED is not set # CONFIG_HID_THINGM is not set # CONFIG_HID_THRUSTMASTER is not set # CONFIG_HID_UDRAW_PS3 is not set # CONFIG_HID_WACOM is not set # CONFIG_HID_WIIMOTE is not set # CONFIG_HID_XINMO is not set # CONFIG_HID_ZEROPLUS is not set # CONFIG_HID_ZYDACRON is not set # CONFIG_HID_SENSOR_HUB is not set # CONFIG_HID_ALPS is not set # end of Special HID drivers # # USB HID support # CONFIG_USB_HID=y # CONFIG_HID_PID is not set # CONFIG_USB_HIDDEV is not set # end of USB HID support # # I2C HID support # # CONFIG_I2C_HID is not set # end of I2C HID support # end of HID support CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y # CONFIG_USB_LED_TRIG is not set # CONFIG_USB_ULPI_BUS is not set # CONFIG_USB_CONN_GPIO is not set CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # # Miscellaneous USB options # CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_OTG is not set # CONFIG_USB_OTG_WHITELIST is not set # CONFIG_USB_OTG_BLACKLIST_HUB is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_MON is not set # # USB Host Controller Drivers # # CONFIG_USB_C67X00_HCD is not set # CONFIG_USB_XHCI_HCD is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y # CONFIG_USB_EHCI_FSL is not set CONFIG_USB_EHCI_HCD_SUNXI=y # CONFIG_USB_EHCI_HCD_PLATFORM is not set # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_FOTG210_HCD is not set # CONFIG_USB_MAX3421_HCD is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_SUNXI=y # CONFIG_USB_OHCI_HCD_PLATFORM is not set # CONFIG_USB_SL811_HCD is not set # CONFIG_USB_R8A66597_HCD is not set # CONFIG_USB_HCD_TEST_MODE is not set CONFIG_USB_SUNXI_HCD=y CONFIG_USB_SUNXI_HCI=y CONFIG_USB_SUNXI_EHCI0=y CONFIG_USB_SUNXI_EHCI1=y CONFIG_USB_SUNXI_OHCI0=y CONFIG_USB_SUNXI_OHCI1=y # # USB Device Class drivers # # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set # CONFIG_USB_WDM is not set # CONFIG_USB_TMC is not set # # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # # also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set CONFIG_USB_STORAGE_REALTEK=y CONFIG_REALTEK_AUTOPM=y CONFIG_USB_STORAGE_DATAFAB=y CONFIG_USB_STORAGE_FREECOM=y CONFIG_USB_STORAGE_ISD200=y CONFIG_USB_STORAGE_USBAT=y CONFIG_USB_STORAGE_SDDR09=y CONFIG_USB_STORAGE_SDDR55=y CONFIG_USB_STORAGE_JUMPSHOT=y CONFIG_USB_STORAGE_ALAUDA=y CONFIG_USB_STORAGE_ONETOUCH=y CONFIG_USB_STORAGE_KARMA=y CONFIG_USB_STORAGE_CYPRESS_ATACB=y CONFIG_USB_STORAGE_ENE_UB6250=y CONFIG_USB_UAS=y # # USB Imaging devices # # CONFIG_USB_MDC800 is not set # CONFIG_USB_MICROTEK is not set # CONFIG_USBIP_CORE is not set # CONFIG_USB_CDNS3 is not set # CONFIG_USB_MUSB_HDRC is not set # CONFIG_USB_DWC3 is not set # CONFIG_USB_DWC2 is not set # CONFIG_USB_CHIPIDEA is not set # CONFIG_USB_ISP1760 is not set # # USB port drivers # # CONFIG_USB_SERIAL is not set # # USB Miscellaneous drivers # # CONFIG_USB_EMI62 is not set # CONFIG_USB_EMI26 is not set # CONFIG_USB_ADUTUX is not set # CONFIG_USB_SEVSEG is not set # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set # CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set # CONFIG_USB_IDMOUSE is not set # CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set # CONFIG_USB_EHSET_TEST_FIXTURE is not set # CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_YUREX is not set # CONFIG_USB_EZUSB_FX2 is not set # CONFIG_USB_HUB_USB251XB is not set # CONFIG_USB_HSIC_USB3503 is not set # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # # USB Physical Layer drivers # # CONFIG_NOP_USB_XCEIV is not set # CONFIG_USB_GPIO_VBUS is not set # CONFIG_USB_ISP1301 is not set # end of USB Physical Layer drivers CONFIG_USB_GADGET=y # CONFIG_USB_GADGET_DEBUG is not set # CONFIG_USB_GADGET_DEBUG_FILES is not set # CONFIG_USB_GADGET_DEBUG_FS is not set CONFIG_USB_GADGET_VBUS_DRAW=2 CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 # CONFIG_U_SERIAL_CONSOLE is not set # # USB Peripheral Controller # # CONFIG_USB_FOTG210_UDC is not set # CONFIG_USB_GR_UDC is not set # CONFIG_USB_R8A66597 is not set # CONFIG_USB_PXA27X is not set # CONFIG_USB_MV_UDC is not set # CONFIG_USB_MV_U3D is not set # CONFIG_USB_SNP_UDC_PLAT is not set # CONFIG_USB_M66592 is not set # CONFIG_USB_BDC_UDC is not set # CONFIG_USB_NET2272 is not set CONFIG_USB_SUNXI_UDC0=y # CONFIG_USB_GADGET_XILINX is not set # CONFIG_USB_DUMMY_HCD is not set # end of USB Peripheral Controller CONFIG_USB_LIBCOMPOSITE=y CONFIG_USB_U_SERIAL=y CONFIG_USB_U_AUDIO=y CONFIG_USB_F_SERIAL=y CONFIG_USB_F_MASS_STORAGE=y CONFIG_USB_F_FS=y CONFIG_USB_F_UAC1=y CONFIG_USB_F_HID=y CONFIG_USB_CONFIGFS=y CONFIG_USB_CONFIGFS_UEVENT=y CONFIG_USB_CONFIGFS_SERIAL=y # CONFIG_USB_CONFIGFS_ACM is not set # CONFIG_USB_CONFIGFS_OBEX is not set # CONFIG_USB_CONFIGFS_NCM is not set # CONFIG_USB_CONFIGFS_ECM is not set # CONFIG_USB_CONFIGFS_ECM_SUBSET is not set # CONFIG_USB_CONFIGFS_RNDIS is not set # CONFIG_USB_CONFIGFS_EEM is not set CONFIG_USB_CONFIGFS_MASS_STORAGE=y # CONFIG_USB_CONFIGFS_F_LB_SS is not set CONFIG_USB_CONFIGFS_F_FS=y # CONFIG_USB_CONFIGFS_F_ACC is not set # CONFIG_USB_CONFIGFS_F_AUDIO_SRC is not set CONFIG_USB_CONFIGFS_F_UAC1=y # CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set # CONFIG_USB_CONFIGFS_F_UAC2 is not set # CONFIG_USB_CONFIGFS_F_MIDI is not set CONFIG_USB_CONFIGFS_F_HID=y # CONFIG_USB_CONFIGFS_F_UVC is not set # CONFIG_USB_CONFIGFS_F_PRINTER is not set CONFIG_USB_SUNXI_USB=y CONFIG_USB_SUNXI_USB_MANAGER=y CONFIG_USB_SUNXI_USB_DEBUG=y CONFIG_USB_SUNXI_USB_ADB=y # CONFIG_TYPEC is not set CONFIG_USB_ROLE_SWITCH=y CONFIG_MMC=y CONFIG_PWRSEQ_EMMC=y CONFIG_PWRSEQ_SIMPLE=y CONFIG_MMC_BLOCK=y CONFIG_MMC_BLOCK_MINORS=8 # CONFIG_SDIO_UART is not set # CONFIG_MMC_TEST is not set # # MMC/SD/SDIO Host Controller Drivers # # CONFIG_MMC_DEBUG is not set # CONFIG_MMC_SDHCI is not set # CONFIG_MMC_SPI is not set # CONFIG_MMC_VUB300 is not set # CONFIG_MMC_USHC is not set # CONFIG_MMC_USDHI6ROL0 is not set CONFIG_MMC_SUNXI=y CONFIG_MMC_SUNXI_V4P1X=y CONFIG_MMC_SUNXI_V4P00X=y CONFIG_MMC_SUNXI_V4P10X=y CONFIG_MMC_SUNXI_V4P5X=y CONFIG_MMC_SUNXI_V5P3X=y # CONFIG_MMC_CQHCI is not set # CONFIG_MMC_HSQ is not set # CONFIG_MMC_MTK is not set # CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y # CONFIG_LEDS_CLASS_FLASH is not set # CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set # # LED drivers # # CONFIG_LEDS_AN30259A is not set # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_CR0014114 is not set # CONFIG_LEDS_LM3530 is not set # CONFIG_LEDS_LM3532 is not set # CONFIG_LEDS_LM3642 is not set # CONFIG_LEDS_LM3692X is not set # CONFIG_LEDS_PCA9532 is not set # CONFIG_LEDS_GPIO is not set # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_LP3952 is not set # CONFIG_LEDS_LP5521 is not set # CONFIG_LEDS_LP5523 is not set # CONFIG_LEDS_LP5562 is not set # CONFIG_LEDS_LP8501 is not set # CONFIG_LEDS_LP8860 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_DAC124S085 is not set # CONFIG_LEDS_PWM is not set # CONFIG_LEDS_REGULATOR is not set # CONFIG_LEDS_BD2802 is not set # CONFIG_LEDS_LT3593 is not set # CONFIG_LEDS_TCA6507 is not set # CONFIG_LEDS_TLC591XX is not set # CONFIG_LEDS_LM355x is not set # CONFIG_LEDS_IS31FL319X is not set # CONFIG_LEDS_IS31FL32XX is not set # # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) # # CONFIG_LEDS_BLINKM is not set # CONFIG_LEDS_MLXREG is not set # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_TI_LMU_COMMON is not set CONFIG_LEDS_SUNXI=y # CONFIG_MATRIX_LEDS_SUNXI is not set # # LED Triggers # CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y # CONFIG_LEDS_TRIGGER_ONESHOT is not set # CONFIG_LEDS_TRIGGER_MTD is not set # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set # CONFIG_LEDS_TRIGGER_CPU is not set # CONFIG_LEDS_TRIGGER_ACTIVITY is not set # CONFIG_LEDS_TRIGGER_GPIO is not set # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set # # iptables trigger is under Netfilter config (LED target) # # CONFIG_LEDS_TRIGGER_TRANSIENT is not set # CONFIG_LEDS_TRIGGER_CAMERA is not set # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set # CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set CONFIG_EDAC_SUPPORT=y CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y CONFIG_RTC_HCTOSYS_DEVICE="rtc0" CONFIG_RTC_SYSTOHC=y CONFIG_RTC_SYSTOHC_DEVICE="rtc0" # CONFIG_RTC_DEBUG is not set CONFIG_RTC_NVMEM=y # # RTC interfaces # CONFIG_RTC_INTF_SYSFS=y CONFIG_RTC_INTF_PROC=y CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set # CONFIG_RTC_DRV_TEST is not set # # I2C RTC drivers # # CONFIG_RTC_DRV_ABB5ZES3 is not set # CONFIG_RTC_DRV_ABEOZ9 is not set # CONFIG_RTC_DRV_ABX80X is not set # CONFIG_RTC_DRV_DS1307 is not set # CONFIG_RTC_DRV_DS1374 is not set # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_ISL12026 is not set # CONFIG_RTC_DRV_X1205 is not set # CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF85063 is not set # CONFIG_RTC_DRV_PCF85363 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set # CONFIG_RTC_DRV_BQ32K is not set # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set # CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV8803 is not set # CONFIG_RTC_DRV_SD3078 is not set # # SPI RTC drivers # # CONFIG_RTC_DRV_M41T93 is not set # CONFIG_RTC_DRV_M41T94 is not set # CONFIG_RTC_DRV_DS1302 is not set # CONFIG_RTC_DRV_DS1305 is not set # CONFIG_RTC_DRV_DS1343 is not set # CONFIG_RTC_DRV_DS1347 is not set # CONFIG_RTC_DRV_DS1390 is not set # CONFIG_RTC_DRV_MAX6916 is not set # CONFIG_RTC_DRV_R9701 is not set # CONFIG_RTC_DRV_RX4581 is not set # CONFIG_RTC_DRV_RX6110 is not set # CONFIG_RTC_DRV_RS5C348 is not set # CONFIG_RTC_DRV_MAX6902 is not set # CONFIG_RTC_DRV_PCF2123 is not set # CONFIG_RTC_DRV_MCP795 is not set CONFIG_RTC_I2C_AND_SPI=y # # SPI and I2C RTC drivers # # CONFIG_RTC_DRV_DS3232 is not set # CONFIG_RTC_DRV_PCF2127 is not set # CONFIG_RTC_DRV_RV3029C2 is not set # # Platform RTC drivers # # CONFIG_RTC_DRV_DS1286 is not set # CONFIG_RTC_DRV_DS1511 is not set # CONFIG_RTC_DRV_DS1553 is not set # CONFIG_RTC_DRV_DS1685_FAMILY is not set # CONFIG_RTC_DRV_DS1742 is not set # CONFIG_RTC_DRV_DS2404 is not set # CONFIG_RTC_DRV_STK17TA8 is not set # CONFIG_RTC_DRV_M48T86 is not set # CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set # CONFIG_RTC_DRV_MSM6242 is not set # CONFIG_RTC_DRV_BQ4802 is not set # CONFIG_RTC_DRV_RP5C01 is not set # CONFIG_RTC_DRV_V3020 is not set # CONFIG_RTC_DRV_ZYNQMP is not set # # on-CPU RTC drivers # # CONFIG_RTC_DRV_SUN6I is not set CONFIG_RTC_DRV_SUNXI=y CONFIG_SUNXI_REBOOT_FLAG=y CONFIG_SUNXI_RTC_BOOTCOUNT=y CONFIG_SUNXI_RTC_POWEROFF_ALARM=y # CONFIG_RTC_DRV_CADENCE is not set # CONFIG_RTC_DRV_FTRTC010 is not set # CONFIG_RTC_DRV_SNVS is not set # CONFIG_RTC_DRV_R7301 is not set # # HID Sensor RTC drivers # CONFIG_DMADEVICES=y # CONFIG_DMADEVICES_DEBUG is not set # # DMA Devices # CONFIG_DMA_ENGINE=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DMA_OF=y # CONFIG_ALTERA_MSGDMA is not set CONFIG_DMA_SUN6I=y # CONFIG_DW_AXI_DMAC is not set # CONFIG_FSL_EDMA is not set # CONFIG_INTEL_IDMA64 is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set # CONFIG_DW_DMAC is not set # # DMA Clients # # CONFIG_ASYNC_TX_DMA is not set # CONFIG_DMATEST is not set # # DMABUF options # CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set # CONFIG_UDMABUF is not set # CONFIG_DMABUF_SELFTESTS is not set # end of DMABUF options # CONFIG_AUXDISPLAY is not set # CONFIG_UIO is not set # CONFIG_VFIO is not set # CONFIG_VIRT_DRIVERS is not set CONFIG_VIRTIO=y # CONFIG_VIRTIO_MENU is not set # # Microsoft Hyper-V guest support # # end of Microsoft Hyper-V guest support # CONFIG_GREYBUS is not set CONFIG_STAGING=y # CONFIG_PRISM2_USB is not set # CONFIG_COMEDI is not set # CONFIG_RTLLIB is not set # CONFIG_RTL8723BS is not set # CONFIG_R8712U is not set # CONFIG_R8188EU is not set # CONFIG_VT6656 is not set # # Speakup console speech # # CONFIG_SPEAKUP is not set # end of Speakup console speech # CONFIG_STAGING_MEDIA is not set # # Android # # CONFIG_ASHMEM is not set # CONFIG_ANDROID_TIMED_OUTPUT is not set CONFIG_ION=y CONFIG_ION_SYSTEM_HEAP=y CONFIG_ION_CMA_HEAP=y # end of Android # CONFIG_STAGING_BOARD is not set # CONFIG_LTE_GDM724X is not set # CONFIG_GS_FPGABOOT is not set # CONFIG_UNISYSSPAR is not set # CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set # CONFIG_FB_TFT is not set # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set # CONFIG_MOST is not set # CONFIG_KS7010 is not set # CONFIG_PI433 is not set # # Gasket devices # # end of Gasket devices # CONFIG_XIL_AXIS_FIFO is not set # CONFIG_FIELDBUS_DEV is not set # CONFIG_USB_WUSB_CBAF is not set # CONFIG_UWB is not set # CONFIG_EXFAT_FS is not set CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y # # Common Clock Framework # # CONFIG_COMMON_CLK_DEBUG is not set # CONFIG_CLK_HSDK is not set # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_SI514 is not set # CONFIG_COMMON_CLK_SI544 is not set # CONFIG_COMMON_CLK_SI570 is not set # CONFIG_COMMON_CLK_CDCE706 is not set # CONFIG_COMMON_CLK_CDCE925 is not set # CONFIG_COMMON_CLK_CS2000_CP is not set # CONFIG_COMMON_CLK_PWM is not set # CONFIG_COMMON_CLK_VC5 is not set # CONFIG_COMMON_CLK_FIXED_MMIO is not set # CONFIG_CLK_SIFIVE is not set # CONFIG_CLK_SUNXI is not set CONFIG_SUNXI_CCU=y CONFIG_SUN8IW20_CCU=y CONFIG_SUN8IW20_R_CCU=y # CONFIG_SUN8I_A83T_CCU is not set # CONFIG_SUN8I_DE2_CCU is not set # CONFIG_SUN8I_R_CCU is not set CONFIG_SUNXI_RTC_CCU=y # end of Common Clock Framework # CONFIG_HWSPINLOCK is not set # CONFIG_HWSPINLOCK_SUNXI is not set # # Clock Source drivers # CONFIG_TIMER_OF=y CONFIG_TIMER_PROBE=y CONFIG_CLKSRC_MMIO=y CONFIG_SUN4I_TIMER=y # CONFIG_SUN50I_TIMER is not set # CONFIG_SUNXI_TIMER is not set # CONFIG_SUNXI_TIMER_TEST is not set # CONFIG_MTK_TIMER is not set CONFIG_RISCV_TIMER=y # end of Clock Source drivers # CONFIG_MAILBOX is not set CONFIG_IOMMU_IOVA=y CONFIG_IOMMU_API=y # CONFIG_IOMMU_LIMIT_IOVA_ALIGNMENT is not set CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_IOMMU_DMA=y CONFIG_SUNXI_IOMMU=y CONFIG_SUNXI_IOMMU_DEBUG=y # CONFIG_SUNXI_IOMMU_TESTS is not set # # Remoteproc drivers # # CONFIG_REMOTEPROC is not set # end of Remoteproc drivers # # Rpmsg drivers # CONFIG_RPMSG=y # CONFIG_RPMSG_CHAR is not set CONFIG_RPMSG_SUNXI_AMP=y CONFIG_RPMSG_DSP_STANDBY=y CONFIG_RPMSG_VIRTIO=y # CONFIG_RPMSG_SUNXI_TTY is not set # CONFIG_RPMSG_SUNXI_CLIENT_SAMPLE is not set # end of Rpmsg drivers # # Rpbuf drivers # # CONFIG_RPBUF_DEV is not set # # Service # # CONFIG_RPBUF_SERVICE_RPMSG is not set # # Controller # # CONFIG_RPBUF_CONTROLLER_SUNXI is not set # # Sample # # CONFIG_RPBUF_SAMPLE_SUNXI is not set # end of Rpbuf drivers # CONFIG_SOUNDWIRE is not set # # SOC (System On Chip) specific Drivers # # # Amlogic SoC drivers # # end of Amlogic SoC drivers # # Aspeed SoC drivers # # end of Aspeed SoC drivers # # Broadcom SoC drivers # # end of Broadcom SoC drivers # # NXP/Freescale QorIQ SoC drivers # # end of NXP/Freescale QorIQ SoC drivers # # i.MX SoC drivers # # end of i.MX SoC drivers # # Qualcomm SoC drivers # # end of Qualcomm SoC drivers # CONFIG_SUNXI_SRAM is not set CONFIG_SUNXI_SID=y CONFIG_SUNXI_RISCV_SUSPEND=y # CONFIG_SOC_TI is not set # # Xilinx SoC drivers # # CONFIG_XILINX_VCU is not set # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers # CONFIG_PM_DEVFREQ is not set # CONFIG_EXTCON is not set # CONFIG_MEMORY is not set # CONFIG_IIO is not set CONFIG_PWM=y CONFIG_PWM_SYSFS=y # CONFIG_PWM_FSL_FTM is not set # CONFIG_PWM_PCA9685 is not set # CONFIG_PWM_SIFIVE is not set # CONFIG_PWM_SUN4I is not set CONFIG_PWM_SUNXI_GROUP=y # CONFIG_DSP_DEBUG is not set # # IRQ chip support # CONFIG_IRQCHIP=y # CONFIG_AL_FIC is not set CONFIG_SIFIVE_PLIC=y # CONFIG_SUNXI_WAKEUPGEN is not set # CONFIG_SUN8I_NMI is not set # end of IRQ chip support # CONFIG_IPACK_BUS is not set CONFIG_RESET_CONTROLLER=y CONFIG_RESET_SIMPLE=y CONFIG_RESET_SUNXI=y # CONFIG_RESET_TI_SYSCON is not set # # PHY Subsystem # # CONFIG_GENERIC_PHY is not set # CONFIG_PHY_SUN6I_MIPI_DPHY is not set # CONFIG_PHY_SUN9I_USB is not set # CONFIG_BCM_KONA_USB2_PHY is not set # CONFIG_PHY_CADENCE_DP is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set # CONFIG_PHY_MIXEL_MIPI_DPHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set # CONFIG_MCB is not set # CONFIG_RAS is not set # # Android # CONFIG_ANDROID=y # CONFIG_ANDROID_BINDER_IPC is not set # end of Android # CONFIG_LIBNVDIMM is not set # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y CONFIG_NVMEM_SUNXI_SID=y # # HW tracing support # # CONFIG_STM is not set # CONFIG_INTEL_TH is not set # end of HW tracing support # CONFIG_FPGA is not set # CONFIG_FSI is not set # CONFIG_SIOX is not set # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set # end of Device Drivers # # File systems # # CONFIG_VALIDATE_FS_PARSER is not set CONFIG_FS_IOMAP=y # CONFIG_EXT2_FS is not set # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT2=y # CONFIG_EXT4_FS_POSIX_ACL is not set # CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set # CONFIG_BTRFS_FS is not set # CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set # CONFIG_FS_DAX is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set CONFIG_FILE_LOCKING=y CONFIG_MANDATORY_FILE_LOCKING=y # CONFIG_FS_ENCRYPTION is not set # CONFIG_FS_VERITY is not set CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_FANOTIFY is not set # CONFIG_QUOTA is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_AUTOFS_FS is not set # CONFIG_FUSE_FS is not set CONFIG_OVERLAY_FS=y # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_OVERLAY_FS_INDEX is not set # CONFIG_OVERLAY_FS_XINO_AUTO is not set # CONFIG_OVERLAY_FS_METACOPY is not set # CONFIG_INCREMENTAL_FS is not set # # Caches # # CONFIG_FSCACHE is not set # end of Caches # # CD-ROM/DVD Filesystems # # CONFIG_ISO9660_FS is not set # CONFIG_UDF_FS is not set # end of CD-ROM/DVD Filesystems # # DOS/FAT/NT Filesystems # CONFIG_FAT_FS=y # CONFIG_MSDOS_FS is not set CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_NTFS_FS is not set # end of DOS/FAT/NT Filesystems # # Pseudo filesystems # CONFIG_PROC_FS=y # CONFIG_PROC_KCORE is not set CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_PROC_CHILDREN=y CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_XATTR=y # CONFIG_HUGETLBFS is not set CONFIG_MEMFD_CREATE=y CONFIG_ARCH_HAS_GIGANTIC_PAGE=y CONFIG_CONFIGFS_FS=y # end of Pseudo filesystems CONFIG_MISC_FILESYSTEMS=y # CONFIG_ORANGEFS_FS is not set # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set # CONFIG_JFFS2_FS is not set CONFIG_UBIFS_FS=y # CONFIG_UBIFS_FS_ADVANCED_COMPR is not set CONFIG_UBIFS_FS_LZO=y CONFIG_UBIFS_FS_ZLIB=y CONFIG_UBIFS_FS_ZSTD=y # CONFIG_UBIFS_ATIME_SUPPORT is not set CONFIG_UBIFS_FS_XATTR=y CONFIG_UBIFS_FS_SECURITY=y # CONFIG_UBIFS_FS_AUTHENTICATION is not set # CONFIG_CRAMFS is not set CONFIG_SQUASHFS=y # CONFIG_SQUASHFS_FILE_CACHE is not set CONFIG_SQUASHFS_FILE_DIRECT=y # CONFIG_SQUASHFS_DECOMP_SINGLE is not set # CONFIG_SQUASHFS_DECOMP_MULTI is not set CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y # CONFIG_SQUASHFS_XATTR is not set # CONFIG_SQUASHFS_ZLIB is not set # CONFIG_SQUASHFS_LZ4 is not set # CONFIG_SQUASHFS_LZO is not set CONFIG_SQUASHFS_XZ=y # CONFIG_SQUASHFS_ZSTD is not set # CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set # CONFIG_SQUASHFS_EMBEDDED is not set CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y # CONFIG_NFS_FS is not set # CONFIG_NFSD is not set # CONFIG_CEPH_FS is not set # CONFIG_CIFS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set # CONFIG_NLS_CODEPAGE_850 is not set # CONFIG_NLS_CODEPAGE_852 is not set # CONFIG_NLS_CODEPAGE_855 is not set # CONFIG_NLS_CODEPAGE_857 is not set # CONFIG_NLS_CODEPAGE_860 is not set # CONFIG_NLS_CODEPAGE_861 is not set # CONFIG_NLS_CODEPAGE_862 is not set # CONFIG_NLS_CODEPAGE_863 is not set # CONFIG_NLS_CODEPAGE_864 is not set # CONFIG_NLS_CODEPAGE_865 is not set # CONFIG_NLS_CODEPAGE_866 is not set # CONFIG_NLS_CODEPAGE_869 is not set # CONFIG_NLS_CODEPAGE_936 is not set # CONFIG_NLS_CODEPAGE_950 is not set # CONFIG_NLS_CODEPAGE_932 is not set # CONFIG_NLS_CODEPAGE_949 is not set # CONFIG_NLS_CODEPAGE_874 is not set # CONFIG_NLS_ISO8859_8 is not set # CONFIG_NLS_CODEPAGE_1250 is not set # CONFIG_NLS_CODEPAGE_1251 is not set # CONFIG_NLS_ASCII is not set CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_ISO8859_2 is not set # CONFIG_NLS_ISO8859_3 is not set # CONFIG_NLS_ISO8859_4 is not set # CONFIG_NLS_ISO8859_5 is not set # CONFIG_NLS_ISO8859_6 is not set # CONFIG_NLS_ISO8859_7 is not set # CONFIG_NLS_ISO8859_9 is not set # CONFIG_NLS_ISO8859_13 is not set # CONFIG_NLS_ISO8859_14 is not set # CONFIG_NLS_ISO8859_15 is not set # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set # CONFIG_NLS_MAC_ROMAN is not set # CONFIG_NLS_MAC_CELTIC is not set # CONFIG_NLS_MAC_CENTEURO is not set # CONFIG_NLS_MAC_CROATIAN is not set # CONFIG_NLS_MAC_CYRILLIC is not set # CONFIG_NLS_MAC_GAELIC is not set # CONFIG_NLS_MAC_GREEK is not set # CONFIG_NLS_MAC_ICELAND is not set # CONFIG_NLS_MAC_INUIT is not set # CONFIG_NLS_MAC_ROMANIAN is not set # CONFIG_NLS_MAC_TURKISH is not set # CONFIG_NLS_UTF8 is not set # CONFIG_DLM is not set # CONFIG_UNICODE is not set # end of File systems # # Security options # CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set # CONFIG_BIG_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y # CONFIG_HARDENED_USERCOPY is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity" # # Kernel hardening options # # # Memory initialization # CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set # end of Memory initialization # end of Kernel hardening options # end of Security options CONFIG_CRYPTO=y # # Crypto core or helper # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_BLKCIPHER=y CONFIG_CRYPTO_BLKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_AKCIPHER2=y CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_KPP2=y CONFIG_CRYPTO_KPP=y CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y # CONFIG_CRYPTO_USER is not set CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y CONFIG_CRYPTO_GF128MUL=y CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_CRYPTD is not set # CONFIG_CRYPTO_AUTHENC is not set # CONFIG_CRYPTO_TEST is not set CONFIG_CRYPTO_ENGINE=y # # Public-key cryptography # CONFIG_CRYPTO_RSA=y # CONFIG_CRYPTO_DH is not set CONFIG_CRYPTO_ECC=y CONFIG_CRYPTO_ECDH=y # CONFIG_CRYPTO_ECRDSA is not set # # Authenticated Encryption with Associated Data # CONFIG_CRYPTO_CCM=y CONFIG_CRYPTO_GCM=y # CONFIG_CRYPTO_CHACHA20POLY1305 is not set # CONFIG_CRYPTO_AEGIS128 is not set CONFIG_CRYPTO_SEQIV=y # CONFIG_CRYPTO_ECHAINIV is not set # # Block modes # # CONFIG_CRYPTO_CBC is not set # CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_LRW is not set # CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set # CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_ADIANTUM is not set # CONFIG_CRYPTO_ESSIV is not set # # Hash modes # CONFIG_CRYPTO_CMAC=y CONFIG_CRYPTO_HMAC=y # CONFIG_CRYPTO_XCBC is not set # CONFIG_CRYPTO_VMAC is not set # # Digest # CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_CRC32 is not set # CONFIG_CRYPTO_XXHASH is not set # CONFIG_CRYPTO_CRCT10DIF is not set CONFIG_CRYPTO_GHASH=y # CONFIG_CRYPTO_POLY1305 is not set # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set # CONFIG_CRYPTO_MICHAEL_MIC is not set # CONFIG_CRYPTO_RMD128 is not set # CONFIG_CRYPTO_RMD160 is not set # CONFIG_CRYPTO_RMD256 is not set # CONFIG_CRYPTO_RMD320 is not set # CONFIG_CRYPTO_SHA1 is not set CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_SHA256=y # CONFIG_CRYPTO_SHA512 is not set # CONFIG_CRYPTO_SHA3 is not set # CONFIG_CRYPTO_SM3 is not set # CONFIG_CRYPTO_STREEBOG is not set # CONFIG_CRYPTO_TGR192 is not set # CONFIG_CRYPTO_WP512 is not set # # Ciphers # CONFIG_CRYPTO_LIB_AES=y CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_AES_TI is not set # CONFIG_CRYPTO_ANUBIS is not set CONFIG_CRYPTO_LIB_ARC4=y CONFIG_CRYPTO_ARC4=y # CONFIG_CRYPTO_BLOWFISH is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set # CONFIG_CRYPTO_DES is not set # CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_KHAZAD is not set # CONFIG_CRYPTO_SALSA20 is not set # CONFIG_CRYPTO_CHACHA20 is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SERPENT is not set # CONFIG_CRYPTO_SM4 is not set # CONFIG_CRYPTO_TEA is not set # CONFIG_CRYPTO_TWOFISH is not set # # Compression # CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_842 is not set # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set CONFIG_CRYPTO_ZSTD=y # # Random Number Generation # # CONFIG_CRYPTO_ANSI_CPRNG is not set CONFIG_CRYPTO_DRBG_MENU=y CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_HASH is not set # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y # CONFIG_CRYPTO_USER_API_HASH is not set # CONFIG_CRYPTO_USER_API_SKCIPHER is not set # CONFIG_CRYPTO_USER_API_RNG is not set # CONFIG_CRYPTO_USER_API_AEAD is not set CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set # CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set CONFIG_CRYPTO_DEV_VIRTIO=y # CONFIG_CRYPTO_DEV_SAFEXCEL is not set # CONFIG_CRYPTO_DEV_CCREE is not set # # Support for Allwinner Sunxi CryptoEngine # # # Choose one according to the actual usage # # CONFIG_CRYPTO_DEV_SUNXI is not set # CONFIG_CRYPTO_DEV_SUNXI_IOCTL is not set # end of Support for Allwinner Sunxi CryptoEngine CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y CONFIG_X509_CERTIFICATE_PARSER=y # CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set CONFIG_PKCS7_MESSAGE_PARSER=y # CONFIG_PKCS7_TEST_KEY is not set # CONFIG_SIGNED_PE_FILE_VERIFICATION is not set # # Certificates for signature checking # CONFIG_SYSTEM_TRUSTED_KEYRING=y CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set # CONFIG_SECONDARY_TRUSTED_KEYRING is not set # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking # # Library routines # # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y # CONFIG_CORDIC is not set CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y # CONFIG_CRC_CCITT is not set CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set CONFIG_CRC_ITU_T=y CONFIG_CRC32=y # CONFIG_CRC32_SELFTEST is not set CONFIG_CRC32_SLICEBY8=y # CONFIG_CRC32_SLICEBY4 is not set # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set # CONFIG_CRC64 is not set # CONFIG_CRC4 is not set CONFIG_CRC7=y # CONFIG_LIBCRC32C is not set # CONFIG_CRC8 is not set CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_SPARC=y CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set CONFIG_GENERIC_ALLOCATOR=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y CONFIG_DMA_REMAP=y CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_CMA=y # # Default contiguous memory area size: # CONFIG_CMA_SIZE_MBYTES=16 CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set # CONFIG_CMA_SIZE_SEL_MIN is not set # CONFIG_CMA_SIZE_SEL_MAX is not set CONFIG_CMA_ALIGNMENT=8 # CONFIG_DMA_API_DEBUG is not set CONFIG_SGL_ALLOC=y CONFIG_DQL=y CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_SG_POOL=y CONFIG_SBITMAP=y # CONFIG_STRING_SELFTEST is not set # end of Library routines # # Kernel hacking # # # printk and dmesg options # CONFIG_PRINTK_TIME=y # CONFIG_PRINTK_CALLER is not set CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_DYNAMIC_DEBUG is not set # CONFIG_DYNAMIC_DEBUG_CORE is not set # end of printk and dmesg options # # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_INFO_REDUCED is not set # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set # CONFIG_DEBUG_INFO_BTF is not set # CONFIG_GDB_SCRIPTS is not set CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=2048 # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_READABLE_ASM is not set CONFIG_DEBUG_FS=y # CONFIG_HEADERS_INSTALL is not set CONFIG_OPTIMIZE_INLINING=y # CONFIG_DEBUG_SECTION_MISMATCH is not set CONFIG_SECTION_MISMATCH_WARN_ONLY=y CONFIG_ARCH_WANT_FRAME_POINTERS=y CONFIG_FRAME_POINTER=y # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # end of Compile-time checks and compiler options CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 CONFIG_MAGIC_SYSRQ_SERIAL=y CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_MISC=y # # Memory Debugging # # CONFIG_PAGE_EXTENSION is not set # CONFIG_DEBUG_PAGEALLOC is not set # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SLUB_STATS is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_MEMORY_INIT is not set CONFIG_CC_HAS_KASAN_GENERIC=y CONFIG_KASAN_STACK=1 # end of Memory Debugging CONFIG_CC_HAS_SANCOV_TRACE_PC=y # CONFIG_DEBUG_SHIRQ is not set # # Debug Lockups and Hangs # # CONFIG_SOFTLOCKUP_DETECTOR is not set # CONFIG_DETECT_HUNG_TASK is not set # CONFIG_WQ_WATCHDOG is not set # end of Debug Lockups and Hangs # CONFIG_PANIC_ON_OOPS is not set CONFIG_PANIC_ON_OOPS_VALUE=0 CONFIG_PANIC_TIMEOUT=0 # CONFIG_SCHED_DEBUG is not set # CONFIG_SCHEDSTATS is not set # CONFIG_SCHED_STACK_END_CHECK is not set # CONFIG_DEBUG_TIMEKEEPING is not set CONFIG_DEBUG_PREEMPT=y # # Lock Debugging (spinlocks, mutexes, etc...) # # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_DEBUG_SPINLOCK is not set CONFIG_DEBUG_MUTEXES=y # CONFIG_DEBUG_RWSEMS is not set # CONFIG_DEBUG_ATOMIC_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_LOCK_TORTURE_TEST is not set # CONFIG_WW_MUTEX_SELFTEST is not set # end of Lock Debugging (spinlocks, mutexes, etc...) CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_LIST is not set # CONFIG_DEBUG_PLIST is not set # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set # CONFIG_DEBUG_CREDENTIALS is not set # # RCU Debugging # # CONFIG_RCU_PERF_TEST is not set # CONFIG_RCU_TORTURE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=60 # CONFIG_RCU_TRACE is not set # CONFIG_RCU_EQS_DEBUG is not set # end of RCU Debugging # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_NOTIFIER_ERROR_INJECTION is not set # CONFIG_FAULT_INJECTION is not set # CONFIG_LATENCYTOP is not set CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_LIST_SORT is not set # CONFIG_TEST_SORT is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_RBTREE_TEST is not set # CONFIG_REED_SOLOMON_TEST is not set # CONFIG_INTERVAL_TREE_TEST is not set # CONFIG_PERCPU_TEST is not set CONFIG_ATOMIC64_SELFTEST=y # CONFIG_TEST_HEXDUMP is not set # CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_STRSCPY is not set # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_PRINTF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_BITFIELD is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set # CONFIG_TEST_OVERFLOW is not set # CONFIG_TEST_RHASHTABLE is not set # CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set # CONFIG_TEST_VMALLOC is not set # CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set # CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set # CONFIG_TEST_UDELAY is not set # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_KMOD is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_STACKINIT is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_MEMTEST is not set # CONFIG_BUG_ON_DATA_CORRUPTION is not set # CONFIG_SAMPLES is not set # CONFIG_UBSAN is not set CONFIG_UBSAN_ALIGNMENT=y # end of Kernel hacking -
回复: D1-H烧录固件后无法进入tina linux发布在 MR Series
看一下 device/config/chips/d1-h/configs/nezha/sys_config.fex 的内容
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回复: v853 vin通路配置发布在 V Series
（1）在线模式：四个vipp和dma实体，最大缩小比例为16*16，每路最多可支持16个orl
（2）离线模式：每个vipp和dma可分时复用为4个vipp和dma虚拟体，四个vipp和dma实体相互独立，在线模式和离线模式开关也是相互独立的；
（3）VIPP和DAM的分时复用（离线模式）与isp和tdm的分时复用（离线模式）是绑定关系，即tdm和isp开启了离线模式，vipp和dma的输入端如果是isp，那么vipp和dma也需要开启离线模式；
（4）只有VIPP0和dma0实体支持VE在线编码，而vipp0在线，如果vipp00的输入端为isp，那么tdm和isp也只能配置在线模式，而isp在线，那么四个vipp和dma实体都只能配置在线模式；online 和 offline 配 置 方 式 在 board.dts ， 所 以 需 要 在 对 应 版 型 的 board.dts 中 找 到 vind0 节 点 配 置 列 表 ， 对 应 关 系 为 tdm 对 应 节 点 ， isp 对 应 isp00 节 点 ， vipp 对 应 scaler00 、 scaler10 、 scaler20 和 scaler30 节 点 ， dma 对 ， 应 vinc00 、 vinc10 、 vinc20 和 vinc30 节 点 。
- 在线模式，单路3输出
- 离线模式，2路8输出
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回复: T113 nand flash 启动失败发布在 MR Series
@cwj1986521 内核没有配置UBIFS
CONFIG_UBIFS_FS=y CONFIG_UBIFS_FS_ADVANCED_COMPR=y # CONFIG_UBIFS_FS_LZO is not set # CONFIG_UBIFS_FS_ZLIB is not set # CONFIG_UBIFS_FS_ZSTD is not set # CONFIG_UBIFS_ATIME_SUPPORT is not set CONFIG_UBIFS_FS_XATTR=y CONFIG_UBIFS_FS_SECURITY=y -
回复: 全志D1如何获取芯片运行的频率呢？发布在 MR Series
cd /sys/kernel/debug/ cat clk/clk_summary | grep pll-cpux
切换到 /sys/kernel/debug/ 目录，并尝试使用 cat 命令读取 clk/clk_summary 文件的内容，并通过 grep 过滤显示包含 "pll-cpux" 的行，便是CPU的运行时钟。
如果运行命令时没有出现错误，并且输出了包含 "pll-cpux" 的行，则说明成功执行了命令并找到了匹配的行。
如果命令未能正常执行，请确保目录和文件存在，以及你是否拥有适当的权限。另外，也请确保你的系统支持 debugfs 文件系统，并且已经正确挂载。
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回复: 测试编译不过发布在 V Series
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helloworld_fel 使用了 VFP 寄存器参数，但是某个库文件(libgcc.a(_udivmoddi4.o))却不支持。
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缺少 .note.GNU-stack 段，暗示可执行栈缺失。
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对于具有 RWX 权限的 LOAD 段，给出了警告。
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在链接时，出现了对 raise 函数的未定义引用。
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回复: T113-S3 Tina_linux编译后启动失败发布在 MR Series
@cwj1986521
启用MTD子系统：UBIFS是建立在MTD（Memory Technology Devices）子系统之上的，因此首先需要启用MTD子系统。在内核配置中，你可以找到 CONFIG_MTD 配置项并将其启用。启用UBI：UBIFS需要使用UBI（Unsorted Block Images）层来管理闪存设备，因此你需要启用UBI支持。在内核配置中，查找 CONFIG_UBI 配置项并将其启用。
启用UBIFS文件系统支持：在内核配置中，查找 CONFIG_UBIFS_FS 配置项并将其启用。这将启用UBIFS文件系统的核心支持。
配置MTD设备：UBIFS需要与特定的MTD设备进行交互。你需要在内核配置中启用相应的MTD设备驱动，以及指定UBI和UBIFS所需的MTD设备参数。这些配置选项可能因硬件平台和具体的MTD设备而有所不同。
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回复: T113-S3 Tina_linux编译后启动失败发布在 MR Series
ubi设备没有挂载，挂载为裸mtd设备
正常挂载会出现大量UBI开头的log
[ 1.952826] sunxi-mmc 4021000.sdmmc: smc 0 p1 err, cmd 5, RTO !! [ 1.960398] sunxi-mmc 4021000.sdmmc: smc 0 p1 err, cmd 5, RTO !! [ 1.967886] sunxi-codec-machine 2030340.sound: 2030000.codec <-> 203034c.dummy_cpudai mapping ok [ 1.977685] sunxi-mmc 4021000.sdmmc: smc 0 p1 err, cmd 5, RTO !! [ 1.984522] sunxi-mmc 4021000.sdmmc: sdc set ios:clk 0Hz bm PP pm OFF vdd 0 width 1 timing LEGACY(SDR12) dt B [ 1.997425] input: audiocodec sunxi Audio Jack as /devices/platform/soc@3000000/2030340.sound/sound/card0/input0 [ 2.010714] [SNDCODEC][sunxi_card_dev_probe][836]:register card finished [ 2.020708] NET: Registered protocol family 10 [ 2.027327] Segment Routing with IPv6 [ 2.031537] [SNDCODEC][sunxi_hs_init_work][259]:resume-->report switch [ 2.039133] NET: Registered protocol family 17 [ 2.044411] Bluetooth: RFCOMM TTY layer initialized [ 2.049865] Bluetooth: RFCOMM socket layer initialized [ 2.055819] Bluetooth: RFCOMM ver 1.11 [ 2.096457] ubi0: attaching mtd3 [ 2.473414] ubi0: scanning is finished [ 2.490836] ubi0: attached mtd3 (name "sys", size 123 MiB) [ 2.497186] ubi0: PEB size: 262144 bytes (256 KiB), LEB size: 258048 bytes [ 2.504905] ubi0: min./max. I/O unit sizes: 4096/4096, sub-page size 2048 [ 2.512552] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096 [ 2.520340] ubi0: good PEBs: 492, bad PEBs: 0, corrupted PEBs: 0 [ 2.527055] ubi0: user volume: 9, internal volumes: 1, max. volumes count: 128 [ 2.535131] ubi0: max/mean erase counter: 2/1, WL threshold: 4096, image sequence number: 0 [ 2.544501] ubi0: available PEBs: 10, total reserved PEBs: 482, PEBs reserved for bad PEB handling: 10 [ 2.555351] ubi0: background thread "ubi_bgt0d" started, PID 64 [ 2.564391] block ubiblock0_5: created from ubi0:5(rootfs) [ 2.571959] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2 [ 2.581694] clk: Not disabling unused clocks [ 2.586458] ALSA device list: [ 2.589758] #0: audiocodec [ 2.593045] cfg80211: failed to load regulatory.db [ 2.598481] alloc_fd: slot 0 not NULL! [ 2.606842] VFS: Mounted root (squashfs filesystem) readonly on device 254:0. [ 2.618509] devtmpfs: mounted [ 2.622621] Freeing unused kernel memory: 176K [ 2.627755] This architecture does not have kernel memory protection. [ 2.635026] Run /pseudo_init as init process mount: mounting none on /dev failed: Device or resource busy [ 3.197350] UBIFS (ubi0:7): Mounting in unauthenticated mode [ 3.204248] UBIFS (ubi0:7): background thread "ubifs_bgt0_7" started, PID 90 [ 3.306905] UBIFS (ubi0:7): recovery needed [ 3.437736] random: crng init done [ 3.484394] UBIFS (ubi0:7): recovery completed [ 3.489563] UBIFS (ubi0:7): UBIFS: mounted UBI device 0, volume 7, name "rootfs_data" [ 3.498354] UBIFS (ubi0:7): LEB size: 258048 bytes (252 KiB), min./max. I/O unit sizes: 4096 bytes/4096 bytes [ 3.509494] UBIFS (ubi0:7): FS size: 3096576 bytes (2 MiB, 12 LEBs), journal size 1806337 bytes (1 MiB, 5 LEBs) [ 3.520808] UBIFS (ubi0:7): reserved for root: 146258 bytes (142 KiB) [ 3.528009] UBIFS (ubi0:7): media format: w5/r0 (latest is w5/r0), UUID F3C42DF5-C431-46B6-9FB0-44D877A77B61, small LPT model can't run '/etc/preinit': No such file or directory mount: mounting devpts on /dev/pts failed: No such device [ 3.914941] UBIFS (ubi0:8): Mounting in unauthenticated mode [ 3.923295] UBIFS (ubi0:8): background thread "ubifs_bgt0_8" started, PID 118 [ 4.074613] UBIFS (ubi0:8): recovery needed [ 4.176774] UBIFS (ubi0:8): recovery completed [ 4.190587] UBIFS (ubi0:8): UBIFS: mounted UBI device 0, volume 8, name "UDISK" [ 4.198772] UBIFS (ubi0:8): LEB size: 258048 bytes (252 KiB), min./max. I/O unit sizes: 4096 bytes/4096 bytes [ 4.211023] UBIFS (ubi0:8): FS size: 47738880 bytes (45 MiB, 185 LEBs), journal size 2322432 bytes (2 MiB, 9 LEBs) [ 4.223836] UBIFS (ubi0:8): reserved for root: 2254825 bytes (2201 KiB) [ 4.231568] UBIFS (ubi0:8): media format: w5/r0 (latest is w5/r0), UUID 36942453-7E73-45BA-9E89-913155DABE62, small LPT model -
回复: V853 SDK : PMU TWI发布在 V Series
@alb702 在 V853 SDK : PMU TWI 中说：
[267]ic cant match axp, please check...
V853 和 V853s 的芯片安全系统验证不一样，SDK不能通用，这行输出表示芯片型号验证失败，跳过初始化DRAM
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回复: R128 打包失败 merge_full_rtos_img_failed发布在 MR Series
@cai_yp 分区参数错误，只打包了UDISK分区，但是UDISK是自动生成的分区
32356+0 records in 32356+0 records out 8283136 bytes (8.3 MB) copied, 0.0394041 s, 210 MB/s this is not a partition key update mbr file ok ----------------mbr convert to gpt start--------------------- out: sunxi_gpt_nor.fex source: sunxi_mbr_nor.fex input_logic_offset: 256 input_flash_size: 16M gpt partition entry crc32 = 0x618ebc8 gpt header crc32 = 0x4fdf09e2 GPT----part num 10--- gpt_entry: 128 gpt_header: 92 GPT:env : 120 127 GPT:env-redund : 128 12f GPT:arm-lpsram : 130 a8f GPT:rv-lpsram : a90 1a2f GPT:dsp-hpsram : 1a30 206f GPT:rtos-xip : 2070 33f7 GPT:arm-b : 33f8 3d57 GPT:config : 3d58 3d77 GPT:settings : 3d78 3db7 GPT:UDISK : 3db8 7fff update gpt file ok ----------------mbr convert to gpt end--------------------- boot0: boot0_spinor.fex redund boot0: boot0_spinor.fex mbr: sunxi_gpt_nor.fex partition: sys_partition_nor.bin UDISK_partition_size: 16968 sector outfile: rtos_16Mnor.bin logic_start: 128K total_image_size: 16M load file: boot0_spinor.fex ok load file: sunxi_gpt_nor.fex ok load file: boot0_spinor.fex ok support redund boot0 at 0x10000 load file: sys_partition_nor.bin ok part name=env file name:env.fex part size:8 sector load file: env.fex ok part name=env-redund file name:env.fex part size:8 sector load file: env.fex ok part name=arm-lpsram file name:rtos_arm.fex part size:2400 sector load file: rtos_arm.fex ok part name=rv-lpsram file name:rtos_riscv.fex part size:4000 sector load file: rtos_riscv.fex ok part name=dsp-hpsram file name:rtos_dsp.fex part size:1600 sector load file: rtos_dsp.fex ok part name=rtos-xip file name:rtos_xip_rv.fex part size:5000 sector load file: rtos_xip_rv.fex ok part name=arm-b file name:etf.fex part size:2400 sector load file: etf.fex ok part name=config file name:config.fex part size:32 sector load file: config.fex ok part name=settings part size:64 sector part name=UDISK file name:data_udisk.fex load file: data_udisk.fex ok partname: UDISK this is not a partition key merge_package ok -
回复: t113使用sd卡启动卡住了发布在 Linux
@xingxing8 在 t113使用sd卡启动卡住了 中说：
先看这行
VFS: Cannot open root device "mmcblk0p5" or unknown-block(0,0): error -6
这行表示没有挂载上mmc设备
再往上找
[ 4.002919] sunxi-mmc 4020000.sdmmc: Got CD GPIO
[ 4.008458] sunxi-mmc 4020000.sdmmc: set cd-gpios as 24M fail
[ 4.018859] sunxi-mmc 4020000.sdmmc: sdc set ios:clk 0Hz bm PP pm UP vdd 21 width 1 timing LEGACY(SDR12) dt BCD卡检测GPIO检测不到卡，关闭MMC驱动
Linux中的驱动为了省电会根据CD引脚检测卡是否存在，不存在则关闭MMC驱动，U-boot驱动没有这个逻辑
解决方法：
- 正向解决法
- 根据实物硬件查看CD引脚配置，上下拉状态是否正常，是否反转CD
- 软件规避法
- 直接关闭CD检测功能，取消注释
broken-cd;
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回复: V853 SDK : PMU TWI发布在 V Series
@alb702 在device\config\chips\v853\configs\vision\sys_config.fex 中，out目录是从这里拷贝过去的
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回复: V851S tina linux ov5647 驱动程序没有 dmesg发布在 V Series
ov5647 这个型号的摄像头并没有适配，SDK也没有支持。
请参考V85x的摄像头支持手册选择适配的摄像头。这里推荐已经量产的产品使用的GC2063，GC2083，GC4663这三款摄像头，已经经过严格的测试与调试，可以达到最佳画质和分辨率
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回复: 提高香橙派GPIO最高速率发布在 H/F/TV Series
SoC一般不推荐GPIO翻转，如果需要提高需要提高APB的时钟，但是修改APB的时钟会对ＡＰＢ上的全部设备造成影响，例如ＵＡＲＴ，ＴＷＩ，ＰＷＭ，Ｔｉｍｅｒ全部需要重新计算频率配置
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回复: V3s nor flash 烧录之后必须断电才能引导？发布在 编译和烧写问题专区
@march1993 在 V3s nor flash 烧录之后必须断电才能引导？ 中说：
u-boot-sunxi-with-spl.bin
考虑u-boot-sunxi-with-spl.bin代码给rtc的fel标识位置位了
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回复: T113-S3 MIPI + LVDS 可以实现吗发布在 MR Series
@lansecd lcd_gpio_0 = <&pio PD 20 GPIO_ACTIVE_HIGH>; //reset 在Uboot里怎么配置的
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回复: 2.4 spi lcd点不亮发布在 A Series
配置成DBI了，老版本SDK需要手动注释DBI功能
lichee\rtos-hal\hal\source\spilcd\lcd_fb\lcd_fb_feature.h
新版SDK已修复
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T113 busybox init 配置 overlayfs 为 UDISK 分区而不是 rootfs_data发布在 Linux
- 先确定挂载overlayfs
查看 pseudo_init 中 MOUNT_OVERLAY 是不是 1，如果不是配置为 1
package/busybox-init-base-files/files/pseudo_init
- 修改挂载分区
找到文件末尾，吧 rootfs_data 改成UDISK
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busybox init 简介发布在 Linux
一、简介
tina 使用busybox init方式启动，首先调用执行pseudo_init（挂载文件系统，如/proc、/tmp、/sys /etc、/usr），接着会调用/sbin/init进程，而init进程调用的第一个启动脚本为/etc/init.d/rcS。
二、平台的自定义
不同的平台文件系统具有其共性与特殊性。tina/packge/busybox-init-base-files/files下提供了所有平台的基础文件。而在tina/target/allwinner/XXX/busybox-init-base-files下存放的是平台特性文件，其优先级高于前者,即当前者目录和后者存在有相同文件时，以后者为准。如有以下两个文件:A：tina/target/allwinner/r11-R11_pref1/busybox-init-base-files/etc/banner
B：tina/package/busybox-init-base-files/files/etc/banner最终拷贝到文件系统中的为A。
三、pseudo_init与rcS
pseudo_init与rcS文件中存在很多平台共性的代码，避免系统充斥大量冗余代码,以及方便基础文件的维护和开发。所以不允许在特定平台下自定义pseudo_init、rcS文件（必须使用tina/packge/busybox-init-base-files/files下的pseudo_init、rcS）。
如果需要添加平台特定配置（pseudo_init，rcS没有配置），可将其写到rc.preboot,rc.final中，参考第四节。
四、rcS脚本
1.功能描述
（1）执行/etc/init.d/rc.preboot。
为了满足开机快速启动的需求，提供了用户可自定义rc.preboot文件，即在tina/target/allwinner/XXX/busybox-init-base-files/etc/init.d/目录下创建rc.preboot脚本文件，将会被rcS最先调用执行。
（2）配置打印级别，主机名称。
（3）执行/etc/init.d/rc.log，配置系统log信息。
系统默认使用的是tina/package/busybox-init-base-files/files/etc/init.d/rc.log脚本进行配置系统log信息。用户可在tina/target/allwinner/XXX/busybox-init-base-files/etc/init.d/下创建rc.log，自定义rc.log。
如果需要使用默认rc.log，需要在make menuconfig配置。Base system ---> busybox-init-base-files......................... Busybox init base system ---> [*] Use the rc.log（4）挂载UDISK。
（5）执行/etc/init.d/rc.modules，加载内核模块。
系统默认使用的是tina/package/busybox-init-base-files/files/etc/init.d/rc.modules脚本进行内核模块自加载，用户可在tina/target/allwinner/XXX/busybox-init-base-files/etc/init.d/下创建rc.modules，自定义rc.modules。
如果需要使用默认rc.modules，需要在make menuconfig配置如下。Base system ---> busybox-init-base-files......................... Busybox init base system ---> [*] Use the rc.modules（6）启动/etc/rc.d下的脚本。
关于执行rc.d下的启动脚本，目的为兼容procd式的应用脚本。/etc/rc.d下的脚本是链接到/etc/init.d/下，默认情况下只执行adbd,如果需要执行其他脚本，需要在tina/target/allwinner/XXX/busybox-init-base-files/etc/init.d/下，自定义load_script.conf文件，文件内容中写上要启动的应用，如adbd（注意，每一个应用占一行）。可参考：tina/packge/busybox-init-base-files/files/etc/init.d/load_script.conf。如果需要执行rc.d下的启动脚本，需要在make menuconfig做如下配置。 Base system ---> busybox-init-base-files......................... Busybox init base system ---> [*] Auto load the script in /etc/rc.d（7）ota初始化。
（8）执行/etc/init.d/rc.final,用户自定义启动脚本。
用户可在tina/packge/busybox-init-base-files/files/etc/init.d/下创建一个rc.final脚本，自定义启动应用程序,该脚本将会被rcS最后调用执行。2.rc.preboot与rc.final的区别？
rc.preboot比rc.final先运行，在执行rc.preboot脚本的时候，系统的一些初始化操作还没完成，如挂载UDISK、内核模块自加载、ota等等操作。而rc.final执行的时候，以上的初始化操作已经完成。五.如何写应用的启动脚本
example：开机自启动smartlinkd（tina/package/allwinner/smartlinkd/files/smartlinkd.init）
1.方法一（特定格式要求）详细的格式参考：
https://wiki.openwrt.org/inbox/procd-init-scripts
https://wiki.openwrt.org/doc/techref/initscripts（1）procd式
#!/bin/sh /etc/rc.common #本质为script脚本,以#!开头, 之后执行/etc/rc.common START=98 #开机启动优先级(序列) [数值越小, 越先启动] STOP=98 #关机停止优先级(序列) [数值越小, 越先关闭] USE_PROCD=1 PROG=smartlinkd start_service() { #启动函数 procd_open_instance procd_set_param command $PROG -d procd_close_instance } shutdown() { echo shutdown }（2）Sys式
#!/bin/sh /etc/rc.common START=98 STOP=98 PROG=smartlinkd start() { smartlinkd -d & }使用上述procd式和sys式脚本，既能兼容procd init启动和busybox init的启动方式。
另外如果使用的是busybox init的启动方式，还需要在load_script.conf文件中换行添加内容：smartlinkd2.方法二（无特定格式要求）
创建rc.preboot或者rc.final脚本，添加启动smartlinkd的内容。 -
回复: T113-S3平台，使用can通信，TX发送数据出现大量错误码发布在 其它全志芯片讨论区
@duanzhh 请问SDK是哪里获取的？据我所知CAN目前在T113-I的平台上有压测过，T113-S3的SDK里的驱动可能是很早期的版本
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回复: V851s buildroot openwrt 编译GCC失败发布在 编译和烧写问题专区
@kanken6174 不建议编译gcc进入固件，首先这个gcc没有适配平台，其次v851s的64M内存也无法支持gcc的使用
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回复: T113基于Longan在LVGL中如何播放视屏，通过tplayer发布在 GUI
static lv_style_t style_scr_act; if (style_scr_act.prop_cnt == 0) { lv_style_init(&style_scr_act); lv_style_set_bg_opa(&style_scr_act, LV_OPA_COVER); lv_obj_add_style(lv_scr_act(), &style_scr_act, 0); } lv_disp_get_default()->driver->screen_transp = 1; lv_disp_set_bg_opa(lv_disp_get_default(), LV_OPA_TRANSP); /* Empty the buffer, not emptying will cause the UI to be opaque */ lv_memset_00(lv_disp_get_default()->driver->draw_buf->buf_act, lv_disp_get_default()->driver->draw_buf->size * sizeof(lv_color32_t)); lv_style_set_bg_opa(&style_scr_act, LV_OPA_TRANSP); lv_obj_report_style_change(&style_scr_act);设置透明层
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回复: R128S2 Ubuntu20.04 编译系统错误发布在 A Series
@oneofzero 这个是，直接从其他sdk复制过来的吗？、
rm -rf out rm -rf lichee/rtos/build/ -
回复: R128S2 Ubuntu20.04 编译系统错误发布在 A Series
先删除预解压的工具链，再重新解压。这是因为之前解压工具链解压未完成导致丢失文件。
rm -rf lichee/rtos/tools/riscv64-elf-x86_64-20201104 -
回复: 全志T113-i 或者V85X MIPI DSI 寻求控制器寄存器资料发布在 V Series
@chrisvista 在 全志T113-i 或者V85X MIPI DSI 寻求控制器寄存器资料 中说：
统定义里面不停更新，比如第一个就已经改变了：
A64的MIPI DSI是使用的 synopsys 的，T113的不是这个IP，所以有差异
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回复: 全志T113-i 或者V85X MIPI DSI 寻求控制器寄存器资料发布在 V Series
芯片寄存器开放有很多因素制约，大部分外购的IP都不允许详细描述寄存器，需要提交申请审核后才能公开，法务流程很长索性不开放，开放了还会有潜在的法律风险和抄袭风险，再加上IP迭代和升级，勘误和修改。所以一般是需要定制化的客户有专门的对接。国外芯片自己自研的IP或者购买的IP走了审核流程的开放，也有很多芯片不开放，需要NDA后专门对接。
其实国外做的好的也就TI，NXP，ST那几家的芯片，博通高通一样没啥资料。
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回复: 全志T113-i 或者V85X MIPI DSI 寻求控制器寄存器资料发布在 V Series
/* * Detail information of registers */ union dsi_ctl_reg_t { u32 dwval; struct { u32 dsi_en:1; u32 res0:31; } bits; }; union dsi_gint0_reg_t { u32 dwval; struct { u32 dsi_irq_en:16; u32 dsi_irq_flag:16; } bits; }; union dsi_gint1_reg_t { u32 dwval; struct { u32 video_line_int_num:13; u32 res0:19; } bits; }; union dsi_basic_ctl_reg_t { u32 dwval; struct { u32 video_mode_burst:1; u32 hsa_hse_dis:1; u32 hbp_dis:1; u32 trail_fill:1; u32 trail_inv:4; u32 res0:8; u32 brdy_set:8; u32 brdy_l_sel:3; u32 res1:5; } bits; }; union dsi_basic_ctl0_reg_t { u32 dwval; struct { u32 inst_st:1; u32 res0:3; u32 src_sel:2; u32 res1:4; u32 fifo_manual_reset:1; u32 res2:1; u32 fifo_gating:1; u32 res3:3; u32 ecc_en:1; u32 crc_en:1; u32 hs_eotp_en:1; u32 res4:13; } bits; }; union dsi_basic_ctl1_reg_t { u32 dwval; struct { u32 dsi_mode:1; u32 video_frame_start:1; u32 video_precision_mode_align:1; u32 res0:1; u32 video_start_delay:13; u32 res1:15; } bits; }; union dsi_basic_size0_reg_t { u32 dwval; struct { u32 vsa:12; u32 res0:4; u32 vbp:12; u32 res1:4; } bits; }; union dsi_basic_size1_reg_t { u32 dwval; struct { u32 vact:12; u32 res0:4; u32 vt:13; u32 res1:3; } bits; }; union dsi_basic_inst0_reg_t { u32 dwval; struct { u32 lane_den:4; u32 lane_cen:1; u32 res0:11; u32 trans_start_condition:4; u32 trans_packet:4; u32 escape_enrty:4; u32 instru_mode:4; } bits; }; union dsi_basic_inst1_reg_t { u32 dwval; struct { u32 inst0_sel:4; u32 inst1_sel:4; u32 inst2_sel:4; u32 inst3_sel:4; u32 inst4_sel:4; u32 inst5_sel:4; u32 inst6_sel:4; u32 inst7_sel:4; } bits; }; union dsi_basic_inst2_reg_t { u32 dwval; struct { u32 loop_n0:12; u32 res0:4; u32 loop_n1:12; u32 res1:4; } bits; }; union dsi_basic_inst3_reg_t { u32 dwval; struct { u32 inst0_jump:4; u32 inst1_jump:4; u32 inst2_jump:4; u32 inst3_jump:4; u32 inst4_jump:4; u32 inst5_jump:4; u32 inst6_jump:4; u32 inst7_jump:4; } bits; }; union dsi_basic_inst4_reg_t { u32 dwval; struct { u32 jump_cfg_num:16; u32 jump_cfg_point:4; u32 jump_cfg_to:4; u32 res0:4; u32 jump_cfg_en:1; u32 res1:3; } bits; }; union dsi_basic_tran0_reg_t { u32 dwval; struct { u32 trans_start_set:13; u32 res0:19; } bits; }; union dsi_basic_tran1_reg_t { u32 dwval; struct { u32 trans_size:16; u32 res0:12; u32 trans_end_condition:1; u32 res1:3; } bits; }; union dsi_basic_tran2_reg_t { u32 dwval; struct { u32 trans_cycle_set:16; u32 res0:16; } bits; }; union dsi_basic_tran3_reg_t { u32 dwval; struct { u32 trans_blank_set:16; u32 res0:16; } bits; }; union dsi_basic_tran4_reg_t { u32 dwval; struct { u32 hs_zero_reduce_set:16; u32 res0:16; } bits; }; union dsi_basic_tran5_reg_t { u32 dwval; struct { u32 drq_set:10; u32 res0:18; u32 drq_mode:1; u32 res1:3; } bits; }; union dsi_pixel_ctl0_reg_t { u32 dwval; struct { u32 pixel_format:4; u32 pixel_endian:1; u32 res0:11; u32 pd_plug_dis:1; u32 res1:15; } bits; }; union dsi_pixel_ctl1_reg_t { u32 dwval; struct { u32 res0; } bits; }; union dsi_pixel_ph_reg_t { u32 dwval; struct { u32 dt:6; u32 vc:2; u32 wc:16; u32 ecc:8; } bits; }; union dsi_pixel_pd_reg_t { u32 dwval; struct { u32 pd_tran0:8; u32 res0:8; u32 pd_trann:8; u32 res1:8; } bits; }; union dsi_pixel_pf0_reg_t { u32 dwval; struct { u32 crc_force:16; u32 res0:16; } bits; }; union dsi_pixel_pf1_reg_t { u32 dwval; struct { u32 crc_init_line0:16; u32 crc_init_linen:16; } bits; }; union dsi_short_pkg_reg_t { u32 dwval; struct { u32 dt:6; u32 vc:2; u32 d0:8; u32 d1:8; u32 ecc:8; } bits; }; union dsi_blk_pkg0_reg_t { u32 dwval; struct { u32 dt:6; u32 vc:2; u32 wc:16; u32 ecc:8; } bits; }; union dsi_blk_pkg1_reg_t { u32 dwval; struct { u32 pd:8; u32 res0:8; u32 pf:16; } bits; }; union dsi_burst_line_reg_t { u32 dwval; struct { u32 line_num:16; u32 line_syncpoint:16; } bits; }; union dsi_burst_drq_reg_t { u32 dwval; struct { u32 drq_edge0:16; u32 drq_edge1:16; } bits; }; union dsi_cmd_ctl_reg_t { u32 dwval; struct { u32 tx_size:8; u32 tx_status:1; u32 tx_flag:1; u32 res0:6; u32 rx_size:5; u32 res1:3; u32 rx_status:1; u32 rx_flag:1; u32 rx_overflow:1; u32 res2:5; } bits; }; union dsi_cmd_data_reg_t { u32 dwval; struct { u32 byte0:8; u32 byte1:8; u32 byte2:8; u32 byte3:8; } bits; }; union dsi_debug0_reg_t { u32 dwval; struct { u32 video_curr_line:13; u32 res0:19; } bits; }; union dsi_debug1_reg_t { u32 dwval; struct { u32 video_curr_lp2hs:16; u32 res0:16; } bits; }; union dsi_debug2_reg_t { u32 dwval; struct { u32 trans_low_flag:1; u32 trans_fast_flag:1; u32 res0:2; u32 curr_loop_num:16; u32 curr_instru_num:3; u32 res1:1; u32 instru_unknown_flag:8; } bits; }; union dsi_debug3_reg_t { u32 dwval; struct { u32 res0:16; u32 curr_fifo_num:16; } bits; }; union dsi_debug4_reg_t { u32 dwval; struct { u32 test_data:24; u32 res0:4; u32 dsi_fifo_bist_en:1; u32 res1:3; } bits; }; union dsi_reservd_reg_t { u32 dwval; struct { u32 res0; } bits; }; struct __de_dsi_dev_t { /* 0x00 - 0x0c */ union dsi_ctl_reg_t dsi_gctl; union dsi_gint0_reg_t dsi_gint0; union dsi_gint1_reg_t dsi_gint1; union dsi_basic_ctl_reg_t dsi_basic_ctl; /* 0x10 - 0x1c */ union dsi_basic_ctl0_reg_t dsi_basic_ctl0; union dsi_basic_ctl1_reg_t dsi_basic_ctl1; union dsi_basic_size0_reg_t dsi_basic_size0; union dsi_basic_size1_reg_t dsi_basic_size1; /* 0x20 - 0x3c */ union dsi_basic_inst0_reg_t dsi_inst_func[8]; /* 0x40 - 0x5c */ union dsi_basic_inst1_reg_t dsi_inst_loop_sel; union dsi_basic_inst2_reg_t dsi_inst_loop_num; union dsi_basic_inst3_reg_t dsi_inst_jump_sel; union dsi_basic_inst4_reg_t dsi_inst_jump_cfg[2]; union dsi_basic_inst2_reg_t dsi_inst_loop_num2; union dsi_reservd_reg_t dsi_reg058[2]; /* 0x60 - 0x6c */ union dsi_basic_tran0_reg_t dsi_trans_start; union dsi_reservd_reg_t dsi_reg064[3]; /* 0x70 - 0x7c */ union dsi_reservd_reg_t dsi_reg070[2]; union dsi_basic_tran4_reg_t dsi_trans_zero; union dsi_basic_tran5_reg_t dsi_tcon_drq; /* 0x80 - 0x8c */ union dsi_pixel_ctl0_reg_t dsi_pixel_ctl0; union dsi_pixel_ctl1_reg_t dsi_pixel_ctl1; union dsi_reservd_reg_t dsi_reg088[2]; /* 0x90 - 0x9c */ union dsi_pixel_ph_reg_t dsi_pixel_ph; union dsi_pixel_pd_reg_t dsi_pixel_pd; union dsi_pixel_pf0_reg_t dsi_pixel_pf0; union dsi_pixel_pf1_reg_t dsi_pixel_pf1; /* 0xa0 - 0xac */ union dsi_reservd_reg_t dsi_reg0a0[4]; /* 0xb0 - 0xbc */ union dsi_short_pkg_reg_t dsi_sync_hss; union dsi_short_pkg_reg_t dsi_sync_hse; union dsi_short_pkg_reg_t dsi_sync_vss; union dsi_short_pkg_reg_t dsi_sync_vse; /* 0xc0 - 0xcc */ union dsi_blk_pkg0_reg_t dsi_blk_hsa0; union dsi_blk_pkg1_reg_t dsi_blk_hsa1; union dsi_blk_pkg0_reg_t dsi_blk_hbp0; union dsi_blk_pkg1_reg_t dsi_blk_hbp1; /* 0xd0 - 0xdc */ union dsi_blk_pkg0_reg_t dsi_blk_hfp0; union dsi_blk_pkg1_reg_t dsi_blk_hfp1; union dsi_reservd_reg_t dsi_reg0d8[2]; /* 0xe0 - 0xec */ union dsi_blk_pkg0_reg_t dsi_blk_hblk0; union dsi_blk_pkg1_reg_t dsi_blk_hblk1; union dsi_blk_pkg0_reg_t dsi_blk_vblk0; union dsi_blk_pkg1_reg_t dsi_blk_vblk1; /* 0xf0 - 0x1fc */ union dsi_burst_line_reg_t dsi_burst_line; union dsi_burst_drq_reg_t dsi_burst_drq; union dsi_reservd_reg_t dsi_reg0f0[66]; /* 0x200 - 0x23c */ union dsi_cmd_ctl_reg_t dsi_cmd_ctl; union dsi_reservd_reg_t dsi_reg204[15]; /* 0x240 - 0x2dc */ union dsi_cmd_data_reg_t dsi_cmd_rx[8]; union dsi_reservd_reg_t dsi_reg260[32]; /* 0x2e0 - 0x2ec */ union dsi_debug0_reg_t dsi_debug_video0; union dsi_debug1_reg_t dsi_debug_video1; union dsi_reservd_reg_t dsi_reg2e8[2]; /* 0x2f0 - 0x2fc */ union dsi_debug2_reg_t dsi_debug_inst; union dsi_debug3_reg_t dsi_debug_fifo; union dsi_debug4_reg_t dsi_debug_data; union dsi_reservd_reg_t dsi_reg2fc; /* 0x300 - 0x3fc */ union dsi_cmd_data_reg_t dsi_cmd_tx[64]; }; union dphy_ctl_reg_t { u32 dwval; struct { u32 module_en:1; u32 res0:3; u32 lane_num:2; u32 res1:26; } bits; }; union dphy_tx_ctl_reg_t { u32 dwval; struct { u32 tx_d0_force:1; u32 tx_d1_force:1; u32 tx_d2_force:1; u32 tx_d3_force:1; u32 tx_clk_force:1; u32 res0:3; u32 lptx_endian:1; u32 hstx_endian:1; u32 lptx_8b9b_en:1; u32 hstx_8b9b_en:1; u32 force_lp11:1; u32 res1:3; u32 ulpstx_data0_exit:1; u32 ulpstx_data1_exit:1; u32 ulpstx_data2_exit:1; u32 ulpstx_data3_exit:1; u32 ulpstx_clk_exit:1; u32 res2:3; u32 hstx_data_exit:1; u32 hstx_clk_exit:1; u32 res3:2; u32 hstx_clk_cont:1; u32 ulpstx_enter:1; u32 res4:2; } bits; }; union dphy_rx_ctl_reg_t { u32 dwval; struct { u32 res0:8; u32 lprx_endian:1; u32 hsrx_endian:1; u32 lprx_8b9b_en:1; u32 hsrx_8b9b_en:1; u32 hsrx_sync:1; u32 res1:3; u32 lprx_trnd_mask:4; u32 rx_d0_force:1; u32 rx_d1_force:1; u32 rx_d2_force:1; u32 rx_d3_force:1; u32 rx_clk_force:1; u32 res2:6; u32 dbc_en:1; } bits; }; union dphy_tx_time0_reg_t { u32 dwval; struct { u32 lpx_tm_set:8; u32 dterm_set:8; u32 hs_pre_set:8; u32 hs_trail_set:8; } bits; }; union dphy_tx_time1_reg_t { u32 dwval; struct { u32 ck_prep_set:8; u32 ck_zero_set:8; u32 ck_pre_set:8; u32 ck_post_set:8; } bits; }; union dphy_tx_time2_reg_t { u32 dwval; struct { u32 ck_trail_set:8; u32 hs_dly_set:16; u32 res0:4; u32 hs_dly_mode:1; u32 res1:3; } bits; }; union dphy_tx_time3_reg_t { u32 dwval; struct { u32 lptx_ulps_exit_set:20; u32 res0:12; } bits; }; union dphy_tx_time4_reg_t { u32 dwval; struct { u32 hstx_ana0_set:8; u32 hstx_ana1_set:8; u32 res0:16; } bits; }; union dphy_rx_time0_reg_t { u32 dwval; struct { u32 lprx_to_en:1; u32 freq_cnt_en:1; u32 res0:2; u32 hsrx_clk_miss_en:1; u32 hsrx_sync_err_to_en:1; u32 res1:2; u32 lprx_to:8; u32 hsrx_clk_miss:8; u32 hsrx_sync_err_to:8; } bits; }; union dphy_rx_time1_reg_t { u32 dwval; struct { u32 lprx_ulps_wp:20; u32 rx_dly:12; } bits; }; union dphy_rx_time2_reg_t { u32 dwval; struct { u32 hsrx_ana0_set:8; u32 hsrx_ana1_set:8; u32 res0:16; } bits; }; union dphy_rx_time3_reg_t { u32 dwval; struct { u32 freq_cnt:16; u32 res0:8; u32 lprst_dly:8; } bits; }; union dphy_ana0_reg_t { u32 dwval; struct { u32 reg_selsck:1; u32 reg_rsd:1; u32 reg_sfb:2; u32 reg_plr:4; u32 reg_den:4; u32 reg_slv:3; u32 reg_sdiv2:1; u32 reg_srxck:4; u32 reg_srxdt:4; u32 reg_dmpd:4; u32 reg_dmpc:1; u32 reg_pwenc:1; u32 reg_pwend:1; u32 reg_pws:1; } bits; }; union dphy_ana1_reg_t { u32 dwval; struct { u32 reg_stxck:1; u32 res0:3; u32 reg_svdl0:4; u32 reg_svdl1:4; u32 reg_svdl2:4; u32 reg_svdl3:4; u32 reg_svdlc:4; u32 reg_svtt:4; u32 reg_csmps:2; u32 res1:1; u32 reg_vttmode:1; } bits; }; union dphy_ana2_reg_t { u32 dwval; struct { u32 ana_cpu_en:1; u32 enib:1; u32 enrvs:1; u32 res0:1; u32 enck_cpu:1; u32 entxc_cpu:1; u32 enckq_cpu:1; u32 res1:1; u32 entx_cpu:4; u32 res2:1; u32 entermc_cpu:1; u32 enrxc_cpu:1; u32 res3:1; u32 enterm_cpu:4; u32 enrx_cpu:4; u32 enp2s_cpu:4; u32 res4:4; } bits; }; union dphy_ana3_reg_t { u32 dwval; struct { u32 enlptx_cpu:4; u32 enlprx_cpu:4; u32 enlpcd_cpu:4; u32 enlprxc_cpu:1; u32 enlptxc_cpu:1; u32 enlpcdc_cpu:1; u32 res0:1; u32 entest:1; u32 enckdbg:1; u32 enldor:1; u32 res1:5; u32 enldod:1; u32 enldoc:1; u32 endiv:1; u32 envttc:1; u32 envttd:4; } bits; }; union dphy_ana4_reg_t { u32 dwval; struct { u32 reg_txpusd:2; u32 reg_txpusc:2; u32 reg_txdnsd:2; u32 reg_txdnsc:2; u32 reg_tmsd:2; u32 reg_tmsc:2; u32 reg_ckdv:5; u32 reg_vtt_set:3; u32 reg_dmplvd:4; u32 reg_dmplvc:1; u32 reg_ib:2; u32 res4:1; u32 reg_comtest:2; u32 en_comtest:1; u32 en_mipi:1; } bits; }; union dphy_int_en0_reg_t { u32 dwval; struct { u32 sot_d0_int:1; u32 sot_d1_int:1; u32 sot_d2_int:1; u32 sot_d3_int:1; u32 sot_err_d0_int:1; u32 sot_err_d1_int:1; u32 sot_err_d2_int:1; u32 sot_err_d3_int:1; u32 sot_sync_err_d0_int:1; u32 sot_sync_err_d1_int:1; u32 sot_sync_err_d2_int:1; u32 sot_sync_err_d3_int:1; u32 rx_alg_err_d0_int:1; u32 rx_alg_err_d1_int:1; u32 rx_alg_err_d2_int:1; u32 rx_alg_err_d3_int:1; u32 res0:6; u32 cd_lp0_err_clk_int:1; u32 cd_lp1_err_clk_int:1; u32 cd_lp0_err_d0_int:1; u32 cd_lp1_err_d0_int:1; u32 cd_lp0_err_d1_int:1; u32 cd_lp1_err_d1_int:1; u32 cd_lp0_err_d2_int:1; u32 cd_lp1_err_d2_int:1; u32 cd_lp0_err_d3_int:1; u32 cd_lp1_err_d3_int:1; } bits; }; union dphy_int_en1_reg_t { u32 dwval; struct { u32 ulps_d0_int:1; u32 ulps_d1_int:1; u32 ulps_d2_int:1; u32 ulps_d3_int:1; u32 ulps_wp_d0_int:1; u32 ulps_wp_d1_int:1; u32 ulps_wp_d2_int:1; u32 ulps_wp_d3_int:1; u32 ulps_clk_int:1; u32 ulps_wp_clk_int:1; u32 res0:2; u32 lpdt_d0_int:1; u32 rx_trnd_d0_int:1; u32 tx_trnd_err_d0_int:1; u32 undef1_d0_int:1; u32 undef2_d0_int:1; u32 undef3_d0_int:1; u32 undef4_d0_int:1; u32 undef5_d0_int:1; u32 rst_d0_int:1; u32 rst_d1_int:1; u32 rst_d2_int:1; u32 rst_d3_int:1; u32 esc_cmd_err_d0_int:1; u32 esc_cmd_err_d1_int:1; u32 esc_cmd_err_d2_int:1; u32 esc_cmd_err_d3_int:1; u32 false_ctl_d0_int:1; u32 false_ctl_d1_int:1; u32 false_ctl_d2_int:1; u32 false_ctl_d3_int:1; } bits; }; union dphy_int_en2_reg_t { u32 dwval; struct { u32 res0; } bits; }; union dphy_int_pd0_reg_t { u32 dwval; struct { u32 sot_d0_pd:1; u32 sot_d1_pd:1; u32 sot_d2_pd:1; u32 sot_d3_pd:1; u32 sot_err_d0_pd:1; u32 sot_err_d1_pd:1; u32 sot_err_d2_pd:1; u32 sot_err_d3_pd:1; u32 sot_sync_err_d0_pd:1; u32 sot_sync_err_d1_pd:1; u32 sot_sync_err_d2_pd:1; u32 sot_sync_err_d3_pd:1; u32 rx_alg_err_d0_pd:1; u32 rx_alg_err_d1_pd:1; u32 rx_alg_err_d2_pd:1; u32 rx_alg_err_d3_pd:1; u32 res0:6; u32 cd_lp0_err_clk_pd:1; u32 cd_lp1_err_clk_pd:1; u32 cd_lp0_err_d1_pd:1; u32 cd_lp1_err_d1_pd:1; u32 cd_lp0_err_d0_pd:1; u32 cd_lp1_err_d0_pd:1; u32 cd_lp0_err_d2_pd:1; u32 cd_lp1_err_d2_pd:1; u32 cd_lp0_err_d3_pd:1; u32 cd_lp1_err_d3_pd:1; } bits; }; union dphy_int_pd1_reg_t { u32 dwval; struct { u32 ulps_d0_pd:1; u32 ulps_d1_pd:1; u32 ulps_d2_pd:1; u32 ulps_d3_pd:1; u32 ulps_wp_d0_pd:1; u32 ulps_wp_d1_pd:1; u32 ulps_wp_d2_pd:1; u32 ulps_wp_d3_pd:1; u32 ulps_clk_pd:1; u32 ulps_wp_clk_pd:1; u32 res0:2; u32 lpdt_d0_pd:1; u32 rx_trnd_d0_pd:1; u32 tx_trnd_err_d0_pd:1; u32 undef1_d0_pd:1; u32 undef2_d0_pd:1; u32 undef3_d0_pd:1; u32 undef4_d0_pd:1; u32 undef5_d0_pd:1; u32 rst_d0_pd:1; u32 rst_d1_pd:1; u32 rst_d2_pd:1; u32 rst_d3_pd:1; u32 esc_cmd_err_d0_pd:1; u32 esc_cmd_err_d1_pd:1; u32 esc_cmd_err_d2_pd:1; u32 esc_cmd_err_d3_pd:1; u32 false_ctl_d0_pd:1; u32 false_ctl_d1_pd:1; u32 false_ctl_d2_pd:1; u32 false_ctl_d3_pd:1; } bits; }; union dphy_int_pd2_reg_t { u32 dwval; struct { u32 res0; } bits; }; union dphy_dbg0_reg_t { u32 dwval; struct { u32 lptx_sta_d0:3; u32 res0:1; u32 lptx_sta_d1:3; u32 res1:1; u32 lptx_sta_d2:3; u32 res2:1; u32 lptx_sta_d3:3; u32 res3:1; u32 lptx_sta_clk:3; u32 res4:9; u32 direction:1; u32 res5:3; } bits; }; union dphy_dbg1_reg_t { u32 dwval; struct { u32 lptx_dbg_en:1; u32 hstx_dbg_en:1; u32 res0:2; u32 lptx_set_d0:2; u32 lptx_set_d1:2; u32 lptx_set_d2:2; u32 lptx_set_d3:2; u32 lptx_set_ck:2; u32 res1:18; } bits; }; union dphy_dbg2_reg_t { u32 dwval; struct { u32 hstx_data; } bits; }; union dphy_dbg3_reg_t { u32 dwval; struct { u32 lprx_sta_d0:4; u32 lprx_sta_d1:4; u32 lprx_sta_d2:4; u32 lprx_sta_d3:4; u32 lprx_sta_clk:4; u32 res0:12; } bits; }; union dphy_dbg4_reg_t { u32 dwval; struct { u32 lprx_phy_d0:2; u32 lprx_phy_d1:2; u32 lprx_phy_d2:2; u32 lprx_phy_d3:2; u32 lprx_phy_clk:2; u32 res0:6; u32 lpcd_phy_d0:2; u32 lpcd_phy_d1:2; u32 lpcd_phy_d2:2; u32 lpcd_phy_d3:2; u32 lpcd_phy_clk:2; u32 res1:6; } bits; }; union dphy_dbg5_reg_t { u32 dwval; struct { u32 hsrx_data; } bits; }; union dphy_reservd_reg_t { u32 dwval; struct { u32 res0; } bits; }; union dphy_tx_skew_reg0_t { __u32 dwavl; struct { __u32 reg_skewcal_sync : 8 ; // default: 0; __u32 reg_skewcal : 8 ; // default: 0; __u32 skewcal_trail_set : 8 ; // default: 0; __u32 skewcal_zero_set : 8 ; // default: 0; } bits; }; union dphy_tx_skew_reg1_t { __u32 dwval; struct { __u32 skewcal_init_set : 16 ; // default: 0; __u32 skewcal_pedic_set : 8 ; // default: 0; __u32 skewcal_sync_set : 8 ; // default: 0; } bits; }; union dphy_tx_skew_reg2_t { __u32 dwval; struct { __u32 skewcal_prepare_lp00 : 8 ; //default: 0; __u32 skewcal_trail_inv : 1 ; //default: 0; __u32 en_skewcal_perdic : 1 ; //default: 0; __u32 en_skewcal_init : 1 ; //default: 0; __u32 res0 : 21 ; //default: 0; } bits; }; union dphy_pll_reg0_t { __u32 dwval; struct { __u32 m1 : 4 ; //default: 0x3; __u32 m0 : 2 ; //default: 0; __u32 tdiv : 1 ; //default: 0; __u32 ndet : 1 ; //default: 0x1; __u32 n : 8 ; //default: 0x32; __u32 p : 4 ; //default: 0; __u32 pll_en : 1 ; //default: 0x1; __u32 en_lvs : 1 ; //default: 0x1; __u32 ldo_en : 1 ; //default: 0x1; __u32 cp36_en : 1 ; //default: 0x1; __u32 res0 : 8 ; //default: 0; } bits; }; union dphy_pll_reg1_t { __u32 dwval; struct { __u32 test_en : 1 ; //default: 0x1; __u32 atest_sel : 2 ; //default: 0; __u32 icp_sel : 2 ; //default: 0; __u32 lpf_sw : 1 ; //default: 0; __u32 vsetd : 3 ; //default: 0x2; __u32 vseta : 3 ; //default: 0x2; __u32 lockdet_en : 1 ; //default: 0; __u32 lockmdsel : 1 ; //default: 0; __u32 unlock_mdsel : 2 ; //default: 0; __u32 res0 : 16 ; //default: 0; } bits; }; union dphy_pll_reg2_t { __u32 dwval; struct { __u32 frac : 12 ; //default: 0x800; __u32 ss_int : 8 ; //default: 0x32; __u32 ss_frac : 9 ; //default: 0; __u32 ss_en : 1 ; //default: 0; __u32 ff_en : 1 ; //default: 0; __u32 sdm_en : 1 ; //default: 0x1; } bits; }; union combo_phy_reg0_t { __u32 dwval; struct { __u32 en_cp : 1 ; //default: 0; __u32 en_comboldo : 1 ; //default: 0; __u32 en_lvds : 1 ; //default: 0; __u32 en_mipi : 1 ; //default: 0; __u32 en_test_0p8 : 1 ; //default: 0; __u32 en_test_comboldo : 1 ; //default: 0; __u32 res0 : 26; //default: 0; } bits; }; union combo_phy_reg1_t { __u32 dwval; struct { __u32 reg_vref0p8 : 3 ; //default: 0; __u32 res0 : 1 ; //default: 0; __u32 reg_vref1p6 : 3 ; //default: 0; __u32 res1 : 25; //default: 0; } bits; }; union combo_phy_reg2_t { __u32 dwval; struct { __u32 hs_stop_dly : 8 ; //default: 0; __u32 res0 : 24; //default: 0; } bits; }; /* dphy register define */ struct __de_dsi_dphy_dev_t { /* 0x00 - 0x0c */ union dphy_ctl_reg_t dphy_gctl; union dphy_tx_ctl_reg_t dphy_tx_ctl; union dphy_rx_ctl_reg_t dphy_rx_ctl; union dphy_reservd_reg_t dphy_reg00c; /* 0x10 - 0x1c */ union dphy_tx_time0_reg_t dphy_tx_time0; union dphy_tx_time1_reg_t dphy_tx_time1; union dphy_tx_time2_reg_t dphy_tx_time2; union dphy_tx_time3_reg_t dphy_tx_time3; /* 0x20 - 0x2c */ union dphy_tx_time4_reg_t dphy_tx_time4; union dphy_reservd_reg_t dphy_reg024[3]; /* 0x30 - 0x3c */ union dphy_rx_time0_reg_t dphy_rx_time0; union dphy_rx_time1_reg_t dphy_rx_time1; union dphy_rx_time2_reg_t dphy_rx_time2; union dphy_reservd_reg_t dphy_reg03c; /* 0x40 - 0x4c */ union dphy_rx_time3_reg_t dphy_rx_time3; union dphy_reservd_reg_t dphy_reg044[2]; union dphy_ana0_reg_t dphy_ana0; /* 0x50 - 0x5c */ union dphy_ana1_reg_t dphy_ana1; union dphy_ana2_reg_t dphy_ana2; union dphy_ana3_reg_t dphy_ana3; union dphy_ana4_reg_t dphy_ana4; /* 0x60 - 0x6c */ union dphy_int_en0_reg_t dphy_int_en0; union dphy_int_en1_reg_t dphy_int_en1; union dphy_int_en2_reg_t dphy_int_en2; union dphy_reservd_reg_t dphy_reg06c; /* 0x70 - 0x7c */ union dphy_int_pd0_reg_t dphy_int_pd0; union dphy_int_pd1_reg_t dphy_int_pd1; union dphy_int_pd2_reg_t dphy_int_pd2; union dphy_reservd_reg_t dphy_reg07c; /* 0x80 - 0xdc */ union dphy_reservd_reg_t dphy_reg080[24]; /* 0xe0 - 0xec */ union dphy_dbg0_reg_t dphy_dbg0; union dphy_dbg1_reg_t dphy_dbg1; union dphy_dbg2_reg_t dphy_dbg2; union dphy_dbg3_reg_t dphy_dbg3; /* 0xf0 - 0xfc */ union dphy_dbg4_reg_t dphy_dbg4; union dphy_dbg5_reg_t dphy_dbg5; union dphy_tx_skew_reg0_t dphy_tx_skew_reg0; /*0xf8 */ union dphy_tx_skew_reg1_t dphy_tx_skew_reg1; /*0xfc */ union dphy_tx_skew_reg2_t dphy_tx_skew_reg2; /*0x100 */ union dphy_pll_reg0_t dphy_pll_reg0; /*0x104 */ union dphy_pll_reg1_t dphy_pll_reg1; /*0x108 */ union dphy_pll_reg2_t dphy_pll_reg2; /*0x10c */ union combo_phy_reg0_t combo_phy_reg0; /*0x110 */ union combo_phy_reg1_t combo_phy_reg1; /*0x114 */ union combo_phy_reg2_t combo_phy_reg2; /*0x118 */ }; union dsi_ph_t { struct { u32 byte012:24; u32 byte3:8; } bytes; struct { u32 bit00:1; u32 bit01:1; u32 bit02:1; u32 bit03:1; u32 bit04:1; u32 bit05:1; u32 bit06:1; u32 bit07:1; u32 bit08:1; u32 bit09:1; u32 bit10:1; u32 bit11:1; u32 bit12:1; u32 bit13:1; u32 bit14:1; u32 bit15:1; u32 bit16:1; u32 bit17:1; u32 bit18:1; u32 bit19:1; u32 bit20:1; u32 bit21:1; u32 bit22:1; u32 bit23:1; u32 bit24:1; u32 bit25:1; u32 bit26:1; u32 bit27:1; u32 bit28:1; u32 bit29:1; u32 bit30:1; u32 bit31:1; } bits; };来源：RT-Thread 官方仓库：https://github.com/RT-Thread/rt-thread/blob/master/bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/disp/de/lowlevel_v2x/de_dsi_type.h
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回复: D1S 如何通过nor flash启动发布在 MR Series
@towel_roll D1-H哪吒MIPI屏幕测试固件（TFT08006）.img 是使用 NAND 的，不能刷进NOR存储器里
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回复: A133編譯kernel 遇到error trying to exec cc1: execvp : No such file or directory发布在 其它全志芯片讨论区
环境没有安装
Ubuntu 22.04 / 20.04
- 更新软件源，更新系统软件包
sudo apt-get update sudo apt-get upgrade -y- 安装开发依赖
sudo apt-get install build-essential subversion git libncurses5-dev zlib1g-dev gawk flex bison quilt libssl-dev xsltproc libxml-parser-perl mercurial bzr ecj cvs unzip lsof- 安装相关工具
sudo apt-get install kconfig-frontends android-tools-mkbootimg python2 libpython3-dev- 增加架构支持
sudo dpkg --add-architecture i386 sudo apt-get update- 安装支持包
sudo apt install gcc-multilib sudo apt install libc6:i386 libstdc++6:i386 lib32z1Ubuntu 18.04
- 更新软件源，更新系统软件包
sudo apt-get update sudo apt-get upgrade -y- 安装开发依赖
sudo apt-get install build-essential subversion git libncurses5-dev zlib1g-dev gawk flex bison quilt libssl-dev xsltproc libxml-parser-perl mercurial bzr ecj cvs unzip lsof- 安装相关工具
sudo apt-get install android-tools-mkbootimg libpython3-dev- 增加架构支持
sudo dpkg --add-architecture i386 sudo apt-get update- 安装支持包
sudo apt install gcc-multilib sudo apt install libc6:i386 libstdc++6:i386 lib32z1Arch Linux / Manjaro
- 更新软件源，更新系统软件包
pacman -Syyuu- 安装开发依赖
pacman -S --needed base-devel autoconf automake bash binutils bison bzip2 fakeroot file findutils flex gawk gcc gettext git grep groff gzip time unzip util-linux wget which zlib asciidoc help2man intltool perl-extutils-makemaker swig- 安装相关工具
pacman -S --needed libelf libtool libxslt m4 make ncurses openssl patch pkgconf python rsync sed texinfo- 增加架构支持
pacman -S --needed multilib-develCentOS / Fedora / openEuler
sudo dnf --setopt install_weak_deps=False --skip-broken install bash-completion bzip2 gcc gcc-c++ git make ncurses-devel patch rsync tar unzip wget which diffutils python2 python3 perl-base perl-Data-Dumper perl-File-Compare perl-File-Copy perl-FindBin perl-Thread-Queue glibc.i686openSUSE
sudo zypper install --no-recommends asciidoc bash bc binutils bzip2 fastjar flex gawk gcc -
回复: 有R128点亮百问网7寸RGB屏的DEMO吗？发布在 A Series
R128-S2 驱动 1024x600 RGB 显示屏 并运行 LVGL
https://bbs.aw-ol.com/topic/4316/share/1 -
回复: 求助！T113 Tina Linux编译报错，intltool-0.51.0发布在 MR Series
@tsy2001 选中之后会勾选依赖，但是取消的时候不会取消依赖的勾选，得去对应配置取消
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回复: 请教如何排查 linux kernel 启动卡主的问题发布在 Linux
@xsyr1024 tina其实就是openwrt，在openwrt中的KERNEL_开头的选项就是会影响到内核配置
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回复: T113开机LOGO闪烁问题发布在 MR Series
@lansecd 在 T113开机LOGO闪烁问题 中说：
@awwwwa 2.1的SDK可以分享一下么
新 SDK 平台下载 D1-H/D1s SDK
https://bbs.aw-ol.com/topic/3947/share/1下载这个即可
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回复: A40i tf卡固化系统到emmc剩余空间指定发布在 飞凌嵌入式专区
@dort91011 这个是UDISK分区，是烧录软件在烧录的时候自动划分的空间。如果需要手动配置，请在sys_partition.fex里手动配置这个分区的size
