全志在线开发者论坛

柚木鉉

@ubuntu 升级下应该就好了

柚木鉉

这个版本的dtc有一个问题，default-xxx会解析错误

柚木鉉

@yelong98 咋可能，就是参考原厂的画出来的

柚木鉉

参考下这个

【视频】八分钟，教你下载 D1-H Tina SDK
https://bbs.aw-ol.com/topic/1177/share/1

柚木鉉

@mumula 不要在nfs里编译

柚木鉉

基本完工，再优化下走线

柚木鉉

@jordonwu 不会，这个是自己做了玩的

柚木鉉

@mumula 使用tina-d1-h.xml下载新版本的

柚木鉉

@nezhastu 重复boot0我也遇到过，sd卡格式化重新刷就好了

柚木鉉

@whycan 听好多大佬说会这样

柚木鉉

wifi_efuse_8189fs.map is not readable 传说中的efuse被冲了？

柚木鉉

@mhcsoft 配置下inittab里的绑定，busybox和procd不太一样

柚木鉉

@smiletiger 那个是定义在kconfig里的，有一个default默认值，defconfig是精简的，如果与默认值相同那就不会在精简配置中定义

柚木鉉

没看懂，我这里点灯没问题的

柚木鉉

@molin2050 需要改内存物料，软件不用改

柚木鉉

@allwinnertech 最好把芯片也放出来

柚木鉉

@gregrgr SPI初始化屏幕，设置屏幕参数模式，然后让屏幕进入RGB模式，使用RGB666刷屏.当然你也可以让屏幕进MIPI模式用MIPI刷。不是SPI刷屏，那不得慢死。测试刷720p的屏幕可以到60fps

柚木鉉

虽然没有官方库，但是有第三方库，还有很多

柚木鉉

背面：

eim

柚木鉉

YuzukiCK1N小电脑

支持USB
3.5音频输出
板载百兆网络
eMMC储存
Wi-Fi
128M内存，ARM A7
4寸方屏，支持480480或720720分辨率
电容触摸

软件

软件使用 Linux 5.4.180、U-Boot 2022.01
SDK：https://github.com/YuzukiHD/Buildroot-YuzukiSBC
SDK开发说明：https://yuzukihd.gloomyghost.com/Buildroot-YuzukiSBC/#/
固件下载：https://github.com/YuzukiHD/Buildroot-YuzukiSBC/releases/

硬件

开源地址：https://oshwhub.com/GloomyGhost/yuzukick1n

柚木鉉

屏幕是在UBOOT进行初始化的，初始化代码：

#ifndef _LCD_PANEL_INIT_H_
#define _LCD_PANEL_INIT_H_

#include <asm/gpio.h>
#include <asm/arch/gpio.h>

#define DELAYBIT 10

#define YS_LOG(fmt, arg...)                                                                                                        \
	do {                                                                                                                       \
		printf(fmt, ##arg);                                                                                                \
	} while (0)

#define YS_DBG(fmt, arg...) YS_LOG("[Yuzuki LCD sSPI] " fmt, ##arg)

#define st7701s_spi_sdi_0 gpio_direction_output(LCD_MOSI, 0)
#define st7701s_spi_sdi_1 gpio_direction_output(LCD_MOSI, 1)
#define st7701s_spi_scl_0 gpio_direction_output(LCD_CLK, 0)
#define st7701s_spi_scl_1 gpio_direction_output(LCD_CLK, 1)

int LCD_RST; // PG10
int LCD_MOSI; // PG11
int LCD_CLK; // PG12
int LCD_BL; // PG12

void lcd_delay_ms(int ms)
{
	unsigned long long delay = ms * 1000 * 20;
	while (delay--)
		asm volatile("nop");
}

void sunxi_lcd_delay_us(int us)
{
	unsigned long long delay = 100 * us;
	while (delay--)
		asm volatile("nop");
}

int SPI_Init(void)
{
	int ret;

	LCD_RST = sunxi_name_to_gpio("PG10");
	if (LCD_RST < 0) {
		YS_DBG("Error invalid LCD RST pin: PG, err %d\n", LCD_RST);
		return LCD_RST;
	}
	ret = gpio_request(LCD_RST, "LCD_RST");
	if (ret) {
		YS_DBG("Error invalid LCD_RST pin: PG, err %d\n", LCD_RST);
		return ret;
	}
	YS_DBG("PG10 --> LCD_RST request OK\n");

	LCD_MOSI = sunxi_name_to_gpio("PG11");
	if (LCD_MOSI < 0) {
		YS_DBG("Error invalid LCD_MOSI pin: PG, err %d\n", LCD_MOSI);
		return LCD_MOSI;
	}
	ret = gpio_request(LCD_MOSI, "LCD_MOSI");
	if (ret) {
		YS_DBG("Error invalid LCD_MOSI pin: PG, err %d\n", LCD_MOSI);
		return ret;
	}
	YS_DBG("PG11 --> LCD_MOSI request OK\n");

	LCD_CLK = sunxi_name_to_gpio("PG12");
	if (LCD_CLK < 0) {
		YS_DBG("Error invalid LCD_CLK pin: PG, err %d\n", LCD_CLK);
		return LCD_CLK;
	}
	ret = gpio_request(LCD_CLK, "LCD_CLK");
	if (ret) {
		YS_DBG("Error invalid LCD_CLK pin: PG, err %d\n", LCD_CLK);
		return ret;
	}
	YS_DBG("PG12 --> LCD_CLK request OK\n");

	LCD_BL = sunxi_name_to_gpio("PB4");
	if (LCD_BL < 0) {
		YS_DBG("Error invalid LCD_CLK pin: PG, err %d\n", LCD_BL);
		return LCD_BL;
	}
	ret = gpio_request(LCD_BL, "LCD_BL");
	if (ret) {
		YS_DBG("Error invalid LCD_BL pin: PG, err %d\n", LCD_BL);
		return ret;
	}
	YS_DBG("PB4 --> LCD_BL request OK\n");

	gpio_direction_output(LCD_RST, 1);
	gpio_direction_output(LCD_MOSI, 1);
	gpio_direction_output(LCD_CLK, 1);

	return 0;
}

void LCD_WRITE_DATA(unsigned int value)
{
	unsigned int i;
	st7701s_spi_sdi_1;
	st7701s_spi_scl_0;
	sunxi_lcd_delay_us(10);
	st7701s_spi_scl_1;
	for (i = 0; i < 8; i++) {
		sunxi_lcd_delay_us(10);
		if (value & 0x80)
			st7701s_spi_sdi_1;
		else
			st7701s_spi_sdi_0;
		value <<= 1;
		sunxi_lcd_delay_us(10);
		st7701s_spi_scl_0;
		st7701s_spi_scl_1;
	}
	sunxi_lcd_delay_us(10);
}

void LCD_WRITE_COMMAND(unsigned int value)
{
	unsigned int i;
	st7701s_spi_sdi_0;
	st7701s_spi_scl_0;
	sunxi_lcd_delay_us(10);
	st7701s_spi_scl_1;
	for (i = 0; i < 8; i++) {
		sunxi_lcd_delay_us(10);
		if (value & 0x80)
			st7701s_spi_sdi_1;
		else
			st7701s_spi_sdi_0;
		st7701s_spi_scl_0;
		sunxi_lcd_delay_us(10);
		st7701s_spi_scl_1;
		value <<= 1;
	}
	sunxi_lcd_delay_us(10);
}

void LCD_Init(void)
{
	YS_DBG("LCD Panel ST7701s init\n");
	SPI_Init();

	lcd_delay_ms(1000);

	gpio_direction_output(LCD_RST, 0);
	lcd_delay_ms(120);

	gpio_direction_output(LCD_RST, 1);
	lcd_delay_ms(120);

	LCD_WRITE_COMMAND(0xFF);
	LCD_WRITE_DATA(0x77);
	LCD_WRITE_DATA(0x01);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x10);

	LCD_WRITE_COMMAND(0xC0);
	LCD_WRITE_DATA(0x3B);
	LCD_WRITE_DATA(0x00);

	LCD_WRITE_COMMAND(0xC1);
	LCD_WRITE_DATA(0x0D);
	LCD_WRITE_DATA(0x02);

	LCD_WRITE_COMMAND(0xC2);
	LCD_WRITE_DATA(0x21);
	LCD_WRITE_DATA(0x08);

	LCD_WRITE_COMMAND(0xCD);
	LCD_WRITE_DATA(0x18); //0F 08-OK  D0-D18

	LCD_WRITE_COMMAND(0xB0);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x11);
	LCD_WRITE_DATA(0x18);
	LCD_WRITE_DATA(0x0E);
	LCD_WRITE_DATA(0x11);
	LCD_WRITE_DATA(0x06);
	LCD_WRITE_DATA(0x07);
	LCD_WRITE_DATA(0x08);
	LCD_WRITE_DATA(0x07);
	LCD_WRITE_DATA(0x22);
	LCD_WRITE_DATA(0x04);
	LCD_WRITE_DATA(0x12);
	LCD_WRITE_DATA(0x0F);
	LCD_WRITE_DATA(0xAA);
	LCD_WRITE_DATA(0x31);
	LCD_WRITE_DATA(0x18);

	LCD_WRITE_COMMAND(0xB1);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x11);
	LCD_WRITE_DATA(0x19);
	LCD_WRITE_DATA(0x0E);
	LCD_WRITE_DATA(0x12);
	LCD_WRITE_DATA(0x07);
	LCD_WRITE_DATA(0x08);
	LCD_WRITE_DATA(0x08);
	LCD_WRITE_DATA(0x08);
	LCD_WRITE_DATA(0x22);
	LCD_WRITE_DATA(0x04);
	LCD_WRITE_DATA(0x11);
	LCD_WRITE_DATA(0x11);
	LCD_WRITE_DATA(0xA9);
	LCD_WRITE_DATA(0x32);
	LCD_WRITE_DATA(0x18);

	LCD_WRITE_COMMAND(0xFF);
	LCD_WRITE_DATA(0x77);
	LCD_WRITE_DATA(0x01);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x11);

	LCD_WRITE_COMMAND(0xB0);
	LCD_WRITE_DATA(0x60);

	LCD_WRITE_COMMAND(0xB1);
	LCD_WRITE_DATA(0x30);

	LCD_WRITE_COMMAND(0xB2);
	LCD_WRITE_DATA(0x87);

	LCD_WRITE_COMMAND(0xB3);
	LCD_WRITE_DATA(0x80);

	LCD_WRITE_COMMAND(0xB5);
	LCD_WRITE_DATA(0x49);

	LCD_WRITE_COMMAND(0xB7);
	LCD_WRITE_DATA(0x85);

	LCD_WRITE_COMMAND(0xB8);
	LCD_WRITE_DATA(0x21);

	LCD_WRITE_COMMAND(0xC1);
	LCD_WRITE_DATA(0x78);

	LCD_WRITE_COMMAND(0xC2);
	LCD_WRITE_DATA(0x78);
	lcd_delay_ms(20);

	LCD_WRITE_COMMAND(0xE0);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x1B);
	LCD_WRITE_DATA(0x02);

	LCD_WRITE_COMMAND(0xE1);
	LCD_WRITE_DATA(0x08);
	LCD_WRITE_DATA(0xA0);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x07);
	LCD_WRITE_DATA(0xA0);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x44);
	LCD_WRITE_DATA(0x44);

	LCD_WRITE_COMMAND(0xE2);
	LCD_WRITE_DATA(0x11);
	LCD_WRITE_DATA(0x11);
	LCD_WRITE_DATA(0x44);
	LCD_WRITE_DATA(0x44);
	LCD_WRITE_DATA(0xED);
	LCD_WRITE_DATA(0xA0);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0xEC);
	LCD_WRITE_DATA(0xA0);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);

	LCD_WRITE_COMMAND(0xE3);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x11);
	LCD_WRITE_DATA(0x11);

	LCD_WRITE_COMMAND(0xE4);
	LCD_WRITE_DATA(0x44);
	LCD_WRITE_DATA(0x44);

	LCD_WRITE_COMMAND(0xE5);
	LCD_WRITE_DATA(0x0A);
	LCD_WRITE_DATA(0xE9);
	LCD_WRITE_DATA(0xD8);
	LCD_WRITE_DATA(0xA0);
	LCD_WRITE_DATA(0x0C);
	LCD_WRITE_DATA(0xEB);
	LCD_WRITE_DATA(0xD8);
	LCD_WRITE_DATA(0xA0);
	LCD_WRITE_DATA(0x0E);
	LCD_WRITE_DATA(0xED);
	LCD_WRITE_DATA(0xD8);
	LCD_WRITE_DATA(0xA0);
	LCD_WRITE_DATA(0x10);
	LCD_WRITE_DATA(0xEF);
	LCD_WRITE_DATA(0xD8);
	LCD_WRITE_DATA(0xA0);

	LCD_WRITE_COMMAND(0xE6);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x11);
	LCD_WRITE_DATA(0x11);

	LCD_WRITE_COMMAND(0xE7);
	LCD_WRITE_DATA(0x44);
	LCD_WRITE_DATA(0x44);

	LCD_WRITE_COMMAND(0xE8);
	LCD_WRITE_DATA(0x09);
	LCD_WRITE_DATA(0xE8);
	LCD_WRITE_DATA(0xD8);
	LCD_WRITE_DATA(0xA0);
	LCD_WRITE_DATA(0x0B);
	LCD_WRITE_DATA(0xEA);
	LCD_WRITE_DATA(0xD8);
	LCD_WRITE_DATA(0xA0);
	LCD_WRITE_DATA(0x0D);
	LCD_WRITE_DATA(0xEC);
	LCD_WRITE_DATA(0xD8);
	LCD_WRITE_DATA(0xA0);
	LCD_WRITE_DATA(0x0F);
	LCD_WRITE_DATA(0xEE);
	LCD_WRITE_DATA(0xD8);
	LCD_WRITE_DATA(0xA0);

	LCD_WRITE_COMMAND(0xEB);
	LCD_WRITE_DATA(0x02);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0xE4);
	LCD_WRITE_DATA(0xE4);
	LCD_WRITE_DATA(0x88);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x40);

	LCD_WRITE_COMMAND(0xEC);
	LCD_WRITE_DATA(0x3C);
	LCD_WRITE_DATA(0x00);

	LCD_WRITE_COMMAND(0xED);
	LCD_WRITE_DATA(0xAB);
	LCD_WRITE_DATA(0x89);
	LCD_WRITE_DATA(0x76);
	LCD_WRITE_DATA(0x54);
	LCD_WRITE_DATA(0x02);
	LCD_WRITE_DATA(0xFF);
	LCD_WRITE_DATA(0xFF);
	LCD_WRITE_DATA(0xFF);
	LCD_WRITE_DATA(0xFF);
	LCD_WRITE_DATA(0xFF);
	LCD_WRITE_DATA(0xFF);
	LCD_WRITE_DATA(0x20);
	LCD_WRITE_DATA(0x45);
	LCD_WRITE_DATA(0x67);
	LCD_WRITE_DATA(0x98);
	LCD_WRITE_DATA(0xBA);

	LCD_WRITE_COMMAND(0xFF);
	LCD_WRITE_DATA(0x77);
	LCD_WRITE_DATA(0x01);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);
	LCD_WRITE_DATA(0x00);

	LCD_WRITE_COMMAND(0x3A);
	LCD_WRITE_DATA(0x66);

	LCD_WRITE_COMMAND(0x36);
	LCD_WRITE_DATA(0x00);

	LCD_WRITE_COMMAND(0x21);

	LCD_WRITE_COMMAND(0x11);
	lcd_delay_ms(120);

	LCD_WRITE_COMMAND(0x29);
	lcd_delay_ms(120);
}

#endif // _LCD_PANEL_INIT_H_

柚木鉉

测试驱动屏幕
7016caf9-6128-4db8-ae91-651d4281fcaf-1768b7e3f5e86e4e660d72afec3f10c.jpg

柚木鉉

@gregrgr 没试过，可以试试看

柚木鉉

@andy89926 直接broken-cd好了（

柚木鉉

原理图：SCH_R11_86_Panel_2022-05-10.pdf
Gerber：4509cffe-4971-4f8b-bbf7-65970f8d6d11-Gerber_PCB1_2022-06-18.zip
立创EDA专业版工程文件：cf5cf19a-e977-4e9f-be5b-988c5bbf3709-ProProject_R11+86Panel_2022-06-18.zip

适配了 Kernel: 5.4.180 U-Boot 2022.01

SDK： https://github.com/YuzukiHD/Buildroot-YuzukiSBC
SDK开发文档：https://yuzukihd.gloomyghost.com/Buildroot-YuzukiSBC/#/

选择yuzukihd_r11_86panel_defconfig

柚木鉉

柚木鉉

@andy89926 硬件设计是正确的吗，我这里有一个卡槽的CD脚是插入上拉，坑了我一整天

柚木鉉

@liangjian 是功能选择，对应的是GPIO的功能复用号

柚木鉉

@andy89926 cd卡插入检测脚错误了

柚木鉉

@andy89926 https://open.allwinnertech.com/

柚木鉉

@yelong98 一样的，拷贝出来修改一下makefile，然后交叉编译就行了

柚木鉉

lvgl可以直接参考tina/package/gui/lvgl里的代码，还包含G2D驱动和双缓

柚木鉉

@ubuntu 飞线了（x

柚木鉉

WiFi，CSI，RCSI上线了

柚木鉉

@gregrgr 可能是有点漏电，不过其实不影响

柚木鉉

@gregrgr 对，参考我的

柚木鉉

@gregrgr 外围设备呢，可能出现外围灌入IO的情况，因为内部这个电压是内置PMU管理的

柚木鉉

先检查一下外围有没有问题，这部分看着没什么大问题

柚木鉉

@smiletiger
可以参考 https://github.com/YuzukiHD/Buildroot-YuzukiSBC 里的 https://github.com/YuzukiHD/Buildroot-YuzukiSBC/tree/master/buildroot/board/mangopi/mq-dual/patch/uboot 部分，可以把uboot转为标准编译模式。这个是打包bootimg的方法 https://github.com/YuzukiHD/Buildroot-YuzukiSBC/blob/master/buildroot/board/allwinner-generic/sun8i-generic/scripts/post-build.sh

柚木鉉

柚木鉉

@mstempin 绑定PMU？

柚木鉉

试试使用全盘擦除升级

柚木鉉

是什么开发板？希望烧录到什么储存设备上？

柚木鉉

热风枪热一热看看芯片内有没有虚焊（？

柚木鉉

最好用repo和git管理历史版本，或者手动备份

柚木鉉

@smiletiger 不是必须的

柚木鉉

@mhcsoft 在 qt5配置报错中说：

nss quickder.c

感觉是不是QMake写错了，试试nss/quickder.c

柚木鉉

T113资料不多，要靠自己了

柚木鉉

@jiangh 没钱打啊

柚木鉉

支持硬解码，systemd要自己适配下，也支持

柚木鉉

emmc也并网了

柚木鉉

8bit的不多见哦

柚木鉉

稍稍布线下

柚木鉉

V853 ARM A7 + RISC-V E907 + 1T NPU
UP to 2GiB DDR3 and 128GiB EMMC
Raspberry Pi Camera Connector
2 lane MIPI-CSI
4 lane MIPI-DSI up to 1920x1200
Built-in USB to UART Support RV and ARM
Built-in XR829 Wi-Fi BT
Raspberry Pi A Size and Pinout

开源地址：https://oshwhub.com/gloomyghost/porject-yosemite

This is a high-performance heterogeneous edge AI visual processing core development board based on Allwinner V853 - Porject Yosemite. Allwinner V853 supports simultaneous heterogeneous debugging of Arm and RISC-V cores, with 1Tops NPU, and supports TensorFlow, Caffe, Tflite, Python, Onnx NN and other models.

The development board design adopts the Raspberry Pi A version, with a 40Pin IO output and a MIPI DSI screen interface, supporting up to 1920x1200 resolution MIPI screens and capacitive touch.

柚木鉉

我这里有一个程序用到了SDL，直接CMake里find_package(SDL)就好了

柚木鉉

推荐的方法是放到package里在编译文件系统的时候就引用了。

柚木鉉

@fluke8840a 论坛里搜索下就有了

柚木鉉

支持的，专门去查过

柚木鉉

@wlb965 可以，project里按照那个目录结构编写就行了，不需要完全懂

柚木鉉

@wlb965 对

柚木鉉

可以，详见：D1咋把控制台弄到hdmi上呢？
https://bbs.aw-ol.com/topic/1320/share/4

柚木鉉

有没有什么报错信息，或者截图？

柚木鉉

@zhayujie Tina开发包

柚木鉉

柚木鉉

@whycan 能换，是lpddr4 200球的，卡不卡就不知道了

柚木鉉

@xiaowenge 出口转内销

柚木鉉

@soso90 PB还是RGB

柚木鉉

测试的型号是：SCB13H4G160AF-11MI（紫光国芯-UniIC）- 可以正常使用
DRAM数据手册：UniIC-SCB13H4G160AF.pdf

柚木鉉

这里写了2个分辨率，一个1280x720，一个1920x1200，到底是按前一个还是后一个？

还是说1280*720以下分辨率可以随意修改，以上只能1920x1200

bdcc0725-14fa-4fc8-a51a-9bd3f291e21c-bdb020e2e50df077ca8656fe61da177.png

柚木鉉

可以，不影响启动，但是记得VCC-RTC不能省

柚木鉉

@woodfor comNG

柚木鉉

开源了，开源了
https://github.com/YuzukiTsuru/OpenixCard

柚木鉉

@whycan ？？？还可以这样

柚木鉉

@ubuntu 等我抓下虫就开源啦

柚木鉉

@lonerwolf REXT电阻的2.49k是一个外部参考，就跟ZQ的240欧一样，改了会导致运行不正常，至于多不正常得看芯片的容错能力了（

柚木鉉

可以用sd卡创建一个启动卡，然后使用卡烧写进去

柚木鉉

远古的坑了，最近有时间终于填了下。

线刷在Windows上有PhoenixSuit，在Linux上有LiveSuit，刷写都很方便。但是到了卡刷就寄了，只有一个Windows下的PhoenixCard，在Linux下刷写很头疼。于是写了这个小东西。

功能：

在 Linux 解包 Tina 镜像
将 Tina 镜像转换为标准的镜像，转换后的镜像可以使用DD、USB Image Tool、Win32diskimager、Etcher刷写。方便分发。
更多功能咕咕中....

开源地址

https://github.com/YuzukiTsuru/OpenixCard

视频：转换全志的镜像成为标准镜像并用Etcher刷写。

柚木鉉

@ubuntu 测试下是不是刷了efuse或者flash key

柚木鉉

@yelong98 WinHEX，固件写卡后创建镜像读写

柚木鉉

测试下

setenv bootargs earlyprintk=sunxi-uart,0x05000000 console=ttyS0,115200 root=/dev/mmcblk0p4 init=/init
sunxi_flash read 45000000 boot;bootm 45000000

柚木鉉

屏幕是K080_IM2AYC805_R_800x1280

Uboot CFG

earlyprintk=sunxi-uart,0x05000000
initcall_debug=0 
console=ttyAS0,115200 
nand_root=/dev/nand0p4 
mmc_root=/dev/mmcblk0p4 
init=/init 
loglevel=4 
cma=8M 
mac= 
wifi_mac= 
bt_mac= 
specialstr= 
force_normal_boot=1 
slot_suffix=_a 
keybox_list=widevine,ec_key,ec_cert1,ec_cert2,ec_cert3,rsa_key,rsa_cert1,rsa_cert2,rsa_cert3 
ab_partition_list=bootloader,env,boot,vendor_boot,dtbo,vbmeta,vbmeta_system,vbmeta_vendor 
trace_buf_size=64M 
trace_event=sched_wakeup,sched_switch,sched_blocked_reason,sched_cpu_hotplug,block,ext4 
trace_enable=0 
setargs_nand=setenv bootargs earlyprintk=${earlyprintk} clk_ignore_unused initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${nand_root} init=${init} cma=${cma} snum=${snum} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} specialstr=${specialstr} gpt=1 androidboot.force_normal_boot=${force_normal_boot} androidboot.slot_suffix=${slot_suffix} 
setargs_mmc=setenv  bootargs earlyprintk=${earlyprintk} clk_ignore_unused initcall_debug=${initcall_debug} console=${console} loglevel=${loglevel} root=${mmc_root}  init=${init} cma=${cma} snum=${snum} mac_addr=${mac} wifi_mac=${wifi_mac} bt_mac=${bt_mac} specialstr=${specialstr} gpt=1 androidboot.force_normal_boot=${force_normal_boot} androidboot.slot_suffix=${slot_suffix} 
boot_normal=sunxi_flash read 45000000 boot;bootm 45000000 
boot_recovery=sunxi_flash read 45000000 recovery;bootm 45000000 
boot_fastboot=fastboot bootdelay=0 
bootcmd=run setargs_nand boot_normal

柚木鉉

串口可以输入了。抓到完整的设备树

/ {
	model = "sun50iw10";
	compatible = "allwinner,a100", "arm,sun50iw10p1";
	interrupt-parent = <0x00000001>;
	#address-cells = <0x00000002>;
	#size-cells = <0x00000002>;
	clocks {
		compatible = "allwinner,clk-init";
		device_type = "clocks";
		#address-cells = <0x00000002>;
		#size-cells = <0x00000002>;
		ranges;
		reg = <0x00000000 0x03001000 0x00000000 0x00001000 0x00000000 0x07010000 0x00000000 0x00000400 0x00000000 0x07000000 0x00000000 0x00000004>;
		losc {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-clock";
			clock-frequency = <0x00008000>;
			clock-output-names = "losc";
			phandle = <0x000000b3>;
		};
		iosc {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-clock";
			clock-frequency = "", ".$";
			clock-output-names = "iosc";
			phandle = <0x000000b4>;
		};
		hosc {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-clock";
			clock-frequency = <0x016e3600>;
			clock-output-names = "hosc";
			phandle = <0x0000000a>;
		};
		osc48m {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-clock";
			clock-frequency = <0x02dc6c00>;

			clock-output-names = "osc48m";
			phandle = <0x0000000b>;
		};
		hoscdiv32k {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-clock";
			clock-frequency = <0x00008000>;
			clock-output-names = "hoscdiv32k";
			phandle = <0x000000b5>;
		};
		pll_periph0div25m {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-clock";
			clock-frequency = <0x017d7840>;
			clock-output-names = "pll_periph0div25m";
			phandle = <0x000000b6>;
		};
		pll_cpu {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			lock-mode = "new";
			clock-output-names = "pll_cpu";
			phandle = <0x000000b7>;
		};
		pll_ddr {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			lock-mode = "new";
			clock-output-names = "pll_ddr";
			phandle = <0x000000b8>;
		};
		pll_periph0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			assigned-clock-rates = "#.F";
			lock-mode = "new";
			clock-output-names = "pll_periph0";
			phandle = <0x00000006>;
		};
		pll_periph1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			assigned-clock-rates = "#.F";
			lock-mode = "new";
			clock-output-names = "pll_periph1";
			phandle = <0x00000007>;
		};
		pll_gpu {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			lock-mode = "new";
			clock-output-names = "pll_gpu";
			phandle = <0x000000b9>;
		};
		pll_video0x4 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			lock-mode = "new";
			clock-output-names = "pll_video0x4";
			phandle = <0x00000008>;
		};
		pll_video1x4 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			lock-mode = "new";
			clock-output-names = "pll_video1x4";
			phandle = <0x00000009>;
		};
		pll_video2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			lock-mode = "new";
			assigned-clocks = <0x00000002>;
			assigned-clock-rates = <0x1406f400>;
			clock-output-names = "pll_video2";
			phandle = <0x00000002>;
		};
		pll_video3 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			lock-mode = "new";
			assigned-clocks = <0x00000003>;
			assigned-clock-rates = <0x11e1a300>;
			clock-output-names = "pll_video3";
			phandle = <0x00000003>;
		};
		pll_ve {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			device_type = "clk_pll_ve";
			lock-mode = "new";
			clock-output-names = "pll_ve";

			phandle = <0x000000ba>;
		};
		pll_com {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			assigned-clocks = <0x00000004>;
			assigned-clock-rates = "#.F";
			lock-mode = "new";
			clock-output-names = "pll_com";
			phandle = <0x00000004>;
		};
		pll_audiox4 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,pll-clock";
			assigned-clocks = <0x00000005>;
			assigned-clock-rates = <0x05dc0000>;
			lock-mode = "new";
			clock-output-names = "pll_audiox4";
			phandle = <0x00000005>;
		};
		pll_periph0x2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000006>;
			clock-mult = <0x00000002>;
			clock-div = <0x00000001>;
			clock-output-names = "pll_periph0x2";
			phandle = <0x0000000c>;
		};
		pll_periph0x4 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000006>;
			clock-mult = <0x00000004>;
			clock-div = <0x00000001>;
			clock-output-names = "pll_periph0x4";
			phandle = <0x000000bb>;
		};
		periph32k {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000006>;
			clock-mult = <0x00000002>;
			clock-div = <0x00008f0d>;
			clock-output-names = "periph32k";
			phandle = <0x000000bc>;
		};
		pll_periph1x2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000007>;
			clock-mult = <0x00000002>;
			clock-div = <0x00000001>;

			clock-output-names = "pll_periph1x2";
			phandle = <0x000000bd>;
		};
		pll_comdiv5 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000004>;
			clock-mult = <0x00000001>;
			clock-div = <0x00000005>;
			clock-output-names = "pll_comdiv5";
			phandle = <0x000000be>;
		};
		pll_audiox8 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000005>;
			clock-mult = <0x00000002>;
			clock-div = <0x00000001>;
			clock-output-names = "pll_audiox8";
			phandle = <0x000000bf>;
		};
		pll_audio {
			#clock-cells = <0x00000000>;

			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000005>;
			clock-mult = <0x00000001>;
			clock-div = <0x00000004>;
			clock-output-names = "pll_audio";
			phandle = <0x000000c0>;
		};
		pll_audiox2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000005>;
			clock-mult = <0x00000001>;
			clock-div = <0x00000002>;
			clock-output-names = "pll_audiox2";
			phandle = <0x000000c1>;
		};
		pll_video0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000008>;
			clock-mult = <0x00000001>;
			clock-div = <0x00000004>;
			clock-output-names = "pll_video0";
			phandle = <0x000000c2>;
		};
		pll_video0x2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000008>;
			clock-mult = <0x00000001>;
			clock-div = <0x00000002>;
			clock-output-names = "pll_video0x2";
			phandle = <0x000000c3>;
		};
		pll_video1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000009>;
			clock-mult = <0x00000001>;
			clock-div = <0x00000004>;
			clock-output-names = "pll_video1";
			phandle = <0x000000c4>;
		};
		pll_video1x2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000009>;
			clock-mult = <0x00000001>;
			clock-div = <0x00000002>;
			clock-output-names = "pll_video1x2";
			phandle = <0x000000c5>;
		};
		pll_video2x2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000002>;
			clock-mult = <0x00000002>;
			clock-div = <0x00000001>;
			clock-output-names = "pll_video2x2";
			phandle = <0x000000c6>;
		};
		pll_video2x4 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000002>;
			clock-mult = <0x00000004>;
			clock-div = <0x00000001>;
			clock-output-names = "pll_video2x4";
			phandle = <0x000000c7>;
		};
		pll_video3x2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000003>;
			clock-mult = <0x00000002>;
			clock-div = <0x00000001>;
			clock-output-names = "pll_video3x2";
			phandle = <0x000000c8>;
		};
		pll_video3x4 {
			#clock-cells = <0x00000000>;

			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000003>;
			clock-mult = <0x00000004>;
			clock-div = <0x00000001>;
			clock-output-names = "pll_video3x4";
			phandle = <0x000000c9>;
		};
		hoscd2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x0000000a>;
			clock-mult = <0x00000001>;
			clock-div = <0x00000002>;
			clock-output-names = "hoscd2";
			phandle = <0x000000ca>;
		};
		osc48md4 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x0000000b>;
			clock-mult = <0x00000001>;
			clock-div = <0x00000004>;
			clock-output-names = "osc48md4";
			phandle = <0x000000cb>;
		};
		pll_periph0d6 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x00000006>;
			clock-mult = <0x00000001>;
			clock-div = <0x00000006>;
			clock-output-names = "pll_periph0d6";
			phandle = <0x000000cc>;
		};
		cpu {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,cpu-clock";
			clock-output-names = "cpu";
			phandle = <0x000000cd>;
		};
		axi {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "axi";
			phandle = <0x000000ce>;
		};
		cpuapb {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "cpuapb";
			phandle = <0x000000cf>;
		};
		psi {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "psi";
			phandle = <0x000000d0>;
		};
		ahb1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "ahb1";
			phandle = <0x000000d1>;
		};
		ahb2 {

			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "ahb2";
			phandle = <0x000000d2>;
		};
		ahb3 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "ahb3";
			phandle = <0x000000d3>;
		};
		apb1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "apb1";
			phandle = <0x000000d4>;
		};
		apb2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "apb2";
			phandle = <0x000000d5>;
		};
		de0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			assigned-clock-parents = <0x0000000c>;
			assigned-clock-rates = <0x11e1a300>;
			assigned-clocks = <0x0000000d>;
			clock-output-names = "de0";
			phandle = <0x0000000d>;
		};
		de1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			assigned-clock-parents = <0x0000000c>;
			assigned-clock-rates = <0x11e1a300>;
			assigned-clocks = <0x0000000e>;
			clock-output-names = "de1";
			phandle = <0x0000000e>;
		};
		g2d {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "g2d";
			assigned-clock-parents = <0x0000000c>;
			assigned-clock-rates = <0x11e1a300>;
			assigned-clocks = <0x0000000f>;
			phandle = <0x0000000f>;
		};
		ee {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			assigned-clock-parents = <0x0000000c>;
			assigned-clock-rates = <0x11e1a300>;
			assigned-clocks = <0x00000010>;
			clock-output-names = "ee";
			phandle = <0x00000010>;
		};
		panel {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			assigned-clock-parents = <0x00000002>;
			assigned-clock-rates = <0x01c9c380>;
			assigned-clocks = <0x00000011>;
			clock-output-names = "panel";
			phandle = <0x00000011>;
		};
		gpu {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "gpu";
			phandle = <0x000000d6>;
		};
		ce {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "ce";
			phandle = <0x000000d7>;
		};
		ve {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "ve";
			phandle = <0x000000d8>;
		};
		dma {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";

			clock-output-names = "dma";
			phandle = <0x000000d9>;
		};
		msgbox {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "msgbox";
			phandle = <0x000000da>;
		};
		hwspinlock_rst {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "hwspinlock_rst";
			phandle = <0x000000db>;
		};
		hwspinlock_bus {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "hwspinlock_bus";
			phandle = <0x000000dc>;
		};
		hstimer {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "hstimer";
			phandle = <0x000000dd>;
		};
		avs {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "avs";
			phandle = <0x000000de>;
		};
		dbgsys {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "dbgsys";
			phandle = <0x000000df>;
		};
		pwm {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "pwm";
			phandle = <0x000000e0>;
		};
		iommu {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "iommu";
			phandle = <0x000000e1>;
		};
		nand0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "nand0";
			phandle = <0x000000e2>;
		};
		nand1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "nand1";
			phandle = <0x000000e3>;
		};
		sdmmc0_mod {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "sdmmc0_mod";
			phandle = <0x000000e4>;
		};
		sdmmc0_bus {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "sdmmc0_bus";
			phandle = <0x000000e5>;
		};
		sdmmc0_rst {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "sdmmc0_rst";
			phandle = <0x000000e6>;
		};
		sdmmc1_mod {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "sdmmc1_mod";
			phandle = <0x000000e7>;
		};
		sdmmc1_bus {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "sdmmc1_bus";
			phandle = <0x000000e8>;
		};
		sdmmc1_rst {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "sdmmc1_rst";
			phandle = <0x000000e9>;
		};
		sdmmc2_mod {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "sdmmc2_mod";
			phandle = <0x000000ea>;
		};
		sdmmc2_bus {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "sdmmc2_bus";
			phandle = <0x000000eb>;
		};
		sdmmc2_rst {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "sdmmc2_rst";
			phandle = <0x000000ec>;
		};
		uart0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "uart0";
			phandle = <0x000000ed>;
		};
		uart1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "uart1";
			phandle = <0x000000ee>;
		};
		uart2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "uart2";
			phandle = <0x000000ef>;
		};
		uart3 {
			#clock-cells = <0x00000000>;

			compatible = "allwinner,periph-clock";
			clock-output-names = "uart3";
			phandle = <0x000000f0>;
		};
		uart4 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "uart4";
			phandle = <0x000000f1>;
		};
		uart5 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "uart5";
			phandle = <0x000000f2>;
		};
		uart6 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "uart6";
			phandle = <0x000000f3>;
		};
		scr0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "scr0";
			phandle = <0x000000f4>;
		};
		gmac0_25m {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "gmac0_25m";
			phandle = <0x000000f5>;
		};
		gmac1_25m {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "gmac1_25m";
			phandle = <0x000000f6>;
		};
		gmac0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "gmac0";
			phandle = <0x000000f7>;
		};
		gmac1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "gmac1";
			phandle = <0x000000f8>;
		};
		gpadc {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "gpadc";
			phandle = <0x000000f9>;
		};
		irtx {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "irtx";
			phandle = <0x000000fa>;
		};
		ths {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "ths";
			phandle = <0x000000fb>;
		};
		i2s0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "i2s0";
			phandle = <0x000000fc>;
		};
		i2s1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "i2s1";
			phandle = <0x000000fd>;
		};
		i2s2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "i2s2";
			phandle = <0x000000fe>;
		};
		i2s3 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "i2s3";
			phandle = <0x000000ff>;
		};
		spdif {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "spdif";
			phandle = <0x00000100>;
		};
		dmic {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "dmic";
			phandle = <0x00000101>;
		};
		codec_dac_1x {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "codec_dac_1x";
			phandle = <0x00000102>;

		};
		codec_adc_1x {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "codec_adc_1x";
			phandle = <0x00000103>;
		};
		codec_4x {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "codec_4x";
			phandle = <0x00000104>;
		};
		usbphy0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "usbphy0";
			phandle = <0x00000105>;
		};
		usbphy1 {

			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "usbphy1";
			phandle = <0x00000106>;
		};
		usbohci0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "usbohci0";
			phandle = <0x00000107>;
		};
		usbohci0_12m {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "usbohci0_12m";
			phandle = <0x00000108>;
		};
		usbohci1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "usbohci1";
			phandle = <0x00000109>;
		};
		usbohci1_12m {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "usbohci1_12m";
			phandle = <0x0000010a>;
		};
		usbehci0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "usbehci0";
			phandle = <0x0000010b>;
		};
		usbehci1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "usbehci1";
			phandle = <0x0000010c>;
		};
		usbotg {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "usbotg";
			phandle = <0x0000010d>;
		};
		display_top {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "display_top";
			phandle = <0x00000092>;
		};
		dpss_top0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "dpss_top0";
			phandle = <0x00000093>;
		};

		dpss_top1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "dpss_top1";
			phandle = <0x00000094>;
		};
		tcon_lcd0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "tcon_lcd0";
			assigned-clocks = <0x00000012>;
			assigned-clock-parents = <0x00000008>;
			phandle = <0x00000012>;
		};
		tcon_lcd1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "tcon_lcd1";
			assigned-clocks = <0x00000013>;
			assigned-clock-parents = <0x00000009>;
			phandle = <0x00000013>;
		};
		lvds {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "lvds";
			phandle = <0x00000095>;
		};
		lvds1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "lvds1";
			phandle = <0x00000096>;
		};
		mipi_host {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "mipi_host";
			assigned-clocks = <0x00000014>;
			assigned-clock-parents = <0x00000006>;
			assigned-clock-rates = <0x08f0d180>;
			phandle = <0x00000014>;
		};
		csi_top {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "csi_top";
			phandle = <0x0000010e>;
		};
		csi_isp {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "csi_isp";
			phandle = <0x0000010f>;
		};
		csi_master0 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "csi_master0";
			phandle = <0x00000110>;
		};
		csi_master1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "csi_master1";
			phandle = <0x00000111>;
		};
		pio {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "pio";
			phandle = <0x00000112>;
		};
		ledc {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "ledc";
			phandle = <0x00000113>;
		};
		cpurcir {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "cpurcir";
			phandle = <0x00000114>;
		};
		losc_out {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "losc_out";
			phandle = <0x00000115>;
		};
		cpurcpus_pll {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "cpurcpus_pll";
			phandle = <0x00000116>;
		};
		cpurcpus {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "cpurcpus";
			phandle = <0x00000117>;
		};
		cpurahbs {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "cpurahbs";
			phandle = <0x00000118>;
		};
		cpurapbs1 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "cpurapbs1";
			phandle = <0x00000119>;
		};
		cpurapbs2_pll {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "cpurapbs2_pll";
			phandle = <0x0000011a>;
		};
		cpurapbs2 {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "cpurapbs2";

			phandle = <0x0000011b>;
		};
		ppu {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "ppu";
			phandle = <0x0000011c>;

		};
		cpurpio {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "cpurpio";
			phandle = <0x0000011d>;
		};
		dcxo_out {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "dcxo_out";
			phandle = <0x0000011e>;
		};
		suart {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-cpus-clock";
			clock-output-names = "suart";
			phandle = <0x0000011f>;
		};
		lradc {
			#clock-cells = <0x00000000>;
			compatible = "allwinner,periph-clock";
			clock-output-names = "lradc";
			phandle = <0x00000120>;
		};
	};
	aliases {
		serial0 = "/soc@2900000/uart@5000000";
		serial1 = "/soc@2900000/uart@5000400";
		serial2 = "/soc@2900000/uart@5000800";
		serial3 = "/soc@2900000/uart@5000c00";
		serial4 = "/soc@2900000/uart@5001000";
		serial5 = "/soc@2900000/uart@5001400";
		serial6 = "/soc@2900000/uart@5001800";
		serial7 = "/soc@2900000/uart@7080000";
		disp = "/soc@2900000/uboot_disp@06100000";
		lcd0 = "/soc@2900000/lcd0@1c0c000";
		lcd1 = "/soc@2900000/lcd1@1";
		eink = "/soc@2900000/uboot_eink@6400000";
		mmc0 = "/soc@2900000/sdmmc@4020000";
		mmc2 = "/soc@2900000/sdmmc@4022000";
		nand0 = "/soc@2900000/nand0@04011000";
		twi0 = "/soc@2900000/twi@5002000";
		twi1 = "/soc@2900000/twi@5002400";
		twi2 = "/soc@2900000/twi@5002800";
		twi3 = "/soc@2900000/twi@5002c00";
		twi4 = "/soc@2900000/twi@5003000";
		twi5 = "/soc@2900000/twi@5003400";
		twi6 = "/soc@2900000/s_twi@7081400";
		twi7 = "/soc@2900000/s_twi@7081800";
		spi0 = "/soc@2900000/spi@5010000";
		spi1 = "/soc@2900000/spi@5011000";
		spi2 = "/soc@2900000/spi@5012000";
		ledc = "/soc@2900000/ledc@0x5018000";
		pwm = "/soc@2900000/pwm@300a000";
		pwm0 = "/soc@2900000/pwm0@300a010";
		pwm1 = "/soc@2900000/pwm1@300a011";
		pwm2 = "/soc@2900000/pwm2@300a012";
		pwm3 = "/soc@2900000/pwm3@300a013";
		pwm4 = "/soc@2900000/pwm4@300a014";
		pwm5 = "/soc@2900000/pwm5@300a015";
		pwm6 = "/soc@2900000/pwm6@300a016";
		pwm7 = "/soc@2900000/pwm7@300a017";
		pwm8 = "/soc@2900000/pwm8@300a018";
		pwm9 = "/soc@2900000/pwm9@300a019";
		global-timer0 = "/soc@2900000/timer@3009000";
		pmu0 = "/soc@2900000/s_twi@7081400/pmu@34";
		standby-param = "/soc@2900000/standby_param@7000400";
		ctp = "/soc@2900000/twi@5002000/ctp@0";
	};
	reserved-memory {

		#address-cells = <0x00000002>;
		#size-cells = <0x00000002>;
		ranges;
		bl31 {
			reg = <0x00000000 0x48000000 0x00000000 0x01000000>;
		};
	};
	chosen {
		bootargs = "earlyprintk=sunxi-uart,0x05000000 loglevel=8 initcall_debug=0 console=ttyS0 init=/init";
		linux,initrd-start = <0x00000000 0x00000000>;
		linux,initrd-end = <0x00000000 0x00000000>;
	};

	firmware {
		android {
			compatible = "android,firmware";
			boot_devices = "soc@2900000/4020000.sdmmc,soc@2900000/4022000.sdmmc,soc@2900000";
			vbmeta {
				compatible = "android,vbmeta";
				parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot";
			};
		};
		optee {
			compatible = "linaro,optee-tz";
			method = "smc";
		};
	};
	cpus {
		#address-cells = <0x00000002>;
		#size-cells = <0x00000000>;
		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x00000000 0x00000000>;
			enable-method = "psci";
			clocks = <0x00000015 0x00000018>;
			clock-latency = <0x001e8480>;
			clock-frequency = <0x4ead9a00>;
			dynamic-power-coefficient = <0x000000be>;
			operating-points-v2 = <0x00000016>;
			cpu-idle-states = <0x00000017 0x00000018>;
			#cooling-cells = <0x00000002>;
			cpu-supply = <0x00000019>;
			phandle = <0x0000001f>;
		};
		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x00000000 0x00000001>;
			enable-method = "psci";
			clocks = <0x00000015 0x00000018>;
			clock-frequency = <0x4ead9a00>;
			operating-points-v2 = <0x00000016>;
			cpu-idle-states = <0x00000017 0x00000018>;
			#cooling-cells = <0x00000002>;
			phandle = <0x00000021>;
		};
		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x00000000 0x00000002>;
			enable-method = "psci";
			clocks = <0x00000015 0x00000018>;
			clock-frequency = <0x4ead9a00>;
			operating-points-v2 = <0x00000016>;
			cpu-idle-states = <0x00000017 0x00000018>;
			#cooling-cells = <0x00000002>;
			phandle = <0x00000022>;
		};
		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x00000000 0x00000003>;
			enable-method = "psci";
			clocks = <0x00000015 0x00000018>;
			clock-frequency = <0x4ead9a00>;
			operating-points-v2 = <0x00000016>;
			cpu-idle-states = <0x00000017 0x00000018>;
			#cooling-cells = <0x00000002>;
			phandle = <0x00000023>;
		};
		idle-states {
			entry-method = "arm,psci";
			cpu-sleep-0 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x00010000>;
				entry-latency-us = <0x0000002e>;
				exit-latency-us = <0x0000003b>;
				min-residency-us = <0x00000df2>;
				local-timer-stop;
				phandle = <0x00000017>;
			};
			cluster-sleep-0 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x01010000>;
				entry-latency-us = <0x0000002f>;
				exit-latency-us = <0x0000004a>;
				min-residency-us = <0x00001388>;
				local-timer-stop;
				phandle = <0x00000018>;
			};

		};
	};
	cpu-opp-table {
		compatible = "allwinner,sun50i-operating-points";
		nvmem-cells = <0x0000001a 0x0000001b 0x0000001c>;
		nvmem-cell-names = "speed", "bin", "bin_ext";
		opp-shared;
		phandle = <0x00000016>;
		opp@408000000 {
			opp-hz = <0x00000000 0x18519600>;
			clock-latency-ns = <0x0003b9b0>;
			opp-microvolt-a0 = <0x000dbba0>;
			opp-microvolt-a1 = <0x000dbba0>;
			opp-microvolt-a2 = <0x000dbba0>;
			opp-microvolt-a3 = <0x000e57e0>;
			opp-microvolt-a4 = <0x000e57e0>;
			opp-microvolt-a5 = <0x000e09c0>;
			opp-microvolt-a6 = <0x000e09c0>;
			opp-microvolt-b0 = <0x000dbba0>;
			opp-microvolt-b1 = <0x000dbba0>;
			opp-microvolt-b2 = <0x000e57e0>;
			opp-microvolt-b3 = <0x000e09c0>;
			opp-supported-hw = <0x00000007>;
		};
		opp@600000000 {
			opp-hz = <0x00000000 0x23c34600>;
			clock-latency-ns = <0x0003b9b0>;
			opp-microvolt-a0 = <0x000dbba0>;
			opp-microvolt-a1 = <0x000dbba0>;
			opp-microvolt-a2 = <0x000dbba0>;
			opp-microvolt-a3 = <0x000e57e0>;
			opp-microvolt-a4 = <0x000e57e0>;
			opp-microvolt-a5 = <0x000e09c0>;
			opp-microvolt-a6 = <0x000e09c0>;
			opp-microvolt-b0 = <0x000dbba0>;
			opp-microvolt-b1 = <0x000dbba0>;
			opp-microvolt-b2 = <0x000e57e0>;
			opp-microvolt-b3 = <0x000e09c0>;
			opp-supported-hw = <0x00000007>;
		};
		opp@816000000 {
			opp-hz = <0x00000000 0x30a32c00>;
			clock-latency-ns = <0x0003b9b0>;
			opp-microvolt-a0 = <0x000e57e0>;
			opp-microvolt-a1 = <0x000dbba0>;
			opp-microvolt-a2 = <0x000dbba0>;
			opp-microvolt-a3 = <0x000e57e0>;
			opp-microvolt-a4 = <0x000e57e0>;
			opp-microvolt-a5 = <0x000e09c0>;
			opp-microvolt-a6 = <0x000e09c0>;
			opp-microvolt-b0 = <0x000dbba0>;
			opp-microvolt-b1 = <0x000dbba0>;
			opp-microvolt-b2 = <0x000e57e0>;
			opp-microvolt-b3 = <0x000e09c0>;
			opp-supported-hw = <0x00000007>;
		};
		opp@1008000000 {
			opp-hz = <0x00000000 0x3c14dc00>;
			clock-latency-ns = <0x0003b9b0>;
			opp-microvolt-a0 = <0x000f9060>;
			opp-microvolt-a1 = <0x000ef420>;
			opp-microvolt-a2 = <0x000e7ef0>;
			opp-microvolt-a3 = <0x000f9060>;
			opp-microvolt-a4 = <0x000ea600>;
			opp-microvolt-a5 = <0x000e57e0>;
			opp-microvolt-a6 = <0x000e57e0>;
			opp-microvolt-b0 = <0x000ef420>;
			opp-microvolt-b1 = <0x000e7ef0>;
			opp-microvolt-b2 = <0x000ea600>;
			opp-microvolt-b3 = <0x000e57e0>;
			opp-supported-hw = <0x00000007>;
		};
		opp@1200000000 {
			opp-hz = <0x00000000 0x47868c00>;
			clock-latency-ns = <0x0003b9b0>;
			opp-microvolt-a0 = <0x0010c8e0>;
			opp-microvolt-a1 = <0x000f9060>;
			opp-microvolt-a2 = <0x000f4240>;
			opp-microvolt-a3 = <0x0010c8e0>;
			opp-microvolt-a4 = <0x000ef420>;
			opp-microvolt-a5 = <0x000ea600>;
			opp-microvolt-a6 = <0x000ea600>;
			opp-microvolt-b0 = <0x000f9060>;
			opp-microvolt-b1 = <0x000f4240>;
			opp-microvolt-b2 = <0x000ef420>;
			opp-microvolt-b3 = <0x000ea600>;
			opp-supported-hw = <0x00000007>;
		};
		opp@1320000000 {
			opp-hz = <0x00000000 0x4ead9a00>;
			clock-latency-ns = <0x0003b9b0>;
			opp-microvolt-a0 = <0x0011b340>;
			opp-microvolt-a1 = <0x00102ca0>;
			opp-microvolt-a2 = <0x000fb770>;
			opp-microvolt-a3 = <0x0011b340>;
			opp-microvolt-a4 = <0x000f9060>;
			opp-microvolt-a5 = <0x000f4240>;
			opp-microvolt-a6 = <0x000f4240>;
			opp-microvolt-b0 = <0x00102ca0>;
			opp-microvolt-b1 = <0x000fb770>;
			opp-microvolt-b2 = <0x000f9060>;
			opp-microvolt-b3 = <0x000f4240>;
			opp-supported-hw = <0x00000007>;
		};
		opp@1416000000 {
			opp-hz = <0x00000000 0x54667200>;
			clock-latency-ns = <0x0003b9b0>;
			opp-microvolt-b0 = <0x0010c8e0>;
			opp-microvolt-b1 = <0x001053b0>;
			opp-microvolt-b2 = <0x00102ca0>;
			opp-microvolt-b3 = <0x000fde80>;
			opp-supported-hw = <0x00000006>;
		};
		opp@1464000000 {
			opp-hz = <0x00000000 0x5742de00>;
			clock-latency-ns = <0x0003b9b0>;
			opp-microvolt-a0 = <0x00120160>;
			opp-microvolt-a1 = <0x00120160>;
			opp-microvolt-a2 = <0x00113e10>;
			opp-microvolt-a3 = <0x00120160>;
			opp-microvolt-a4 = <0x0010c8e0>;
			opp-microvolt-a5 = <0x00107ac0>;
			opp-microvolt-a6 = <0x00107ac0>;
			opp-supported-hw = <0x00000001>;
		};
		opp@1512000000 {
			opp-hz = <0x00000000 0x5a1f4a00>;
			clock-latency-ns = <0x0003b9b0>;
			opp-microvolt-b0 = <0x00120160>;
			opp-microvolt-b1 = <0x00113e10 0x00113e10 0x00116520>;
			opp-microvolt-b2 = <0x0010c8e0>;
			opp-microvolt-b3 = <0x00107ac0>;
			opp-supported-hw = <0x00000006>;
		};
		opp@1608000000 {
			opp-hz = <0x00000000 0x5fd82200>;
			clock-latency-ns = <0x0003b9b0>;
			opp-microvolt-b0 = <0x00120160>;
			opp-microvolt-b1 = <0x00113e10 0x00113e10 0x00116520>;
			opp-supported-hw = <0x00000000>;
		};
	};
	dcxo24M-clk {
		#clock-cells = <0x00000000>;
		compatible = "fixed-clock";
		clock-frequency = <0x016e3600>;
		clock-output-names = "dcxo24M";
		phandle = <0x00000028>;
	};
	thermal-zones {
		cpu_thermal_zone {
			polling-delay-passive = <0x000001f4>;
			polling-delay = <0x000003e8>;
			thermal-sensors = <0x0000001d 0x00000000>;
			sustainable-power = <0x000004b0>;
			trips {
				phandle = <0x00000121>;
				trip-point@0 {
					temperature = <0x00011170>;
					type = "passive";
					hysteresis = <0x00000000>;
					phandle = <0x00000122>;
				};
				trip-point@1 {
					temperature = <0x00015f90>;
					type = "passive";
					hysteresis = <0x00000000>;
					phandle = <0x0000001e>;
				};
				cpu_crit@0 {
					temperature = <0x0001adb0>;
					type = "critical";
					hysteresis = <0x00000000>;
					phandle = <0x00000123>;
				};
			};
			cooling-maps {
				map0 {
					trip = <0x0000001e>;
					cooling-device = <0x0000001f 0xffffffff 0xffffffff>;
					contribution = <0x00000400>;
				};
			};
		};
		gpu_thermal_zone {
			polling-delay-passive = <0x000001f4>;
			polling-delay = <0x000003e8>;
			thermal-sensors = <0x0000001d 0x00000001>;
			sustainable-power = <0x0000044c>;
		};
		ddr_thermal_zone {
			polling-delay-passive = <0x00000000>;
			polling-delay = <0x00000000>;
			thermal-sensors = <0x0000001d 0x00000002>;
		};
	};
	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};
	memory@40000000 {
		device_type = "memory";
		reg = <0x00000000 0x40000000 0x00000000 0x20000000>;
	};
	interrupt-controller@3020000 {

		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
		#interrupt-cells = <0x00000003>;
		#address-cells = <0x00000000>;
		device_type = "gic";
		interrupt-controller;
		reg = <0x00000000 0x03021000 0x00000000 0x00001000 0x00000000 0x03022000 0x00000000 0x00002000 0x00000000 0x03024000 0x00000000 0x00002000 0x00000000 0x03026000 0x00000000 0x00002000>;
		interrupts = <0x00000001 0x00000009 0x00000f04>;
		interrupt-parent = <0x00000020>;
		phandle = <0x00000020>;
	};
	interrupt-controller@0 {
		compatible = "allwinner,sunxi-wakeupgen";
		interrupt-controller;
		#interrupt-cells = <0x00000003>;
		interrupt-parent = <0x00000020>;
		phandle = <0x00000001>;
	};
	timer_arch {
		compatible = "arm,armv8-timer";
		interrupts = <0x00000001 0x0000000d 0x00000f08 0x00000001 0x0000000e 0x00000f08 0x00000001 0x0000000b 0x00000f08 0x00000001 0x0000000a 0x00000f08>;
		clock-frequency = <0x016e3600>;

		interrupt-parent = <0x00000020>;
		arm,no-tick-in-suspend;
	};
	pmu {
		compatible = "arm,armv8-pmuv3";
		interrupts = <0x00000000 0x0000008c 0x00000004 0x00000000 0x0000008d 0x00000004 0x00000000 0x0000008e 0x00000004 0x00000000 0x0000008f 0x00000004>;
		interrupt-affinity = <0x0000001f 0x00000021 0x00000022 0x00000023>;
	};
	gpu-power-domain@7001000 {
		compatible = "allwinner,gpu-pd", "syscon";
		reg = <0x00000000 0x07001000 0x00000000 0x00000040>;
		interrupts = <0x00000000 0x00000077 0x00000004>;
		interrupt-names = "ppu-irq";
		clocks = <0x00000024 0x00000008>;
		clock-names = "ppu";
		resets = <0x00000024 0x00000002>;
		reset-names = "ppu_rst";
		#power-domain-cells = <0x00000000>;
		phandle = <0x000000b2>;
	};
	intc-nmi@7010320 {
		compatible = "allwinner,sun8i-nmi";
		interrupt-parent = <0x00000020>;
		#interrupt-cells = <0x00000002>;
		#address-cells = <0x00000000>;
		interrupt-controller;
		reg = <0x00000000 0x07010320 0x00000000 0x0000000c>;
		interrupts = <0x00000000 0x00000067 0x00000004>;
		phandle = <0x0000005e>;
	};
	dram {
		compatible = "allwinner,dram";
		clocks = <0x00000015 0x00000002>;
		clock-names = "pll_ddr";
		dram_clk = <0x000002a0>;
		dram_type = <0x00000008>;

		dram_zq = <0x07070707>;
		dram_odt_en = <0x0d0d0d0d>;
		dram_para1 = <0x00000e0e>;
		dram_para2 = <0x0d0a050c>;
		dram_mr0 = <0x000030fa>;
		dram_mr1 = <0x08001000>;
		dram_mr2 = <0x00000000>;
		dram_mr3 = <0x00000034>;
		dram_tpr0 = <0x0000001b>;
		dram_tpr1 = <0x00000033>;
		dram_tpr2 = <0x00000003>;
		dram_tpr3 = <0x00000000>;
		dram_tpr4 = <0x00000000>;
		dram_tpr5 = <0x00000004>;
		dram_tpr6 = <0x00000072>;
		dram_tpr7 = <0x00000000>;
		dram_tpr8 = <0x00000007>;
		dram_tpr9 = <0x00000000>;
		dram_tpr10 = <0x00000000>;
		dram_tpr11 = <0x00000026>;
		dram_tpr12 = <0x06060606>;
		dram_tpr13 = <0x04040404>;
		phandle = <0x00000124>;
	};
	clk_ddr {
		compatible = "allwinner,clock_ddr";
		reg = <0x00000000 0x03001000 0x00000000 0x00001000 0x00000000 0x04810000 0x00000000 0x00002000>;
		clocks = <0x00000015 0x00000002>;
		clock-names = "pll_ddr";
		#clock-cells = <0x00000000>;
		phandle = <0x00000025>;
	};
	nsi-pmu@3100000 {
		compatible = "allwinner,sunxi-dfi", "syscon";
		reg = <0x00000000 0x03100000 0x00000000 0x00010000>;
		clocks = <0x00000025>;
		clock-names = "dram";
		phandle = <0x00000026>;
	};
	opp_table {
		compatible = "operating-points-v2";
		phandle = <0x00000027>;
		opp@336000000 {
			opp-hz = <0x00000000 0x1406f400>;
		};
		opp@448000000 {
			opp-hz = <0x00000000 0x1ab3f000>;
		};
		opp@537600000 {
			opp-hz = <0x00000000 0x200b2000>;
		};
		opp@672000000 {
			opp-hz = <0x00000000 0x280de800>;
		};
	};
	sunxi-dmcfreq {
		compatible = "allwinner,sunxi-dmc";
		devfreq-events = <0x00000026>;
		clocks = <0x00000025>;
		clock-names = "dram";
		operating-points-v2 = <0x00000027>;
		upthreshold = <0x00000032>;
		downdifferential = <0x00000014>;
	};
	uboot {
		phandle = <0x00000125>;
	};
	iommu@30f0000 {
		compatible = "allwinner,sunxi-iommu";
		reg = <0x00000000 0x030f0000 0x00000000 0x00001000>;
		interrupts = <0x00000000 0x00000042 0x00000004>;
		interrupt-names = "iommu-irq";
		clocks = <0x00000015 0x00000037>;
		clock-names = "iommu";
		#iommu-cells = <0x00000002>;
		phandle = <0x00000081>;
	};
	dump_reg@20000 {
		compatible = "allwinner,sunxi-dump-reg";
		reg = <0x00000000 0x00020000 0x00000000 0x00000004>;
		phandle = <0x00000126>;
	};
	pio-18 {
		compatible = "regulator-fixed";
		regulator-name = "pio-18";
		regulator-min-microvolt = <0x001b7740>;
		regulator-max-microvolt = <0x001b7740>;
		phandle = <0x000000b0>;
	};
	pio-28 {
		compatible = "regulator-fixed";
		regulator-name = "pio-28";
		regulator-min-microvolt = <0x002ab980>;
		regulator-max-microvolt = <0x002ab980>;
		phandle = <0x00000127>;
	};
	pio-33 {
		compatible = "regulator-fixed";
		regulator-name = "pio-33";
		regulator-min-microvolt = <0x00325aa0>;
		regulator-max-microvolt = <0x00325aa0>;
		phandle = <0x000000b1>;
	};
	soc@2900000 {
		compatible = "simple-bus";
		#address-cells = <0x00000002>;
		#size-cells = <0x00000002>;
		ranges;
		device_type = "soc";
		phandle = <0x00000128>;
		sram_ctrl@3000000 {
			compatible = "allwinner,sram_ctrl";
			reg = <0x00000000 0x03000000 0x00000000 0x0000016c>;
			phandle = <0x00000129>;
			soc_ver {
				offset = <0x00000024>;
				mask = <0x00000007>;
				shift = <0x00000000>;
				ver_a = <0x18550000>;
				ver_b = <0x18550001>;

			};
			soc_id {
				offset = <0x00000200>;
				mask = <0x00000001>;
				shift = <0x00000016>;
			};
			soc_bin {
				offset = <0x00000000>;
				mask = <0x000003ff>;
				shift = <0x00000000>;
			};
		};
		clock@3001000 {
			compatible = "allwinner,sun50iw10-ccu";
			reg = <0x00000000 0x03001000 0x00000000 0x00001000>;
			clocks = <0x00000028 0x00000029 0x00000002 0x00000029 0x00000001>;
			clock-names = "hosc", "losc", "iosc";
			#clock-cells = <0x00000001>;
			#reset-cells = <0x00000001>;
			phandle = <0x00000015>;
		};
		clock@7010000 {
			compatible = "allwinner,sun50iw10-r-ccu";
			reg = <0x00000000 0x07010000 0x00000000 0x00000240>;
			clocks = <0x00000028 0x00000029 0x00000002 0x00000029 0x00000001 0x00000015 0x00000003>;
			clock-names = "hosc", "losc", "iosc", "pll-periph";
			#clock-cells = <0x00000001>;
			#reset-cells = <0x00000001>;
			phandle = <0x00000024>;
		};
		dma-controller@3002000 {
			compatible = "allwinner,sun50iw10-dma";
			reg = <0x00000000 0x03002000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x0000002d 0x00000004>;
			clocks = <0x00000015 0x0000002f 0x00000015 0x00000038>;
			clock-names = "bus", "mbus";
			dma-channels = <0x00000008>;
			dma-requests = <0x00000034>;
			resets = <0x00000015 0x00000008>;
			#dma-cells = <0x00000001>;
			phandle = <0x00000055>;
		};
		rtc@7000000 {
			compatible = "allwinner,sun50iw10p1-rtc";
			device_type = "rtc";
			wakeup-source;
			reg = <0x00000000 0x07000000 0x00000000 0x00000200>;
			interrupts = <0x00000000 0x0000006c 0x00000004>;
			clocks = <0x00000024 0x0000000e 0x00000029 0x00000004>;
			clock-names = "r-ahb-rtc", "rtc-1k";
			resets = <0x00000024 0x00000007>;
			gpr_offset = <0x00000100>;
			gpr_len = <0x00000008>;
			gpr_cur_pos = <0x00000006>;
			phandle = <0x0000012a>;
		};
		rtc_ccu@7000000 {
			compatible = "allwinner,sun50iw10p1-rtc-ccu";
			device_type = "rtc-ccu";
			reg = <0x00000000 0x07000000 0x00000000 0x00000200>;
			#clock-cells = <0x00000001>;
			clock-output-names = "dcxo24M-out", "iosc", "osc32k", "osc32k-out", "rtc-1k";
			phandle = <0x00000029>;
		};
		nsi-controller@3100000 {
			compatible = "allwinner,sun50i-nsi";
			interrupts = <0x00000000 0x0000003f 0x00000004>;
			reg = <0x00000000 0x03100000 0x00000000 0x00010000>;
			clocks = <0x00000015 0x00000004 0x00000015 0x0000001f 0x00000015 0x00000002>;
			clock-names = "pll", "bus", "sdram";
			resets = <0x00000015 0x00000000>;
			clock-frequency = <0x17d78400>;
			#nsi-cells = <0x00000001>;
			phandle = <0x0000012b>;
			cpu {
				mode = <0x00000000>;
				pri = <0x00000000>;
				select = <0x00000000>;
			};
			gpu {
				mode = <0x00000000>;
				pri = <0x00000003>;
				select = <0x00000001>;
			};
			sd1 {
				mode = <0x00000001>;
				pri = <0x00000002>;
				select = <0x00000000>;
			};
			mstg {
				mode = <0x00000000>;
				pri = <0x00000001>;
				select = <0x00000000>;
			};
			ce {
				mode = <0x00000001>;
				pri = <0x00000000>;
				select = <0x00000001>;
			};
		};
		sid@3006000 {
			compatible = "allwinner,sun50iw10p1-sid", "allwinner,sunxi-sid";
			reg = <0x00000000 0x03006000 0x00000000 0x00001000>;
			#address-cells = <0x00000001>;
			#size-cells = <0x00000001>;
			speed@00 {
				reg = <0x00000000 0x00000002>;
				phandle = <0x0000001a>;
			};
			calib@14 {
				reg = <0x00000014 0x00000008>;
				phandle = <0x0000002a>;
			};
			calib@1c {
				reg = <0x0000001c 0x00000002>;
				phandle = <0x0000001b>;
			};
			calib@28 {
				reg = <0x00000028 0x00000004>;
				phandle = <0x0000001c>;
			};
			secure_status {
				reg = <0x00000000 0x00000000>;
				offset = <0x000000a0>;
				size = <0x00000004>;
			};
			chipid {
				reg = <0x00000000 0x00000000>;
				offset = <0x00000200>;
				size = <0x00000010>;
			};
			rotpk {
				reg = <0x00000000 0x00000000>;
				offset = <0x00000270>;
				size = <0x00000020>;
			};
		};
		ce@1904000 {
			compatible = "allwinner,sunxi-ce";
			device_name = "ce";
			reg = <0x00000000 0x01904000 0x00000000 0x000000a0 0x00000000 0x01904800 0x00000000 0x000000a0>;
			interrupts = <0x00000000 0x0000005c 0x00000001 0x00000000 0x0000005d 0x00000001>;
			clock-frequency = <0x17d78400>;
			clocks = <0x00000015 0x0000002c 0x00000015 0x0000002b 0x00000015 0x0000003a 0x00000015 0x00000004>;
			clock-names = "bus_ce", "ce_clk", "mbus_ce", "pll_periph0_2x";
			resets = <0x00000015 0x00000006>;
			phandle = <0x0000012c>;
		};
		ths@5070400 {
			compatible = "allwinner,sun50iw10p1-ths";
			reg = <0x00000000 0x05070400 0x00000000 0x00000400>;
			clocks = <0x00000015 0x00000067>;
			clock-names = "bus";
			resets = <0x00000015 0x0000002a>;
			nvmem-cells = <0x0000002a>;
			nvmem-cell-names = "calibration";
			#thermal-sensor-cells = <0x00000001>;
			phandle = <0x0000001d>;
		};
		timer@3009000 {
			compatible = "allwinner,sun4i-a10-timer";
			device_type = "soc_timer";
			reg = <0x00000000 0x03009000 0x00000000 0x000000a0>;
			interrupt-parent = <0x00000020>;
			interrupts = <0x00000000 0x00000033 0x00000004>;
			clocks = <0x00000028>;
			phandle = <0x0000012d>;
		};
		uart@5000000 {
			compatible = "allwinner,sun50i-uart";
			device_type = "uart0";
			reg = <0x00000000 0x05000000 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000000 0x00000004>;
			sunxi,uart-fifosize = <0x00000040>;
			clocks = <0x00000015 0x0000004b>;
			clock-names = "uart0";
			resets = <0x00000015 0x00000015>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000002b>;
			pinctrl-1 = <0x0000002c>;
			uart0_port = <0x00000000>;
			uart0_type = <0x00000002>;
			uart-supply = <0x0000002d>;
			phandle = <0x0000012e>;
		};
		uart@5000400 {
			compatible = "allwinner,sun50i-uart";
			device_type = "uart1";
			reg = <0x00000000 0x05000400 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000001 0x00000004>;
			sunxi,uart-fifosize = <0x00000040>;
			clocks = <0x00000015 0x0000004c>;
			clock-names = "uart1";
			resets = <0x00000015 0x00000016>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000002e>;
			pinctrl-1 = <0x0000002f>;
			uart1_port = <0x00000001>;
			uart1_type = <0x00000004>;
			status = "okay";
			phandle = <0x0000012f>;
		};
		uart@5000800 {
			compatible = "allwinner,sun50i-uart";
			device_type = "uart2";
			reg = <0x00000000 0x05000800 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000002 0x00000004>;
			sunxi,uart-fifosize = <0x00000040>;
			clocks = <0x00000015 0x0000004d>;
			clock-names = "uart2";
			resets = <0x00000015 0x00000017>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000030>;
			pinctrl-1 = <0x00000031>;
			uart2_port = <0x00000002>;
			uart2_type = <0x00000004>;
			status = "disabled";
			phandle = <0x00000130>;
		};
		uart@5000c00 {
			compatible = "allwinner,sun50i-uart";
			device_type = "uart3";
			reg = <0x00000000 0x05000c00 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000003 0x00000004>;
			sunxi,uart-fifosize = <0x00000040>;
			clocks = <0x00000015 0x0000004e>;
			clock-names = "uart3";
			resets = <0x00000015 0x00000018>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000032>;
			pinctrl-1 = <0x00000033>;
			uart3_port = <0x00000003>;
			uart3_type = <0x00000004>;
			status = "disabled";
			phandle = <0x00000131>;
		};
		uart@5001000 {
			compatible = "allwinner,sun50i-uart";
			device_type = "uart4";
			reg = <0x00000000 0x05001000 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000004 0x00000004>;
			clocks = <0x00000015 0x0000004f>;
			clock-names = "uart4";
			resets = <0x00000015 0x00000019>;
			sunxi,uart-fifosize = <0x00000040>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000034>;
			pinctrl-1 = <0x00000035>;
			uart4_port = <0x00000004>;
			uart4_type = <0x00000004>;
			status = "disabled";
			phandle = <0x00000132>;
		};
		uart@5001400 {
			compatible = "allwinner,sun50i-uart";
			device_type = "uart5";
			reg = <0x00000000 0x05001400 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000005 0x00000004>;
			sunxi,uart-fifosize = <0x00000040>;
			clocks = <0x00000015 0x00000050>;
			clock-names = "uart5";
			resets = <0x00000015 0x0000001a>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000036>;
			pinctrl-1 = <0x00000037>;
			uart5_port = <0x00000005>;
			uart5_type = <0x00000004>;
			status = "disabled";
			phandle = <0x00000133>;
		};
		uart@5001800 {
			compatible = "allwinner,sun50i-uart";
			device_type = "uart6";
			reg = <0x00000000 0x05001800 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000006 0x00000004>;
			sunxi,uart-fifosize = <0x00000040>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000038>;
			pinctrl-1 = <0x00000039>;
			uart6_port = <0x00000006>;
			uart6_type = <0x00000004>;
			status = "disabled";
			phandle = <0x00000134>;
		};
		uart@7080000 {
			compatible = "allwinner,sun50i-uart";
			device_type = "uart7";
			reg = <0x00000000 0x07080000 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000070 0x00000004>;
			sunxi,uart-fifosize = <0x00000040>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000003a>;
			pinctrl-1 = <0x0000003b>;
			uart7_port = <0x00000007>;
			uart7_type = <0x00000002>;
			status = "disabled";
			phandle = <0x00000135>;
		};
		sdmmc@4022000 {
			compatible = "allwinner,sunxi-mmc-v4p6x";
			device_type = "sdc2";
			reg = <0x00000000 0x04022000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x00000029 0x00000004>;
			clocks = <0x00000028 0x00000015 0x00000006 0x00000015 0x00000045 0x00000015 0x00000049>;
			clock-names = "osc24m", "pll_periph", "mmc", "ahb";
			resets = <0x00000015 0x00000013>;
			reset-names = "rst";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000003c 0x0000003d>;
			pinctrl-1 = <0x0000003e>;
			bus-width = <0x00000008>;
			req-page-count = <0x00000002>;
			cap-mmc-highspeed;
			cap-cmd23;
			mmc-cache-ctrl;
			non-removable;
			max-frequency = <0x05f5e100>;
			cap-erase;
			mmc-high-capacity-erase-size;
			no-sdio;
			no-sd;
			sdc_tm4_sm0_freq0 = <0x00000000>;
			sdc_tm4_sm0_freq1 = <0x00000000>;
			sdc_tm4_sm1_freq0 = <0x00000000>;
			sdc_tm4_sm1_freq1 = <0x00000000>;
			sdc_tm4_sm2_freq0 = <0x00000000>;
			sdc_tm4_sm2_freq1 = <0x00000000>;
			sdc_tm4_sm3_freq0 = <0x05000000>;
			sdc_tm4_sm3_freq1 = <0x00000005>;
			sdc_tm4_sm4_freq0 = <0x00050000>;
			sdc_tm4_sm4_freq1 = <0x00000004>;
			sdc_tm4_sm4_freq0_cmd = <0x00000000>;
			sdc_tm4_sm4_freq1_cmd = <0x00000000>;
			mmc-ddr-1_8v;
			mmc-hs200-1_8v;
			mmc-hs400-1_8v;
			ctl-spec-caps = <0x00000308>;
			sunxi-power-save-mode;
			sunxi-dis-signal-vol-sw;
			mmc-bootpart-noacc;
			vmmc-supply = <0x0000002d>;
			vqmmc-supply = <0x0000003f>;
			status = "disabled";
			phandle = <0x00000136>;
		};
		sdmmc@4020000 {
			compatible = "allwinner,sunxi-mmc-v5p3x";
			device_type = "sdc0";
			reg = <0x00000000 0x04020000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x00000027 0x00000004>;
			clocks = <0x00000028 0x00000015 0x00000006 0x00000015 0x00000043 0x00000015 0x00000047>;
			clock-names = "osc24m", "pll_periph", "mmc", "ahb";
			resets = <0x00000015 0x00000011>;
			reset-names = "rst";
			pinctrl-names = "default", "mmc_1v8", "sleep", "uart_jtag";
			pinctrl-0 = <0x00000040>;
			pinctrl-1 = <0x00000041>;
			pinctrl-2 = <0x00000042>;
			pinctrl-3 = <0x00000043 0x00000044>;
			max-frequency = <0x08f0d180>;
			bus-width = <0x00000004>;
			req-page-count = <0x00000002>;
			cap-sd-highspeed;
			cap-wait-while-busy;
			no-sdio;
			no-mmc;
			cd-gpios = <0x00000045 0x00000005 0x00000006 0x00000011>;
			cd-used-24M;
			sd-uhs-sdr50;
			sd-uhs-ddr50;
			sd-uhs-sdr104;
			sunxi-power-save-mode;
			ctl-spec-caps = <0x00000008>;
			vmmc-supply = <0x0000002d>;
			vqmmc33sw-supply = <0x0000002d>;
			vdmmc33sw-supply = <0x0000002d>;
			vqmmc18sw-supply = <0x0000003f>;
			vdmmc18sw-supply = <0x0000003f>;
			status = "okay";
			phandle = <0x00000137>;
		};
		sdmmc@4021000 {
			compatible = "allwinner,sunxi-mmc-v5p3x";
			device_type = "sdc1";
			reg = <0x00000000 0x04021000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x00000028 0x00000004>;
			clocks = <0x00000028 0x00000015 0x00000006 0x00000015 0x00000044 0x00000015 0x00000048>;
			clock-names = "osc24m", "pll_periph", "mmc", "ahb";
			resets = <0x00000015 0x00000012>;
			reset-names = "rst";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000046>;
			pinctrl-1 = <0x00000047>;
			max-frequency = <0x08f0d180>;
			bus-width = <0x00000004>;
			cap-sd-highspeed;
			no-mmc;
			keep-power-in-suspend;
			sunxi-dly-52M-ddr4 = <0x00000001 0x00000000 0x00000000 0x00000000 0x00000002>;
			sunxi-dly-104M = <0x00000001 0x00000001 0x00000000 0x00000000 0x00000001>;

			sunxi-dly-208M = <0x00000001 0x00000000 0x00000000 0x00000000 0x00000001>;
			status = "okay";
			no-sd;
			sd-uhs-sdr25;
			sd-uhs-sdr50;
			sd-uhs-ddr50;
			sd-uhs-sdr104;
			cap-sdio-irq;
			ignore-pm-notify;
			ctl-spec-caps = <0x00000008>;
			phandle = <0x00000138>;
		};
		sdmmc@4023000 {
			compatible = "allwinner,sunxi-mmc-v5p3x";
			device_type = "sdc3";
			reg = <0x00000000 0x04023000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x0000002a 0x00000004>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000048>;
			pinctrl-1 = <0x00000049>;
			max-frequency = <0x02faf080>;
			bus-width = <0x00000004>;
			cap-sd-highspeed;
			no-sdio;

			no-mmc;
			status = "disabled";
			phandle = <0x00000139>;
		};
		nand0@04011000 {
			compatible = "allwinner,sun50iw10-nand";
			device_type = "nand0";
			reg = <0x00000000 0x04011000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x00000026 0x00000004>;
			clocks = <0x00000015 0x00000006 0x00000015 0x00000040 0x00000015 0x00000041 0x00000015 0x00000042 0x00000015 0x0000003b>;
			clock-names = "pll_periph", "mclk", "ecc", "bus", "mbus";
			resets = <0x00000015 0x00000010>;
			reset-names = "rst";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000004a 0x0000004b>;
			pinctrl-1 = <0x0000004c>;
			nand0_regulator1 = "none";
			nand0_regulator2 = "none";
			nand0_cache_level = <0x55aaaa55>;
			nand0_flush_cache_num = <0x55aaaa55>;
			nand0_capacity_level = <0x55aaaa55>;
			nand0_id_number_ctl = <0x55aaaa55>;
			nand0_print_level = <0x55aaaa55>;
			nand0_p0 = <0x55aaaa55>;
			nand0_p1 = <0x55aaaa55>;
			nand0_p2 = <0x55aaaa55>;
			nand0_p3 = <0x55aaaa55>;
			chip_code = "sun50iw10";
			status = "disabled";
			phandle = <0x0000013a>;
		};
		twi@5002000 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-twi";
			device_type = "twi0";
			reg = <0x00000000 0x05002000 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000007 0x00000004>;
			clocks = <0x00000015 0x00000052>;
			resets = <0x00000015 0x0000001c>;
			clock-names = "bus";
			clock-frequency = <0x00061a80>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000004d>;
			pinctrl-1 = <0x0000004e>;
			status = "okay";
			twi-supply = <0x0000002d>;
			phandle = <0x0000013b>;
			ctp@0 {
				ctp_fw_idx = "2";
				compatible = "allwinner,gslX680";
				reg = <0x00000040>;
				device_type = "ctp";
				status = "okay";
				ctp_name = "gslX680_3676_1280x800";
				ctp_twi_id = <0x00000000>;
				ctp_twi_addr = <0x00000040>;
				ctp_screen_max_x = <0x00000320>;
				ctp_screen_max_y = <0x00000500>;
				ctp_revert_x_flag = <0x00000000>;
				ctp_revert_y_flag = <0x00000000>;
				ctp_exchange_x_y_flag = <0x00000001>;
				ctp_int_port = <0x00000045 0x00000007 0x00000009 0x00000001>;
				ctp_wakeup = <0x00000045 0x00000007 0x0000000a 0x00000001>;
				ctp-supply = <0x0000004f>;
				ctp_power_ldo_vol = <0x00000ce4>;
				phandle = <0x0000013c>;
			};
		};
		twi@5002400 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-twi";
			device_type = "twi1";
			reg = <0x00000000 0x05002400 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000008 0x00000004>;
			clocks = <0x00000015 0x00000053>;
			resets = <0x00000015 0x0000001d>;
			clock-names = "bus";
			clock-frequency = <0x00030d40>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000050>;
			pinctrl-1 = <0x00000051>;
			status = "okay";
			phandle = <0x0000013d>;
			gsensor {
				compatible = "allwinner,mir3da";
				reg = <0x00000027>;
				device_type = "gsensor";
				status = "okay";
				gsensor_twi_id = <0x00000001>;
				gsensor_twi_addr = <0x00000027>;
				gsensor_int1 = <0x00000045 0x00000007 0x0000000b 0x00000001>;
				gsensor-supply = <0x0000002d>;
				gsensor_vcc_io_val = <0x00000ce4>;
			};
			lightsensor {
				compatible = "allwinner,stk3x1x";
				reg = <0x00000048>;
				device_type = "lightsensor";
				status = "okay";
				ls_twi_id = <0x00000001>;
				ls_twi_addr = <0x00000048>;
				ls_int = <0x00000045 0x00000007 0x00000004 0x00000001>;
				lightsensor-supply = <0x0000002d>;
			};
		};
		twi@5002800 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-twi";
			device_type = "twi2";
			reg = <0x00000000 0x05002800 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000009 0x00000004>;
			clocks = <0x00000015 0x00000054>;
			resets = <0x00000015 0x0000001e>;
			clock-names = "bus";
			clock-frequency = <0x00030d40>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000052>;
			pinctrl-1 = <0x00000053>;
			status = "okay";
			twi-supply = <0x00000054>;
			twi_vol = <0x001b7740>;
			dmas = <0x00000055 0x0000002d 0x00000055 0x0000002d>;
			dma-names = "tx", "rx";
			twi_drv_used = <0x00000001>;
			phandle = <0x0000013e>;
		};
		twi@5002c00 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-twi";
			device_type = "twi3";
			reg = <0x00000000 0x05002c00 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x0000000a 0x00000004>;
			clocks = <0x00000015 0x00000055>;
			resets = <0x00000015 0x0000001f>;
			clock-names = "bus";
			clock-frequency = <0x00030d40>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000056>;
			pinctrl-1 = <0x00000057>;
			status = "okay";
			twi-supply = <0x00000054>;
			twi_vol = <0x001b7740>;
			dmas = <0x00000055 0x0000002e 0x00000055 0x0000002e>;
			dma-names = "tx", "rx";

			twi_drv_used = <0x00000001>;
			phandle = <0x0000013f>;
		};
		twi@5003000 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-twi";
			device_type = "twi4";
			reg = <0x00000000 0x05003000 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x0000000b 0x00000004>;
			clocks = <0x00000015 0x00000056>;
			resets = <0x00000015 0x00000020>;
			clock-names = "bus";
			clock-frequency = <0x000186a0>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000058>;
			pinctrl-1 = <0x00000059>;
			status = "disabled";
			phandle = <0x00000140>;
		};
		twi@5003400 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-twi";
			device_type = "twi5";
			reg = <0x00000000 0x05003400 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x0000000c 0x00000004>;
			clocks = <0x00000015 0x00000057>;
			resets = <0x00000015 0x00000021>;
			clock-names = "bus";
			clock-frequency = <0x000186a0>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000005a>;
			pinctrl-1 = <0x0000005b>;
			status = "disabled";
			phandle = <0x00000141>;
		};
		s_twi@7081400 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-twi";
			reg = <0x00000000 0x07081400 0x00000000 0x00000200>;
			interrupts = <0x00000000 0x00000071 0x00000004>;
			clocks = <0x00000024 0x0000000a>;
			resets = <0x00000024 0x00000004>;
			clock-names = "bus";
			clock-frequency = <0x00030d40>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000005c>;
			status = "okay";
			pinctrl-1 = <0x0000005d>;
			no_suspend = <0x00000001>;
			twi_drv_used = <0x00000001>;
			phandle = <0x00000142>;
			pmu@34 {
				compatible = "x-powers,axp2202";
				reg = <0x00000034>;
				status = "okay";
				interrupts = <0x00000000 0x00000008>;
				interrupt-parent = <0x0000005e>;
				x-powers,drive-vbus-en;
				pmu_reset = <0x00000000>;
				pmu_irq_wakeup = <0x00000001>;
				pmu_hot_shutdown = <0x00000001>;
				wakeup-source;
				phandle = <0x00000143>;
				usb_power_supply {
					compatible = "x-powers,axp2202-usb-power-supply";
					status = "okay";
					pmu_usbpc_vol = <0x00001194>;
					pmu_usbpc_cur = <0x000001f4>;
					pmu_usbad_vol = <0x00001194>;
					pmu_usbad_cur = <0x000009c4>;
					pmu_usb_typec_used = <0x00000001>;
					wakeup_usb_in;
					wakeup_usb_out;
					phandle = <0x00000090>;
				};
				gpio_power_supply {
					compatible = "x-powers,gpio-supply";
					status = "disabled";
					pmu_acin_det_gpio = <0x00000045 0x00000001 0x00000004 0x00000001>;
					pmu_acin_usbid_drv = <0x00000045 0x00000001 0x00000006 0x00000001>;
					wakeup_gpio;
					phandle = <0x00000144>;
				};
				bat-power-supply {
					compatible = "x-powers,axp2202-bat-power-supply";
					param = <0x0000005f>;
					status = "okay";
					pmu_chg_ic_temp = <0x00000000>;
					pmu_battery_rdc = <0x00000069>;
					pmu_battery_cap = <0x00001360>;
					pmu_runtime_chgcur = <0x000005dc>;
					pmu_suspend_chgcur = <0x000007bc>;
					pmu_shutdown_chgcur = <0x000005dc>;
					pmu_init_chgvol = <0x000010fe>;
					pmu_battery_warning_level1 = <0x0000000f>;
					pmu_battery_warning_level2 = <0x00000000>;
					pmu_chgled_func = <0x00000000>;
					pmu_chgled_type = <0x00000000>;
					ocv_coulumb_100 = <0x00000001>;
					pmu_bat_para1 = <0x00000000>;
					pmu_bat_para2 = <0x00000000>;
					pmu_bat_para3 = <0x00000000>;
					pmu_bat_para4 = <0x00000000>;
					pmu_bat_para5 = <0x00000000>;
					pmu_bat_para6 = <0x00000000>;
					pmu_bat_para7 = <0x00000002>;
					pmu_bat_para8 = <0x00000003>;
					pmu_bat_para9 = <0x00000004>;
					pmu_bat_para10 = <0x00000006>;
					pmu_bat_para11 = <0x00000009>;
					pmu_bat_para12 = <0x0000000e>;
					pmu_bat_para13 = <0x0000001a>;
					pmu_bat_para14 = <0x00000026>;
					pmu_bat_para15 = <0x00000031>;
					pmu_bat_para16 = <0x00000034>;
					pmu_bat_para17 = <0x00000038>;
					pmu_bat_para18 = <0x0000003c>;
					pmu_bat_para19 = <0x00000040>;
					pmu_bat_para20 = <0x00000046>;
					pmu_bat_para21 = <0x0000004d>;
					pmu_bat_para22 = <0x00000053>;
					pmu_bat_para23 = <0x00000057>;
					pmu_bat_para24 = <0x0000005a>;
					pmu_bat_para25 = <0x0000005f>;
					pmu_bat_para26 = <0x00000063>;
					pmu_bat_para27 = <0x00000063>;
					pmu_bat_para28 = <0x00000064>;
					pmu_bat_para29 = <0x00000064>;
					pmu_bat_para30 = <0x00000064>;
					pmu_bat_para31 = <0x00000064>;
					pmu_bat_para32 = <0x00000064>;
					pmu_bat_temp_enable = <0x00000000>;
					pmu_bat_charge_ltf = <0x00000451>;
					pmu_bat_charge_htf = <0x00000079>;
					pmu_bat_shutdown_ltf = <0x00000565>;
					pmu_bat_shutdown_htf = <0x00000059>;
					pmu_bat_temp_para1 = <0x00000afe>;
					pmu_bat_temp_para2 = <0x0000089a>;
					pmu_bat_temp_para3 = <0x000006c9>;
					pmu_bat_temp_para4 = <0x00000565>;
					pmu_bat_temp_para5 = <0x00000451>;
					pmu_bat_temp_para6 = <0x0000037a>;
					pmu_bat_temp_para7 = <0x000002d2>;
					pmu_bat_temp_para8 = <0x000001e4>;
					pmu_bat_temp_para9 = <0x0000014c>;
					pmu_bat_temp_para10 = <0x000000e9>;
					pmu_bat_temp_para11 = <0x000000c4>;
					pmu_bat_temp_para12 = <0x000000a6>;
					pmu_bat_temp_para13 = <0x0000008d>;
					pmu_bat_temp_para14 = <0x00000079>;
					pmu_bat_temp_para15 = <0x00000059>;
					pmu_bat_temp_para16 = <0x00000042>;
					wakeup_bat_out;
					phandle = <0x00000145>;
				};
				powerkey@0 {
					status = "okay";
					compatible = "x-powers,axp2101-pek";
					pmu_powkey_off_time = <0x00001770>;
					pmu_powkey_off_func = <0x00000000>;
					pmu_powkey_off_en = <0x00000001>;
					pmu_powkey_long_time = <0x000005dc>;
					pmu_powkey_on_time = <0x00000200>;
					wakeup_rising;
					wakeup_falling;
					phandle = <0x00000146>;
				};
				regulators@0 {
					phandle = <0x00000147>;
					dcdc1 {
						regulator-name = "axp2202-dcdc1";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x00177fa0>;
						regulator-ramp-delay = <0x000000fa>;
						regulator-enable-ramp-delay = <0x000003e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x00000019>;
					};
					dcdc2 {
						regulator-name = "axp2202-dcdc2";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x0033e140>;
						regulator-ramp-delay = <0x000000fa>;
						regulator-enable-ramp-delay = <0x000003e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x00000060>;
					};
					dcdc3 {
						regulator-name = "axp2202-dcdc3";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x001c1380>;
						regulator-ramp-delay = <0x000000fa>;
						regulator-enable-ramp-delay = <0x000003e8>;
						regulator-always-on;
						phandle = <0x00000061>;
					};
					dcdc4 {
						regulator-name = "axp2202-dcdc4";
						regulator-min-microvolt = <0x000f4240>;
						regulator-max-microvolt = <0x00387520>;
						regulator-ramp-delay = <0x000000fa>;
						regulator-enable-ramp-delay = <0x000003e8>;
						phandle = <0x00000062>;
					};
					rtcldo {
						regulator-name = "axp2202-rtcldo";
						regulator-min-microvolt = <0x001b7740>;
						regulator-max-microvolt = <0x001b7740>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x00000063>;
					};
					aldo1 {
						regulator-name = "axp2202-aldo1";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						phandle = <0x00000064>;
					};
					aldo2 {
						regulator-name = "axp2202-aldo2";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						phandle = <0x00000054>;
					};
					aldo3 {
						regulator-name = "axp2202-aldo3";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						regulator-always-on;
						regulator-boot-on;
						phandle = <0x00000065>;
					};
					aldo4 {
						regulator-name = "axp2202-aldo4";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						regulator-always-on;
						regulator-boot-on;
						phandle = <0x00000066>;
					};
					bldo1 {
						regulator-name = "axp2202-bldo1";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						phandle = <0x00000067>;
					};
					bldo2 {
						regulator-name = "axp2202-bldo2";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x00000068>;
					};
					bldo3 {
						regulator-name = "axp2202-bldo3";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						phandle = <0x00000069>;
					};
					bldo4 {
						regulator-name = "axp2202-bldo4";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						phandle = <0x0000006a>;
					};
					cldo1 {
						regulator-name = "axp2202-cldo1";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						phandle = <0x0000003f>;
					};
					cldo2 {
						regulator-name = "axp2202-cldo2";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						phandle = <0x0000004f>;
					};
					cldo3 {
						regulator-name = "axp2202-cldo3";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-ramp-delay = <0x000009c4>;
						regulator-enable-ramp-delay = <0x000003e8>;
						regulator-boot-on;
						phandle = <0x0000002d>;
					};
					cldo4 {
						regulator-name = "axp2202-cldo4";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x003567e0>;
						regulator-enable-ramp-delay = <0x000003e8>;
						phandle = <0x0000006b>;
					};
					cpusldo {
						regulator-name = "axp2202-cpusldo";
						regulator-min-microvolt = <0x0007a120>;
						regulator-max-microvolt = <0x00155cc0>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x0000006c>;
					};
					drivevbus {
						regulator-name = "axp2202-drivevbus";
						regulator-enable-ramp-delay = <0x000003e8>;
						phandle = <0x0000006d>;
					};
				};
				virtual-dcdc1 {
					compatible = "xpower-vregulator,dcdc1";
					dcdc1-supply = <0x00000019>;
				};
				virtual-dcdc2 {
					compatible = "xpower-vregulator,dcdc2";
					dcdc2-supply = <0x00000060>;
				};
				virtual-dcdc3 {
					compatible = "xpower-vregulator,dcdc3";
					dcdc3-supply = <0x00000061>;
				};
				virtual-dcdc4 {
					compatible = "xpower-vregulator,dcdc4";
					dcdc4-supply = <0x00000062>;
				};
				virtual-rtcldo {
					compatible = "xpower-vregulator,rtcldo";
					rtcldo-supply = <0x00000063>;
				};
				virtual-aldo1 {
					compatible = "xpower-vregulator,aldo1";
					aldo1-supply = <0x00000064>;
				};
				virtual-aldo2 {
					compatible = "xpower-vregulator,aldo2";
					aldo2-supply = <0x00000054>;
				};
				virtual-aldo3 {
					compatible = "xpower-vregulator,aldo3";
					aldo3-supply = <0x00000065>;

				};
				virtual-aldo4 {
					compatible = "xpower-vregulator,aldo4";
					aldo4-supply = <0x00000066>;
				};
				virtual-bldo1 {
					compatible = "xpower-vregulator,bldo1";
					bldo1-supply = <0x00000067>;
				};
				virtual-bldo2 {
					compatible = "xpower-vregulator,bldo2";
					bldo2-supply = <0x00000068>;
				};
				virtual-bldo3 {
					compatible = "xpower-vregulator,bldo3";
					bldo3-supply = <0x00000069>;
				};
				virtual-bldo4 {
					compatible = "xpower-vregulator,bldo4";
					bldo4-supply = <0x0000006a>;
				};
				virtual-cldo1 {
					compatible = "xpower-vregulator,cldo1";
					cldo1-supply = <0x0000003f>;
				};
				virtual-cldo2 {
					compatible = "xpower-vregulator,cldo2";
					cldo2-supply = <0x0000004f>;
				};
				virtual-cldo3 {
					compatible = "xpower-vregulator,cldo3";
					cldo3-supply = <0x0000002d>;
				};
				virtual-cldo4 {
					compatible = "xpower-vregulator,cldo4";
					cldo4-supply = <0x0000006b>;
				};
				virtual-cpusldo {
					compatible = "xpower-vregulator,cpusldo";
					cpusldo-supply = <0x0000006c>;
				};
				virtual-drivevbus {
					compatible = "xpower-vregulator,drivevbus";
					drivevbus-supply = <0x0000006d>;
				};
				axp_gpio@0 {
					gpio-controller;
					#size-cells = <0x00000000>;
					#gpio-cells = <0x00000006>;
					status = "okay";
					phandle = <0x00000148>;
				};
			};
		};
		s_twi@7081800 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-twi";
			reg = <0x00000000 0x07081800 0x00000000 0x00000200>;
			interrupts = <0x00000000 0x00000072 0x00000004>;
			clocks = <0x00000024 0x0000000b>;
			resets = <0x00000024 0x00000005>;
			clock-names = "bus";
			clock-frequency = <0x00030d40>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000006e>;
			status = "disabled";
			phandle = <0x00000149>;
		};
		pwm@300a000 {
			#pwm-cells = <0x00000003>;
			compatible = "allwinner,sunxi-pwm";
			reg = <0x00000000 0x0300a000 0x00000000 0x000003ff>;
			clocks = <0x00000015 0x00000036>;
			resets = <0x00000015 0x0000000e>;
			pwm-number = <0x0000000a>;
			pwm-base = <0x00000000>;
			sunxi-pwms = <0x0000006f 0x00000070 0x00000071 0x00000072 0x00000073 0x00000074 0x00000075 0x00000076 0x00000077 0x00000078>;
			phandle = <0x0000014a>;
		};
		pwm0@300a010 {
			compatible = "allwinner,sunxi-pwm0";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x0300a010 0x00000000 0x00000004>;
			reg_base = <0x0300a000>;
			pinctrl-0 = <0x00000079>;
			pinctrl-1 = <0x0000007a>;
			phandle = <0x0000006f>;
		};
		pwm1@300a011 {
			compatible = "allwinner,sunxi-pwm1";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x0300a011 0x00000000 0x00000004>;
			reg_base = <0x0300a000>;
			pinctrl-0 = <0x0000007b>;
			pinctrl-1 = <0x0000007c>;
			phandle = <0x00000070>;
		};
		pwm2@300a012 {
			compatible = "allwinner,sunxi-pwm2";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x0300a012 0x00000000 0x00000004>;
			reg_base = <0x0300a000>;
			phandle = <0x00000071>;
		};
		pwm3@300a013 {
			compatible = "allwinner,sunxi-pwm3";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x0300a013 0x00000000 0x00000004>;
			reg_base = <0x0300a000>;
			phandle = <0x00000072>;
		};
		pwm4@300a014 {
			compatible = "allwinner,sunxi-pwm4";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x0300a014 0x00000000 0x00000004>;
			reg_base = <0x0300a000>;
			phandle = <0x00000073>;
		};
		pwm5@300a015 {
			compatible = "allwinner,sunxi-pwm5";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x0300a015 0x00000000 0x00000004>;
			reg_base = <0x0300a000>;
			phandle = <0x00000074>;
		};
		pwm6@300a016 {
			compatible = "allwinner,sunxi-pwm6";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x0300a016 0x00000000 0x00000004>;
			reg_base = <0x0300a000>;
			phandle = <0x00000075>;
		};
		pwm7@300a017 {
			compatible = "allwinner,sunxi-pwm7";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x0300a017 0x00000000 0x00000004>;
			reg_base = <0x0300a000>;
			phandle = <0x00000076>;
		};
		pwm8@300a018 {
			compatible = "allwinner,sunxi-pwm8";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x0300a018 0x00000000 0x00000004>;
			reg_base = <0x0300a000>;
			phandle = <0x00000077>;
		};
		pwm9@300a019 {
			compatible = "allwinner,sunxi-pwm9";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x0300a019 0x00000000 0x00000004>;
			reg_base = <0x0300a000>;
			phandle = <0x00000078>;
		};
		vind@2000800 {
			compatible = "allwinner,sunxi-vin-media", "simple-bus";
			#address-cells = <0x00000002>;
			#size-cells = <0x00000002>;
			ranges;
			device_id = <0x00000000>;
			csi_top = <0x1406f400>;
			csi_isp = <0x11e1a300>;
			reg = <0x00000000 0x02000800 0x00000000 0x00000200 0x00000000 0x02000000 0x00000000 0x00000800 0x00000000 0x0200a000 0x00000000 0x00000100>;
			clocks = * 0xbbe865ec [0x00000060];
			clock-names = "csi_top", "csi_top_src", "csi_mclk0", "csi_mclk0_24m", "csi_mclk0_pll", "csi_mclk1", "csi_mclk1_24m", "csi_mclk1_pll", "csi_isp", "csi_isp_src", "csi_bus", "csi_mbus", "csi_isp_mbus";
			resets = <0x00000015 0x00000042 0x00000015 0x00000043>;
			reset-names = "csi_ret", "isp_ret";
			pinctrl-names = "mclk0-default", "mclk0-sleep", "mclk1-default", "mclk1-sleep";
			pinctrl-0 = <0x0000007d>;
			pinctrl-1 = <0x0000007e>;
			pinctrl-2 = <0x0000007f>;
			pinctrl-3 = <0x00000080>;
			status = "okay";
			phandle = <0x0000014b>;
			csi@2001000 {
				compatible = "allwinner,sunxi-csi";
				reg = <0x00000000 0x02001000 0x00000000 0x00001000>;
				interrupts = <0x00000000 0x0000004b 0x00000004>;
				device_id = <0x00000000>;
				iommus = <0x00000081 0x00000003 0x00000001>;
				phandle = <0x0000014c>;
			};
			csi@2002000 {
				compatible = "allwinner,sunxi-csi";
				reg = <0x00000000 0x02002000 0x00000000 0x00001000>;
				interrupts = <0x00000000 0x0000004c 0x00000004>;
				device_id = <0x00000001>;
				iommus = <0x00000081 0x00000003 0x00000001>;
				phandle = <0x0000014d>;
			};
			mipi@200a100 {
				compatible = "allwinner,sunxi-mipi";
				reg = <0x00000000 0x0200a100 0x00000000 0x00000100 0x00000000 0x0200b000 0x00000000 0x00000400>;
				interrupts = <0x00000000 0x00000050 0x00000004>;
				device_id = <0x00000000>;
				phandle = <0x0000014e>;
			};
			mipi@200a200 {
				compatible = "allwinner,sunxi-mipi";
				reg = <0x00000000 0x0200a200 0x00000000 0x00000100 0x00000000 0x0200b400 0x00000000 0x00000400>;
				device_id = <0x00000001>;
				phandle = <0x0000014f>;
			};
			tdm@2108000 {
				compatible = "allwinner,sunxi-tdm";
				reg = <0x00000000 0x02108000 0x00000000 0x00000180>;
				interrupts = <0x00000000 0x0000004f 0x00000004>;
				device_id = <0x00000000>;
				iommus = <0x00000081 0x00000004 0x00000001>;
				phandle = <0x00000150>;
			};
			isp@2100000 {
				compatible = "allwinner,sunxi-isp";
				reg = <0x00000000 0x02100000 0x00000000 0x00002000>;
				interrupts = <0x00000000 0x0000004d 0x00000004>;
				device_id = <0x00000000>;
				iommus = <0x00000081 0x00000004 0x00000001>;
				phandle = <0x00000151>;
			};
			isp@2102000 {
				compatible = "allwinner,sunxi-isp";
				reg = <0x00000000 0x02102000 0x00000000 0x00002000>;
				interrupts = <0x00000000 0x0000004e 0x00000004>;
				device_id = <0x00000001>;
				iommus = <0x00000081 0x00000004 0x00000001>;
				phandle = <0x00000152>;
			};
			scaler@2110000 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00000000 0x02110000 0x00000000 0x00000400>;
				device_id = <0x00000000>;
				iommus = <0x00000081 0x00000003 0x00000001>;
				phandle = <0x00000153>;
			};
			scaler@2110400 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00000000 0x02110400 0x00000000 0x00000400>;
				device_id = <0x00000001>;
				iommus = <0x00000081 0x00000003 0x00000001>;
				phandle = <0x00000154>;
			};
			scaler@2110800 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00000000 0x02110800 0x00000000 0x00000400>;
				device_id = <0x00000002>;
				iommus = <0x00000081 0x00000003 0x00000001>;
				phandle = <0x00000155>;
			};
			scaler@2110c00 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00000000 0x02110c00 0x00000000 0x00000400>;
				device_id = <0x00000003>;
				iommus = <0x00000081 0x00000003 0x00000001>;
				phandle = <0x00000156>;
			};
			actuator@2108180 {
				compatible = "allwinner,sunxi-actuator";
				device_type = "actuator0";
				reg = <0x00000000 0x02108180 0x00000000 0x00000010>;
				actuator0_name = "dw9714_act";
				actuator0_slave = <0x00000018>;
				actuator0_af_pwdn;
				actuator0_afvdd = "afvcc-csi";
				actuator0_afvdd_vol = <0x002ab980>;
				status = "disabled";
				phandle = <0x00000084>;
			};
			flash@2108190 {
				device_type = "flash0";
				compatible = "allwinner,sunxi-flash";
				reg = <0x00000000 0x02108190 0x00000000 0x00000010>;
				flash0_type = <0x00000002>;
				flash0_en = <0x00000082 0x00000000 0x0000000b 0x00000001>;
				flash0_mode;
				flash0_flvdd = "";
				flash0_flvdd_vol;
				device_id = <0x00000000>;
				status = "disabled";
				phandle = <0x00000083>;
			};
			sensor@200b800 {
				reg = <0x00000000 0x0200b800 0x00000000 0x00000010>;
				device_type = "sensor0";
				compatible = "allwinner,sunxi-sensor";
				sensor0_mname = "gc02m2_mipi";
				sensor0_twi_cci_id = <0x00000002>;
				sensor0_twi_addr = <0x0000006e>;
				sensor0_mclk_id = <0x00000000>;
				sensor0_pos = "rear";
				sensor0_isp_used = <0x00000001>;
				sensor0_fmt = <0x00000001>;
				sensor0_stby_mode = <0x00000000>;
				sensor0_vflip = <0x00000001>;
				sensor0_hflip = <0x00000001>;
				sensor0_iovdd-supply = <0x00000054>;
				sensor0_iovdd_vol = <0x002ab980>;
				sensor0_avdd-supply = <0x00000064>;
				sensor0_avdd_vol = <0x002ab980>;
				sensor0_dvdd-supply = <0x0000006a>;
				sensor0_dvdd_vol = <0x00124f80>;
				sensor0_power_en = <0x00000045 0x00000004 0x00000006 0x00000001>;
				sensor0_reset = <0x00000045 0x00000004 0x00000009 0x00000001>;
				sensor0_pwdn = <0x00000045 0x00000004 0x00000008 0x00000001>;
				sensor0_sm_vs;
				flash_handle = <0x00000083>;
				act_handle = <0x00000084>;
				device_id = <0x00000000>;
				sensor0_cameravdd-supply = <0x00000054>;
				sensor0_cameravdd_vol = <0x002ab980>;
				status = "okay";
				phandle = <0x00000157>;
			};
			sensor@200b810 {
				reg = <0x00000000 0x0200b810 0x00000000 0x00000010>;
				device_type = "sensor1";
				compatible = "allwinner,sunxi-sensor";
				sensor1_mname = "gc030a_mipi";
				sensor1_twi_cci_id = <0x00000002>;
				sensor1_twi_addr = <0x00000042>;
				sensor1_mclk_id = <0x00000000>;
				sensor1_pos = "front";
				sensor1_isp_used = <0x00000001>;
				sensor1_fmt = <0x00000001>;
				sensor1_stby_mode = <0x00000000>;
				sensor1_vflip = <0x00000000>;
				sensor1_hflip = <0x00000000>;
				sensor1_iovdd-supply = <0x00000054>;
				sensor1_iovdd_vol = <0x002ab980>;
				sensor1_avdd-supply = <0x00000064>;
				sensor1_avdd_vol = <0x002ab980>;
				sensor1_dvdd-supply = <0x0000006a>;
				sensor1_dvdd_vol = <0x00124f80>;
				sensor1_power_en;
				sensor1_reset = <0x00000045 0x00000004 0x00000007 0x00000001>;
				sensor1_pwdn = <0x00000045 0x00000004 0x00000006 0x00000001>;
				sensor1_sm_vs;
				flash_handle;
				act_handle;
				device_id = <0x00000001>;
				status = "okay";
				phandle = <0x00000158>;
			};
			vinc@2009000 {
				compatible = "allwinner,sunxi-vin-core";
				device_type = "vinc0";
				reg = <0x00000000 0x02009000 0x00000000 0x00000200>;
				interrupts = <0x00000000 0x00000047 0x00000004>;
				vinc0_csi_sel = <0x00000000>;
				vinc0_mipi_sel = <0x00000000>;
				vinc0_isp_sel = <0x00000000>;
				vinc0_tdm_rx_sel = <0x000000ff>;
				vinc0_rear_sensor_sel = <0x00000000>;
				vinc0_front_sensor_sel = <0x00000001>;
				vinc0_sensor_list = <0x00000000>;
				device_id = <0x00000000>;
				iommus = <0x00000081 0x00000003 0x00000001>;
				vinc0_isp_tx_ch = <0x00000000>;
				status = "okay";
				phandle = <0x00000159>;
			};
			vinc@2009200 {
				device_type = "vinc1";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00000000 0x02009200 0x00000000 0x00000200>;
				interrupts = <0x00000000 0x00000048 0x00000004>;
				vinc1_csi_sel = <0x00000000>;
				vinc1_mipi_sel = <0x00000000>;
				vinc1_isp_sel = <0x00000000>;
				vinc1_tdm_rx_sel = <0x000000ff>;
				vinc1_rear_sensor_sel = <0x00000000>;
				vinc1_front_sensor_sel = <0x00000001>;
				vinc1_sensor_list = <0x00000000>;
				device_id = <0x00000001>;
				iommus = <0x00000081 0x00000003 0x00000001>;
				vinc1_isp_tx_ch = <0x00000000>;
				status = "okay";
				phandle = <0x0000015a>;
			};
			vinc@2009400 {
				device_type = "vinc2";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00000000 0x02009400 0x00000000 0x00000200>;
				interrupts = <0x00000000 0x00000049 0x00000004>;
				vinc2_csi_sel = <0x00000001>;
				vinc2_mipi_sel = <0x00000001>;
				vinc2_isp_sel = <0x00000000>;
				vinc2_tdm_rx_sel = <0x000000ff>;
				vinc2_rear_sensor_sel = <0x00000000>;
				vinc2_front_sensor_sel = <0x00000001>;
				vinc2_sensor_list = <0x00000000>;
				device_id = <0x00000002>;
				iommus = <0x00000081 0x00000003 0x00000001>;
				vinc2_isp_tx_ch = <0x00000000>;
				status = "okay";
				phandle = <0x0000015b>;
			};
			vinc@2009600 {
				device_type = "vinc3";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00000000 0x02009600 0x00000000 0x00000200>;
				interrupts = <0x00000000 0x0000004a 0x00000004>;
				vinc3_csi_sel = <0x00000001>;
				vinc3_mipi_sel = <0x00000001>;
				vinc3_isp_sel = <0x00000000>;
				vinc3_tdm_rx_sel = <0x000000ff>;
				vinc3_rear_sensor_sel = <0x00000000>;
				vinc3_front_sensor_sel = <0x00000001>;
				vinc3_sensor_list = <0x00000000>;
				device_id = <0x00000003>;
				iommus = <0x00000081 0x00000003 0x00000001>;
				vinc3_isp_tx_ch = <0x00000000>;
				status = "okay";
				phandle = <0x0000015c>;
			};
		};
		keyboard@5070800 {
			compatible = "allwinner,keyboard_1350mv";
			reg = <0x00000000 0x05070800 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x00000016 0x00000001>;
			clocks = <0x00000015 0x00000081>;
			resets = <0x00000015 0x00000039>;
			key_cnt = <0x00000003>;
			key0 = <0x000001db 0x00007372>;
			key1 = <0x00000286 0x00000073>;
			key2 = <0x00000384 0x00000072>;
			key3 = <0x000002ee 0x0000001c>;
			key4 = <0x00000370 0x00000066>;
			status = "okay";
			phandle = <0x0000015d>;
		};
		spi@5010000 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-spi";
			device_type = "spi0";
			reg = <0x00000000 0x05010000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x0000000d 0x00000004>;
			clocks = <0x00000015 0x00000003 0x00000015 0x00000058 0x00000015 0x0000005b>;
			clock-names = "pll", "mod", "bus";
			resets = <0x00000015 0x00000022>;
			clock-frequency = <0x05f5e100>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000085 0x00000086>;
			pinctrl-1 = <0x00000087>;
			spi0_cs_number = <0x00000001>;
			spi0_cs_bitmap = <0x00000001>;
			dmas = <0x00000055 0x00000016 0x00000055 0x00000016>;
			dma-names = "tx", "rx";
			status = "disabled";
			spi_slave_mode = <0x00000000>;
			phandle = <0x0000015e>;
		};
		spi@5011000 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-spi";
			device_type = "spi1";
			reg = <0x00000000 0x05011000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x0000000e 0x00000004>;
			clocks = <0x00000015 0x00000003 0x00000015 0x00000059 0x00000015 0x0000005c>;
			clock-names = "pll", "mod", "bus";
			resets = <0x00000015 0x00000023>;
			clock-frequency = <0x05f5e100>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x00000088 0x00000089>;
			pinctrl-1 = <0x0000008a>;
			spi1_cs_number = <0x00000001>;
			spi1_cs_bitmap = <0x00000001>;
			dmas = <0x00000055 0x00000017 0x00000055 0x00000017>;
			dma-names = "tx", "rx";
			status = "disabled";
			spi_slave_mode = <0x00000000>;
			phandle = <0x0000015f>;
		};
		spi@5012000 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sun50i-spi";
			device_type = "spi2";
			reg = <0x00000000 0x05012000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x0000000f 0x00000004>;
			clocks = <0x00000015 0x00000003 0x00000015 0x0000005a 0x00000015 0x0000005d>;
			clock-names = "pll", "mod", "bus";
			resets = <0x00000015 0x00000024>;
			clock-frequency = <0x05f5e100>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000008b 0x0000008c>;
			pinctrl-1 = <0x0000008d>;
			spi2_cs_number = <0x00000001>;
			spi2_cs_bitmap = <0x00000001>;
			dmas = <0x00000055 0x00000018 0x00000055 0x00000018>;
			dma-names = "tx", "rx";
			status = "disabled";
			spi_slave_mode = <0x00000000>;
			phandle = <0x00000160>;
		};
		ledc@0x5018000 {
			#address-cells = <0x00000001>;
			#size-cells = <0x00000000>;
			compatible = "allwinner,sunxi-leds";
			reg = <0x00000000 0x05018000 0x00000000 0x00000100>;
			interrupts = <0x00000000 0x00000023 0x00000004>;
			interrupt-names = "ledcirq";
			clocks = <0x00000015 0x0000008a 0x00000015 0x0000008b>;
			clock-names = "clk_ledc", "clk_cpuapb";
			pinctrl-0 = <0x0000008e>;
			pinctrl-1 = <0x0000008f>;
			pinctrl-names = "default", "sleep";
			dmas = <0x00000055 0x00000000 0x00000055 0x0000000b>;
			dma-names = "rx", "tx";
			resets = <0x00000015 0x00000041>;
			reset-names = "ledc_reset";
			status = "disable";
			phandle = <0x00000161>;
		};
		usbc0@10 {
			device_type = "usbc0";
			compatible = "allwinner,sunxi-otg-manager";
			reg = <0x00000000 0x00000010 0x00000000 0x00001000>;
			usb_port_type = <0x00000002>;
			usb_detect_type = <0x00000002>;
			usb_id_gpio = <0x00000045 0x00000007 0x00000008 0x00000000>;
			usb_det_vbus_gpio = "axp_ctrl";
			usb_wakeup_suspend = <0x00000000>;
			usb_serial_unique = <0x00000000>;
			usb_serial_number = "20080411";
			rndis_wceis = <0x00000001>;
			usb_detect_mode = <0x00000000>;
			enable-active-high;
			det_vbus_supply = <0x00000090>;
			usbc-supply = <0x0000002d>;
			status = "okay";
			phandle = <0x00000162>;
		};
		udc-controller@5100000 {
			compatible = "allwinner,sunxi-udc";
			reg = <0x00000000 0x05100000 0x00000000 0x00001000 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05200000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x00000020 0x00000004>;
			clocks = <0x00000015 0x00000080 0x00000015 0x00000079>;
			clock-names = "bus_otg", "phy";
			resets = <0x00000015 0x00000038 0x00000015 0x00000032>;
			reset-names = "otg", "phy";
			det_vbus_supply = <0x00000090>;
			udc-supply = <0x0000002d>;
			phandle = <0x00000163>;
		};
		ehci0-controller@5101000 {
			compatible = "allwinner,sunxi-ehci0";
			reg = * 0xbbe88504 [0x00000060];
			interrupts = <0x00000000 0x0000001e 0x00000004>;
			clocks = <0x00000015 0x0000007e 0x00000015 0x00000079>;
			clock-names = "bus_hci", "phy";
			resets = <0x00000015 0x00000036 0x00000015 0x00000032>;
			reset-names = "hci", "phy";
			hci_ctrl_no = <0x00000000>;
			drvvbus-supply = <0x0000006d>;
			hci-supply = <0x0000002d>;
			phandle = <0x00000164>;
		};
		ohci0-controller@5101400 {
			compatible = "allwinner,sunxi-ohci0";
			reg = * 0xbbe88674 [0x00000060];
			interrupts = <0x00000000 0x0000001f 0x00000004>;
			clocks = <0x00000015 0x0000007c 0x00000015 0x00000078 0x00000015 0x00000079>;
			clock-names = "bus_hci", "ohci", "phy";
			resets = <0x00000015 0x00000034 0x00000015 0x00000032>;
			reset-names = "hci", "phy";
			hci_ctrl_no = <0x00000000>;
			drvvbus-supply = <0x0000006d>;
			hci-supply = <0x0000002d>;
			phandle = <0x00000165>;
		};
		usbc1@11 {
			device_type = "usbc1";
			reg = <0x00000000 0x00000011 0x00000000 0x00001000>;
			usb_wakeup_suspend = <0x00000000>;
			usb_regulator_io = "nocare";
			status = "disable";
			phandle = <0x00000166>;
		};
		ehci1-controller@5200000 {
			compatible = "allwinner,sunxi-ehci1";
			reg = <0x00000000 0x05200000 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000 0x00000000 0x07010250 0x00000000 0x00000010>;
			interrupts = <0x00000000 0x00000021 0x00000004>;
			clocks = <0x00000015 0x0000007f 0x00000015 0x0000007b>;
			clock-names = "bus_hci", "phy";
			resets = <0x00000015 0x00000037 0x00000015 0x00000033>;
			reset-names = "hci", "phy";
			hci_ctrl_no = <0x00000001>;
			drvvbus-supply = <0x00000091>;
			phandle = <0x00000167>;
		};
		ohci1-controller@5200400 {
			compatible = "allwinner,sunxi-ohci1";
			reg = <0x00000000 0x05200400 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000 0x00000000 0x07010250 0x00000000 0x00000010>;
			interrupts = <0x00000000 0x00000022 0x00000004>;
			clocks = <0x00000015 0x0000007d 0x00000015 0x0000007a 0x00000015 0x0000007b>;
			clock-names = "bus_hci", "ohci", "phy";
			resets = <0x00000015 0x00000035 0x00000015 0x00000033>;
			reset-names = "hci", "phy";
			hci_ctrl_no = <0x00000001>;
			drvvbus-supply = <0x00000091>;
			phandle = <0x00000168>;
		};
		disp1@1 {
			compatible = "allwinner,sunxi-disp";
			iommus = <0x00000081 0x00000001 0x00000000>;
			phandle = <0x00000169>;
		};
		disp@6000000 {
			boot_fb0 = "bbf299c0,320,500,20,c80,0,0,320,500";
			compatible = "allwinner,sunxi-disp";
			reg = * 0xbbe88b90 [0x00000070];
			interrupts = <0x00000000 0x00000045 0x00000004 0x00000000 0x00000046 0x00000004 0x00000000 0x00000044 0x00000004>;
			clocks = * 0xbbe88c3c [0x00000068];
			clock-names = "clk_de0", "clk_de1", "clk_bus_de0", "clk_bus_de1", "clk_bus_dpss_top0", "clk_bus_dpss_top1", "clk_mipi_dsi0", "clk_bus_mipi_dsi0", "clk_tcon0", "clk_tcon1", "clk_bus_tcon0", "clk_bus_tcon1", "clk_pll_com";
			resets = * 0xbbe88d64 [0x00000048];
			reset-names = "rst_bus_de0", "rst_bus_de1", "rst_bus_dpss_top0", "rst_bus_dpss_top1", "rst_bus_mipi_dsi0", "rst_bus_tcon0", "rst_bus_tcon1", "rst_bus_lvds0", "rst_bus_lvds1";
			assigned-clocks = <0x00000015 0x00000020 0x00000015 0x00000021 0x00000015 0x00000084 0x00000015 0x00000086 0x00000015 0x00000087>;
			assigned-clock-parents = <0x00000015 0x00000004 0x00000015 0x00000004 0x00000015 0x00000003 0x00000015 0x0000000a 0x00000015 0x0000000d>;
			assigned-clock-rates = <0x11e1a300 0x11e1a300 0x00000000 0x00000000 0x00000000>;
			boot_disp = <0x00000104>;
			boot_disp1 = <0x01040000>;
			boot_disp2 = <0x00000004>;
			fb_base = <0x00000000>;
			iommus = <0x00000081 0x00000000 0x00000000>;
			disp_init_enable = <0x00000001>;
			disp_mode = <0x00000000>;
			screen0_output_type = <0x00000001>;
			screen0_output_mode = <0x00000004>;
			screen1_output_type = <0x00000001>;
			screen1_output_mode = <0x00000004>;
			screen1_output_format = <0x00000000>;
			screen1_output_bits = <0x00000000>;
			screen1_output_eotf = <0x00000004>;
			screen1_output_cs = <0x00000101>;
			screen1_output_dvi_hdmi = <0x00000002>;
			screen1_output_range = <0x00000002>;
			screen1_output_scan = <0x00000000>;
			screen1_output_aspect_ratio = <0x00000008>;
			dev0_output_type = <0x00000001>;
			dev0_output_mode = <0x00000004>;
			dev0_screen_id = <0x00000000>;
			dev0_do_hpd = <0x00000000>;
			dev1_output_type = <0x00000004>;
			dev1_output_mode = <0x0000000a>;
			dev1_screen_id = <0x00000001>;
			dev1_do_hpd = <0x00000001>;
			def_output_dev = <0x00000000>;
			hdmi_mode_check = <0x00000001>;
			fb0_format = <0x00000000>;
			fb0_width = <0x00000320>;
			fb0_height = <0x00000500>;
			fb1_format = <0x00000000>;
			fb1_width = <0x00000000>;
			fb1_height = <0x00000000>;
			chn_cfg_mode = <0x00000001>;
			disp_para_zone = <0x00000001>;
			dc1sw-supply = <0x0000006b>;
			dcdc1-supply = <0x0000002d>;
			phandle = <0x0000016a>;
		};
		uboot_disp@06100000 {
			compatible = "allwinner,sunxi-disp";
			reg = * 0xbbe8919c [0x00000070];
			interrupts = <0x00000000 0x00000045 0x00000004 0x00000000 0x00000046 0x00000004 0x00000000 0x00000044 0x00000004>;
			clocks = <0x0000000d 0x0000000e 0x00000092 0x00000093 0x00000094 0x00000012 0x00000013 0x00000095 0x00000096 0x00000014>;
			boot_disp = <0x00000000>;
			boot_disp1 = <0x00000000>;
			boot_disp2 = <0x00000000>;
			fb_base = <0x00000000>;
			iommus = <0x00000081 0x00000000 0x00000000>;
			phandle = <0x0000016b>;
		};
		lcd0_1@1c0c000 {
			lcd_used = <0x00000001>;
			lcd_driver_name = "C69500_01";
			lcd_backlight = <0x00000032>;
			lcd_if = <0x00000004>;
			lcd_x = <0x00000320>;
			lcd_y = <0x00000500>;
			lcd_width = <0x0000006c>;
			lcd_height = <0x000000ac>;
			lcd_dclk_freq = <0x00000044>;
			lcd_pwm_used = <0x00000001>;
			lcd_pwm_ch = <0x00000000>;
			lcd_pwm_freq = <0x0000c350>;
			lcd_pwm_pol = <0x00000001>;
			lcd_pwm_max_limit = <0x000000ff>;
			lcd_hbp = <0x00000032>;
			lcd_ht = <0x0000036b>;
			lcd_hspw = <0x00000019>;
			lcd_vbp = <0x0000000c>;
			lcd_vt = <0x00000518>;
			lcd_vspw = <0x00000002>;
			lcd_frm = <0x00000000>;
			lcd_gamma_en = <0x00000000>;
			lcd_bright_curve_en = <0x00000000>;
			lcd_cmap_en = <0x00000000>;
			deu_mode = <0x00000000>;
			lcdgamma4iep = <0x00000016>;
			smart_color = <0x0000005a>;
			lcd_dsi_if = <0x00000000>;
			lcd_dsi_lane = <0x00000004>;
			lcd_dsi_format = <0x00000000>;
			lcd_dsi_te = <0x00000000>;
			lcd_dsi_eotp = <0x00000000>;
			lcd_pin_power = "dcdc1";
			lcd_pin_power1 = "eldo3";
			lcd_power = "dc1sw";
			lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>;
			lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>;
			pinctrl-0 = <0x00000097>;
			pinctrl-1 = <0x00000098>;
			phandle = <0x0000016c>;
		};
		lcd0_2@1c0c000 {
			lcd_used = <0x00000001>;
			lcd_driver_name = "K080_IM2AYC805_R_800x1280";
			lcd_backlight = <0x00000032>;
			lcd_if = <0x00000004>;
			lcd_x = <0x00000320>;
			lcd_y = <0x00000500>;
			lcd_width = <0x0000006c>;
			lcd_height = <0x000000ac>;
			lcd_dclk_freq = <0x00000044>;
			lcd_pwm_used = <0x00000001>;
			lcd_pwm_ch = <0x00000000>;
			lcd_pwm_freq = <0x0000c350>;
			lcd_pwm_pol = <0x00000001>;
			lcd_pwm_max_limit = <0x000000ff>;
			lcd_hbp = <0x00000024>;
			lcd_ht = <0x00000356>;
			lcd_hspw = <0x00000012>;
			lcd_vbp = <0x0000000c>;
			lcd_vt = <0x00000528>;
			lcd_vspw = <0x00000004>;
			lcd_frm = <0x00000000>;
			lcd_gamma_en = <0x00000000>;
			lcd_bright_curve_en = <0x00000000>;
			lcd_cmap_en = <0x00000000>;
			deu_mode = <0x00000000>;
			lcdgamma4iep = <0x00000016>;
			smart_color = <0x0000005a>;
			lcd_dsi_if = <0x00000000>;
			lcd_dsi_lane = <0x00000004>;
			lcd_dsi_format = <0x00000000>;
			lcd_dsi_te = <0x00000000>;
			lcd_dsi_eotp = <0x00000000>;
			lcd_pin_power = "dcdc1";
			lcd_pin_power1 = "eldo3";
			lcd_power = "dc1sw";
			lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>;
			lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>;
			pinctrl-0 = <0x00000097>;
			pinctrl-1 = <0x00000098>;
			phandle = <0x0000016d>;
		};
		lcd0_3@1c0c000 {
			lcd_used = <0x00000001>;
			lcd_driver_name = "K101_IM2BYL02_L_800X1280";
			lcd_backlight = <0x00000032>;
			lcd_if = <0x00000004>;
			lcd_x = <0x00000320>;
			lcd_y = <0x00000500>;
			lcd_width = <0x0000006c>;
			lcd_height = <0x000000ac>;
			lcd_dclk_freq = <0x00000048>;
			lcd_pwm_used = <0x00000001>;
			lcd_pwm_ch = <0x00000000>;
			lcd_pwm_freq = <0x0000c350>;
			lcd_pwm_pol = <0x00000001>;
			lcd_pwm_max_limit = <0x000000ff>;
			lcd_hbp = <0x00000050>;
			lcd_ht = <0x00000384>;
			lcd_hspw = <0x0000000e>;
			lcd_vbp = <0x0000001c>;
			lcd_vt = <0x00000572>;
			lcd_vspw = <0x00000008>;
			lcd_frm = <0x00000000>;
			lcd_gamma_en = <0x00000000>;
			lcd_bright_curve_en = <0x00000000>;
			lcd_cmap_en = <0x00000000>;
			deu_mode = <0x00000000>;
			lcdgamma4iep = <0x00000016>;
			smart_color = <0x0000005a>;
			lcd_dsi_if = <0x00000000>;
			lcd_dsi_lane = <0x00000004>;
			lcd_dsi_format = <0x00000000>;
			lcd_dsi_te = <0x00000000>;
			lcd_dsi_eotp = <0x00000000>;
			lcd_pin_power = "dcdc1";
			lcd_pin_power1 = "eldo3";
			lcd_power = "dc1sw";
			lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>;
			lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>;
			pinctrl-0 = <0x00000097>;
			pinctrl-1 = <0x00000098>;
			phandle = <0x0000016e>;
		};
		lcd0@1c0c000 {
			compatible = "allwinner,sunxi-lcd0";
			reg = <0x00000000 0x01c0c000 0x00000000 0x00000000>;
			pinctrl-names = "active", "sleep";
			lcd_used = <0x00000001>;
			lcd_driver_name = "K080_IM2AYC805_R_800x1280";
			lcd_backlight = <0x00000032>;
			lcd_if = <0x00000004>;
			lcd_x = <0x00000320>;
			lcd_y = <0x00000500>;
			lcd_width = <0x0000006c>;
			lcd_height = <0x000000ac>;
			lcd_dclk_freq = <0x00000044>;
			lcd_pwm_used = <0x00000001>;
			lcd_pwm_ch = <0x00000000>;
			lcd_pwm_freq = <0x0000c350>;
			lcd_pwm_pol = <0x00000001>;
			lcd_pwm_max_limit = <0x000000ff>;
			lcd_hbp = <0x00000024>;
			lcd_ht = <0x00000356>;
			lcd_hspw = <0x00000012>;
			lcd_vbp = <0x0000000c>;
			lcd_vt = <0x00000528>;
			lcd_vspw = <0x00000004>;
			lcd_frm = <0x00000000>;
			lcd_gamma_en = <0x00000000>;
			lcd_bright_curve_en = <0x00000000>;
			lcd_cmap_en = <0x00000000>;
			deu_mode = <0x00000000>;
			lcdgamma4iep = <0x00000016>;
			smart_color = <0x0000005a>;
			lcd_dsi_if = <0x00000000>;
			lcd_dsi_lane = <0x00000004>;
			lcd_dsi_format = <0x00000000>;
			lcd_dsi_te = <0x00000000>;
			lcd_dsi_eotp = <0x00000000>;
			lcd_pin_power = "dcdc1";
			lcd_pin_power1 = "eldo3";
			lcd_power = "dc1sw";
			lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>;
			lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>;
			pinctrl-0 = <0x00000097>;
			pinctrl-1 = <0x00000098>;
			phandle = <0x0000016d>;
		};
		lcd1@1 {
			compatible = "allwinner,sunxi-lcd1";
			reg = <0x00000000 0x01c0c000 0x00000000 0x00000000>;
			pinctrl-names = "active", "sleep";
			phandle = <0x00000170>;
		};
		eink@6400000 {
			compatible = "allwinner,sunxi-eink";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x06400000 0x00000000 0x0001ffff 0x00000000 0x06000000 0x00000000 0x003fffff>;
			interrupts = <0x00000000 0x0000005a 0x00000004 0x00000000 0x00000058 0x00000004>;
			clocks = <0x00000015 0x00000020 0x00000015 0x00000022 0x00000015 0x00000025 0x00000015 0x00000024 0x00000015 0x00000028>;
			clock-names = "de0", "bus_de0", "bus_eink", "eink", "eink_panel";
			resets = <0x00000015 0x00000001 0x00000015 0x00000003>;
			reset-names = "rst_bus_de0", "rst_bus_eink";
			iommus = <0x00000081 0x00000006 0x00000001>;
			phandle = <0x00000171>;
		};
		uboot_eink@6400000 {
			compatible = "allwinner,sunxi-eink";
			pinctrl-names = "active", "sleep";
			reg = <0x00000000 0x06400000 0x00000000 0x0001ffff 0x00000000 0x06000000 0x00000000 0x003fffff>;
			interrupts = <0x00000000 0x0000005a 0x00000004 0x00000000 0x00000058 0x00000004>;
			clocks = <0x0000000d 0x00000010 0x00000011>;
			iommus = <0x00000081 0x00000006 0x00000001>;
			phandle = <0x00000172>;
		};
		ve@1c0e000 {
			compatible = "allwinner,sunxi-cedar-ve";
			reg = <0x00000000 0x01c0e000 0x00000000 0x00001000 0x00000000 0x03000000 0x00000000 0x00000010 0x00000000 0x03001000 0x00000000 0x00001000>;
			interrupts = <0x00000000 0x0000005e 0x00000004>;
			clocks = <0x00000015 0x0000002e 0x00000015 0x0000002d 0x00000015 0x00000039>;
			clock-names = "bus_ve", "ve", "mbus_ve";
			resets = <0x00000015 0x00000007>;
			iommus = <0x00000081 0x00000002 0x00000001>;
			phandle = <0x00000173>;
		};
		g2d@6480000 {
			compatible = "allwinner,sunxi-g2d";
			reg = <0x00000000 0x06480000 0x00000000 0x0003ffff>;
			interrupts = <0x00000000 0x0000005b 0x00000004>;
			clocks = <0x00000015 0x00000027 0x00000015 0x00000026 0x00000015 0x0000003e>;
			clock-names = "bus", "g2d", "mbus_g2d";
			resets = <0x00000015 0x00000004>;
			iommus = <0x00000081 0x00000005 0x00000001>;
			assigned-clocks = <0x00000015 0x00000026>;
			assigned-clock-rates = <0x11e1a300>;
			phandle = <0x00000174>;
		};
		pinctrl_test@0 {
			reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
			compatible = "allwinner,sunxi-pinctrl-test";
			device_type = "pinctrl-test";
			pinctrl-0 = <0x00000099>;
			pinctrl-1 = <0x0000009a>;
			pinctrl-names = "default", "sleep";
			test-gpios = <0x00000045 0x00000001 0x00000002 0x00000001>;
			suspend-gpios = <0x00000082 0x00000000 0x00000004 0x00000001>;
			wakeup-source;
			interrupt-parent = <0x00000045>;
			interrupts = <0x00000001 0x00000003 0x00000004>;
			phandle = <0x00000175>;
		};
		codec@5096000 {
			#sound-dai-cells = <0x00000000>;
			compatible = "allwinner,sunxi-internal-codec";
			reg = <0x00000000 0x05096000 0x00000000 0x0000032c>;
			clocks = <0x00000015 0x00000017 0x00000015 0x00000074 0x00000015 0x00000075 0x00000015 0x00000015 0x00000015 0x00000016 0x00000015 0x00000077>;
			clock-names = "pll_audio", "codec_dac", "codec_adc", "pll_com", "pll_com_audio", "codec_bus";
			resets = <0x00000015 0x00000031>;
			playback_cma = <0x00000080>;
			capture_cma = <0x00000100>;
			device_type = "codec";
			mic1gain = <0x0000001f>;
			mic2gain = <0x0000001f>;
			adcdrc_cfg = <0x00000002>;
			adchpf_cfg = <0x00000001>;
			dacdrc_cfg = <0x00000002>;
			dachpf_cfg = <0x00000000>;
			digital_vol = <0x00000000>;
			dac_digital_vol = <0x00019c9c>;
			lineout_vol = <0x0000001a>;
			headphonegain = <0x00000000>;
			pa_level = <0x00000001>;
			pa_msleep_time = <0x00000078>;
			gpio-spk = <0x00000045 0x00000007 0x00000006 0x00000000>;
			avcc-supply = <0x00000066>;
			cpvin-supply = <0x0000003f>;
			status = "okay";
			phandle = <0x0000009b>;
		};
		dummy_cpudai@509632c {
			compatible = "allwinner,sunxi-dummy-cpudai";
			reg = <0x00000000 0x0509632c 0x00000000 0x00000004>;
			tx_fifo_size = <0x00000080>;
			rx_fifo_size = <0x00000100>;
			dac_txdata = <0x05096020>;
			adc_txdata = <0x05096040>;
			playback_cma = <0x00000080>;
			capture_cma = <0x00000100>;
			device_type = "cpudai";
			dmas = <0x00000055 0x00000007 0x00000055 0x00000007>;
			dma-names = "tx", "rx";
			phandle = <0x0000009c>;
		};
		sound@5096330 {
			compatible = "allwinner,sunxi-codec-machine";
			reg = <0x00000000 0x05096330 0x00000000 0x00000004>;
			interrupts = <0x00000000 0x00000019 0x00000004>;
			hp_detect_case = <0x00000000>;
			sunxi,audio-codec = <0x0000009b>;
			sunxi,cpudai-controller = <0x0000009c>;
			device_type = "sndcodec";
			status = "okay";
			phandle = <0x00000176>;
		};
		spdif@5094000 {
			#sound-dai-cells = <0x00000000>;
			compatible = "allwinner,sunxi-spdif";
			reg = <0x00000000 0x05094000 0x00000000 0x00000040>;
			clocks = <0x00000015 0x00000017 0x00000015 0x00000070 0x00000015 0x00000071>;
			clock-names = "pll_audio", "spdif", "spdif_bus";
			resets = <0x00000015 0x0000002f>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x0000009d>;
			pinctrl-1 = <0x0000009e>;
			clk_parent = <0x00000001>;
			playback_cma = <0x00000080>;
			capture_cma = <0x00000080>;
			device_type = "spdif";
			dmas = <0x00000055 0x00000002 0x00000055 0x00000002>;
			dma-names = "tx", "rx";
			status = "disabled";
			phandle = <0x0000009f>;
		};
		soundspdif@5094040 {
			reg = <0x00000000 0x05094040 0x00000000 0x00000004>;
			compatible = "sunxi,simple-audio-card";
			simple-audio-card,name = "sndspdif";
			phandle = <0x00000177>;
			simple-audio-card,cpu {
				sound-dai = <0x0000009f>;
			};
			simple-audio-card,codec {
			};
		};
		dmic@5095000 {
			#sound-dai-cells = <0x00000000>;
			compatible = "allwinner,sunxi-dmic";
			reg = <0x00000000 0x05095000 0x00000000 0x00000050>;
			clocks = <0x00000015 0x00000017 0x00000015 0x00000072 0x00000015 0x00000073>;
			clock-names = "pll_audio", "dmic", "dmic_bus";
			resets = <0x00000015 0x00000030>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x000000a0>;
			pinctrl-1 = <0x000000a1>;
			clk_parent = <0x00000001>;
			capture_cma = <0x00000080>;
			data_vol = <0x000000b0>;
			dmic_rxsync_en = <0x00000000>;
			rx_chmap = <0x76543210>;
			device_type = "dmic";
			dmas = <0x00000055 0x00000008>;
			dma-names = "rx";
			status = "disabled";

			phandle = <0x000000a2>;
		};
		sound@5095050 {
			#sound-dai-cells = <0x00000000>;
			compatible = "dmic-codec";
			reg = <0x00000000 0x05095050 0x00000000 0x00000004>;
			num-channels = <0x00000006>;
			status = "disabled";
			phandle = <0x000000a3>;
		};
		sounddmic@5095060 {
			reg = <0x00000000 0x05095060 0x00000000 0x00000004>;
			compatible = "sunxi,simple-audio-card";
			simple-audio-card,name = "snddmic";
			phandle = <0x00000178>;
			simple-audio-card,cpu {
				sound-dai = <0x000000a2>;
			};
			simple-audio-card,codec {
				sound-dai = <0x000000a3>;
			};
		};
		daudio@5090000 {
			#sound-dai-cells = <0x00000000>;
			compatible = "allwinner,sunxi-daudio";
			reg = <0x00000000 0x05090000 0x00000000 0x0000007c>;
			clocks = <0x00000015 0x00000017 0x00000015 0x00000068 0x00000015 0x0000006c>;
			clock-names = "pll_audio", "i2s0", "i2s0_bus";
			resets = <0x00000015 0x0000002b>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x000000a4>;
			pinctrl-1 = <0x000000a5>;
			pinctrl_used = <0x00000001>;
			sign_extend = <0x00000000>;
			tx_data_mode = <0x00000000>;
			rx_data_mode = <0x00000000>;
			msb_lsb_first = <0x00000000>;
			daudio_rxsync_en = <0x00000000>;
			pcm_lrck_period = <0x00000080>;
			slot_width_select = <0x00000020>;
			frametype = <0x00000000>;
			tdm_config = <0x00000001>;
			tdm_num = <0x00000000>;
			mclk_div = <0x00000000>;
			clk_parent = <0x00000001>;
			capture_cma = <0x00000080>;
			playback_cma = <0x00000080>;
			tx_num = <0x00000004>;
			tx_chmap1 = <0x76543210>;
			tx_chmap0 = <0xfedcba98>;
			rx_num = <0x00000004>;
			rx_chmap3 = <0x03020100>;
			rx_chmap2 = <0x07060504>;
			rx_chmap1 = <0x0b0a0908>;
			rx_chmap0 = <0x0f0e0d0c>;
			device_type = "daudio0";
			dmas = <0x00000055 0x00000003 0x00000055 0x00000003>;
			dma-names = "tx", "rx";
			status = "disabled";
			phandle = <0x000000a6>;
		};
		sounddaudio0@509007c {
			reg = <0x00000000 0x0509007c 0x00000000 0x00000004>;
			compatible = "sunxi,simple-audio-card";
			simple-audio-card,name = "snddaudio0";
			simple-audio-card,format = "i2s";
			status = "disabled";
			phandle = <0x00000179>;
			simple-audio-card,cpu {
				sound-dai = <0x000000a6>;
			};
			simple-audio-card,codec {
				phandle = <0x0000017a>;
			};
		};
		daudio@5091000 {
			#sound-dai-cells = <0x00000000>;
			compatible = "allwinner,sunxi-daudio";
			reg = <0x00000000 0x05091000 0x00000000 0x0000007c>;
			clocks = <0x00000015 0x00000017 0x00000015 0x00000069 0x00000015 0x0000006d>;
			clock-names = "pll_audio", "i2s1", "i2s1_bus";
			resets = <0x00000015 0x0000002c>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x000000a7>;
			pinctrl-1 = <0x000000a8>;
			pinctrl_used = <0x00000001>;
			sign_extend = <0x00000000>;
			tx_data_mode = <0x00000000>;
			rx_data_mode = <0x00000000>;
			msb_lsb_first = <0x00000000>;
			daudio_rxsync_en = <0x00000000>;
			pcm_lrck_period = <0x00000080>;
			slot_width_select = <0x00000020>;
			frametype = <0x00000000>;
			tdm_config = <0x00000001>;
			tdm_num = <0x00000001>;
			mclk_div = <0x00000000>;
			clk_parent = <0x00000001>;
			capture_cma = <0x00000080>;
			playback_cma = <0x00000080>;
			tx_num = <0x00000004>;
			tx_chmap1 = <0x76543210>;
			tx_chmap0 = <0xfedcba98>;
			rx_num = <0x00000004>;
			rx_chmap3 = <0x03020100>;
			rx_chmap2 = <0x07060504>;
			rx_chmap1 = <0x0b0a0908>;
			rx_chmap0 = <0x0f0e0d0c>;
			device_type = "daudio1";
			dmas = <0x00000055 0x00000004 0x00000055 0x00000004>;
			dma-names = "tx", "rx";
			status = "disabled";
			phandle = <0x000000a9>;
		};
		sounddaudio1@509107c {
			reg = <0x00000000 0x0509107c 0x00000000 0x00000004>;
			compatible = "sunxi,simple-audio-card";
			simple-audio-card,name = "snddaudio1";
			simple-audio-card,format = "i2s";
			status = "disabled";
			phandle = <0x0000017b>;
			simple-audio-card,cpu {
				sound-dai = <0x000000a9>;
			};
			simple-audio-card,codec {
				phandle = <0x0000017c>;
			};
		};
		daudio@5092000 {
			#sound-dai-cells = <0x00000000>;
			compatible = "allwinner,sunxi-daudio";
			reg = <0x00000000 0x05092000 0x00000000 0x0000007c>;
			clocks = <0x00000015 0x00000017 0x00000015 0x0000006a 0x00000015 0x0000006e>;
			clock-names = "pll_audio", "i2s2", "i2s2_bus";
			resets = <0x00000015 0x0000002d>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x000000aa>;
			pinctrl-1 = <0x000000ab>;
			pinctrl_used = <0x00000001>;
			sign_extend = <0x00000000>;
			tx_data_mode = <0x00000000>;
			rx_data_mode = <0x00000000>;
			msb_lsb_first = <0x00000000>;
			daudio_rxsync_en = <0x00000000>;
			pcm_lrck_period = <0x00000080>;
			slot_width_select = <0x00000020>;
			frametype = <0x00000000>;
			tdm_config = <0x00000001>;
			tdm_num = <0x00000002>;
			mclk_div = <0x00000000>;
			clk_parent = <0x00000001>;
			capture_cma = <0x00000080>;
			playback_cma = <0x00000080>;
			tx_num = <0x00000004>;
			tx_chmap1 = <0x76543210>;
			tx_chmap0 = <0xfedcba98>;
			rx_num = <0x00000004>;
			rx_chmap3 = <0x03020100>;
			rx_chmap2 = <0x07060504>;
			rx_chmap1 = <0x0b0a0908>;
			rx_chmap0 = <0x0f0e0d0c>;
			device_type = "daudio2";
			dmas = <0x00000055 0x00000005 0x00000055 0x00000005>;
			dma-names = "tx", "rx";
			status = "disabled";
			phandle = <0x000000ac>;
		};
		sounddaudio2@509207c {
			reg = <0x00000000 0x0509207c 0x00000000 0x00000004>;
			compatible = "sunxi,simple-audio-card";
			simple-audio-card,name = "snddaudio2";
			simple-audio-card,format = "i2s";
			status = "disabled";
			phandle = <0x0000017d>;
			simple-audio-card,cpu {
				sound-dai = <0x000000ac>;
			};
			simple-audio-card,codec {
				phandle = <0x0000017e>;
			};
		};
		daudio@5093000 {
			#sound-dai-cells = <0x00000000>;
			compatible = "allwinner,sunxi-daudio";
			reg = <0x00000000 0x05093000 0x00000000 0x0000007c>;
			clocks = <0x00000015 0x00000017 0x00000015 0x0000006b 0x00000015 0x0000006f>;
			clock-names = "pll_audio", "i2s3", "i2s3_bus";
			resets = <0x00000015 0x0000002e>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x000000ad>;
			pinctrl-1 = <0x000000ae>;
			pinctrl_used = <0x00000001>;
			sign_extend = <0x00000000>;
			tx_data_mode = <0x00000000>;
			rx_data_mode = <0x00000000>;
			msb_lsb_first = <0x00000000>;
			daudio_rxsync_en = <0x00000000>;
			pcm_lrck_period = <0x00000080>;
			slot_width_select = <0x00000020>;
			frametype = <0x00000000>;
			tdm_config = <0x00000001>;
			tdm_num = <0x00000003>;
			mclk_div = <0x00000000>;
			clk_parent = <0x00000001>;
			capture_cma = <0x00000080>;
			playback_cma = <0x00000080>;
			tx_num = <0x00000004>;
			tx_chmap1 = <0x76543210>;
			tx_chmap0 = <0xfedcba98>;
			rx_num = <0x00000004>;
			rx_chmap3 = <0x03020100>;
			rx_chmap2 = <0x07060504>;
			rx_chmap1 = <0x0b0a0908>;
			rx_chmap0 = <0x0f0e0d0c>;
			device_type = "daudio3";
			dmas = <0x00000055 0x00000006 0x00000055 0x00000006>;
			dma-names = "tx", "rx";
			status = "disabled";
			phandle = <0x000000af>;
		};
		sounddaudio3@509307c {
			reg = <0x00000000 0x0509307c 0x00000000 0x00000004>;
			compatible = "sunxi,simple-audio-card";
			simple-audio-card,name = "snddaudio3";
			simple-audio-card,format = "i2s";
			status = "disabled";
			phandle = <0x0000017f>;
			simple-audio-card,cpu {
				sound-dai = <0x000000af>;
			};
			simple-audio-card,codec {
				phandle = <0x00000180>;
			};
		};
		pinctrl@7022000 {
			compatible = "allwinner,sun50iw10p1-r-pinctrl";
			reg = <0x00000000 0x07022000 0x00000000 0x00000400>;
			interrupts = <0x00000000 0x0000006f 0x00000004>;
			clocks = <0x00000024 0x00000002 0x00000028 0x00000029 0x00000002>;
			clock-names = "apb", "hosc", "losc";
			device_type = "r_pio";
			gpio-controller;
			interrupt-controller;
			#interrupt-cells = <0x00000003>;
			#size-cells = <0x00000000>;
			#gpio-cells = <0x00000003>;
			phandle = <0x00000082>;
			s_rsb0@0 {
				pins = "PL0", "PL1";
				function = "s_rsb0";
				drive-strength = <0x00000014>;
				bias-pull-up;
				phandle = <0x00000181>;
			};
			s_uart0@0 {
				pins = "PL2", "PL3";
				function = "s_uart0";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x0000003a>;
			};
			s_uart0@1 {
				pins = "PL2", "PL3";
				function = "gpio_in";
				phandle = <0x0000003b>;
			};
			s_twi0@0 {
				pins = "PL0", "PL1";
				function = "s_twi0";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x0000005c>;
			};
			s_twi0@1 {
				pins = "PL0", "PL1";
				function = "gpio_in";
				phandle = <0x0000005d>;
			};
			s_twi1@0 {
				pins = "PL8", "PL9";
				function = "s_twi1";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x0000006e>;
			};
			s_twi1@1 {
				pins = "PL8", "PL9";
				function = "gpio_in";
				phandle = <0x00000182>;
			};
			s_cir0@0 {
				pins = "PL11";
				function = "s_cir0";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000183>;
			};
		};
		pinctrl@300b000 {
			compatible = "allwinner,sun50iw10p1-pinctrl";
			reg = <0x00000000 0x0300b000 0x00000000 0x00000400>;
			interrupts = * 0xbbe8c2c8 [0x0000006c];
			device_type = "pio";
			clocks = <0x00000015 0x0000001d 0x00000029 0x00000002 0x00000028>;
			clock-names = "apb", "losc", "hosc";
			gpio-controller;
			interrupt-controller;
			#interrupt-cells = <0x00000003>;
			#size-cells = <0x00000000>;
			#gpio-cells = <0x00000003>;
			vcc-pf-supply = <0x000000b0>;
			vcc-pfo-supply = <0x000000b1>;
			input-debounce = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000001 0x00000000 0x00000000 0x00000000 0x00000000>;
			vcc-pe-supply = <0x000000b0>;
			phandle = <0x00000045>;
			test_pins@0 {
				pins = "PB0", "PB1";
				function = "test";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000099>;
			};
			test_pins@1 {
				pins = "PB0", "PB1";
				function = "gpio_in";
				phandle = <0x0000009a>;
			};
			uart0@0 {
				pins = [00 00];
				function = "uart0";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x0000002b>;
			};
			uart0@1 {
				pins = [00 00];
				function = "gpio_in";
				drive-strength = <0x0000000a>;
				phandle = <0x0000002c>;
			};
			uart1@0 {
				pins = "PG6", "PG7", "PG8", "PG9";
				function = "uart1";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x0000002e>;
			};
			uart1@1 {
				pins = "PG6", "PG7", "PG8", "PG9";
				function = "gpio_in";
				phandle = <0x0000002f>;
			};
			uart2@0 {
				pins = "PB0", "PB1", "PB2", "PB3";
				function = "uart2";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000030>;
			};
			uart2@1 {
				pins = "PB0", "PB1", "PB2", "PB3";
				function = "gpio_in";
				phandle = <0x00000031>;
			};
			uart3@0 {
				pins = "PH4", "PH5", "PH6", "PH7";
				function = "uart3";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000032>;
			};
			uart3@1 {
				pins = "PH4", "PH5", "PH6", "PH7";
				function = "gpio_in";
				phandle = <0x00000033>;
			};
			uart4@0 {
				pins = "PD18", "PD19", "PD20", "PD21";
				function = "uart4";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000034>;
			};
			uart4@1 {
				pins = "PD18", "PD19", "PD20", "PD21";
				function = "gpio_in";
				phandle = <0x00000035>;
			};
			uart5@0 {
				pins = "PI2", "PI3", "PI4", "PI5";
				function = "uart5";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000036>;
			};
			uart5@1 {
				pins = "PI2", "PI3", "PI4", "PI5";
				function = "gpio_in";
				phandle = <0x00000037>;
			};
			uart6@0 {
				pins = "PI6", "PI7", "PI13", "PI14";
				function = "uart6";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000038>;
			};
			uart6@1 {
				pins = "PI6", "PI7", "PI13", "PI14";
				function = "gpio_in";
				phandle = <0x00000039>;
			};
			ir0@0 {
				pins = "PH3";
				function = "ir0";
				drive-strength = <0x0000000a>;
				phandle = <0x00000184>;
			};
			ir0@1 {
				pins = "PH3";
				function = "gpio_in";
				phandle = <0x00000185>;
			};
			twi0@0 {
				pins = "PH0", "PH1";
				function = "twi0";
				drive-strength = <0x0000000a>;
				phandle = <0x0000004d>;
			};
			twi0@1 {
				pins = "PH0", "PH1";
				function = "gpio_in";
				phandle = <0x0000004e>;
			};
			twi1@0 {
				pins = "PH2", "PH3";
				function = "twi1";
				drive-strength = <0x0000000a>;
				phandle = <0x00000050>;
			};
			twi1@1 {
				pins = "PH2", "PH3";
				function = "gpio_in";
				phandle = <0x00000051>;
			};
			twi2@0 {
				pins = "PE1", "PE2";
				function = "twi2";
				drive-strength = <0x00000014>;
				phandle = <0x00000052>;
			};
			twi2@1 {
				pins = "PE1", "PE2";
				function = "gpio_in";
				phandle = <0x00000053>;
			};
			twi3@0 {
				pins = "PE3", "PE4";
				function = "twi3";
				drive-strength = <0x0000000a>;
				phandle = <0x00000056>;
			};
			twi3@1 {
				pins = "PE3", "PE4";
				function = "gpio_in";
				phandle = <0x00000057>;
			};
			twi4@0 {
				pins = "PI0", "PI1";
				function = "twi4";
				drive-strength = <0x0000000a>;
				phandle = <0x00000058>;
			};
			twi4@1 {
				pins = "PI0", "PI1";
				function = "gpio_in";
				phandle = <0x00000059>;
			};
			twi5@0 {
				pins = "PI8", "PI9";
				function = "twi5";
				drive-strength = <0x0000000a>;
				phandle = <0x0000005a>;
			};
			twi5@1 {
				pins = "PI8", "PI9";
				function = "gpio_in";
				phandle = <0x0000005b>;
			};
			ts0@0 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11";
				function = "ts0";
				drive-strength = <0x0000000a>;
				phandle = <0x00000186>;
			};
			ts0_sleep@0 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11";
				function = "gpio_in";
				phandle = <0x00000187>;
			};
			spi0@0 {
				pins = "PC2", "PC4", "PC12", "PC15", "PC16";
				function = "spi0";
				drive-strength = <0x0000000a>;
				phandle = <0x00000085>;
			};
			spi0@1 {
				pins = "PC3", "PC7";
				function = "spi0";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000086>;
			};
			spi0@2 {
				pins = "PC2", "PC3", "PC4", "PC7", "PC12", "PC15", "PC16";
				function = "gpio_in";
				phandle = <0x00000087>;
			};
			spi1@0 {
				pins = "PD11", "PD12", "PD13";
				function = "spi1";
				drive-strength = <0x0000000a>;
				phandle = <0x00000088>;
			};
			spi1@1 {
				pins = "PD10";
				function = "spi1";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000089>;
			};
			spi1@2 {
				pins = "PD10", "PD11", "PD12", "PD13";
				function = "gpio_in";
				phandle = <0x0000008a>;
			};
			spi2@0 {
				pins = "PB1", "PB2", "PB3";
				function = "spi2";
				drive-strength = <0x0000000a>;
				phandle = <0x0000008b>;
			};
			spi2@1 {
				pins = "PB0";
				function = "spi2";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x0000008c>;
			};
			spi2@2 {
				pins = "PB0", "PB1", "PB2", "PB3";
				function = "gpio_in";
				phandle = <0x0000008d>;
			};
			sdc0@0 {
				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				function = "sdc0";
				drive-strength = <0x0000001e>;
				bias-pull-up;
				power-source = <0x00000ce4>;
				allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				allwinner,function = "sdc0";
				allwinner,muxsel = <0x00000002>;
				allwinner,drive = <0x00000003>;
				allwinner,pull = <0x00000001>;
				phandle = <0x00000040>;
			};
			sdc0@1 {
				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				function = "sdc0";
				drive-strength = <0x0000001e>;
				bias-pull-up;
				power-source = <0x00000708>;
				phandle = <0x00000041>;
			};
			sdc0@2 {
				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				function = "gpio_in";
				phandle = <0x00000042>;
			};
			sdc0@3 {
				pins = "PF2", "PF4";
				function = "uart0";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000043>;
			};
			sdc0@4 {
				pins = "PF0", "PF1", "PF3", "PF5";
				function = "jtag";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x00000044>;
			};
			sdc1@0 {
				pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
				function = "sdc1";
				drive-strength = <0x00000028>;
				bias-pull-up;
				phandle = <0x00000046>;
			};
			sdc1@1 {
				pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
				function = "gpio_in";
				phandle = <0x00000047>;
			};
			sdc2@0 {
				pins = "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16";
				function = "sdc2";
				drive-strength = <0x0000001e>;
				bias-pull-up;
				allwinner,pins = "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16";
				allwinner,function = "sdc2";
				allwinner,muxsel = <0x00000003>;
				allwinner,drive = <0x00000003>;
				allwinner,pull = <0x00000001>;
				phandle = <0x0000003c>;
			};
			sdc2@1 {
				pins = "PC0", "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16";
				function = "gpio_in";
				phandle = <0x0000003e>;
			};
			sdc2@2 {
				pins = "PC0";
				function = "sdc2";
				drive-strength = <0x0000001e>;
				bias-pull-down;
				allwinner,pins = "PC0";
				allwinner,function = "sdc2";
				allwinner,muxsel = <0x00000003>;
				allwinner,drive = <0x00000003>;
				allwinner,pull = <0x00000002>;
				phandle = <0x0000003d>;
			};
			sdc3@0 {
				pins = "PI14", "PI13", "PI12", "PI11", "PI10", "PI9";
				function = "sdc3";
				drive-strength = <0x00000014>;
				bias-pull-up;
				phandle = <0x00000048>;
			};
			sdc3@1 {
				pins = "PI14", "PI13", "PI12", "PI11", "PI10", "PI9";
				function = "gpio_in";
				phandle = <0x00000049>;
			};
			daudio0@0 {
				pins = "PB4", "PB5", "PB6", "PB7", "PB8";
				function = "h_i2s0";
				drive-strength = <0x0000000a>;
				phandle = <0x000000a4>;
			};
			daudio0_sleep@0 {
				pins = "PB4", "PB5", "PB6", "PB7", "PB8";
				function = "gpio_in";
				phandle = <0x000000a5>;
			};
			daudio1@0 {
				pins = "PG9", "PG10", "PG11", "PG12", "PG13";
				function = "h_i2s1";
				drive-strength = <0x0000000a>;
				phandle = <0x000000a7>;
			};
			daudio1_sleep@0 {
				pins = "PG9", "PG10", "PG11", "PG12", "PG13";
				function = "gpio_in";
				phandle = <0x000000a8>;
			};
			daudio2@0 {
				pins = "PE5", "PE6", "PE7", "PE8", "PE9";
				function = "h_i2s2";
				drive-strength = <0x0000000a>;
				phandle = <0x000000aa>;
			};
			daudio2_sleep@0 {
				pins = "PE5", "PE6", "PE7", "PE8", "PE9";
				function = "gpio_in";
				phandle = <0x000000ab>;
			};
			daudio3@0 {
				pins = "PH13", "PH14", "PH15", "PH16", "PH17", "PH18", "PH19";
				function = "h_i2s3";
				drive-strength = <0x0000000a>;
				phandle = <0x000000ad>;
			};
			daudio3_sleep@0 {
				pins = "PH13", "PH14", "PH15", "PH16", "PH17", "PH18", "PH19";
				function = "gpio_in";
				phandle = <0x000000ae>;
			};
			spdif@0 {
				pins = "PH6", "PH7";
				function = "spdif";
				drive-strength = <0x0000000a>;
				phandle = <0x0000009d>;
			};
			spdif_sleep@0 {
				pins = "PH6", "PH7";
				function = "gpio_in";
				phandle = <0x0000009e>;
			};
			dmic@0 {
				pins = "PH8", "PH9", "PH10", "PH11", "PH12";
				function = "dmic";
				drive-strength = <0x0000000a>;
				phandle = <0x000000a0>;
			};
			dmic_sleep@0 {
				pins = "PH8", "PH9", "PH10", "PH11", "PH12";
				function = "gpio_in";
				phandle = <0x000000a1>;
			};
			csi_mclk0@0 {
				pins = "PE0";
				function = "csi_mclk0";
				drive-strength = <0x00000014>;
				phandle = <0x0000007d>;
			};
			csi_mclk0@1 {
				pins = "PE0";
				function = "gpio_in";
				phandle = <0x0000007e>;
			};
			csi_mclk1@0 {
				pins = "PE5";
				function = "csi_mclk1";
				drive-strength = <0x00000014>;
				phandle = <0x0000007f>;
			};
			csi_mclk1@1 {
				pins = "PE5";
				function = "gpio_in";
				phandle = <0x00000080>;
			};
			scr0@0 {
				pins = "PG13", "PG14", "PG10", "PG11", "PG12";
				function = "sim0";
				bias-pull-up;
				phandle = <0x00000188>;
			};
			scr0@1 {
				pins = "PG8", "PG9";
				function = "sim0";
				bias-pull-up;
				phandle = <0x00000189>;
			};
			scr0@2 {
				pins = "PG8", "PG9", "PG10", "PG11", "PG12", "PG13", "PG14";

				function = "gpio_in";
				phandle = <0x0000018a>;
			};
			scr1@0 {
				pins = "PH5", "PH6", "PH2", "PH3", "PH4";
				function = "sim1";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x0000018b>;
			};
			scr1@1 {
				pins = "PH0", "PH1";
				function = "sim1";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x0000018c>;
			};
			scr1@2 {
				pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6";
				function = "gpio_in";
				phandle = <0x0000018d>;
			};
			nand0@0 {
				pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
				function = "nand0";
				drive-strength = <0x0000001e>;
				phandle = <0x0000004a>;
			};
			nand0@1 {
				pins = "PC4", "PC6", "PC3", "PC7";
				function = "nand0";
				drive-strength = <0x0000001e>;
				bias-pull-up;
				phandle = <0x0000004b>;
			};
			nand0@2 {
				pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
				function = "gpio_in";
				phandle = <0x0000004c>;
			};
			ac200@2 {
				pins = "PB0";
				function = "ac200";
				drive-strength = <0x0000000a>;
				phandle = <0x0000018e>;
			};
			ac200@3 {
				pins = "PB0";
				function = "gpio_in";
				phandle = <0x0000018f>;
			};
			gmac@0 {
				pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10", "PH13", "PH14", "PH15", "PH16", "PH17", "PH18";
				function = "gmac0";
				drive-strength = <0x0000001e>;
				phandle = <0x00000190>;
			};
			gmac@1 {
				pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10", "PH13", "PH14", "PH15", "PH16", "PH17", "PH18";
				function = "gpio_in";
				phandle = <0x00000191>;
			};
			gmac1@0 {
				pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15";
				function = "gmac1";
				drive-strength = <0x0000001e>;
				phandle = <0x00000192>;
			};
			gmac1@1 {
				pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15";
				function = "gpio_in";
				phandle = <0x00000193>;
			};
			ledc@0 {
				pins = "PE5";
				function = "ledc";
				drive-strength = <0x0000000a>;
				bias-pull-up;
				phandle = <0x0000008e>;
			};
			ledc@1 {
				pins = "PE5";
				function = "gpio_in";
				phandle = <0x0000008f>;
			};
			lvds0@0 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7";
				function = "lvds0";
				drive-strength = <0x0000001e>;
				phandle = <0x00000194>;
			};
			lvds0@1 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7";
				function = "gpio_in";
				phandle = <0x00000195>;
			};
			lvds1@0 {
				pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
				function = "lvds1";
				drive-strength = <0x0000001e>;
				phandle = <0x00000196>;
			};
			lvds1@1 {
				pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
				function = "gpio_in";
				phandle = <0x00000197>;
			};
			lvds2@0 {
				pins = "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
				function = "lvds2";
				drive-strength = <0x0000001e>;
				phandle = <0x00000198>;
			};
			lvds2@1 {
				pins = "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
				function = "gpio_in";
				phandle = <0x00000199>;
			};
			lvds3@0 {
				pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19";
				function = "lvds3";
				drive-strength = <0x0000001e>;
				phandle = <0x0000019a>;
			};
			lvds3@1 {
				pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19";
				function = "gpio_in";
				phandle = <0x0000019b>;
			};
			lcd1_lvds2link@0 {
				pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
				function = "lvds3";
				drive-strength = <0x0000001e>;
				phandle = <0x0000019c>;
			};
			lcd1_lvds2link@1 {
				pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
				function = "gpio_in";
				phandle = <0x0000019d>;
			};
			lvds2link@0 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
				function = "lvds2link";
				drive-strength = <0x0000001e>;
				phandle = <0x0000019e>;
			};
			lvds2link@1 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
				function = "gpio_in";
				phandle = <0x0000019f>;
			};
			rgb24@0 {
				pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", "PJ25", "PJ26", "PJ27";
				function = "lcd1";
				drive-strength = <0x0000001e>;
				phandle = <0x000001a0>;
			};
			rgb24@1 {
				pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", "PJ25", "PJ26", "PJ27";
				function = "gpio_in";
				phandle = <0x000001a1>;
			};
			rgb18@0 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21";
				function = "lcd0";
				drive-strength = <0x0000001e>;
				phandle = <0x000001a2>;
			};
			rgb18@1 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21";
				function = "gpio_in";
				phandle = <0x000001a3>;
			};
			eink@0 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21", "PD22";
				function = "eink";
				drive-strength = <0x0000001e>;
				phandle = <0x000001a4>;
			};
			eink@1 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21", "PD22";
				function = "gpio_in";
				phandle = <0x000001a5>;
			};
			dsi4lane@0 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
				function = "dsi0";
				drive-strength = <0x0000001e>;
				phandle = <0x00000097>;
			};
			dsi4lane@1 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
				function = "gpio_in";
				phandle = <0x00000098>;
			};
			pwm0_pin_a {
				allwinner,pins = "PD23";
				allwinner,function = "pwm0";
				allwinner,muxsel = <0x00000002>;
				allwinner,drive = <0x00000001>;
				allwinner,pull = <0x00000000>;
				phandle = <0x00000079>;
			};
			pwm0_pin_b {
				allwinner,pins = "PD23";
				allwinner,function = "gpio_in";
				allwinner,muxsel = <0x00000000>;
				allwinner,drive = <0x00000002>;
				allwinner,pull = <0x00000000>;
				phandle = <0x0000007a>;
			};
			pwm1_pin_a {
				allwinner,pins = "PD22";
				allwinner,function = "pwm1";
				allwinner,muxsel = <0x00000002>;
				allwinner,drive = <0x00000002>;
				allwinner,pull = <0x00000000>;
				phandle = <0x0000007b>;
			};
			pwm1_pin_b {
				allwinner,pins = "PD22";
				allwinner,function = "gpio_in";
				allwinner,muxsel = <0x00000000>;
				allwinner,drive = <0x00000002>;
				allwinner,pull = <0x00000000>;
				phandle = <0x0000007c>;
			};
		};
		gpu@1800000 {
			device_type = "gpu";
			compatible = "img,gpu";
			reg = <0x00000000 0x01800000 0x00000000 0x00080000>;
			interrupts = <0x00000000 0x00000061 0x00000004>;
			interrupt-names = "IRQGPU";
			clocks = <0x00000015 0x00000007 0x00000015 0x00000029 0x00000015 0x0000002a>;
			clock-names = "clk_parent", "clk_mali", "clk_bus";
			resets = <0x00000015 0x00000005>;
			power-domains = <0x000000b2>;
			gpu_idle = <0x00000000>;
			dvfs_status = <0x00000001>;
			pll_rate = <0x0006f540>;
			independent_power = <0x00000000>;
			markid-points = <0x00000400 0x000001c8 0x00001400 0x000001f8 0x00001000 0x000001f8 0x00002000 0x000001f8 0x00000000 0x000001f8>;
			operating-points = <0x0006f540 0x000e7ef0 0x00061698 0x000e7ef0 0x00037aa0 0x000e7ef0>;
			phandle = <0x000001a6>;
		};
		rfkill {
			compatible = "allwinner,sunxi-rfkill";
			status = "okay";
			chip_en;
			power_en;
			pinctrl-0;
			pinctrl-names;
			phandle = <0x000001a7>;
			wlan {
				compatible = "allwinner,sunxi-wlan";
				clocks = <0x00000029 0x00000000 0x00000029 0x00000003>;
				clock-names = "dcxo24M-out", "osc32k-out";
				wlan_power = "axp2202-bldo1";
				wlan_power_vol = <0x00325aa0>;
				wlan_busnum = <0x00000001>;
				wlan_regon = <0x00000082 0x00000000 0x00000005 0x00000000>;
				wlan_hostwake = <0x00000082 0x00000000 0x00000006 0x00000000>;
				wakeup-source;
			};
			bt {
				compatible = "allwinner,sunxi-bt";
				clocks = <0x00000029 0x00000000 0x00000029 0x00000003>;
				clock-names = "dcxo24M-out", "osc32k-out";
				bt_power = "axp2202-bldo1";
				bt_power_vol = <0x00325aa0>;
				bt_rst_n = <0x00000082 0x00000000 0x00000002 0x00000001>;
			};
		};
		addr_mgt {
			compatible = "allwinner,sunxi-addr_mgt";
			status = "okay";
			type_addr_wifi = <0x00000000>;
			type_addr_bt = <0x00000000>;
			type_addr_eth = <0x00000000>;
			phandle = <0x000001a8>;
		};
		btlpm {
			compatible = "allwinner,sunxi-btlpm";
			status = "okay";
			uart_index = <0x00000001>;
			bt_wake = <0x00000082 0x00000000 0x00000004 0x00000000>;
			bt_hostwake = <0x00000082 0x00000000 0x00000003 0x00000000>;
			wakeup-source;
			phandle = <0x000001a9>;
		};
		platform@45000004 {
			reg = <0x00000000 0x45000004 0x00000000 0x00000000>;
			eraseflag = <0x00000001>;
			next_work = <0x00000003>;
			debug_mode = <0x00000008>;
		};
		target@45000008 {
			reg = <0x00000000 0x45000008 0x00000000 0x00000000>;
			boot_clock = <0x000003f0>;
			storage_type = <0xffffffff>;
			burn_key = <0x00000001>;
			dragonboard_test = <0x00000000>;
		};
		power_sply@4500000c {
			reg = <0x00000000 0x4500000c 0x00000000 0x00000000>;
			dcdc1_vol = <0x000f45ec>;
			aldo1_vol = <0x000f4948>;
			aldo2_vol = <0x000f4948>;
			aldo4_vol = <0x000f4948>;
			aldo3_vol = <0x000f4f24>;
			bldo1_vol = <0x00000ce4>;
			bldo2_vol = <0x000f4948>;
			bldo4_vol = <0x000f4948>;
			cldo1_vol = <0x000f4948>;
			cldo3_vol = <0x000f4f24>;
			cldo4_vol = <0x000f4f24>;
			cpusldo_vol = <0x000f6568>;
		};
		charger0@45000010 {
			reg = <0x00000000 0x45000010 0x00000000 0x00000000>;
			pmu_safe_vol = <0x00000d48>;
		};
		card0_boot_para@2 {
			reg = <0x00000000 0x00000002 0x00000000 0x00000000>;
			device_type = "card0_boot_para";
			card_ctrl = <0x00000000>;
			card_high_speed = <0x00000001>;
			card_line = <0x00000004>;
			pinctrl-0 = <0x00000040>;
		};
		card2_boot_para@3 {
			reg = <0x00000000 0x00000003 0x00000000 0x00000000>;
			device_type = "card2_boot_para";
			card_ctrl = <0x00000002>;
			card_high_speed = <0x00000001>;
			card_line = <0x00000008>;
			pinctrl-0 = <0x0000003c 0x0000003d>;
			sdc_ex_dly_used = <0x00000002>;
			sdc_io_1v8 = <0x00000001>;
			sdc_tm4_win_th = <0x00000008>;
			sdc_tm4_hs200_max_freq = <0x00000096>;
			sdc_tm4_hs400_max_freq = <0x00000064>;
			sdc_type = "tm4";
		};
		gpio_bias@4 {
			reg = <0x00000000 0x00000004 0x00000000 0x00000000>;
			device_type = "gpio_bias";
			pc_bias = <0x00000708>;
		};
		auto_print@54321 {
			reg = <0x00000000 0x00054321 0x00000000 0x00000000>;
			device_type = "auto_print";
			status = "okay";
		};
		standby_param@7000400 {
			reg = <0x00000000 0x07000400 0x00000000 0x00000000>;
			vdd-cpu = <0x00000001>;
			vdd-sys = <0x00000002>;
			vcc-pll = <0x00000080>;
			osc24m-on = <0x00000000>;
			phandle = <0x000001aa>;
		};
		hall_para {
			hall_name = "MH248";
			status = "okay";
			hall_int_port = <0x00000082 0x00000000 0x00000009 0x00000006 0x00000001 0xffffffff 0xffffffff>;
		};
	};
	usb1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb1-vbus";
		regulator-min-microvolt = <0x004c4b40>;
		regulator-max-microvolt = <0x004c4b40>;
		regulator-enable-ramp-delay = <0x000003e8>;
		gpio = <0x00000082 0x00000000 0x00000008 0x00000000>;
		enable-active-high;
		phandle = <0x00000091>;
	};
	axp2202-parameter {
		select = "battery-model";
		phandle = <0x0000005f>;
		battery-model {
			parameter = * 0xbbe8ff7c [0x00000080];
		};
	};
	__symbols__ {
		clk_losc = "/clocks/losc";
		clk_iosc = "/clocks/iosc";
		clk_hosc = "/clocks/hosc";
		clk_osc48m = "/clocks/osc48m";
		clk_hoscdiv32k = "/clocks/hoscdiv32k";
		clk_pll_periph0div25m = "/clocks/pll_periph0div25m";
		clk_pll_cpu = "/clocks/pll_cpu";
		clk_pll_ddr = "/clocks/pll_ddr";
		clk_pll_periph0 = "/clocks/pll_periph0";
		clk_pll_periph1 = "/clocks/pll_periph1";
		clk_pll_gpu = "/clocks/pll_gpu";
		clk_pll_video0x4 = "/clocks/pll_video0x4";
		clk_pll_video1x4 = "/clocks/pll_video1x4";
		clk_pll_video2 = "/clocks/pll_video2";
		clk_pll_video3 = "/clocks/pll_video3";
		clk_pll_ve = "/clocks/pll_ve";
		clk_pll_com = "/clocks/pll_com";
		clk_pll_audiox4 = "/clocks/pll_audiox4";
		clk_pll_periph0x2 = "/clocks/pll_periph0x2";
		clk_pll_periph0x4 = "/clocks/pll_periph0x4";
		clk_periph32k = "/clocks/periph32k";
		clk_pll_periph1x2 = "/clocks/pll_periph1x2";
		clk_pll_comdiv5 = "/clocks/pll_comdiv5";
		clk_pll_audiox8 = "/clocks/pll_audiox8";
		clk_pll_audio = "/clocks/pll_audio";
		clk_pll_audiox2 = "/clocks/pll_audiox2";
		clk_pll_video0 = "/clocks/pll_video0";
		clk_pll_video0x2 = "/clocks/pll_video0x2";
		clk_pll_video1 = "/clocks/pll_video1";
		clk_pll_video1x2 = "/clocks/pll_video1x2";
		clk_pll_video2x2 = "/clocks/pll_video2x2";
		clk_pll_video2x4 = "/clocks/pll_video2x4";
		clk_pll_video3x2 = "/clocks/pll_video3x2";
		clk_pll_video3x4 = "/clocks/pll_video3x4";
		clk_hoscd2 = "/clocks/hoscd2";
		clk_osc48md4 = "/clocks/osc48md4";
		clk_pll_periph0d6 = "/clocks/pll_periph0d6";
		clk_cpu = "/clocks/cpu";
		clk_axi = "/clocks/axi";
		clk_cpuapb = "/clocks/cpuapb";
		clk_psi = "/clocks/psi";
		clk_ahb1 = "/clocks/ahb1";
		clk_ahb2 = "/clocks/ahb2";
		clk_ahb3 = "/clocks/ahb3";
		clk_apb1 = "/clocks/apb1";
		clk_apb2 = "/clocks/apb2";
		clk_de0 = "/clocks/de0";
		clk_de1 = "/clocks/de1";
		clk_g2d = "/clocks/g2d";
		clk_ee = "/clocks/ee";
		clk_panel = "/clocks/panel";
		clk_gpu = "/clocks/gpu";
		clk_ce = "/clocks/ce";
		clk_ve = "/clocks/ve";
		clk_dma = "/clocks/dma";
		clk_msgbox = "/clocks/msgbox";
		clk_hwspinlock_rst = "/clocks/hwspinlock_rst";
		clk_hwspinlock_bus = "/clocks/hwspinlock_bus";
		clk_hstimer = "/clocks/hstimer";
		clk_avs = "/clocks/avs";
		clk_dbgsys = "/clocks/dbgsys";

		clk_pwm = "/clocks/pwm";
		clk_iommu = "/clocks/iommu";
		clk_nand0 = "/clocks/nand0";
		clk_nand1 = "/clocks/nand1";
		clk_sdmmc0_mod = "/clocks/sdmmc0_mod";
		clk_sdmmc0_bus = "/clocks/sdmmc0_bus";
		clk_sdmmc0_rst = "/clocks/sdmmc0_rst";
		clk_sdmmc1_mod = "/clocks/sdmmc1_mod";
		clk_sdmmc1_bus = "/clocks/sdmmc1_bus";
		clk_sdmmc1_rst = "/clocks/sdmmc1_rst";
		clk_sdmmc2_mod = "/clocks/sdmmc2_mod";
		clk_sdmmc2_bus = "/clocks/sdmmc2_bus";
		clk_sdmmc2_rst = "/clocks/sdmmc2_rst";
		clk_uart0 = "/clocks/uart0";
		clk_uart1 = "/clocks/uart1";
		clk_uart2 = "/clocks/uart2";
		clk_uart3 = "/clocks/uart3";
		clk_uart4 = "/clocks/uart4";
		clk_uart5 = "/clocks/uart5";
		clk_uart6 = "/clocks/uart6";
		clk_scr0 = "/clocks/scr0";
		clk_gmac0_25m = "/clocks/gmac0_25m";
		clk_gmac1_25m = "/clocks/gmac1_25m";
		clk_gmac0 = "/clocks/gmac0";
		clk_gmac1 = "/clocks/gmac1";
		clk_gpadc = "/clocks/gpadc";
		clk_irtx = "/clocks/irtx";
		clk_ths = "/clocks/ths";
		clk_i2s0 = "/clocks/i2s0";
		clk_i2s1 = "/clocks/i2s1";
		clk_i2s2 = "/clocks/i2s2";
		clk_i2s3 = "/clocks/i2s3";
		clk_spdif = "/clocks/spdif";
		clk_dmic = "/clocks/dmic";
		clk_codec_dac_1x = "/clocks/codec_dac_1x";
		clk_codec_adc_1x = "/clocks/codec_adc_1x";
		clk_codec_4x = "/clocks/codec_4x";
		clk_usbphy0 = "/clocks/usbphy0";
		clk_usbphy1 = "/clocks/usbphy1";
		clk_usbohci0 = "/clocks/usbohci0";
		clk_usbohci0_12m = "/clocks/usbohci0_12m";
		clk_usbohci1 = "/clocks/usbohci1";
		clk_usbohci1_12m = "/clocks/usbohci1_12m";
		clk_usbehci0 = "/clocks/usbehci0";
		clk_usbehci1 = "/clocks/usbehci1";
		clk_usbotg = "/clocks/usbotg";
		clk_display_top = "/clocks/display_top";
		clk_dpss_top0 = "/clocks/dpss_top0";
		clk_dpss_top1 = "/clocks/dpss_top1";
		clk_tcon_lcd0 = "/clocks/tcon_lcd0";
		clk_tcon_lcd1 = "/clocks/tcon_lcd1";
		clk_lvds = "/clocks/lvds";
		clk_lvds1 = "/clocks/lvds1";
		clk_mipi_host = "/clocks/mipi_host";
		clk_csi_top = "/clocks/csi_top";
		clk_csi_isp = "/clocks/csi_isp";
		clk_csi_master0 = "/clocks/csi_master0";
		clk_csi_master1 = "/clocks/csi_master1";
		clk_pio = "/clocks/pio";
		clk_ledc = "/clocks/ledc";
		clk_cpurcir = "/clocks/cpurcir";
		clk_losc_out = "/clocks/losc_out";
		clk_cpurcpus_pll = "/clocks/cpurcpus_pll";
		clk_cpurcpus = "/clocks/cpurcpus";
		clk_cpurahbs = "/clocks/cpurahbs";
		clk_cpurapbs1 = "/clocks/cpurapbs1";
		clk_cpurapbs2_pll = "/clocks/cpurapbs2_pll";
		clk_cpurapbs2 = "/clocks/cpurapbs2";
		clk_ppu = "/clocks/ppu";
		clk_cpurpio = "/clocks/cpurpio";
		clk_dcxo_out = "/clocks/dcxo_out";
		clk_suart = "/clocks/suart";
		clk_lradc = "/clocks/lradc";
		cpu0 = "/cpus/cpu@0";
		cpu1 = "/cpus/cpu@1";
		cpu2 = "/cpus/cpu@2";
		cpu3 = "/cpus/cpu@3";
		CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0";
		CLUSTER_SLEEP_0 = "/cpus/idle-states/cluster-sleep-0";
		cpu_opp_table = "/cpu-opp-table";
		dcxo24M = "/dcxo24M-clk";
		cpu_trips = "/thermal-zones/cpu_thermal_zone/trips";
		cpu_threshold = "/thermal-zones/cpu_thermal_zone/trips/trip-point@0";
		cpu_target = "/thermal-zones/cpu_thermal_zone/trips/trip-point@1";
		cpu_crit = "/thermal-zones/cpu_thermal_zone/trips/cpu_crit@0";
		gic = "/interrupt-controller@3020000";
		wakeupgen = "/interrupt-controller@0";
		pd_gpu = "/gpu-power-domain@7001000";
		nmi_intc = "/intc-nmi@7010320";
		dram = "/dram";
		ddr_clk = "/clk_ddr";
		dfi = "/nsi-pmu@3100000";
		dram_opp_table = "/opp_table";
		uboot = "/uboot";
		mmu_aw = "/iommu@30f0000";
		dump_reg = "/dump_reg@20000";
		reg_pio1_8 = "/pio-18";
		reg_pio2_8 = "/pio-28";
		reg_pio3_3 = "/pio-33";
		soc = "/soc@2900000";
		sram_ctrl = "/soc@2900000/sram_ctrl@3000000";
		ccu = "/soc@2900000/clock@3001000";
		r_ccu = "/soc@2900000/clock@7010000";
		dma = "/soc@2900000/dma-controller@3002000";
		rtc = "/soc@2900000/rtc@7000000";
		rtc_ccu = "/soc@2900000/rtc_ccu@7000000";
		nsi0 = "/soc@2900000/nsi-controller@3100000";
		speedbin_efuse = "/soc@2900000/sid@3006000/speed@00";
		ths_calib = "/soc@2900000/sid@3006000/calib@14";
		cpubin_efuse = "/soc@2900000/sid@3006000/calib@1c";
		cpubin_extend = "/soc@2900000/sid@3006000/calib@28";
		cryptoengine = "/soc@2900000/ce@1904000";
		ths = "/soc@2900000/ths@5070400";
		soc_timer0 = "/soc@2900000/timer@3009000";
		uart0 = "/soc@2900000/uart@5000000";
		uart1 = "/soc@2900000/uart@5000400";
		uart2 = "/soc@2900000/uart@5000800";
		uart3 = "/soc@2900000/uart@5000c00";
		uart4 = "/soc@2900000/uart@5001000";
		uart5 = "/soc@2900000/uart@5001400";
		uart6 = "/soc@2900000/uart@5001800";
		uart7 = "/soc@2900000/uart@7080000";
		sdc2 = "/soc@2900000/sdmmc@4022000";
		sdc0 = "/soc@2900000/sdmmc@4020000";
		sdc1 = "/soc@2900000/sdmmc@4021000";
		sdc3 = "/soc@2900000/sdmmc@4023000";
		nand0 = "/soc@2900000/nand0@04011000";
		twi0 = "/soc@2900000/twi@5002000";
		ctp = "/soc@2900000/twi@5002000/ctp@0";
		twi1 = "/soc@2900000/twi@5002400";
		twi2 = "/soc@2900000/twi@5002800";
		twi3 = "/soc@2900000/twi@5002c00";
		twi4 = "/soc@2900000/twi@5003000";
		twi5 = "/soc@2900000/twi@5003400";
		twi6 = "/soc@2900000/s_twi@7081400";
		pmu0 = "/soc@2900000/s_twi@7081400/pmu@34";
		usb_power_supply = "/soc@2900000/s_twi@7081400/pmu@34/usb_power_supply";
		gpio_power_supply = "/soc@2900000/s_twi@7081400/pmu@34/gpio_power_supply";
		bat_power_supply = "/soc@2900000/s_twi@7081400/pmu@34/bat-power-supply";
		powerkey0 = "/soc@2900000/s_twi@7081400/pmu@34/powerkey@0";
		regulator0 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0";
		reg_dcdc1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc1";
		reg_dcdc2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc2";
		reg_dcdc3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc3";
		reg_dcdc4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc4";
		reg_rtcldo = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/rtcldo";
		reg_aldo1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo1";
		reg_aldo2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo2";
		reg_aldo3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo3";
		reg_aldo4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo4";
		reg_bldo1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo1";
		reg_bldo2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo2";
		reg_bldo3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo3";
		reg_bldo4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo4";
		reg_cldo1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo1";
		reg_cldo2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo2";
		reg_cldo3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo3";
		reg_cldo4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo4";
		reg_cpusldo = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cpusldo";
		reg_drivevbus = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/drivevbus";
		axp_gpio0 = "/soc@2900000/s_twi@7081400/pmu@34/axp_gpio@0";
		twi7 = "/soc@2900000/s_twi@7081800";
		pwm = "/soc@2900000/pwm@300a000";
		pwm0 = "/soc@2900000/pwm0@300a010";
		pwm1 = "/soc@2900000/pwm1@300a011";
		pwm2 = "/soc@2900000/pwm2@300a012";
		pwm3 = "/soc@2900000/pwm3@300a013";
		pwm4 = "/soc@2900000/pwm4@300a014";
		pwm5 = "/soc@2900000/pwm5@300a015";
		pwm6 = "/soc@2900000/pwm6@300a016";
		pwm7 = "/soc@2900000/pwm7@300a017";
		pwm8 = "/soc@2900000/pwm8@300a018";
		pwm9 = "/soc@2900000/pwm9@300a019";
		vind0 = "/soc@2900000/vind@2000800";
		csi0 = "/soc@2900000/vind@2000800/csi@2001000";
		csi1 = "/soc@2900000/vind@2000800/csi@2002000";
		mipi0 = "/soc@2900000/vind@2000800/mipi@200a100";
		mipi1 = "/soc@2900000/vind@2000800/mipi@200a200";
		tdm0 = "/soc@2900000/vind@2000800/tdm@2108000";
		isp0 = "/soc@2900000/vind@2000800/isp@2100000";
		isp1 = "/soc@2900000/vind@2000800/isp@2102000";
		scaler0 = "/soc@2900000/vind@2000800/scaler@2110000";
		scaler1 = "/soc@2900000/vind@2000800/scaler@2110400";
		scaler2 = "/soc@2900000/vind@2000800/scaler@2110800";
		scaler3 = "/soc@2900000/vind@2000800/scaler@2110c00";
		actuator0 = "/soc@2900000/vind@2000800/actuator@2108180";
		flash0 = "/soc@2900000/vind@2000800/flash@2108190";
		sensor0 = "/soc@2900000/vind@2000800/sensor@200b800";
		sensor1 = "/soc@2900000/vind@2000800/sensor@200b810";
		vinc0 = "/soc@2900000/vind@2000800/vinc@2009000";
		vinc1 = "/soc@2900000/vind@2000800/vinc@2009200";
		vinc2 = "/soc@2900000/vind@2000800/vinc@2009400";
		vinc3 = "/soc@2900000/vind@2000800/vinc@2009600";
		keyboard = "/soc@2900000/keyboard@5070800";
		spi0 = "/soc@2900000/spi@5010000";
		spi1 = "/soc@2900000/spi@5011000";
		spi2 = "/soc@2900000/spi@5012000";
		ledc = "/soc@2900000/ledc@0x5018000";
		usbc0 = "/soc@2900000/usbc0@10";
		udc = "/soc@2900000/udc-controller@5100000";
		ehci0 = "/soc@2900000/ehci0-controller@5101000";
		ohci0 = "/soc@2900000/ohci0-controller@5101400";
		usbc1 = "/soc@2900000/usbc1@11";
		ehci1 = "/soc@2900000/ehci1-controller@5200000";
		ohci1 = "/soc@2900000/ohci1-controller@5200400";
		disp1 = "/soc@2900000/disp1@1";
		disp = "/soc@2900000/disp@6000000";
		uboot_disp = "/soc@2900000/uboot_disp@06100000";
		lcd0_1 = "/soc@2900000/lcd0_1@1c0c000";
		lcd0_2 = "/soc@2900000/lcd0_2@1c0c000";
		lcd0_3 = "/soc@2900000/lcd0_3@1c0c000";
		lcd0 = "/soc@2900000/lcd0@1c0c000";
		lcd1 = "/soc@2900000/lcd1@1";
		eink = "/soc@2900000/eink@6400000";
		uboot_eink = "/soc@2900000/uboot_eink@6400000";
		ve = "/soc@2900000/ve@1c0e000";
		g2d = "/soc@2900000/g2d@6480000";
		pinctrl_test = "/soc@2900000/pinctrl_test@0";
		codec = "/soc@2900000/codec@5096000";
		dummy_cpudai = "/soc@2900000/dummy_cpudai@509632c";
		sndcodec = "/soc@2900000/sound@5096330";
		spdif = "/soc@2900000/spdif@5094000";
		soundspdif = "/soc@2900000/soundspdif@5094040";
		dmic = "/soc@2900000/dmic@5095000";
		dmic_codec = "/soc@2900000/sound@5095050";
		sounddmic = "/soc@2900000/sounddmic@5095060";
		daudio0 = "/soc@2900000/daudio@5090000";
		sounddaudio0 = "/soc@2900000/sounddaudio0@509007c";
		daudio0_master = "/soc@2900000/sounddaudio0@509007c/simple-audio-card,codec";
		daudio1 = "/soc@2900000/daudio@5091000";
		sounddaudio1 = "/soc@2900000/sounddaudio1@509107c";
		daudio1_master = "/soc@2900000/sounddaudio1@509107c/simple-audio-card,codec";
		daudio2 = "/soc@2900000/daudio@5092000";
		sounddaudio2 = "/soc@2900000/sounddaudio2@509207c";
		daudio2_master = "/soc@2900000/sounddaudio2@509207c/simple-audio-card,codec";
		daudio3 = "/soc@2900000/daudio@5093000";
		sounddaudio3 = "/soc@2900000/sounddaudio3@509307c";
		daudio3_master = "/soc@2900000/sounddaudio3@509307c/simple-audio-card,codec";
		r_pio = "/soc@2900000/pinctrl@7022000";
		s_rsb0_pins_a = "/soc@2900000/pinctrl@7022000/s_rsb0@0";
		s_uart0_pins_a = "/soc@2900000/pinctrl@7022000/s_uart0@0";
		s_uart0_pins_b = "/soc@2900000/pinctrl@7022000/s_uart0@1";
		s_twi0_pins_a = "/soc@2900000/pinctrl@7022000/s_twi0@0";
		s_twi0_pins_b = "/soc@2900000/pinctrl@7022000/s_twi0@1";
		s_twi1_pins_a = "/soc@2900000/pinctrl@7022000/s_twi1@0";
		s_twi1_pins_b = "/soc@2900000/pinctrl@7022000/s_twi1@1";
		s_cir0_pins_a = "/soc@2900000/pinctrl@7022000/s_cir0@0";
		pio = "/soc@2900000/pinctrl@300b000";
		test_pins_a = "/soc@2900000/pinctrl@300b000/test_pins@0";
		test_pins_b = "/soc@2900000/pinctrl@300b000/test_pins@1";
		uart0_pins_a = "/soc@2900000/pinctrl@300b000/uart0@0";
		uart0_pins_b = "/soc@2900000/pinctrl@300b000/uart0@1";
		uart1_pins_a = "/soc@2900000/pinctrl@300b000/uart1@0";
		uart1_pins_b = "/soc@2900000/pinctrl@300b000/uart1@1";
		uart2_pins_a = "/soc@2900000/pinctrl@300b000/uart2@0";
		uart2_pins_b = "/soc@2900000/pinctrl@300b000/uart2@1";
		uart3_pins_a = "/soc@2900000/pinctrl@300b000/uart3@0";
		uart3_pins_b = "/soc@2900000/pinctrl@300b000/uart3@1";
		uart4_pins_a = "/soc@2900000/pinctrl@300b000/uart4@0";
		uart4_pins_b = "/soc@2900000/pinctrl@300b000/uart4@1";
		uart5_pins_a = "/soc@2900000/pinctrl@300b000/uart5@0";
		uart5_pins_b = "/soc@2900000/pinctrl@300b000/uart5@1";
		uart6_pins_a = "/soc@2900000/pinctrl@300b000/uart6@0";
		uart6_pins_b = "/soc@2900000/pinctrl@300b000/uart6@1";
		ir0_pins_a = "/soc@2900000/pinctrl@300b000/ir0@0";
		ir0_pins_b = "/soc@2900000/pinctrl@300b000/ir0@1";
		twi0_pins_a = "/soc@2900000/pinctrl@300b000/twi0@0";
		twi0_pins_b = "/soc@2900000/pinctrl@300b000/twi0@1";
		twi1_pins_a = "/soc@2900000/pinctrl@300b000/twi1@0";
		twi1_pins_b = "/soc@2900000/pinctrl@300b000/twi1@1";
		twi2_pins_a = "/soc@2900000/pinctrl@300b000/twi2@0";
		twi2_pins_b = "/soc@2900000/pinctrl@300b000/twi2@1";
		twi3_pins_a = "/soc@2900000/pinctrl@300b000/twi3@0";
		twi3_pins_b = "/soc@2900000/pinctrl@300b000/twi3@1";
		twi4_pins_a = "/soc@2900000/pinctrl@300b000/twi4@0";
		twi4_pins_b = "/soc@2900000/pinctrl@300b000/twi4@1";
		twi5_pins_a = "/soc@2900000/pinctrl@300b000/twi5@0";
		twi5_pins_b = "/soc@2900000/pinctrl@300b000/twi5@1";
		ts0_pins_a = "/soc@2900000/pinctrl@300b000/ts0@0";
		ts0_pins_b = "/soc@2900000/pinctrl@300b000/ts0_sleep@0";
		spi0_pins_a = "/soc@2900000/pinctrl@300b000/spi0@0";
		spi0_pins_b = "/soc@2900000/pinctrl@300b000/spi0@1";
		spi0_pins_c = "/soc@2900000/pinctrl@300b000/spi0@2";
		spi1_pins_a = "/soc@2900000/pinctrl@300b000/spi1@0";
		spi1_pins_b = "/soc@2900000/pinctrl@300b000/spi1@1";
		spi1_pins_c = "/soc@2900000/pinctrl@300b000/spi1@2";
		spi2_pins_a = "/soc@2900000/pinctrl@300b000/spi2@0";
		spi2_pins_b = "/soc@2900000/pinctrl@300b000/spi2@1";
		spi2_pins_c = "/soc@2900000/pinctrl@300b000/spi2@2";
		card0_pins_a = "/soc@2900000/pinctrl@300b000/sdc0@0";
		sdc0_pins_a = "/soc@2900000/pinctrl@300b000/sdc0@0";
		sdc0_pins_b = "/soc@2900000/pinctrl@300b000/sdc0@1";
		sdc0_pins_c = "/soc@2900000/pinctrl@300b000/sdc0@2";
		sdc0_pins_d = "/soc@2900000/pinctrl@300b000/sdc0@3";
		sdc0_pins_e = "/soc@2900000/pinctrl@300b000/sdc0@4";
		sdc1_pins_a = "/soc@2900000/pinctrl@300b000/sdc1@0";
		sdc1_pins_b = "/soc@2900000/pinctrl@300b000/sdc1@1";
		card2_pins_a = "/soc@2900000/pinctrl@300b000/sdc2@0";
		sdc2_pins_a = "/soc@2900000/pinctrl@300b000/sdc2@0";
		sdc2_pins_b = "/soc@2900000/pinctrl@300b000/sdc2@1";
		card2_pins_c = "/soc@2900000/pinctrl@300b000/sdc2@2";
		sdc2_pins_c = "/soc@2900000/pinctrl@300b000/sdc2@2";
		sdc3_pins_a = "/soc@2900000/pinctrl@300b000/sdc3@0";
		sdc3_pins_b = "/soc@2900000/pinctrl@300b000/sdc3@1";
		daudio0_pins_a = "/soc@2900000/pinctrl@300b000/daudio0@0";
		daudio0_pins_b = "/soc@2900000/pinctrl@300b000/daudio0_sleep@0";
		daudio1_pins_a = "/soc@2900000/pinctrl@300b000/daudio1@0";
		daudio1_pins_b = "/soc@2900000/pinctrl@300b000/daudio1_sleep@0";
		daudio2_pins_a = "/soc@2900000/pinctrl@300b000/daudio2@0";
		daudio2_pins_b = "/soc@2900000/pinctrl@300b000/daudio2_sleep@0";
		daudio3_pins_a = "/soc@2900000/pinctrl@300b000/daudio3@0";
		daudio3_pins_b = "/soc@2900000/pinctrl@300b000/daudio3_sleep@0";
		spdif_pins_a = "/soc@2900000/pinctrl@300b000/spdif@0";
		spdif_pins_b = "/soc@2900000/pinctrl@300b000/spdif_sleep@0";
		dmic_pins_a = "/soc@2900000/pinctrl@300b000/dmic@0";
		dmic_pins_b = "/soc@2900000/pinctrl@300b000/dmic_sleep@0";
		csi_mclk0_pins_a = "/soc@2900000/pinctrl@300b000/csi_mclk0@0";
		csi_mclk0_pins_b = "/soc@2900000/pinctrl@300b000/csi_mclk0@1";
		csi_mclk1_pins_a = "/soc@2900000/pinctrl@300b000/csi_mclk1@0";
		csi_mclk1_pins_b = "/soc@2900000/pinctrl@300b000/csi_mclk1@1";
		scr0_pins_a = "/soc@2900000/pinctrl@300b000/scr0@0";
		scr0_pins_b = "/soc@2900000/pinctrl@300b000/scr0@1";
		scr0_pins_c = "/soc@2900000/pinctrl@300b000/scr0@2";
		scr1_pins_a = "/soc@2900000/pinctrl@300b000/scr1@0";
		scr1_pins_b = "/soc@2900000/pinctrl@300b000/scr1@1";
		scr1_pins_c = "/soc@2900000/pinctrl@300b000/scr1@2";
		nand0_pins_a = "/soc@2900000/pinctrl@300b000/nand0@0";
		nand0_pins_b = "/soc@2900000/pinctrl@300b000/nand0@1";
		nand0_pins_c = "/soc@2900000/pinctrl@300b000/nand0@2";
		ccir_clk_pin_a = "/soc@2900000/pinctrl@300b000/ac200@2";
		ccir_clk_pin_b = "/soc@2900000/pinctrl@300b000/ac200@3";
		gmac_pins_a = "/soc@2900000/pinctrl@300b000/gmac@0";
		gmac_pins_b = "/soc@2900000/pinctrl@300b000/gmac@1";
		gmac1_pins_a = "/soc@2900000/pinctrl@300b000/gmac1@0";
		gmac1_pins_b = "/soc@2900000/pinctrl@300b000/gmac1@1";
		ledc_pins_a = "/soc@2900000/pinctrl@300b000/ledc@0";
		ledc_pins_b = "/soc@2900000/pinctrl@300b000/ledc@1";
		lvds0_pins_a = "/soc@2900000/pinctrl@300b000/lvds0@0";
		lvds0_pins_b = "/soc@2900000/pinctrl@300b000/lvds0@1";
		lvds1_pins_a = "/soc@2900000/pinctrl@300b000/lvds1@0";
		lvds1_pins_b = "/soc@2900000/pinctrl@300b000/lvds1@1";
		lvds2_pins_a = "/soc@2900000/pinctrl@300b000/lvds2@0";
		lvds2_pins_b = "/soc@2900000/pinctrl@300b000/lvds2@1";
		lvds3_pins_a = "/soc@2900000/pinctrl@300b000/lvds3@0";
		lvds3_pins_b = "/soc@2900000/pinctrl@300b000/lvds3@1";
		lcd1_lvds2link_pins_a = "/soc@2900000/pinctrl@300b000/lcd1_lvds2link@0";
		lcd1_lvds2link_pins_b = "/soc@2900000/pinctrl@300b000/lcd1_lvds2link@1";
		lvds2link_pins_a = "/soc@2900000/pinctrl@300b000/lvds2link@0";
		lvds2link_pins_b = "/soc@2900000/pinctrl@300b000/lvds2link@1";
		rgb24_pins_a = "/soc@2900000/pinctrl@300b000/rgb24@0";
		rgb24_pins_b = "/soc@2900000/pinctrl@300b000/rgb24@1";
		rgb18_pins_a = "/soc@2900000/pinctrl@300b000/rgb18@0";
		rgb18_pins_b = "/soc@2900000/pinctrl@300b000/rgb18@1";
		eink_pins_a = "/soc@2900000/pinctrl@300b000/eink@0";
		eink_pins_b = "/soc@2900000/pinctrl@300b000/eink@1";
		dsi4lane_pins_a = "/soc@2900000/pinctrl@300b000/dsi4lane@0";
		dsi4lane_pins_b = "/soc@2900000/pinctrl@300b000/dsi4lane@1";
		pwm0_pin_a = "/soc@2900000/pinctrl@300b000/pwm0_pin_a";
		pwm0_pin_b = "/soc@2900000/pinctrl@300b000/pwm0_pin_b";
		pwm1_pin_a = "/soc@2900000/pinctrl@300b000/pwm1_pin_a";
		pwm1_pin_b = "/soc@2900000/pinctrl@300b000/pwm1_pin_b";
		gpu = "/soc@2900000/gpu@1800000";
		rfkill = "/soc@2900000/rfkill";
		addr_mgt = "/soc@2900000/addr_mgt";
		btlpm = "/soc@2900000/btlpm";
		standby_param = "/soc@2900000/standby_param@7000400";
		reg_usb1_vbus = "/usb1-vbus";
		axp2202_parameter = "/axp2202-parameter";
	};
};

柚木鉉

欸你个小坏蛋，console=ttyAS0，干了换ttyS0

柚木鉉

串口不能输入欸

柚木鉉

设备树是热加载的，怪不得晕哥的设备树就那么点

柚木鉉

emmc干下来，用tf卡启动

柚木鉉

后盖一掰就开了

柚木鉉

带屏幕带电池开发板

晕哥的帖子：萌新在淘宝整了一台“台电” P85 TLA016 平板电脑
https://bbs.aw-ol.com/topic/1352/share/1

柚木鉉

@zt13947787451 （是这样的x，不过摄像头是可以用的

柚木鉉

16b375f6-82eb-40fa-97eb-3f18fd31302b-2f56ebea21bdbc1fda35848fe863b4b.jpg

试试驱动显像管，好像没输出

柚木鉉

@honey130602 修改brandy-2.0/uboot-2018/configs/xxx_defconfig

柚木鉉

咋看咋像屏幕初始化代码

[K080_IM2AYC805_R] send cmd=0xff
[K080_IM2AYC805_R] send cmd=0x1
[K080_IM2AYC805_R] send cmd=0x2
[K080_IM2AYC805_R] send cmd=0x3
[K080_IM2AYC805_R] send cmd=0x4
[K080_IM2AYC805_R] send cmd=0x5
[K080_IM2AYC805_R] send cmd=0x6
[K080_IM2AYC805_R] send cmd=0x7
[K080_IM2AYC805_R] send cmd=0x8
[K080_IM2AYC805_R] send cmd=0x9
[K080_IM2AYC805_R] send cmd=0xa
[K080_IM2AYC805_R] send cmd=0xb
[K080_IM2AYC805_R] send cmd=0xc
[K080_IM2AYC805_R] send cmd=0xd
[K080_IM2AYC805_R] send cmd=0xe
[K080_IM2AYC805_R] send cmd=0xf
[K080_IM2AYC805_R] send cmd=0x10
[K080_IM2AYC805_R] send cmd=0x11
[K080_IM2AYC805_R] send cmd=0x12
[K080_IM2AYC805_R] send cmd=0x13
[K080_IM2AYC805_R] send cmd=0x14
[K080_IM2AYC805_R] send cmd=0x15
[K080_IM2AYC805_R] send cmd=0x16
[K080_IM2AYC805_R] send cmd=0x17
[K080_IM2AYC805_R] send cmd=0x18
[K080_IM2AYC805_R] send cmd=0x19
[K080_IM2AYC805_R] send cmd=0x1a
[K080_IM2AYC805_R] send cmd=0x1b
[K080_IM2AYC805_R] send cmd=0x1c
[K080_IM2AYC805_R] send cmd=0x1d
[K080_IM2AYC805_R] send cmd=0x1e
[K080_IM2AYC805_R] send cmd=0x1f
[K080_IM2AYC805_R] send cmd=0x20
[K080_IM2AYC805_R] send cmd=0x21
[K080_IM2AYC805_R] send cmd=0x22
[K080_IM2AYC805_R] send cmd=0x23
[K080_IM2AYC805_R] send cmd=0x24
[K080_IM2AYC805_R] send cmd=0x25
[K080_IM2AYC805_R] send cmd=0x26
[K080_IM2AYC805_R] send cmd=0x27
[K080_IM2AYC805_R] send cmd=0x28
[K080_IM2AYC805_R] send cmd=0x29
[K080_IM2AYC805_R] send cmd=0x2a
[K080_IM2AYC805_R] send cmd=0x2b
[K080_IM2AYC805_R] send cmd=0x2c
[K080_IM2AYC805_R] send cmd=0x2d
[K080_IM2AYC805_R] send cmd=0x2e
[K080_IM2AYC805_R] send cmd=0x2f
[K080_IM2AYC805_R] send cmd=0x30
[K080_IM2AYC805_R] send cmd=0x31
[K080_IM2AYC805_R] send cmd=0x32
[K080_IM2AYC805_R] send cmd=0x33
[K080_IM2AYC805_R] send cmd=0x34
[K080_IM2AYC805_R] send cmd=0x35
[K080_IM2AYC805_R] send cmd=0x36
[K080_IM2AYC805_R] send cmd=0x37
[K080_IM2AYC805_R] send cmd=0x38
[K080_IM2AYC805_R] send cmd=0x39
[K080_IM2AYC805_R] send cmd=0x3a
[K080_IM2AYC805_R] send cmd=0x3b
[K080_IM2AYC805_R] send cmd=0x3c
[K080_IM2AYC805_R] send cmd=0x3d
[K080_IM2AYC805_R] send cmd=0x3e
[K080_IM2AYC805_R] send cmd=0x3f
[K080_IM2AYC805_R] send cmd=0x40
[K080_IM2AYC805_R] send cmd=0x41
[K080_IM2AYC805_R] send cmd=0x42
[K080_IM2AYC805_R] send cmd=0x43
[K080_IM2AYC805_R] send cmd=0x44
[K080_IM2AYC805_R] send cmd=0x50
[K080_IM2AYC805_R] send cmd=0x51
[K080_IM2AYC805_R] send cmd=0x52
[K080_IM2AYC805_R] send cmd=0x53
[K080_IM2AYC805_R] send cmd=0x54
[K080_IM2AYC805_R] send cmd=0x55
[K080_IM2AYC805_R] send cmd=0x56
[K080_IM2AYC805_R] send cmd=0x57
[K080_IM2AYC805_R] send cmd=0x58
[K080_IM2AYC805_R] send cmd=0x59
[K080_IM2AYC805_R] send cmd=0x5a
[K080_IM2AYC805_R] send cmd=0x5b
[K080_IM2AYC805_R] send cmd=0x5c
[K080_IM2AYC805_R] send cmd=0x5d
[K080_IM2AYC805_R] send cmd=0x5e
[K080_IM2AYC805_R] send cmd=0x5f
[K080_IM2AYC805_R] send cmd=0x60
[K080_IM2AYC805_R] send cmd=0x61
[K080_IM2AYC805_R] send cmd=0x62
[K080_IM2AYC805_R] send cmd=0x63
[K080_IM2AYC805_R] send cmd=0x64
[K080_IM2AYC805_R] send cmd=0x65
[K080_IM2AYC805_R] send cmd=0x66
[K080_IM2AYC805_R] send cmd=0x67
[K080_IM2AYC805_R] send cmd=0x68
[K080_IM2AYC805_R] send cmd=0x69
[K080_IM2AYC805_R] send cmd=0x6a
[K080_IM2AYC805_R] send cmd=0x6b
[K080_IM2AYC805_R] send cmd=0x6c
[K080_IM2AYC805_R] send cmd=0x6d
[K080_IM2AYC805_R] send cmd=0x6e
[K080_IM2AYC805_R] send cmd=0x6f
[K080_IM2AYC805_R] send cmd=0x70
[K080_IM2AYC805_R] send cmd=0x71
[K080_IM2AYC805_R] send cmd=0x72
[K080_IM2AYC805_R] send cmd=0x73
[K080_IM2AYC805_R] send cmd=0x74
[K080_IM2AYC805_R] send cmd=0x75
[K080_IM2AYC805_R] send cmd=0x76
[K080_IM2AYC805_R] send cmd=0x77
[K080_IM2AYC805_R] send cmd=0x78
[K080_IM2AYC805_R] send cmd=0x79
[K080_IM2AYC805_R] send cmd=0x7a
[K080_IM2AYC805_R] send cmd=0x7b
[K080_IM2AYC805_R] send cmd=0x7c
[K080_IM2AYC805_R] send cmd=0x7d
[K080_IM2AYC805_R] send cmd=0x7e
[K080_IM2AYC805_R] send cmd=0x7f
[K080_IM2AYC805_R] send cmd=0x80
[K080_IM2AYC805_R] send cmd=0x81
[K080_IM2AYC805_R] send cmd=0x82
[K080_IM2AYC805_R] send cmd=0x83
[K080_IM2AYC805_R] send cmd=0x84
[K080_IM2AYC805_R] send cmd=0x85
[K080_IM2AYC805_R] send cmd=0x86
[K080_IM2AYC805_R] send cmd=0x87
[K080_IM2AYC805_R] send cmd=0x88
[K080_IM2AYC805_R] send cmd=0x89
[K080_IM2AYC805_R] send cmd=0x8a
[K080_IM2AYC805_R] send cmd=0xff
[K080_IM2AYC805_R] send cmd=0x6c
[K080_IM2AYC805_R] send cmd=0x6e
[K080_IM2AYC805_R] send cmd=0x6f
[K080_IM2AYC805_R] send cmd=0x3a
[K080_IM2AYC805_R] send cmd=0x8d
[K080_IM2AYC805_R] send cmd=0x87
[K080_IM2AYC805_R] send cmd=0x26
[K080_IM2AYC805_R] send cmd=0xb2
[K080_IM2AYC805_R] send cmd=0xb5
[K080_IM2AYC805_R] send cmd=0x31
[K080_IM2AYC805_R] send cmd=0x30
[K080_IM2AYC805_R] send cmd=0x3b
[K080_IM2AYC805_R] send cmd=0x35
[K080_IM2AYC805_R] send cmd=0x33
[K080_IM2AYC805_R] send cmd=0x7a
[K080_IM2AYC805_R] send cmd=0x38
[K080_IM2AYC805_R] send cmd=0x39
[K080_IM2AYC805_R] send cmd=0xff
[K080_IM2AYC805_R] send cmd=0x22
[K080_IM2AYC805_R] send cmd=0x31
[K080_IM2AYC805_R] send cmd=0x53
[K080_IM2AYC805_R] send cmd=0x55
[K080_IM2AYC805_R] send cmd=0x50
[K080_IM2AYC805_R] send cmd=0x51
[K080_IM2AYC805_R] send cmd=0x60
[K080_IM2AYC805_R] send cmd=0x63
[K080_IM2AYC805_R] send cmd=0xa0
[K080_IM2AYC805_R] send cmd=0xa1
[K080_IM2AYC805_R] send cmd=0xa2
[K080_IM2AYC805_R] send cmd=0xa3
[K080_IM2AYC805_R] send cmd=0xa4
[K080_IM2AYC805_R] send cmd=0xa5
[K080_IM2AYC805_R] send cmd=0xa6
[K080_IM2AYC805_R] send cmd=0xa7
[K080_IM2AYC805_R] send cmd=0xa8
[K080_IM2AYC805_R] send cmd=0xa9
[K080_IM2AYC805_R] send cmd=0xaa
[K080_IM2AYC805_R] send cmd=0xab
[K080_IM2AYC805_R] send cmd=0xac
[K080_IM2AYC805_R] send cmd=0xad
[K080_IM2AYC805_R] send cmd=0xae
[K080_IM2AYC805_R] send cmd=0xaf
[K080_IM2AYC805_R] send cmd=0xb0
[K080_IM2AYC805_R] send cmd=0xb1
[K080_IM2AYC805_R] send cmd=0xb2
[K080_IM2AYC805_R] send cmd=0xb3
[K080_IM2AYC805_R] send cmd=0xc0
[K080_IM2AYC805_R] send cmd=0xc1
[K080_IM2AYC805_R] send cmd=0xc2
[K080_IM2AYC805_R] send cmd=0xc3
[K080_IM2AYC805_R] send cmd=0xc4
[K080_IM2AYC805_R] send cmd=0xc5
[K080_IM2AYC805_R] send cmd=0xc6
[K080_IM2AYC805_R] send cmd=0xc7
[K080_IM2AYC805_R] send cmd=0xc8
[K080_IM2AYC805_R] send cmd=0xc9
[K080_IM2AYC805_R] send cmd=0xca
[K080_IM2AYC805_R] send cmd=0xcb
[K080_IM2AYC805_R] send cmd=0xcc
[K080_IM2AYC805_R] send cmd=0xcd
[K080_IM2AYC805_R] send cmd=0xce
[K080_IM2AYC805_R] send cmd=0xcf
[K080_IM2AYC805_R] send cmd=0xd0
[K080_IM2AYC805_R] send cmd=0xd1
[K080_IM2AYC805_R] send cmd=0xd2
[K080_IM2AYC805_R] send cmd=0xd3
[K080_IM2AYC805_R] send cmd=0xff
[K080_IM2AYC805_R] send cmd=0x11
[K080_IM2AYC805_R] send cmd=0x29
[K080_IM2AYC805_R] send cmd=0x35

柚木鉉

@cgh4116450404 编辑下设备树，daudio选择i2s1

柚木鉉

@wells 是这样报错的，可以先刷原版镜像测试一下，ZQ报错可能是DRAM电压不对，或者单纯外接电阻阻值不对

柚木鉉

@zt13947787451 对着手册改一下？

柚木鉉

@masterlu 有点奇怪

柚木鉉

@zt13947787451 那可以试试看能不能用

柚木鉉

@zt13947787451 还没尝试过d1上的dvp，不太清楚了。我记得usb摄像头支持了

柚木鉉

应该是目前软件还没有实现这个功能，手册上有那就是有了

柚木鉉

@mhcsoft 升级下PhonixSuit试试

YuzukiTsuru 发布的帖子

YuzukiCK1N小电脑

软件

硬件

功能：

开源地址

视频：转换全志的镜像成为标准镜像并用Etcher刷写。